Converted RSP callbacks into device callbacks. Removed a ton of

tag-based queries in favor of using the device passed.
This commit is contained in:
Aaron Giles 2010-01-01 00:18:16 +00:00
parent b3a8dd2113
commit 0f6f7ba842
5 changed files with 63 additions and 59 deletions

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@ -74,10 +74,10 @@ typedef void (*rsp_set_status_func)(const device_config *device, UINT32 status);
typedef struct _rsp_config rsp_config; typedef struct _rsp_config rsp_config;
struct _rsp_config struct _rsp_config
{ {
read32_space_func dp_reg_r; read32_device_func dp_reg_r;
write32_space_func dp_reg_w; write32_device_func dp_reg_w;
read32_space_func sp_reg_r; read32_device_func sp_reg_r;
write32_space_func sp_reg_w; write32_device_func sp_reg_w;
rsp_set_status_func sp_set_status; rsp_set_status_func sp_set_status;
}; };

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@ -579,14 +579,14 @@ static void cfunc_get_cop0_reg(void *param)
{ {
if(dest) if(dest)
{ {
rsp->r[dest] = (rsp->config->sp_reg_r)(rsp->program, reg, 0x00000000); rsp->r[dest] = (rsp->config->sp_reg_r)(rsp->device, reg, 0x00000000);
} }
} }
else if (reg >= 8 && reg < 16) else if (reg >= 8 && reg < 16)
{ {
if(dest) if(dest)
{ {
rsp->r[dest] = (rsp->config->dp_reg_r)(rsp->program, reg - 8, 0x00000000); rsp->r[dest] = (rsp->config->dp_reg_r)(rsp->device, reg - 8, 0x00000000);
} }
} }
else else
@ -603,11 +603,11 @@ static void cfunc_set_cop0_reg(void *param)
if (reg >= 0 && reg < 8) if (reg >= 0 && reg < 8)
{ {
(rsp->config->sp_reg_w)(rsp->program, reg, data, 0x00000000); (rsp->config->sp_reg_w)(rsp->device, reg, data, 0x00000000);
} }
else if (reg >= 8 && reg < 16) else if (reg >= 8 && reg < 16)
{ {
(rsp->config->dp_reg_w)(rsp->program, reg - 8, data, 0x00000000); (rsp->config->dp_reg_w)(rsp->device, reg - 8, data, 0x00000000);
} }
else else
{ {

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@ -186,8 +186,8 @@ static ADDRESS_MAP_START( n64_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE(&rdram) // RDRAM AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE(&rdram) // RDRAM
AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("dmem") // RSP DMEM AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("dmem") // RSP DMEM
AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("imem") // RSP IMEM AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("imem") // RSP IMEM
AM_RANGE(0x04040000, 0x040fffff) AM_READWRITE(n64_sp_reg_r, n64_sp_reg_w) // RSP AM_RANGE(0x04040000, 0x040fffff) AM_DEVREADWRITE("rsp", n64_sp_reg_r, n64_sp_reg_w) // RSP
AM_RANGE(0x04100000, 0x041fffff) AM_READWRITE(n64_dp_reg_r, n64_dp_reg_w) // RDP AM_RANGE(0x04100000, 0x041fffff) AM_DEVREADWRITE("rsp", n64_dp_reg_r, n64_dp_reg_w) // RDP
AM_RANGE(0x04300000, 0x043fffff) AM_READWRITE(n64_mi_reg_r, n64_mi_reg_w) // MIPS Interface AM_RANGE(0x04300000, 0x043fffff) AM_READWRITE(n64_mi_reg_r, n64_mi_reg_w) // MIPS Interface
AM_RANGE(0x04400000, 0x044fffff) AM_READWRITE(n64_vi_reg_r, n64_vi_reg_w) // Video Interface AM_RANGE(0x04400000, 0x044fffff) AM_READWRITE(n64_vi_reg_r, n64_vi_reg_w) // Video Interface
AM_RANGE(0x04500000, 0x045fffff) AM_READWRITE(n64_ai_reg_r, n64_ai_reg_w) // Audio Interface AM_RANGE(0x04500000, 0x045fffff) AM_READWRITE(n64_ai_reg_r, n64_ai_reg_w) // Audio Interface

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@ -79,10 +79,10 @@ extern READ32_HANDLER( n64_rdram_reg_r );
extern WRITE32_HANDLER( n64_rdram_reg_w ); extern WRITE32_HANDLER( n64_rdram_reg_w );
extern READ32_HANDLER( n64_mi_reg_r ); extern READ32_HANDLER( n64_mi_reg_r );
extern WRITE32_HANDLER( n64_mi_reg_w ); extern WRITE32_HANDLER( n64_mi_reg_w );
extern READ32_HANDLER( n64_sp_reg_r ); extern READ32_DEVICE_HANDLER( n64_sp_reg_r );
extern WRITE32_HANDLER( n64_sp_reg_w ); extern WRITE32_DEVICE_HANDLER( n64_sp_reg_w );
extern READ32_HANDLER( n64_dp_reg_r ); extern READ32_DEVICE_HANDLER( n64_dp_reg_r );
extern WRITE32_HANDLER( n64_dp_reg_w ); extern WRITE32_DEVICE_HANDLER( n64_dp_reg_w );
extern READ32_HANDLER( n64_vi_reg_r ); extern READ32_HANDLER( n64_vi_reg_r );
extern WRITE32_HANDLER( n64_vi_reg_w ); extern WRITE32_HANDLER( n64_vi_reg_w );
extern READ32_HANDLER( n64_ai_reg_r ); extern READ32_HANDLER( n64_ai_reg_r );

View File

@ -442,7 +442,7 @@ static void sp_set_status(const device_config *device, UINT32 status)
} }
} }
READ32_HANDLER( n64_sp_reg_r ) READ32_DEVICE_HANDLER( n64_sp_reg_r )
{ {
switch (offset) switch (offset)
{ {
@ -456,7 +456,7 @@ READ32_HANDLER( n64_sp_reg_r )
return (sp_dma_skip << 20) | (sp_dma_count << 12) | sp_dma_length; return (sp_dma_skip << 20) | (sp_dma_count << 12) | sp_dma_length;
case 0x10/4: // SP_STATUS_REG case 0x10/4: // SP_STATUS_REG
return cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR); return cpu_get_reg(device, RSP_SR);
case 0x14/4: // SP_DMA_FULL_REG case 0x14/4: // SP_DMA_FULL_REG
return 0; return 0;
@ -490,17 +490,17 @@ READ32_HANDLER( n64_sp_reg_r )
return ++dp_clock; return ++dp_clock;
case 0x40000/4: // PC case 0x40000/4: // PC
return cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_PC) & 0x00000fff; return cpu_get_reg(device, RSP_PC) & 0x00000fff;
default: default:
logerror("sp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(space->cpu)); logerror("sp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(device));
break; break;
} }
return 0; return 0;
} }
WRITE32_HANDLER( n64_sp_reg_w ) WRITE32_DEVICE_HANDLER( n64_sp_reg_w )
{ {
if ((offset & 0x10000) == 0) if ((offset & 0x10000) == 0)
{ {
@ -530,16 +530,19 @@ WRITE32_HANDLER( n64_sp_reg_w )
case 0x10/4: // RSP_STATUS_REG case 0x10/4: // RSP_STATUS_REG
{ {
UINT32 oldstatus = cpu_get_reg(device, RSP_SR);
UINT32 newstatus = oldstatus;
// printf( "RSP_STATUS_REG Write; %08x\n", data ); // printf( "RSP_STATUS_REG Write; %08x\n", data );
if (data & 0x00000001) // clear halt if (data & 0x00000001) // clear halt
{ {
//if (first_rsp) //if (first_rsp)
//{ //{
// cpu_spinuntil_trigger(space->cpu, 6789); // cpu_spinuntil_trigger(device, 6789);
// printf( "Clearing RSP_STATUS_HALT\n" ); // printf( "Clearing RSP_STATUS_HALT\n" );
cputag_set_input_line(space->machine, "rsp", INPUT_LINE_HALT, CLEAR_LINE); cpu_set_input_line(device, INPUT_LINE_HALT, CLEAR_LINE);
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_HALT ); newstatus &= ~RSP_STATUS_HALT;
// RSP_STATUS &= ~RSP_STATUS_HALT; // RSP_STATUS &= ~RSP_STATUS_HALT;
//} //}
//else //else
@ -550,130 +553,131 @@ WRITE32_HANDLER( n64_sp_reg_w )
if (data & 0x00000002) // set halt if (data & 0x00000002) // set halt
{ {
// printf( "Setting RSP_STATUS_HALT\n" ); // printf( "Setting RSP_STATUS_HALT\n" );
cputag_set_input_line(space->machine, "rsp", INPUT_LINE_HALT, ASSERT_LINE); cpu_set_input_line(device, INPUT_LINE_HALT, ASSERT_LINE);
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_HALT ); newstatus |= RSP_STATUS_HALT;
// RSP_STATUS |= RSP_STATUS_HALT; // RSP_STATUS |= RSP_STATUS_HALT;
} }
if (data & 0x00000004) if (data & 0x00000004)
{ {
//printf( "Clearing RSP_STATUS_BROKE\n" ); //printf( "Clearing RSP_STATUS_BROKE\n" );
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_BROKE ); newstatus &= ~RSP_STATUS_BROKE;
// RSP_STATUS &= ~RSP_STATUS_BROKE; // clear broke // RSP_STATUS &= ~RSP_STATUS_BROKE; // clear broke
} }
if (data & 0x00000008) // clear interrupt if (data & 0x00000008) // clear interrupt
{ {
clear_rcp_interrupt(space->machine, SP_INTERRUPT); clear_rcp_interrupt(device->machine, SP_INTERRUPT);
} }
if (data & 0x00000010) // set interrupt if (data & 0x00000010) // set interrupt
{ {
signal_rcp_interrupt(space->machine, SP_INTERRUPT); signal_rcp_interrupt(device->machine, SP_INTERRUPT);
} }
if (data & 0x00000020) if (data & 0x00000020)
{ {
// printf( "Clearing RSP_STATUS_SSTEP\n" ); // printf( "Clearing RSP_STATUS_SSTEP\n" );
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SSTEP ); newstatus &= ~RSP_STATUS_SSTEP;
// RSP_STATUS &= ~RSP_STATUS_SSTEP; // clear single step // RSP_STATUS &= ~RSP_STATUS_SSTEP; // clear single step
} }
if (data & 0x00000040) if (data & 0x00000040)
{ {
//printf( "Setting RSP_STATUS_SSTEP\n" ); //printf( "Setting RSP_STATUS_SSTEP\n" );
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SSTEP ); newstatus |= RSP_STATUS_SSTEP;
if( !( cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ( RSP_STATUS_BROKE | RSP_STATUS_HALT ) ) ) if( !( oldstatus & ( RSP_STATUS_BROKE | RSP_STATUS_HALT ) ) )
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_STEPCNT, 1 ); cpu_set_reg(device, RSP_STEPCNT, 1 );
} }
// RSP_STATUS |= RSP_STATUS_SSTEP; // set single step // RSP_STATUS |= RSP_STATUS_SSTEP; // set single step
} }
if (data & 0x00000080) if (data & 0x00000080)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_INTR_BREAK ); newstatus &= ~RSP_STATUS_INTR_BREAK;
// RSP_STATUS &= ~RSP_STATUS_INTR_BREAK; // clear interrupt on break // RSP_STATUS &= ~RSP_STATUS_INTR_BREAK; // clear interrupt on break
} }
if (data & 0x00000100) if (data & 0x00000100)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_INTR_BREAK ); newstatus |= RSP_STATUS_INTR_BREAK;
// RSP_STATUS |= RSP_STATUS_INTR_BREAK; // set interrupt on break // RSP_STATUS |= RSP_STATUS_INTR_BREAK; // set interrupt on break
} }
if (data & 0x00000200) if (data & 0x00000200)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL0 ); newstatus &= ~RSP_STATUS_SIGNAL0;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL0; // clear signal 0 // RSP_STATUS &= ~RSP_STATUS_SIGNAL0; // clear signal 0
} }
if (data & 0x00000400) if (data & 0x00000400)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL0 ); newstatus |= RSP_STATUS_SIGNAL0;
// RSP_STATUS |= RSP_STATUS_SIGNAL0; // set signal 0 // RSP_STATUS |= RSP_STATUS_SIGNAL0; // set signal 0
} }
if (data & 0x00000800) if (data & 0x00000800)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL1 ); newstatus &= ~RSP_STATUS_SIGNAL1;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL1; // clear signal 1 // RSP_STATUS &= ~RSP_STATUS_SIGNAL1; // clear signal 1
} }
if (data & 0x00001000) if (data & 0x00001000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL1 ); newstatus |= RSP_STATUS_SIGNAL1;
// RSP_STATUS |= RSP_STATUS_SIGNAL1; // set signal 1 // RSP_STATUS |= RSP_STATUS_SIGNAL1; // set signal 1
} }
if (data & 0x00002000) if (data & 0x00002000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL2 ); newstatus &= ~RSP_STATUS_SIGNAL2 ;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL2; // clear signal 2 // RSP_STATUS &= ~RSP_STATUS_SIGNAL2; // clear signal 2
} }
if (data & 0x00004000) if (data & 0x00004000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL2 ); newstatus |= RSP_STATUS_SIGNAL2;
// RSP_STATUS |= RSP_STATUS_SIGNAL2; // set signal 2 // RSP_STATUS |= RSP_STATUS_SIGNAL2; // set signal 2
} }
if (data & 0x00008000) if (data & 0x00008000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL3 ); newstatus &= ~RSP_STATUS_SIGNAL3;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL3; // clear signal 3 // RSP_STATUS &= ~RSP_STATUS_SIGNAL3; // clear signal 3
} }
if (data & 0x00010000) if (data & 0x00010000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL3 ); newstatus |= RSP_STATUS_SIGNAL3;
// RSP_STATUS |= RSP_STATUS_SIGNAL3; // set signal 3 // RSP_STATUS |= RSP_STATUS_SIGNAL3; // set signal 3
} }
if (data & 0x00020000) if (data & 0x00020000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL4 ); newstatus &= ~RSP_STATUS_SIGNAL4;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL4; // clear signal 4 // RSP_STATUS &= ~RSP_STATUS_SIGNAL4; // clear signal 4
} }
if (data & 0x00040000) if (data & 0x00040000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL4 ); newstatus |= RSP_STATUS_SIGNAL4;
// RSP_STATUS |= RSP_STATUS_SIGNAL4; // set signal 4 // RSP_STATUS |= RSP_STATUS_SIGNAL4; // set signal 4
} }
if (data & 0x00080000) if (data & 0x00080000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL5 ); newstatus &= ~RSP_STATUS_SIGNAL5;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL5; // clear signal 5 // RSP_STATUS &= ~RSP_STATUS_SIGNAL5; // clear signal 5
} }
if (data & 0x00100000) if (data & 0x00100000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL5 ); newstatus |= RSP_STATUS_SIGNAL5;
// RSP_STATUS |= RSP_STATUS_SIGNAL5; // set signal 5 // RSP_STATUS |= RSP_STATUS_SIGNAL5; // set signal 5
} }
if (data & 0x00200000) if (data & 0x00200000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL6 ); newstatus &= ~RSP_STATUS_SIGNAL6;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL6; // clear signal 6 // RSP_STATUS &= ~RSP_STATUS_SIGNAL6; // clear signal 6
} }
if (data & 0x00400000) if (data & 0x00400000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL6 ); newstatus |= RSP_STATUS_SIGNAL6;
// RSP_STATUS |= RSP_STATUS_SIGNAL6; // set signal 6 // RSP_STATUS |= RSP_STATUS_SIGNAL6; // set signal 6
} }
if (data & 0x00800000) if (data & 0x00800000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL7 ); newstatus &= ~RSP_STATUS_SIGNAL7;
// RSP_STATUS &= ~RSP_STATUS_SIGNAL7; // clear signal 7 // RSP_STATUS &= ~RSP_STATUS_SIGNAL7; // clear signal 7
} }
if (data & 0x01000000) if (data & 0x01000000)
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL7 ); newstatus |= RSP_STATUS_SIGNAL7;
// RSP_STATUS |= RSP_STATUS_SIGNAL7; // set signal 7 // RSP_STATUS |= RSP_STATUS_SIGNAL7; // set signal 7
} }
cpu_set_reg(device, RSP_SR, newstatus);
break; break;
} }
@ -686,7 +690,7 @@ WRITE32_HANDLER( n64_sp_reg_w )
break; break;
default: default:
logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(space->cpu)); logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(device));
break; break;
} }
} }
@ -696,18 +700,18 @@ WRITE32_HANDLER( n64_sp_reg_w )
{ {
case 0x00/4: // SP_PC_REG case 0x00/4: // SP_PC_REG
//printf( "Setting PC to: %08x\n", 0x04001000 | (data & 0xfff ) ); //printf( "Setting PC to: %08x\n", 0x04001000 | (data & 0xfff ) );
if( cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_NEXTPC) != 0xffffffff ) if( cpu_get_reg(device, RSP_NEXTPC) != 0xffffffff )
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_NEXTPC, 0x1000 | (data & 0xfff)); cpu_set_reg(device, RSP_NEXTPC, 0x1000 | (data & 0xfff));
} }
else else
{ {
cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_PC, 0x1000 | (data & 0xfff)); cpu_set_reg(device, RSP_PC, 0x1000 | (data & 0xfff));
} }
break; break;
default: default:
logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(space->cpu)); logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(device));
break; break;
} }
} }
@ -725,7 +729,7 @@ void dp_full_sync(running_machine *machine)
signal_rcp_interrupt(machine, DP_INTERRUPT); signal_rcp_interrupt(machine, DP_INTERRUPT);
} }
READ32_HANDLER( n64_dp_reg_r ) READ32_DEVICE_HANDLER( n64_dp_reg_r )
{ {
switch (offset) switch (offset)
{ {
@ -742,14 +746,14 @@ READ32_HANDLER( n64_dp_reg_r )
return dp_status; return dp_status;
default: default:
logerror("dp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(space->cpu)); logerror("dp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(device));
break; break;
} }
return 0; return 0;
} }
WRITE32_HANDLER( n64_dp_reg_w ) WRITE32_DEVICE_HANDLER( n64_dp_reg_w )
{ {
switch (offset) switch (offset)
{ {
@ -760,7 +764,7 @@ WRITE32_HANDLER( n64_dp_reg_w )
case 0x04/4: // DP_END_REG case 0x04/4: // DP_END_REG
dp_end = data; dp_end = data;
rdp_process_list(space->machine); rdp_process_list(device->machine);
break; break;
case 0x0c/4: // DP_STATUS_REG case 0x0c/4: // DP_STATUS_REG
@ -773,7 +777,7 @@ WRITE32_HANDLER( n64_dp_reg_w )
break; break;
default: default:
logerror("dp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(space->cpu)); logerror("dp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(device));
break; break;
} }
} }