From 0f9e8ad2c4d1a7e2f6ed2edaec7cd44b44764078 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 31 Aug 2024 09:52:55 +0200 Subject: [PATCH] z80.h: change PAIR to PAIR16 (all those registers are 16bit) --- src/devices/cpu/z80/kc82.cpp | 4 +- src/devices/cpu/z80/r800.cpp | 45 ++++----- src/devices/cpu/z80/z80.cpp | 67 +++++++------ src/devices/cpu/z80/z80.h | 30 +++--- src/devices/cpu/z80/z80.inc | 45 ++++----- src/devices/cpu/z80/z80.lst | 176 +++++++++++++++++------------------ 6 files changed, 174 insertions(+), 193 deletions(-) diff --git a/src/devices/cpu/z80/kc82.cpp b/src/devices/cpu/z80/kc82.cpp index 6dc575139de..fd09910429c 100644 --- a/src/devices/cpu/z80/kc82.cpp +++ b/src/devices/cpu/z80/kc82.cpp @@ -228,7 +228,7 @@ void kc82_device::data_write(u16 addr, u8 value) u8 kc82_device::opcode_read() { - u32 pc = m_pc.w.l + m_mmu_base[m_pc.b.h >> 2]; + u32 pc = m_pc.w + m_mmu_base[m_pc.b.h >> 2]; // no refresh return m_opcodes.read_byte(pc); } @@ -240,6 +240,6 @@ u8 kc82_device::opcode_read() u8 kc82_device::arg_read() { - u32 pc = m_pc.w.l + m_mmu_base[m_pc.b.h >> 2]; + u32 pc = m_pc.w + m_mmu_base[m_pc.b.h >> 2]; return m_args.read_byte(pc); } diff --git a/src/devices/cpu/z80/r800.cpp b/src/devices/cpu/z80/r800.cpp index c5279a44a33..63c98e5de9f 100644 --- a/src/devices/cpu/z80/r800.cpp +++ b/src/devices/cpu/z80/r800.cpp @@ -84,16 +84,12 @@ void r800_device::device_validity_check(validity_checker &valid) const #define INT_IRQ 0x01 #define NMI_IRQ 0x02 -#define PRVPC m_prvpc.d // previous program counter +#define PRVPC m_prvpc.w // previous program counter +#define PC m_pc.w -#define PCD m_pc.d -#define PC m_pc.w.l +#define SP m_sp.w -#define SPD m_sp.d -#define SP m_sp.w.l - -#define AFD m_af.d -#define AF m_af.w.l +#define AF m_af.w #define A m_af.b.h #define F m_af.b.l #define Q m_q @@ -102,43 +98,38 @@ void r800_device::device_validity_check(validity_checker &valid) const #define R m_r #define R2 m_r2 -#define BCD m_bc.d -#define BC m_bc.w.l +#define BC m_bc.w #define B m_bc.b.h #define C m_bc.b.l -#define DED m_de.d -#define DE m_de.w.l +#define DE m_de.w #define D m_de.b.h #define E m_de.b.l -#define HLD m_hl.d -#define HL m_hl.w.l +#define HL m_hl.w #define H m_hl.b.h #define L m_hl.b.l -#define IXD m_ix.d -#define IX m_ix.w.l +#define IX m_ix.w #define HX m_ix.b.h #define LX m_ix.b.l -#define IYD m_iy.d -#define IY m_iy.w.l +#define IY m_iy.w #define HY m_iy.b.h #define LY m_iy.b.l -#define WZ m_wz.w.l +#define WZ m_wz.w #define WZ_H m_wz.b.h #define WZ_L m_wz.b.l -#define TADR m_shared_addr.w // Typically represents values from A0..15 pins. 16bit input in steps. -#define TADR_H m_shared_addr.b.h -#define TADR_L m_shared_addr.b.l -#define TDAT m_shared_data.w // 16bit input(if use as second parameter) or output in steps. -#define TDAT2 m_shared_data2.w -#define TDAT_H m_shared_data.b.h -#define TDAT_L m_shared_data.b.l -#define TDAT8 m_shared_data.b.l // Typically represents values from D0..8 pins. 8bit input or output in steps. +#define TADR m_shared_addr.w // Typically represents values from A0..15 pins. 16bit input in steps. +#define TADR_H m_shared_addr.b.h +#define TADR_L m_shared_addr.b.l +#define TDAT m_shared_data.w // 16bit input(if use as second parameter) or output in steps. +#define TDAT2 m_shared_data2.w +#define TDAT_H m_shared_data.b.h +#define TDAT_L m_shared_data.b.l +#define TDAT8 m_shared_data.b.l // Typically represents values from D0..8 pins. 8bit input or output in steps. /*************************************************************** diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp index 01fd18fd0c4..9a5db1db2be 100644 --- a/src/devices/cpu/z80/z80.cpp +++ b/src/devices/cpu/z80/z80.cpp @@ -84,7 +84,7 @@ void z80_device::data_write(u16 addr, u8 value) ***************************************************************/ u8 z80_device::opcode_read() { - return m_opcodes.read_byte(translate_memory_address(PCD)); + return m_opcodes.read_byte(translate_memory_address(PC)); } /**************************************************************** @@ -96,7 +96,7 @@ u8 z80_device::opcode_read() ***************************************************************/ u8 z80_device::arg_read() { - return m_args.read_byte(translate_memory_address(PCD)); + return m_args.read_byte(translate_memory_address(PC)); } /*************************************************************** @@ -163,7 +163,7 @@ void z80_device::rra() ***************************************************************/ void z80_device::add_a(u8 value) { - u32 ah = AFD & 0xff00; + u32 ah = AF & 0xff00; u32 res = (u8)((ah >> 8) + value); set_f(SZHVC_add[ah | res]); A = res; @@ -174,7 +174,7 @@ void z80_device::add_a(u8 value) ***************************************************************/ void z80_device::adc_a(u8 value) { - u32 ah = AFD & 0xff00, c = AFD & 1; + u32 ah = AF & 0xff00, c = AF & 1; u32 res = (u8)((ah >> 8) + value + c); set_f(SZHVC_add[(c << 16) | ah | res]); A = res; @@ -185,7 +185,7 @@ void z80_device::adc_a(u8 value) ***************************************************************/ void z80_device::sub(u8 value) { - u32 ah = AFD & 0xff00; + u32 ah = AF & 0xff00; u32 res = (u8)((ah >> 8) - value); set_f(SZHVC_sub[ah | res]); A = res; @@ -196,7 +196,7 @@ void z80_device::sub(u8 value) ***************************************************************/ void z80_device::sbc_a(u8 value) { - u32 ah = AFD & 0xff00, c = AFD & 1; + u32 ah = AF & 0xff00, c = AF & 1; u32 res = (u8)((ah >> 8) - value - c); set_f(SZHVC_sub[(c << 16) | ah | res]); A = res; @@ -266,7 +266,7 @@ void z80_device::xor_a(u8 value) void z80_device::cp(u8 value) { unsigned val = value; - u32 ah = AFD & 0xff00; + u32 ah = AF & 0xff00; u32 res = (u8)((ah >> 8) - val); set_f((SZHVC_sub[ah | res] & ~(YF | XF)) | (val & (YF | XF))); } @@ -460,13 +460,13 @@ void z80_device::set_f(u8 f) void z80_device::illegal_1() { LOGUNDOC("ill. opcode $%02x $%02x ($%04x)\n", - m_opcodes.read_byte(translate_memory_address((PCD - 1) & 0xffff)), m_opcodes.read_byte(translate_memory_address(PCD)), PCD - 1); + m_opcodes.read_byte(translate_memory_address((PC - 1) & 0xffff)), m_opcodes.read_byte(translate_memory_address(PC)), PC - 1); } void z80_device::illegal_2() { LOGUNDOC("ill. opcode $ed $%02x\n", - m_opcodes.read_byte(translate_memory_address((PCD - 1) & 0xffff))); + m_opcodes.read_byte(translate_memory_address((PC - 1) & 0xffff))); } /**************************************************************************** @@ -555,7 +555,7 @@ void z80_device::device_start() tables_initialised = true; } - save_item(NAME(m_prvpc.w.l)); + save_item(NAME(PRVPC)); save_item(NAME(PC)); save_item(NAME(SP)); save_item(NAME(AF)); @@ -565,10 +565,10 @@ void z80_device::device_start() save_item(NAME(IX)); save_item(NAME(IY)); save_item(NAME(WZ)); - save_item(NAME(m_af2.w.l)); - save_item(NAME(m_bc2.w.l)); - save_item(NAME(m_de2.w.l)); - save_item(NAME(m_hl2.w.l)); + save_item(NAME(m_af2.w)); + save_item(NAME(m_bc2.w)); + save_item(NAME(m_de2.w)); + save_item(NAME(m_hl2.w)); save_item(NAME(m_r)); save_item(NAME(m_r2)); save_item(NAME(m_q)); @@ -594,19 +594,19 @@ void z80_device::device_start() // Reset registers to their initial values PRVPC = 0; - PCD = 0; - SPD = 0; - AFD = 0; - BCD = 0; - DED = 0; - HLD = 0; - IXD = 0; - IYD = 0; + PC = 0; + SP = 0; + AF = 0; + BC = 0; + DE = 0; + HL = 0; + IX = 0; + IY = 0; WZ = 0; - m_af2.d = 0; - m_bc2.d = 0; - m_de2.d = 0; - m_hl2.d = 0; + m_af2.w = 0; + m_bc2.w = 0; + m_de2.w = 0; + m_hl2.w = 0; m_r = 0; m_r2 = 0; m_iff1 = 0; @@ -633,8 +633,8 @@ void z80_device::device_start() set_f(ZF); // Zero flag is set // set up the state table - state_add(STATE_GENPC, "PC", m_pc.w.l).callimport(); - state_add(STATE_GENPCBASE, "CURPC", m_prvpc.w.l).callimport().noshow(); + state_add(STATE_GENPC, "PC", m_pc.w).callimport(); + state_add(STATE_GENPCBASE, "CURPC", m_prvpc.w).callimport().noshow(); state_add(Z80_SP, "SP", SP); state_add(STATE_GENFLAGS, "GENFLAGS", F).noshow().formatstr("%8s"); state_add(Z80_A, "A", A).noshow(); @@ -650,10 +650,10 @@ void z80_device::device_start() state_add(Z80_HL, "HL", HL); state_add(Z80_IX, "IX", IX); state_add(Z80_IY, "IY", IY); - state_add(Z80_AF2, "AF2", m_af2.w.l); - state_add(Z80_BC2, "BC2", m_bc2.w.l); - state_add(Z80_DE2, "DE2", m_de2.w.l); - state_add(Z80_HL2, "HL2", m_hl2.w.l); + state_add(Z80_AF2, "AF2", m_af2.w); + state_add(Z80_BC2, "BC2", m_bc2.w); + state_add(Z80_DE2, "DE2", m_de2.w); + state_add(Z80_HL2, "HL2", m_hl2.w); state_add(Z80_WZ, "WZ", WZ); state_add(Z80_R, "R", m_rtemp).callimport().callexport(); state_add(Z80_I, "I", m_i); @@ -682,6 +682,7 @@ void z80_device::device_reset() m_ref = 0xffff00; PC = 0x0000; + WZ = PC; m_i = 0; m_r = 0; m_r2 = 0; @@ -690,8 +691,6 @@ void z80_device::device_reset() m_after_ldair = false; m_iff1 = 0; m_iff2 = 0; - - WZ = PCD; } void nsc800_device::device_reset() diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h index 2d6cc118065..39c8ec023f1 100644 --- a/src/devices/cpu/z80/z80.h +++ b/src/devices/cpu/z80/z80.h @@ -136,20 +136,20 @@ protected: devcb_write_line m_halt_cb; devcb_write_line m_busack_cb; - PAIR m_prvpc; - PAIR m_pc; - PAIR m_sp; - PAIR m_af; - PAIR m_bc; - PAIR m_de; - PAIR m_hl; - PAIR m_ix; - PAIR m_iy; - PAIR m_wz; - PAIR m_af2; - PAIR m_bc2; - PAIR m_de2; - PAIR m_hl2; + PAIR16 m_prvpc; + PAIR16 m_pc; + PAIR16 m_sp; + PAIR16 m_af; + PAIR16 m_bc; + PAIR16 m_de; + PAIR16 m_hl; + PAIR16 m_ix; + PAIR16 m_iy; + PAIR16 m_wz; + PAIR16 m_af2; + PAIR16 m_bc2; + PAIR16 m_de2; + PAIR16 m_hl2; u8 m_qtemp; u8 m_q; u8 m_r; @@ -167,7 +167,7 @@ protected: u8 m_busack_state; // bus acknowledge pin state bool m_after_ei; // are we in the EI shadow? bool m_after_ldair; // same, but for LD A,I or LD A,R - u32 m_ea; + u16 m_ea; int m_icount; int m_tmp_irq_vector; diff --git a/src/devices/cpu/z80/z80.inc b/src/devices/cpu/z80/z80.inc index 95e41cae5d9..fc20972a5d7 100644 --- a/src/devices/cpu/z80/z80.inc +++ b/src/devices/cpu/z80/z80.inc @@ -32,16 +32,12 @@ #define INT_IRQ 0x01 #define NMI_IRQ 0x02 -#define PRVPC m_prvpc.d // previous program counter +#define PRVPC m_prvpc.w // previous program counter +#define PC m_pc.w -#define PCD m_pc.d -#define PC m_pc.w.l +#define SP m_sp.w -#define SPD m_sp.d -#define SP m_sp.w.l - -#define AFD m_af.d -#define AF m_af.w.l +#define AF m_af.w #define A m_af.b.h #define F m_af.b.l #define Q m_q @@ -50,41 +46,36 @@ #define R m_r #define R2 m_r2 -#define BCD m_bc.d -#define BC m_bc.w.l +#define BC m_bc.w #define B m_bc.b.h #define C m_bc.b.l -#define DED m_de.d -#define DE m_de.w.l +#define DE m_de.w #define D m_de.b.h #define E m_de.b.l -#define HLD m_hl.d -#define HL m_hl.w.l +#define HL m_hl.w #define H m_hl.b.h #define L m_hl.b.l -#define IXD m_ix.d -#define IX m_ix.w.l +#define IX m_ix.w #define HX m_ix.b.h #define LX m_ix.b.l -#define IYD m_iy.d -#define IY m_iy.w.l +#define IY m_iy.w #define HY m_iy.b.h #define LY m_iy.b.l -#define WZ m_wz.w.l +#define WZ m_wz.w #define WZ_H m_wz.b.h #define WZ_L m_wz.b.l -#define TADR m_shared_addr.w // Typically represents values from A0..15 pins. 16bit input in steps. -#define TADR_H m_shared_addr.b.h -#define TADR_L m_shared_addr.b.l -#define TDAT m_shared_data.w // 16bit input(if use as second parameter) or output in steps. -#define TDAT2 m_shared_data2.w -#define TDAT_H m_shared_data.b.h -#define TDAT_L m_shared_data.b.l -#define TDAT8 m_shared_data.b.l // Typically represents values from D0..8 pins. 8bit input or output in steps. +#define TADR m_shared_addr.w // Typically represents values from A0..15 pins. 16bit input in steps. +#define TADR_H m_shared_addr.b.h +#define TADR_L m_shared_addr.b.l +#define TDAT m_shared_data.w // 16bit input(if use as second parameter) or output in steps. +#define TDAT2 m_shared_data2.w +#define TDAT_H m_shared_data.b.h +#define TDAT_L m_shared_data.b.l +#define TDAT8 m_shared_data.b.l // Typically represents values from D0..8 pins. 8bit input or output in steps. diff --git a/src/devices/cpu/z80/z80.lst b/src/devices/cpu/z80/z80.lst index 378ee71bc77..7426e8ae230 100644 --- a/src/devices/cpu/z80/z80.lst +++ b/src/devices/cpu/z80/z80.lst @@ -40,9 +40,9 @@ macro wm16 macro wm16_sp SP--; - m_memrq_cycles !! data_write(SPD, TDAT_H); + m_memrq_cycles !! data_write(SP, TDAT_H); SP--; - m_memrq_cycles !! data_write(SPD, TDAT_L); + m_memrq_cycles !! data_write(SP, TDAT_L); macro rop m_m1_cycles-2 !! TDAT8 = opcode_read(); @@ -66,16 +66,16 @@ macro arg16 macro eax call arg - m_ea = (u32)(u16)(IX + (s8)TDAT8); WZ = m_ea; + m_ea = (u16)(IX + (s8)TDAT8); WZ = m_ea; macro eay call arg - m_ea = (u32)(u16)(IY + (s8)TDAT8); WZ = m_ea; + m_ea = (u16)(IY + (s8)TDAT8); WZ = m_ea; macro pop - m_memrq_cycles !! TDAT_L = data_read(SPD); + m_memrq_cycles !! TDAT_L = data_read(SP); SP++; - m_memrq_cycles !! TDAT_H = data_read(SPD); + m_memrq_cycles !! TDAT_H = data_read(SP); SP++; macro push @@ -84,12 +84,12 @@ macro push macro jp call arg16 - PCD = TDAT; WZ = PC; + PC = TDAT; WZ = PC; macro jp_cond if (TDAT8) { call arg16 - PC = TDAT; WZ = PCD; + PC = TDAT; WZ = PC; } else { // implicit do PC += 2 call arg16 @@ -98,13 +98,13 @@ macro jp_cond macro jr call arg - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr PC += (s8)TDAT8; WZ = PC; macro r800:jr call arg - TADR = PCD-1; + TADR = PC-1; + 1 PC += (s8)TDAT8; WZ = PC; @@ -117,19 +117,19 @@ macro jr_cond macro arg16_call call arg16 - m_ea = TDAT; TADR = PCD-1; + m_ea = TDAT; TADR = PC-1; call nomreq_addr WZ = m_ea; TDAT = PC; call wm16_sp - PCD = m_ea; + PC = m_ea; macro r800:arg16_call call arg16 - m_ea = TDAT; TADR = PCD-1; + m_ea = TDAT; TADR = PC-1; call nomreq_addr WZ = m_ea; TDAT = PC; call wm16_sp - PCD = m_ea; + PC = m_ea; macro call_cond if (TDAT8) { @@ -236,17 +236,17 @@ macro r800:add16 macro adc_hl call nomreq_ir 7 - { u32 res = HLD + TDAT + (F & CF); WZ = HL + 1; set_f((((HLD ^ res ^ TDAT) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HLD ^ 0x8000) & (TDAT ^ res) & 0x8000) >> 13)); HL = (u16)res; } + { u32 res = HL + TDAT + (F & CF); WZ = HL + 1; set_f((((HL ^ res ^ TDAT) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL ^ 0x8000) & (TDAT ^ res) & 0x8000) >> 13)); HL = (u16)res; } macro r800:adc_hl - { u32 res = HLD + TDAT + (F & CF); WZ = HL + 1; set_f((((HLD ^ res ^ TDAT) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HLD ^ 0x8000) & (TDAT ^ res) & 0x8000) >> 13)); HL = (u16)res; } + { u32 res = HL + TDAT + (F & CF); WZ = HL + 1; set_f((((HL ^ res ^ TDAT) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL ^ 0x8000) & (TDAT ^ res) & 0x8000) >> 13)); HL = (u16)res; } macro sbc_hl call nomreq_ir 7 - { u32 res = HLD - TDAT - (F & CF); WZ = HL + 1; set_f((((HLD ^ res ^ TDAT) >> 8) & HF) | NF | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HLD) & (HLD ^ res) &0x8000) >> 13)); HL = (u16)res; } + { u32 res = HL - TDAT - (F & CF); WZ = HL + 1; set_f((((HL ^ res ^ TDAT) >> 8) & HF) | NF | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL) & (HL ^ res) &0x8000) >> 13)); HL = (u16)res; } macro r800:sbc_hl - { u32 res = HLD - TDAT - (F & CF); WZ = HL + 1; set_f((((HLD ^ res ^ TDAT) >> 8) & HF) | NF | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HLD) & (HLD ^ res) &0x8000) >> 13)); HL = (u16)res; } + { u32 res = HL - TDAT - (F & CF); WZ = HL + 1; set_f((((HL ^ res ^ TDAT) >> 8) & HF) | NF | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL) & (HL ^ res) &0x8000) >> 13)); HL = (u16)res; } macro ldi TADR = HL; @@ -519,8 +519,8 @@ macro take_nmi + 5 TDAT = PC; call wm16_sp - PCD = 0x0066; - WZ = PCD; + PC = 0x0066; + WZ = PC; m_nmi_pending = false; macro take_interrupt @@ -535,7 +535,7 @@ macro take_interrupt { // fetch the IRQ vector device_z80daisy_interface *intf = daisy_get_irq_device(); - m_tmp_irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback(0, m_pc.w.l); + m_tmp_irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback(0, m_pc.w); LOGINT("single INT m_tmp_irq_vector $%02x\n", m_tmp_irq_vector); } // 'interrupt latency' cycles @@ -552,8 +552,8 @@ macro take_interrupt m_tmp_irq_vector = (m_tmp_irq_vector & 0xff) | (m_i << 8); TADR = m_tmp_irq_vector; call rm16 - PCD = TDAT; - LOGINT("IM2 [$%04x] = $%04x\n", m_tmp_irq_vector, PCD); + PC = TDAT; + LOGINT("IM2 [$%04x] = $%04x\n", m_tmp_irq_vector, PC); } else if (m_im == 1) { // Interrupt mode 1. RST 38h LOGINT("'%s' IM1 $0038\n", tag()); @@ -561,7 +561,7 @@ macro take_interrupt + 5 TDAT = PC; call wm16_sp - PCD = 0x0038; + PC = 0x0038; } else { /* Interrupt mode 0. We check for CALL and JP instructions, if neither of these were found we assume a 1 byte opcode @@ -575,11 +575,11 @@ macro take_interrupt + 11 TDAT = PC; call wm16_sp - PCD = m_tmp_irq_vector & 0xffff; + PC = m_tmp_irq_vector & 0xffff; } else if ((m_tmp_irq_vector & 0xff0000) == 0xc30000) { // JP $xxxx cycles + 10 - PCD = m_tmp_irq_vector & 0xffff; + PC = m_tmp_irq_vector & 0xffff; } else if (m_tmp_irq_vector == 0xfb) { // rst (or other opcodes?) + 4 @@ -589,13 +589,13 @@ macro take_interrupt + 5 TDAT = PC; call wm16_sp - PCD = m_tmp_irq_vector & 0x0038; + PC = m_tmp_irq_vector & 0x0038; } else { logerror("take_interrupt: unexpected opcode in im0 mode: 0x%02x\n", m_tmp_irq_vector); } } } - WZ = PCD; + WZ = PC; #if HAS_LDAIR_QUIRK // reset parity flag after LD A,I or LD A,R if (m_after_ldair) F &= ~PF; @@ -630,20 +630,20 @@ macro nsc800_take_interrupt if (m_nsc800_irq_state[NSC800_RSTA]) { TDAT = PC; call wm16_sp - PCD = 0x003c; + PC = 0x003c; } else if (m_nsc800_irq_state[NSC800_RSTB]) { TDAT = PC; call wm16_sp - PCD = 0x0034; + PC = 0x0034; } else if (m_nsc800_irq_state[NSC800_RSTC]) { TDAT = PC; call wm16_sp - PCD = 0x002c; + PC = 0x002c; } else { + 2 * m_memrq_cycles ; } - WZ = PCD; + WZ = PC; #if HAS_LDAIR_QUIRK // reset parity flag after LD A,I or LD A,R if (m_after_ldair) F &= ~PF; @@ -678,8 +678,8 @@ ffff call check_interrupts m_after_ei = false; m_after_ldair = false; - PRVPC = PCD; - debugger_instruction_hook(PCD); + PRVPC = PC; + debugger_instruction_hook(PC); call rop if (m_halt) { PC--; @@ -3133,7 +3133,7 @@ dd33 # DB DD dd34 # INC (IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm_reg @@ -3142,7 +3142,7 @@ dd34 # INC (IX+o) dd35 # DEC (IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm_reg @@ -3152,7 +3152,7 @@ dd35 # DEC (IX+o) dd36 # LD (IX+o),n call eax call arg - TADR = PCD-1; + TADR = PC-1; 2 * call nomreq_addr TADR = m_ea; call wm @@ -3218,7 +3218,7 @@ dd45 # LD B,LX dd46 # LD B,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3252,7 +3252,7 @@ dd4d # LD C,LX dd4e # LD C,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3286,7 +3286,7 @@ dd55 # LD D,LX dd56 # LD D,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3320,7 +3320,7 @@ dd5d # LD E,LX dd5e # LD E,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3349,7 +3349,7 @@ dd65 # LD HX,LX dd66 # LD H,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3377,7 +3377,7 @@ dd6d # LD LX,LX dd6e # LD L,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3388,42 +3388,42 @@ dd6f # LD LX,A dd70 # LD (IX+o),B call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = B; call wm dd71 # LD (IX+o),C call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = C; call wm dd72 # LD (IX+o),D call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = D; call wm dd73 # LD (IX+o),E call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = E; call wm dd74 # LD (IX+o),H call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = H; call wm dd75 # LD (IX+o),L call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = L; call wm @@ -3434,7 +3434,7 @@ dd76 # DB DD dd77 # LD (IX+o),A call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = A; call wm @@ -3463,7 +3463,7 @@ dd7d # LD A,LX dd7e # LD A,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3497,7 +3497,7 @@ dd85 # ADD A,LX dd86 # ADD A,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3531,7 +3531,7 @@ dd8d # ADC A,LX dd8e # ADC A,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3565,7 +3565,7 @@ dd95 # SUB LX dd96 # SUB (IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3599,7 +3599,7 @@ dd9d # SBC A,LX dd9e # SBC A,(IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3633,7 +3633,7 @@ dda5 # AND LX dda6 # AND (IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3667,7 +3667,7 @@ ddad # XOR LX ddae # XOR (IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3701,7 +3701,7 @@ ddb5 # OR LX ddb6 # OR (IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3735,7 +3735,7 @@ ddbd # CP LX ddbe # CP (IX+o) call eax - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -3792,7 +3792,7 @@ ddca # DB DD ddcb # ** DD CB xx call eax call arg - TADR = PCD-1; + TADR = PC-1; 2 * call nomreq_addr call jump_prefixed 0xfe @@ -4221,7 +4221,7 @@ fd33 # DB FD fd34 # INC (IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm_reg @@ -4230,7 +4230,7 @@ fd34 # INC (IY+o) fd35 # DEC (IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm_reg @@ -4240,7 +4240,7 @@ fd35 # DEC (IY+o) fd36 # LD (IY+o),n call eay call arg - TADR = PCD-1; + TADR = PC-1; 2 * call nomreq_addr TADR = m_ea; call wm @@ -4306,7 +4306,7 @@ fd45 # LD B,LY fd46 # LD B,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4340,7 +4340,7 @@ fd4d # LD C,LY fd4e # LD C,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4374,7 +4374,7 @@ fd55 # LD D,LY fd56 # LD D,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4408,7 +4408,7 @@ fd5d # LD E,LY fd5e # LD E,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4437,7 +4437,7 @@ fd65 # LD HY,LY fd66 # LD H,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4465,7 +4465,7 @@ fd6d # LD LY,LY fd6e # LD L,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4476,42 +4476,42 @@ fd6f # LD LY,A fd70 # LD (IY+o),B call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = B; call wm fd71 # LD (IY+o),C call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = C; call wm fd72 # LD (IY+o),D call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = D; call wm fd73 # LD (IY+o),E call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = E; call wm fd74 # LD (IY+o),H call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = H; call wm fd75 # LD (IY+o),L call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = L; call wm @@ -4522,7 +4522,7 @@ fd76 # DB FD fd77 # LD (IY+o),A call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; TDAT8 = A; call wm @@ -4551,7 +4551,7 @@ fd7d # LD A,LY fd7e # LD A,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4585,7 +4585,7 @@ fd85 # ADD A,LY fd86 # ADD A,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4619,7 +4619,7 @@ fd8d # ADC A,LY fd8e # ADC A,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4653,7 +4653,7 @@ fd95 # SUB LY fd96 # SUB (IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4687,7 +4687,7 @@ fd9d # SBC A,LY fd9e # SBC A,(IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4721,7 +4721,7 @@ fda5 # AND LY fda6 # AND (IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4755,7 +4755,7 @@ fdad # XOR LY fdae # XOR (IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4789,7 +4789,7 @@ fdb5 # OR LY fdb6 # OR (IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4823,7 +4823,7 @@ fdbd # CP LY fdbe # CP (IY+o) call eay - TADR = PCD-1; + TADR = PC-1; 5 * call nomreq_addr TADR = m_ea; call rm @@ -4880,7 +4880,7 @@ fdca # DB FD fdcb # ** FD CB xx call eay call arg - TADR = PCD-1; + TADR = PC-1; 2 * call nomreq_addr call jump_prefixed 0xfe @@ -6634,7 +6634,7 @@ edff # DB ED 00c9 # RET call pop - PC = TDAT; WZ = PCD; + PC = TDAT; WZ = PC; 00ca # JP Z,a TDAT8 = F & ZF; @@ -8794,7 +8794,7 @@ z80n:ed95 # setae z80n:ed98 # jp (c) TADR = BC; call in - PCD = (PCD & 0xc000) + (TDAT8 << 6); + PC = (PC & 0xc000) + (TDAT8 << 6); z80n:eda4 # ldix call ldix