mirror of
https://github.com/holub/mame
synced 2025-04-16 05:24:54 +03:00
f2mc16: Updates and fixes
- Emulate various additional instructions and modes - Fix banking for direct addressing mode - Fix semantics of CLRB and number of bytes consumed by SETB - Fix mistake with calculating N and Z flags for SUB and CMP and writing incorrect result for SUB - Use INC(W)(L) A and DEC(W)(L) A pseudo-operations in disassembly
This commit is contained in:
AJR
parent
6ebf6d418e
commit
0fbeb8ef93
@ -822,8 +822,14 @@ void f2mc16_device::execute_run()
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// MOV A, dir
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case 0x40:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1)) | (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp32 |= (m_prefix<<16);
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}
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else
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m_tmp32 |= (m_dtb<<16);
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m_tmp8 = read_8(m_tmp32);
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m_acc <<= 16;
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m_acc |= m_tmp8;
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@ -834,8 +840,14 @@ void f2mc16_device::execute_run()
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// MOV dir, A
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case 0x41:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1)) | (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp32 |= (m_prefix<<16);
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}
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else
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m_tmp32 |= (m_dtb<<16);
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write_8(m_tmp32, m_acc & 0xff);
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setNZ_8(m_acc & 0xff);
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m_pc += 2;
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@ -870,7 +882,14 @@ void f2mc16_device::execute_run()
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case 0x44:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
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m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
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m_tmp32 |= (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp32 |= (m_prefix<<16);
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}
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else
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m_tmp32 |= (m_dtb<<16);
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write_8(m_tmp32, m_tmp8);
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m_pc += 3;
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m_icount -= 5;
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@ -908,7 +927,14 @@ void f2mc16_device::execute_run()
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// MOVW A, dir
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case 0x48:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
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m_tmp32 |= (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp32 |= (m_prefix<<16);
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}
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else
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m_tmp32 |= (m_dtb<<16);
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m_tmp16 = read_16(m_tmp32);
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m_acc <<= 16;
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m_acc |= m_tmp16;
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@ -920,7 +946,14 @@ void f2mc16_device::execute_run()
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// MOVW dir, A
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case 0x49:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
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m_tmp32 |= (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp32 |= (m_prefix<<16);
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}
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else
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m_tmp32 |= (m_dtb<<16);
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write_16(m_tmp32, m_acc & 0xffff);
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setNZ_16(m_acc & 0xffff);
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m_pc += 2;
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@ -988,7 +1021,26 @@ void f2mc16_device::execute_run()
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}
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break;
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// MOV A, adr16
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// MOV A, io
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case 0x50:
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m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
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m_acc <<= 16;
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m_acc |= read_8(m_tmp8);
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setNZ_8(m_acc & 0xff);
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m_pc += 2;
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m_icount -= 3;
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break;
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// MOV io, A
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case 0x51:
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m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
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write_8(m_tmp8, m_acc & 0xff);
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setNZ_8(m_acc & 0xff);
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m_pc += 2;
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m_icount -= 3;
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break;
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// MOV A, addr16
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case 0x52:
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m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
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m_acc <<= 16;
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@ -1006,7 +1058,7 @@ void f2mc16_device::execute_run()
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m_icount -= 4;
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break;
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// MOV adr16, A
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// MOV addr16, A
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case 0x53:
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m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
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if (m_prefix_valid)
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@ -1023,11 +1075,48 @@ void f2mc16_device::execute_run()
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m_icount -= 4;
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break;
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// MOV io, #imm8
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case 0x54:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
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write_8(m_tmp32, m_tmp8);
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m_pc += 3;
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m_icount -= 5;
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break;
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// MOVW io, #imm16
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case 0x56:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
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write_16(m_tmp32, m_tmp16);
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m_pc += 4;
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m_icount -= 5;
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break;
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case 0x57:
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// util::stream_format(stream, "MOVX A, $%04x", opcodes.r16(pc+1));
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break;
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// MOVW A, adr16
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// MOVW A, io
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case 0x58:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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m_acc <<= 16;
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m_acc |= read_16(m_tmp32);
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setNZ_16(m_acc & 0xffff);
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m_pc += 2;
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m_icount -= 3;
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break;
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// MOVW io, A
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case 0x59:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
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write_16(m_tmp32, m_acc & 0xffff);
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setNZ_16(m_acc & 0xffff);
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m_pc += 2;
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m_icount -= 3;
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break;
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// MOVW A, addr16
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case 0x5a:
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m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
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m_acc <<= 16;
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@ -1045,7 +1134,7 @@ void f2mc16_device::execute_run()
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m_icount -= 4;
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break;
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// MOVW adr16, A
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// MOVW addr16, A
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case 0x5b:
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m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
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if (m_prefix_valid)
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@ -1112,7 +1201,7 @@ void f2mc16_device::execute_run()
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// stream << "JMP @A";
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break;
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// JMP #imm16
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// JMP addr16
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case 0x62:
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m_pc = read_16((m_pcb<<16) | (m_pc+1));
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m_icount -= 3;
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@ -1122,16 +1211,20 @@ void f2mc16_device::execute_run()
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// util::stream_format(stream, "JMPP #$%06x", opcodes.r8(pc+3)<<16|opcodes.r8(pc+2)<<8|opcodes.r8(pc+1));
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break;
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// CALL addr16
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case 0x64:
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// util::stream_format(stream, "CALL #$%04x", opcodes.r16(pc+1));
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m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
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push_16(m_pc+3);
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m_pc = m_tmp16;
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m_icount -= 6;
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break;
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// CALLP #imm24
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// CALLP addr24
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case 0x65:
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m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
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m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
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push_16(m_pcb);
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push_16(m_pc+4);
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m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
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m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
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m_pcb = m_tmp8;
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m_pc = m_tmp16;
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m_icount -= 10;
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@ -1144,8 +1237,10 @@ void f2mc16_device::execute_run()
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m_icount -= 5;
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break;
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// RET
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case 0x67:
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// stream << "RET";
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m_pc = pull_16();
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m_icount -= 4;
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break;
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// RETI
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@ -1617,6 +1712,25 @@ void f2mc16_device::opcodes_str6e(u8 operand)
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}
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break;
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// FILSI ADB
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case 0xc2:
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if (read_rwX(0) > 0)
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{
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u16 al = (m_acc & 0xffff);
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u16 ah = (m_acc >> 16) & 0xffff;
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write_8((m_adb<<16) | ah, al & 0xff);
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ah++;
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m_acc = (ah<<16) | al;
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write_rwX(0, read_rwX(0) - 1);
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m_icount -= 6;
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}
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else
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{
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m_pc += 2;
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m_icount -= 6;
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}
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break;
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default:
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fatalerror("Unknown F2MC STR6E opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
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break;
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@ -1627,10 +1741,119 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
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{
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switch (operand)
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{
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// CLRB adr16, bit
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// MOVB A, dir:bp
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case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
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m_tmp16 = read_8((m_pcb<<16) | (m_pc+2));
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m_tmp16 |= (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
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}
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else
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m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
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m_acc &= 0xffff0000;
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if (m_tmp8 & (1 << (operand & 7)))
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m_acc |= 0xff;
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setNZ_8(m_acc & 0xff);
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m_pc += 3;
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m_icount -= 7;
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break;
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// MOVB dir:bp, A
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case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
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m_tmp16 = read_8((m_pcb<<16) | (m_pc+2));
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m_tmp16 |= (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
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if (m_acc & 0xff)
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m_tmp8 |= (1 << (operand & 7));
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else
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m_tmp8 &= ~(1 << (operand & 7));
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write_8((m_prefix<<16) | m_tmp16, m_tmp8);
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}
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else
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{
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m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
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if (m_acc & 0xff)
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m_tmp8 |= (1 << (operand & 7));
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else
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m_tmp8 &= ~(1 << (operand & 7));
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write_8((m_dtb<<16) | m_tmp16, m_tmp8);
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}
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setNZ_8(m_acc & 0xff);
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m_pc += 3;
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m_icount -= 7;
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break;
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// CLRB io:bp
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case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
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m_tmp16 = read_8((m_pcb << 16) | (m_pc + 2));
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m_tmp8 = read_8(m_tmp16);
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m_tmp8 &= ~(1 << (operand & 7));
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write_8(m_tmp16, m_tmp8);
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m_pc += 3;
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m_icount -= 7;
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break;
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// CLRB dir:bp
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case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
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m_tmp16 = read_8((m_pcb<<16) | (m_pc+2));
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m_tmp16 |= (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
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m_tmp8 &= ~(1 << (operand & 7));
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write_8((m_prefix<<16) | m_tmp16, m_tmp8);
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}
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else
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{
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m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
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m_tmp8 &= ~(1 << (operand & 7));
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write_8((m_dtb<<16) | m_tmp16, m_tmp8);
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}
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m_pc += 3;
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m_icount -= 7;
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break;
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// CLRB addr16:bp
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case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
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m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
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m_tmp8 &= ~(1 << (operand & 7));
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write_8((m_prefix<<16) | m_tmp16, m_tmp8);
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}
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else
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{
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m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
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m_tmp8 &= ~(1 << (operand & 7));
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write_8((m_dtb<<16) | m_tmp16, m_tmp8);
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}
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m_pc += 4;
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m_icount -= 7;
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break;
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// SETB io:bp
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case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
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m_tmp16 = read_8((m_pcb << 16) | (m_pc + 2));
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m_tmp8 = read_8(m_tmp16);
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m_tmp8 |= (1 << (operand & 7));
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write_8(m_tmp16, m_tmp8);
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m_pc += 3;
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m_icount -= 7;
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break;
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// SETB dir:bp
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case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
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m_tmp16 = read_8((m_pcb<<16) | (m_pc+2));
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m_tmp16 |= (m_dpr<<8);
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if (m_prefix_valid)
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{
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m_prefix_valid = false;
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m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
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@ -1639,15 +1862,15 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
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}
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else
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{
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m_tmp8= read_8((m_dtb<<16) | m_tmp16);
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m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
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m_tmp8 |= (1 << (operand & 7));
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write_8((m_dtb<<16) | m_tmp16, m_tmp8);
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}
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m_pc += 2;
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m_pc += 3;
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m_icount -= 7;
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break;
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// SETB adr16, bit
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// SETB addr16:bp
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case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
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m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
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if (m_prefix_valid)
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@ -1659,19 +1882,41 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
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}
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else
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{
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m_tmp8= read_8((m_dtb<<16) | m_tmp16);
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m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
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m_tmp8 |= (1 << (operand & 7));
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write_8((m_dtb<<16) | m_tmp16, m_tmp8);
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}
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m_pc += 2;
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m_pc += 4;
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m_icount -= 7;
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break;
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// BBC dir8, bit, disp8
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// BBC io:bp, disp8
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case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
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m_tmp32 = read_8((m_pcb<<16) | (m_pc+2));
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m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
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m_ps &= ~F_Z;
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m_pc += 4;
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||||
if (!(read_8(m_tmp32) & (1 << (operand & 7))))
|
||||
{
|
||||
m_ps |= F_Z;
|
||||
m_pc += (s8)m_tmp8;
|
||||
m_icount--;
|
||||
}
|
||||
m_icount -= 6;
|
||||
break;
|
||||
|
||||
// BBC dir:bp, disp8
|
||||
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
|
||||
m_tmp32 = read_8((m_pcb<<16) | (m_pc+2));
|
||||
m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
|
||||
m_tmp8 = read_8(m_tmp32);
|
||||
if (m_prefix_valid)
|
||||
{
|
||||
m_prefix_valid = false;
|
||||
m_tmp32 |= (m_prefix<<16) | (m_dpr<<8);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_tmp32 |= (m_dtb<<16) | (m_dpr<<8);
|
||||
}
|
||||
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
|
||||
m_ps &= ~F_Z;
|
||||
m_pc += 4;
|
||||
@ -1684,7 +1929,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
|
||||
m_icount -= 7;
|
||||
break;
|
||||
|
||||
// BBC adr16, bit, disp8
|
||||
// BBC addr16:bp, disp8
|
||||
case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
|
||||
m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
|
||||
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 4));
|
||||
@ -1709,7 +1954,52 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
|
||||
m_icount -= 7;
|
||||
break;
|
||||
|
||||
// BBS adr16, bit, disp8
|
||||
// BBS io:bp, disp8
|
||||
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
|
||||
m_tmp32 = read_8((m_pcb<<16) | (m_pc+2));
|
||||
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
|
||||
m_ps &= ~F_Z;
|
||||
m_pc += 4;
|
||||
if (read_8(m_tmp32) & (1 << (operand & 7)))
|
||||
{
|
||||
m_pc += (s8)m_tmp8;
|
||||
m_icount--;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_ps |= F_Z;
|
||||
}
|
||||
m_icount -= 6;
|
||||
break;
|
||||
|
||||
// BBS dir:bp, disp8
|
||||
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
|
||||
m_tmp32 = read_8((m_pcb<<16) | (m_pc+2));
|
||||
if (m_prefix_valid)
|
||||
{
|
||||
m_prefix_valid = false;
|
||||
m_tmp32 |= (m_prefix<<16) | (m_dpr<<8);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_tmp32 |= (m_dtb<<16) | (m_dpr<<8);
|
||||
}
|
||||
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
|
||||
m_ps &= ~F_Z;
|
||||
m_pc += 4;
|
||||
if (read_8(m_tmp32) & (1 << (operand & 7)))
|
||||
{
|
||||
m_pc += (s8)m_tmp8;
|
||||
m_icount--;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_ps |= F_Z;
|
||||
}
|
||||
m_icount -= 7;
|
||||
break;
|
||||
|
||||
// BBS addr16:bp, disp8
|
||||
case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
|
||||
m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
|
||||
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 4));
|
||||
@ -1979,6 +2269,45 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
|
||||
m_pc += 2;
|
||||
break;
|
||||
|
||||
// LSR A, R0
|
||||
case 0x2f:
|
||||
m_tmp8 = read_rX(0);
|
||||
if (m_tmp8 == 0)
|
||||
{
|
||||
// docs don't say if N is cleared in this case or not
|
||||
m_ps &= ~(F_C|F_T);
|
||||
m_ps |= F_Z;
|
||||
m_pc += 2;
|
||||
m_icount -= 6;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_tmp16 = m_acc & 0xff;
|
||||
for (u8 count = 0; count < m_tmp8; count++)
|
||||
{
|
||||
// T is set if either carry or T are set beforehand
|
||||
if ((m_ps & F_C) || (m_ps & F_T))
|
||||
{
|
||||
m_ps |= F_T;
|
||||
}
|
||||
// C becomes the previous LSB
|
||||
m_ps &= ~F_C;
|
||||
if (m_tmp16 & 1)
|
||||
{
|
||||
m_ps |= F_C;
|
||||
}
|
||||
|
||||
m_tmp16 >>= 1;
|
||||
setNZ_8(m_tmp16);
|
||||
m_icount -= 5;
|
||||
}
|
||||
|
||||
m_acc &= 0xffffff00;
|
||||
m_acc |= m_tmp16;
|
||||
m_pc += 2;
|
||||
}
|
||||
break;
|
||||
|
||||
// MOV @RLx + #disp8, A
|
||||
case 0x30: case 0x32: case 0x34: case 0x36:
|
||||
m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
|
||||
@ -2158,6 +2487,29 @@ void f2mc16_device::opcodes_ea71(u8 operand)
|
||||
m_icount -= 7;
|
||||
break;
|
||||
|
||||
// INCL addr16
|
||||
case 0x5f:
|
||||
m_tmp32 = read_16((m_pcb<<16) | (m_pc+2));
|
||||
if (m_prefix_valid)
|
||||
{
|
||||
m_prefix_valid = false;
|
||||
m_tmp32 |= (m_prefix<<16);
|
||||
}
|
||||
else
|
||||
m_tmp32 |= (m_dtb<<16);
|
||||
m_tmp64 = read_32(m_tmp32);
|
||||
m_tmp64++;
|
||||
write_32(m_tmp32, m_tmp64 & 0xffffffff);
|
||||
setNZ_32(m_tmp64 & 0xffffffff);
|
||||
m_ps &= ~F_V;
|
||||
if (m_tmp64 & 0x100000000)
|
||||
{
|
||||
m_ps |= F_V;
|
||||
}
|
||||
m_pc += 4;
|
||||
m_icount -= 7;
|
||||
break;
|
||||
|
||||
// MOVL A, RLx
|
||||
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
|
||||
m_acc = read_rlX((operand>>1) & 3);
|
||||
@ -2186,7 +2538,7 @@ void f2mc16_device::opcodes_ea71(u8 operand)
|
||||
m_icount -= 4;
|
||||
break;
|
||||
|
||||
// MOVL A, adr16
|
||||
// MOVL A, addr16
|
||||
case 0x9f:
|
||||
m_tmp32 = read_16((m_pcb<<16) | (m_pc+2));
|
||||
if (m_prefix_valid)
|
||||
|
||||
@ -322,7 +322,7 @@ private:
|
||||
inline void doCMP_8(u8 lhs, u8 rhs)
|
||||
{
|
||||
u16 tmp16 = lhs - rhs;
|
||||
setNZ_16(tmp16 & 0xff);
|
||||
setNZ_8(tmp16 & 0xff);
|
||||
m_ps &= ~(F_C|F_V);
|
||||
if (tmp16 & 0x100)
|
||||
{
|
||||
@ -365,7 +365,7 @@ private:
|
||||
inline u8 doSUB_8(u8 lhs, u8 rhs)
|
||||
{
|
||||
u16 tmp16 = lhs - rhs;
|
||||
setNZ_16(tmp16 & 0xff);
|
||||
setNZ_8(tmp16 & 0xff);
|
||||
m_ps &= ~(F_C|F_V);
|
||||
if (tmp16 & 0x100)
|
||||
{
|
||||
@ -376,7 +376,7 @@ private:
|
||||
m_ps |= F_V;
|
||||
}
|
||||
|
||||
return m_tmp16 & 0xff;
|
||||
return tmp16 & 0xff;
|
||||
}
|
||||
inline u16 doSUB_16(u16 lhs, u16 rhs)
|
||||
{
|
||||
|
||||
@ -1199,17 +1199,19 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f
|
||||
format_imm_signed(stream, s32(s8(opcodes.r8(pc + bytes++))));
|
||||
break;
|
||||
|
||||
case 0x18:
|
||||
util::stream_format(stream, "%-8sA, ", "ADDL");
|
||||
format_imm_signed(stream, s32(opcodes.r32(pc + bytes)));
|
||||
bytes += 4;
|
||||
break;
|
||||
|
||||
case 0x19:
|
||||
util::stream_format(stream, "%-8sA, ", "SUBL");
|
||||
format_imm_signed(stream, s32(opcodes.r32(pc + bytes)));
|
||||
case 0x18: case 0x19:
|
||||
{
|
||||
u32 operand = opcodes.r32(pc + bytes);
|
||||
if (operand == 0x00000001)
|
||||
util::stream_format(stream, "%-8sA", BIT(op, 0) ? "DECL" : "INCL");
|
||||
else
|
||||
{
|
||||
util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUBL" : "ADDL");
|
||||
format_imm_signed(stream, s32(operand));
|
||||
}
|
||||
bytes += 4;
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x1a:
|
||||
util::stream_format(stream, "%-8sILM, ", "MOV");
|
||||
@ -1222,20 +1224,14 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f
|
||||
bytes += 4;
|
||||
break;
|
||||
|
||||
case 0x20: case 0x30:
|
||||
case 0x20:
|
||||
util::stream_format(stream, "%-8sA, ", "ADD");
|
||||
if (BIT(op, 4))
|
||||
format_imm_signed(stream, s32(s8(opcodes.r8(pc + bytes++))));
|
||||
else
|
||||
format_dir(stream, segm, opcodes.r8(pc + bytes++));
|
||||
format_dir(stream, segm, opcodes.r8(pc + bytes++));
|
||||
break;
|
||||
|
||||
case 0x21: case 0x31:
|
||||
case 0x21:
|
||||
util::stream_format(stream, "%-8sA, ", "SUB");
|
||||
if (BIT(op, 4))
|
||||
format_imm_signed(stream, s32(s8(opcodes.r8(pc + bytes++))));
|
||||
else
|
||||
format_dir(stream, segm, opcodes.r8(pc + bytes++));
|
||||
format_dir(stream, segm, opcodes.r8(pc + bytes++));
|
||||
break;
|
||||
|
||||
case 0x22:
|
||||
@ -1269,24 +1265,12 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f
|
||||
util::stream_format(stream, "%-8sA", "MULU");
|
||||
break;
|
||||
|
||||
case 0x28: case 0x38:
|
||||
case 0x28:
|
||||
util::stream_format(stream, "%-8sA", "ADDW");
|
||||
if (BIT(op, 4))
|
||||
{
|
||||
stream << ", ";
|
||||
format_imm_signed(stream, s32(s16(opcodes.r16(pc + bytes))));
|
||||
bytes += 2;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x29: case 0x39:
|
||||
case 0x29:
|
||||
util::stream_format(stream, "%-8sA", "SUBW");
|
||||
if (BIT(op, 4))
|
||||
{
|
||||
stream << ", ";
|
||||
format_imm_signed(stream, s32(s16(opcodes.r16(pc + bytes))));
|
||||
bytes += 2;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x2a:
|
||||
@ -1341,6 +1325,19 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f
|
||||
util::stream_format(stream, "%-8sA", "MULUW");
|
||||
break;
|
||||
|
||||
case 0x30: case 0x31:
|
||||
{
|
||||
u8 operand = opcodes.r8(pc + bytes++);
|
||||
if (operand == 0x01)
|
||||
util::stream_format(stream, "%-8sA", BIT(op, 0) ? "DEC" : "INC");
|
||||
else
|
||||
{
|
||||
util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUB" : "ADD");
|
||||
format_imm_signed(stream, s32(s8(operand)));
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x32:
|
||||
util::stream_format(stream, "%-8sA", "SUBC");
|
||||
break;
|
||||
@ -1364,6 +1361,20 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f
|
||||
util::stream_format(stream, "%-8sA", "NOT");
|
||||
break;
|
||||
|
||||
case 0x38: case 0x39:
|
||||
{
|
||||
u16 operand = opcodes.r16(pc + bytes);
|
||||
if (operand == 0x0001)
|
||||
util::stream_format(stream, "%-8sA", BIT(op, 0) ? "DECW" : "INCW");
|
||||
else
|
||||
{
|
||||
util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUBW" : "ADDW");
|
||||
format_imm_signed(stream, s32(s16(operand)));
|
||||
}
|
||||
bytes += 2;
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x3a:
|
||||
util::stream_format(stream, "%-8sA, ", "CWBNE");
|
||||
format_imm16(stream, opcodes.r16(pc + bytes));
|
||||
|
||||
Loading…
Reference in New Issue
Block a user