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https://github.com/holub/mame
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casio/fp1100.cpp: convert main memory map to view, add save states, denote missing ROM from fp1000
This commit is contained in:
angelosa
parent
1a3ec953a0
commit
0fe26ad681
@ -73,8 +73,8 @@ public:
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, m_maincpu(*this, "maincpu")
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, m_subcpu(*this, "sub")
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, m_crtc(*this, "crtc")
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, m_ipl(*this, "ipl")
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, m_wram(*this, "wram")
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, m_iplview(*this, "iplview")
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, m_workram(*this, "workram")
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, m_videoram(*this, "videoram.%u", 0)
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, m_palette(*this, "palette")
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, m_keyboard(*this, "KEY.%u", 0)
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@ -93,8 +93,8 @@ private:
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required_device<cpu_device> m_maincpu;
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required_device<upd7801_device> m_subcpu;
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required_device<mc6845_device> m_crtc;
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required_region_ptr<u8> m_ipl;
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required_shared_ptr<u8> m_wram;
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memory_view m_iplview;
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required_shared_ptr<u8> m_workram;
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required_shared_ptr_array<u8, 3> m_videoram;
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required_device<palette_device> m_palette;
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required_ioport_array<16> m_keyboard;
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@ -108,7 +108,6 @@ private:
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void main_bank_w(u8 data);
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void irq_mask_w(u8 data);
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u8 memory_r(offs_t offset);
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void colour_control_w(u8 data);
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template <unsigned N> u8 vram_r(offs_t offset);
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template <unsigned N> void vram_w(offs_t offset, u8 data);
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@ -128,17 +127,12 @@ private:
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u8 m_col_display = 0;
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u8 m_centronics_busy = 0;
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u8 m_cassette_data[4]{};
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bool m_bank_sel = false;
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bool m_sub_irq_status = false;
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bool m_cassettebit = false;
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bool m_cassetteold = false;
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// TODO: descramble
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struct {
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u8 porta = 0;
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u8 portb = 0;
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u8 portc = 0;
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}m_upd7801;
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u8 m_sub_porta = 0;
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u8 m_sub_portc = 0;
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u8 m_pending_interrupts = 0;
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u8 m_active_interrupts = 0;
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@ -159,7 +153,7 @@ MC6845_UPDATE_ROW( fp1100_state::crtc_update_row )
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{
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rgb_t const *const palette = m_palette->palette()->entry_list_raw();
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u32 *p = &bitmap.pix(y);
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const u8 porta = m_upd7801.porta;
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const u8 porta = m_sub_porta;
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if (BIT(porta, 4))
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{ // green screen
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@ -203,15 +197,15 @@ other bits not used
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*/
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void fp1100_state::main_bank_w(u8 data)
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{
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m_bank_sel = BIT(data, 1);
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// m_slot_num = (m_slot_num & 3) | ((data & 1) << 2); //??
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m_iplview.select(BIT(data, 1));
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// m_slot_num = (m_slot_num & 3) | ((data & 1) << 2); //??
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}
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/*
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* x--- ---- mask for main to sub (INTF2)
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* ---x ---- INTS (sub to main)
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* ---- x--- INTD
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* ---- -x-- INTC
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* ---- -x-- INTC (RS-232C)
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* ---- --x- INTB (FDC bus slot irq)
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* ---- ---x INTA (FDC bus slot drq)
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*/
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@ -237,28 +231,23 @@ void fp1100_state::irq_mask_w(u8 data)
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LOG("%s: IRQmask=%X\n",machine().describe_context(),data);
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}
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// TODO: convert to `memory_view`
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u8 fp1100_state::memory_r(offs_t offset)
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{
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// TODO: verify this odd range
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if (offset < 0x9000 && !m_bank_sel)
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return m_ipl[offset];
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else
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return m_wram[offset];
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}
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void fp1100_state::main_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0xffff).r(FUNC(fp1100_state::memory_r));
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map(0x0000, 0xffff).writeonly().share(m_wram); // always write to ram
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map(0x0000, 0xffff).view(m_iplview);
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m_iplview[0](0x0000, 0x7fff).rom().region("ipl", 0);
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m_iplview[0](0x8000, 0x8fff).rom().region("basic", 0);
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m_iplview[0](0x9000, 0xffff).lr8(NAME([this] (offs_t offset) { return m_workram[offset + 0x9000]; }));
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// writes always goes to work RAM
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m_iplview[0](0x0000, 0xffff).writeonly().share(m_workram);
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m_iplview[1](0x0000, 0xffff).ram().share(m_workram);
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}
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void fp1100_state::io_map(address_map &map)
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{
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map.unmap_value_high();
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//map(0x0000, 0xfeff) slot memory area
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// map(0xff00, 0xff00).mirror(0x7f).rw(FUNC(fp1100_state::slot_id_r), FUNC(fp1100_state::slot_bank_w));
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// map(0xff00, 0xff00).mirror(0x7f).rw(FUNC(fp1100_state::slot_id_r), FUNC(fp1100_state::slot_bank_w));
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map(0xff80, 0xff80).mirror(0x7f).r("sub2main", FUNC(generic_latch_8_device::read));
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map(0xff80, 0xff80).mirror(0x1f).w(FUNC(fp1100_state::irq_mask_w));
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map(0xffa0, 0xffa0).mirror(0x1f).w(FUNC(fp1100_state::main_bank_w));
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@ -360,7 +349,7 @@ The SO pin is Serial Output to CMT (1=2400Hz; 0=1200Hz)
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*/
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void fp1100_state::porta_w(u8 data)
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{
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if (BIT(m_upd7801.porta, 5) && !BIT(data, 5))
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if (BIT(m_sub_porta, 5) && !BIT(data, 5))
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{
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for (int i = 0; i < 3; i++)
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{
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@ -372,7 +361,7 @@ void fp1100_state::porta_w(u8 data)
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const u8 crtc_divider = BIT(data, 3) ? 16 : 8;
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m_crtc->set_unscaled_clock(MAIN_CLOCK / crtc_divider);
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m_upd7801.porta = data;
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m_sub_porta = data;
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}
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u8 fp1100_state::portb_r()
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@ -394,7 +383,7 @@ d7 - CMT load serial data
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*/
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u8 fp1100_state::portc_r()
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{
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return (m_upd7801.portc & 0x78) | m_centronics_busy;
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return (m_sub_portc & 0x78) | m_centronics_busy;
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}
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/*
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@ -405,11 +394,11 @@ d6 - Centronics strobe
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*/
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void fp1100_state::portc_w(u8 data)
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{
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u8 const bits = data ^ m_upd7801.portc;
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u8 const bits = data ^ m_sub_portc;
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const int main_int_state = BIT(data, 3);
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if (BIT(m_upd7801.portc, 3) != main_int_state)
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if (BIT(m_sub_portc, 3) != main_int_state)
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int_w<4>(main_int_state);
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m_upd7801.portc = data;
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m_sub_portc = data;
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if (BIT(bits, 5))
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m_cassette->change_state(BIT(data, 5) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
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@ -621,6 +610,7 @@ static INPUT_PORTS_START( fp1100 )
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INPUT_PORTS_END
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// debugging only
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static const gfx_layout chars_8x8 =
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{
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8,8,
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@ -659,8 +649,25 @@ TIMER_DEVICE_CALLBACK_MEMBER( fp1100_state::kansas_w )
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void fp1100_state::machine_start()
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{
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save_item(NAME(m_sub_wait));
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save_item(NAME(m_sub_irq_status));
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save_item(NAME(m_kbd_row));
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save_item(NAME(m_col_border));
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save_item(NAME(m_col_cursor));
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save_item(NAME(m_col_display));
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save_item(NAME(m_centronics_busy));
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save_item(NAME(m_sub_porta));
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save_item(NAME(m_sub_portc));
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save_item(NAME(m_pending_interrupts));
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save_item(NAME(m_active_interrupts));
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save_item(NAME(m_interrupt_mask));
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save_item(NAME(m_caps_led_state));
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save_item(NAME(m_shift_led_state));
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// FIXME: cassette state intentionally not saved for now
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}
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void fp1100_state::machine_reset()
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@ -670,17 +677,16 @@ void fp1100_state::machine_reset()
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m_beep->set_state(0);
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m_bank_sel = false; // point at rom
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m_interrupt_mask = 0;
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m_interrupt_mask = m_active_interrupts = m_pending_interrupts = 0;
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m_kbd_row = 0;
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m_caps_led_state = m_shift_led_state = 0;
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m_col_border = 0;
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m_col_cursor = 0;
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m_col_display = 0;
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m_upd7801.porta = 0;
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m_upd7801.portb = 0;
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m_upd7801.portc = 0;
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m_sub_porta = 0;
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m_sub_portc = 0;
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m_iplview.select(0);
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}
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void fp1100_state::fp1100(machine_config &config)
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@ -745,9 +751,16 @@ void fp1100_state::fp1100(machine_config &config)
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// ROM definitions
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ROM_START( fp1100 )
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ROM_REGION( 0x9000, "ipl", ROMREGION_ERASEFF )
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ROM_REGION( 0x9000, "bios", ROMREGION_ERASEFF )
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// TODO: split into two roms
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ROM_LOAD( "basic.rom", 0x0000, 0x9000, BAD_DUMP CRC(7c7dd17c) SHA1(985757b9c62abd17b0bd77db751d7782f2710ec3))
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ROM_REGION( 0x8000, "ipl", ROMREGION_ERASEFF )
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ROM_COPY( "bios", 0x0000, 0x0000, 0x8000 )
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ROM_REGION( 0x1000, "basic", ROMREGION_ERASEFF )
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ROM_COPY( "bios", 0x8000, 0x0000, 0x1000 )
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ROM_REGION( 0x3000, "sub_ipl", ROMREGION_ERASEFF )
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ROM_LOAD( "sub1.rom", 0x0000, 0x1000, CRC(8feda489) SHA1(917d5b398b9e7b9a6bfa5e2f88c5b99923c3c2a3))
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ROM_LOAD( "sub2.rom", 0x1000, 0x1000, CRC(359f007e) SHA1(0188d5a7b859075cb156ee55318611bd004128d7))
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@ -757,7 +770,10 @@ ROM_END
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/* FP-1000 has video RAM locations RAM9 to RAM24 unpopulated (only RAM1 to RAM8 are populated) - needs its own machine configuration.
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PCB parts overlay silkscreen for sub-CPU shows "µPD7801G-101", but all examples seen have chips silksreened "D7108G 118". */
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ROM_START( fp1000 )
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ROM_REGION( 0x9000, "ipl", ROMREGION_ERASEFF )
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ROM_REGION( 0x8000, "ipl", ROMREGION_ERASE00 )
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ROM_LOAD( "ipl.rom", 0x0000, 0x8000, NO_DUMP)
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ROM_REGION( 0x1000, "basic", ROMREGION_ERASEFF )
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ROM_LOAD( "2l_a10_kkk_fp1000_basic.c1", 0x0000, 0x1000, CRC(9322dedd) SHA1(40a00684ced2b7ead53ca15a915d98f3fe00d3ba))
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ROM_REGION( 0x3000, "sub_ipl", ROMREGION_ERASEFF )
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