mirror of
https://github.com/holub/mame
synced 2025-04-25 09:50:04 +03:00
convert XTAL(x) to x_XTAL in some of my drivers (nw)
This commit is contained in:
parent
8a9124a885
commit
0ff91f29b9
@ -430,7 +430,7 @@ INPUT_PORTS_END
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MACHINE_CONFIG_START(ckz80_state::master)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", Z80, XTAL(8'000'000)/2)
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MCFG_CPU_ADD("maincpu", Z80, 8.0_MHz_XTAL/2)
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MCFG_CPU_PROGRAM_MAP(master_trampoline)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", ckz80_state, irq_on, attotime::from_hz(429)) // theoretical frequency from 555 timer (22nF, 150K, 1K5), measurement was 418Hz
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MCFG_TIMER_START_DELAY(attotime::from_hz(429) - attotime::from_nsec(22870)) // active for 22.87us
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@ -396,7 +396,7 @@ INPUT_PORTS_END
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MACHINE_CONFIG_START(cxgz80_state::ch2001)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", Z80, XTAL(8'000'000)/2)
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MCFG_CPU_ADD("maincpu", Z80, 8.0_MHz_XTAL/2)
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MCFG_CPU_PROGRAM_MAP(ch2001_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", cxgz80_state, irq_on, attotime::from_hz(484)) // theoretical frequency from 555 timer (22nF, 100K+33K, 1K2), measurement was 568Hz
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MCFG_TIMER_START_DELAY(attotime::from_hz(484) - attotime::from_nsec(18300)) // active for 18.3us
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@ -172,33 +172,33 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(eva_state::eva24)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", COP420, XTAL(640'000)/2) // guessed
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MCFG_CPU_ADD("maincpu", COP420, 640.0_kHz_XTAL/2) // guessed
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MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
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MCFG_COP400_WRITE_D_CB(WRITE8(eva_state, eva24_write_d))
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MCFG_COP400_WRITE_G_CB(WRITE8(eva_state, eva24_write_g))
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MCFG_COP400_READ_G_CB(READ8(eva_state, eva24_read_g))
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/* sound hardware */
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MCFG_DEVICE_ADD("tms6100", TMS6100, XTAL(640'000)/4)
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MCFG_DEVICE_ADD("tms6100", TMS6100, 640.0_kHz_XTAL/4)
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("tms5100", TMS5110A, XTAL(640'000))
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MCFG_SOUND_ADD("tms5100", TMS5110A, 640.0_kHz_XTAL)
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MCFG_FRAGMENT_ADD(tms5110_route)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_START(eva_state::eva11)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", TMS1000, XTAL(640'000)/2) // from TMS5110A CPU CK
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MCFG_CPU_ADD("maincpu", TMS1000, 640.0_kHz_XTAL/2) // from TMS5110A CPU CK
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MCFG_TMS1XXX_READ_K_CB(READ8(eva_state, eva11_read_k))
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MCFG_TMS1XXX_WRITE_O_CB(WRITE16(eva_state, eva11_write_o))
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MCFG_TMS1XXX_WRITE_R_CB(WRITE16(eva_state, eva11_write_r))
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/* sound hardware */
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MCFG_DEVICE_ADD("tms6100", TMS6100, XTAL(640'000)/4)
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MCFG_DEVICE_ADD("tms6100", TMS6100, 640.0_kHz_XTAL/4)
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("tms5100", TMS5110A, XTAL(640'000))
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MCFG_SOUND_ADD("tms5100", TMS5110A, 640.0_kHz_XTAL)
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MCFG_FRAGMENT_ADD(tms5110_route)
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MACHINE_CONFIG_END
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@ -1639,7 +1639,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::csc)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M6502, XTAL(3'900'000)/2) // from 3.9MHz resonator
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MCFG_CPU_ADD("maincpu", M6502, 3.9_MHz_XTAL/2) // from 3.9MHz resonator
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MCFG_CPU_PROGRAM_MAP(csc_map)
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MCFG_CPU_PERIODIC_INT_DRIVER(fidel6502_state, irq0_line_hold, 600) // 38400kHz/64
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@ -1684,7 +1684,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::eas)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", R65C02, XTAL(3'000'000))
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MCFG_CPU_ADD("maincpu", R65C02, 3.0_MHz_XTAL)
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MCFG_CPU_PROGRAM_MAP(eas_map)
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MCFG_CPU_PERIODIC_INT_DRIVER(fidel6502_state, irq0_line_hold, 600) // guessed
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@ -1719,7 +1719,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel6502_state::eag, eas)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", R65C02, XTAL(5'000'000)) // R65C02P4
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MCFG_CPU_REPLACE("maincpu", R65C02, 5.0_MHz_XTAL) // R65C02P4
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MCFG_CPU_PROGRAM_MAP(eag_map)
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MCFG_CPU_PERIODIC_INT_DRIVER(fidel6502_state, irq0_line_hold, 600) // guessed
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@ -1729,7 +1729,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::sc9d)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M6502, XTAL(3'900'000)/2) // R6502AP, 3.9MHz resonator
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MCFG_CPU_ADD("maincpu", M6502, 3.9_MHz_XTAL/2) // R6502AP, 3.9MHz resonator
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MCFG_CPU_PROGRAM_MAP(sc9d_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel6502_state, irq_on, attotime::from_hz(610)) // from 555 timer (22nF, 102K, 2.7K)
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MCFG_TIMER_START_DELAY(attotime::from_hz(610) - attotime::from_usec(41)) // active for 41us
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@ -1776,13 +1776,13 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::sc12)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", R65C02, XTAL(3'000'000)) // R65C02P3
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MCFG_CPU_ADD("maincpu", R65C02, 3.0_MHz_XTAL) // R65C02P3
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MCFG_CPU_PROGRAM_MAP(sc12_trampoline)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel6502_state, irq_on, attotime::from_hz(630)) // from 556 timer (22nF, 102K, 1K)
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MCFG_TIMER_START_DELAY(attotime::from_hz(630) - attotime::from_nsec(15250)) // active for 15.25us
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", fidel6502_state, irq_off, attotime::from_hz(630))
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MCFG_TIMER_DRIVER_ADD_PERIODIC("dummy_timer", fidel6502_state, dummy, attotime::from_hz(XTAL(3'000'000))) // MCFG_QUANTUM_PERFECT_CPU("maincpu") didn't work
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MCFG_TIMER_DRIVER_ADD_PERIODIC("dummy_timer", fidel6502_state, dummy, attotime::from_hz(3.0_MHz_XTAL)) // MCFG_QUANTUM_PERFECT_CPU("maincpu") didn't work
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MCFG_DEVICE_ADD("sc12_map", ADDRESS_MAP_BANK, 0)
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MCFG_DEVICE_PROGRAM_MAP(sc12_map)
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@ -1810,7 +1810,7 @@ MACHINE_CONFIG_DERIVED(fidel6502_state::sc12b, sc12)
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/* basic machine hardware */
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MCFG_CPU_MODIFY("maincpu")
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MCFG_DEVICE_CLOCK(XTAL(4'000'000)) // R65C02P4
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MCFG_DEVICE_CLOCK(4.0_MHz_XTAL) // R65C02P4
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// change irq timer frequency
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MCFG_DEVICE_REMOVE("irq_on")
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@ -1820,13 +1820,13 @@ MACHINE_CONFIG_DERIVED(fidel6502_state::sc12b, sc12)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", fidel6502_state, irq_off, attotime::from_hz(596))
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MCFG_DEVICE_REMOVE("dummy_timer")
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MCFG_TIMER_DRIVER_ADD_PERIODIC("dummy_timer", fidel6502_state, dummy, attotime::from_hz(XTAL(4'000'000))) // MCFG_QUANTUM_PERFECT_CPU("maincpu") didn't work
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MCFG_TIMER_DRIVER_ADD_PERIODIC("dummy_timer", fidel6502_state, dummy, attotime::from_hz(4.0_MHz_XTAL)) // MCFG_QUANTUM_PERFECT_CPU("maincpu") didn't work
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MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::fexcel)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M65SC02, XTAL(12'000'000)/4) // G65SC102P-3, 12.0M ceramic resonator
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MCFG_CPU_ADD("maincpu", M65SC02, 12.0_MHz_XTAL/4) // G65SC102P-3, 12.0M ceramic resonator
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MCFG_CPU_PROGRAM_MAP(fexcel_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel6502_state, irq_on, attotime::from_hz(630)) // from 556 timer (22nF, 102K, 1K)
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MCFG_TIMER_START_DELAY(attotime::from_hz(630) - attotime::from_nsec(15250)) // active for 15.25us
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@ -1845,7 +1845,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel6502_state::fexcel4, fexcel)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", R65C02, XTAL(4'000'000)) // R65C02P4
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MCFG_CPU_REPLACE("maincpu", R65C02, 4.0_MHz_XTAL) // R65C02P4
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MCFG_CPU_PROGRAM_MAP(fexcel_map)
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MACHINE_CONFIG_END
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@ -1859,7 +1859,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel6502_state::fexcelp, fexcel)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", R65C02, XTAL(5'000'000)) // R65C02P4
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MCFG_CPU_REPLACE("maincpu", R65C02, 5.0_MHz_XTAL) // R65C02P4
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MCFG_CPU_PROGRAM_MAP(fexcelp_map)
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MACHINE_CONFIG_END
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@ -1867,13 +1867,13 @@ MACHINE_CONFIG_DERIVED(fidel6502_state::granits, fexcelp)
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/* basic machine hardware */
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MCFG_CPU_MODIFY("maincpu")
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MCFG_DEVICE_CLOCK(XTAL(8'000'000)) // overclocked
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MCFG_DEVICE_CLOCK(8.0_MHz_XTAL) // overclocked
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MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel6502_state::fdes2100, fexcel)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", M65C02, XTAL(5'000'000)) // WDC 65C02
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MCFG_CPU_REPLACE("maincpu", M65C02, 5.0_MHz_XTAL) // WDC 65C02
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MCFG_CPU_PROGRAM_MAP(fexcelp_map)
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// change irq timer frequency
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@ -1889,7 +1889,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel6502_state::fdes2000, fdes2100)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", R65C02, XTAL(3'000'000)) // RP65C02G
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MCFG_CPU_REPLACE("maincpu", R65C02, 3.0_MHz_XTAL) // RP65C02G
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MCFG_CPU_PROGRAM_MAP(fexcelp_map)
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MACHINE_CONFIG_END
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@ -1910,7 +1910,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::fdes2100d)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M65C02, XTAL(6'000'000)) // W65C02P-6
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MCFG_CPU_ADD("maincpu", M65C02, 6.0_MHz_XTAL) // W65C02P-6
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MCFG_CPU_PROGRAM_MAP(fdesdis_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel6502_state, irq_on, attotime::from_hz(630)) // from 556 timer (22nF, 102K, 1K)
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MCFG_TIMER_START_DELAY(attotime::from_hz(630) - attotime::from_nsec(15250)) // active for 15.25us
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@ -1929,14 +1929,14 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel6502_state::fdes2000d, fdes2100d)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", R65C02, XTAL(3'000'000)) // R65C02P3
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MCFG_CPU_REPLACE("maincpu", R65C02, 3.0_MHz_XTAL) // R65C02P3
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MCFG_CPU_PROGRAM_MAP(fdesdis_map)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::fphantom)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", R65C02, XTAL(4'915'200)) // R65C02P4
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MCFG_CPU_ADD("maincpu", R65C02, 4.9152_MHz_XTAL) // R65C02P4
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MCFG_CPU_PERIODIC_INT_DRIVER(fidel6502_state, irq0_line_hold, 600) // guessed
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MCFG_CPU_PROGRAM_MAP(fphantom_map)
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@ -1955,7 +1955,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel6502_state::chesster)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", R65C02, XTAL(5'000'000)) // RP65C02G
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MCFG_CPU_ADD("maincpu", R65C02, 5.0_MHz_XTAL) // RP65C02G
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MCFG_CPU_PROGRAM_MAP(chesster_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel6502_state, irq_on, attotime::from_hz(9615)) // R/C circuit, measured
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MCFG_TIMER_START_DELAY(attotime::from_hz(9615) - attotime::from_nsec(2600)) // active for 2.6us
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@ -1976,7 +1976,7 @@ MACHINE_CONFIG_DERIVED(fidel6502_state::kishon, chesster)
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/* basic machine hardware */
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MCFG_CPU_MODIFY("maincpu")
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MCFG_DEVICE_CLOCK(XTAL(3'579'545))
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MCFG_DEVICE_CLOCK(3.579545_MHz_XTAL)
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MCFG_CPU_PROGRAM_MAP(kishon_map)
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MACHINE_CONFIG_END
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@ -542,7 +542,7 @@ INPUT_PORTS_END
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MACHINE_CONFIG_START(fidel68k_state::fex68k)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M68000, XTAL(12'000'000)) // HD68HC000P12
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MCFG_CPU_ADD("maincpu", M68000, 12.0_MHz_XTAL) // HD68HC000P12
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MCFG_CPU_PROGRAM_MAP(fex68k_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel68k_state, irq_on, attotime::from_hz(618)) // theoretical frequency from 556 timer (22nF, 91K + 20K POT @ 14.8K, 0.1K), measurement was 580Hz
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MCFG_TIMER_START_DELAY(attotime::from_hz(618) - attotime::from_nsec(1525)) // active for 1.525us
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@ -569,14 +569,14 @@ MACHINE_CONFIG_DERIVED(fidel68k_state::fex68km3, fex68k)
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/* basic machine hardware */
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MCFG_CPU_MODIFY("maincpu")
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MCFG_DEVICE_CLOCK(XTAL(16'000'000)) // factory overclock
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MCFG_DEVICE_CLOCK(16.0_MHz_XTAL) // factory overclock
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MCFG_CPU_PROGRAM_MAP(fex68km3_map)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel68k_state::fdes2265)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M68000, XTAL(16'000'000)) // MC68HC000P12F
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MCFG_CPU_ADD("maincpu", M68000, 16.0_MHz_XTAL) // MC68HC000P12F
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MCFG_CPU_PROGRAM_MAP(fdes2265_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel68k_state, irq_on, attotime::from_hz(597)) // from 555 timer, measured
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MCFG_TIMER_START_DELAY(attotime::from_hz(597) - attotime::from_nsec(6000)) // active for 6us
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@ -595,7 +595,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel68k_state::fdes2325, fdes2265)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", M68EC020, XTAL(20'000'000)) // MC68EC020RP25
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MCFG_CPU_REPLACE("maincpu", M68EC020, 20.0_MHz_XTAL) // MC68EC020RP25
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MCFG_CPU_PROGRAM_MAP(fdes2325_map)
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MCFG_DEFAULT_LAYOUT(layout_fidel_desdis_68kg)
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@ -604,11 +604,11 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(fidel68k_state::eag)
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M68000, XTAL(16'000'000))
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MCFG_CPU_ADD("maincpu", M68000, 16.0_MHz_XTAL)
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MCFG_CPU_PROGRAM_MAP(eag_map)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel68k_state, irq_on, attotime::from_hz(XTAL(4'915'200)/0x2000)) // 600Hz
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MCFG_TIMER_START_DELAY(attotime::from_hz(XTAL(4'915'200)/0x2000) - attotime::from_nsec(8250)) // active for 8.25us
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", fidel68k_state, irq_off, attotime::from_hz(XTAL(4'915'200)/0x2000))
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidel68k_state, irq_on, attotime::from_hz(4.9152_MHz_XTAL/0x2000)) // 600Hz
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MCFG_TIMER_START_DELAY(attotime::from_hz(4.9152_MHz_XTAL/0x2000) - attotime::from_nsec(8250)) // active for 8.25us
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MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", fidel68k_state, irq_off, attotime::from_hz(4.9152_MHz_XTAL/0x2000))
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MCFG_NVRAM_ADD_1FILL("nvram")
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@ -635,7 +635,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel68k_state::eagv7, eag)
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/* basic machine hardware */
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MCFG_CPU_REPLACE("maincpu", M68020, XTAL(20'000'000))
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MCFG_CPU_REPLACE("maincpu", M68020, 20.0_MHz_XTAL)
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MCFG_CPU_PROGRAM_MAP(eagv7_map)
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MCFG_RAM_REMOVE("ram")
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@ -644,21 +644,21 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED(fidel68k_state::eagv9, eagv7)
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/* basic machine hardware */
|
||||
MCFG_CPU_REPLACE("maincpu", M68030, XTAL(32'000'000))
|
||||
MCFG_CPU_REPLACE("maincpu", M68030, 32.0_MHz_XTAL)
|
||||
MCFG_CPU_PROGRAM_MAP(eagv7_map)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_DERIVED(fidel68k_state::eagv10, eagv7)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_REPLACE("maincpu", M68040, XTAL(25'000'000))
|
||||
MCFG_CPU_REPLACE("maincpu", M68040, 25.0_MHz_XTAL)
|
||||
MCFG_CPU_PROGRAM_MAP(eagv11_map)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_DERIVED(fidel68k_state::eagv11, eagv7)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_REPLACE("maincpu", M68EC040, XTAL(36'000'000)*2*2) // wrong! should be M68EC060 @ 72MHz
|
||||
MCFG_CPU_REPLACE("maincpu", M68EC040, 36.0_MHz_XTAL*2*2) // wrong! should be M68EC060 @ 72MHz
|
||||
MCFG_CPU_PROGRAM_MAP(eagv11_map)
|
||||
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(fidel68k_state, irq2_line_hold, 600)
|
||||
|
@ -148,7 +148,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(fidelmcs48_state::sc6)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I8040, XTAL(11'000'000))
|
||||
MCFG_CPU_ADD("maincpu", I8040, 11.0_MHz_XTAL)
|
||||
MCFG_CPU_PROGRAM_MAP(sc6_map)
|
||||
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(fidelmcs48_state, sc6_mux_w))
|
||||
MCFG_MCS48_PORT_P1_IN_CB(READ8(fidelmcs48_state, sc6_input_r))
|
||||
|
@ -1631,7 +1631,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(fidelz80_state::bcc)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL(3'579'545))
|
||||
MCFG_CPU_ADD("maincpu", Z80, 3.579545_MHz_XTAL)
|
||||
MCFG_CPU_PROGRAM_MAP(bcc_map)
|
||||
MCFG_CPU_IO_MAP(bcc_io)
|
||||
|
||||
@ -1648,7 +1648,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(fidelz80_state::scc)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL(3'900'000))
|
||||
MCFG_CPU_ADD("maincpu", Z80, 3.9_MHz_XTAL)
|
||||
MCFG_CPU_PROGRAM_MAP(scc_map)
|
||||
MCFG_CPU_IO_MAP(scc_io)
|
||||
|
||||
@ -1665,7 +1665,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(fidelz80_state::cc10)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL(4'000'000))
|
||||
MCFG_CPU_ADD("maincpu", Z80, 4.0_MHz_XTAL)
|
||||
MCFG_CPU_PROGRAM_MAP(cc10_map)
|
||||
MCFG_CPU_IO_MAP(vcc_io)
|
||||
|
||||
@ -1691,7 +1691,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(fidelz80_state::vcc)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL(4'000'000))
|
||||
MCFG_CPU_ADD("maincpu", Z80, 4.0_MHz_XTAL)
|
||||
MCFG_CPU_PROGRAM_MAP(vcc_map)
|
||||
MCFG_CPU_IO_MAP(vcc_io)
|
||||
|
||||
@ -1719,7 +1719,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(fidelz80_state::vsc)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL(3'900'000)) // 3.9MHz resonator
|
||||
MCFG_CPU_ADD("maincpu", Z80, 3.9_MHz_XTAL) // 3.9MHz resonator
|
||||
MCFG_CPU_PROGRAM_MAP(vsc_map)
|
||||
MCFG_CPU_IO_MAP(vsc_io)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(fidelz80_state, nmi_line_pulse, 587) // 555 timer, measured
|
||||
@ -1729,7 +1729,7 @@ MACHINE_CONFIG_START(fidelz80_state::vsc)
|
||||
MCFG_I8255_OUT_PORTB_CB(WRITE8(fidelz80_state, vsc_ppi_portb_w))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(fidelz80_state, vsc_ppi_portc_w))
|
||||
|
||||
MCFG_DEVICE_ADD("z80pio", Z80PIO, XTAL(3'900'000))
|
||||
MCFG_DEVICE_ADD("z80pio", Z80PIO, 3.9_MHz_XTAL)
|
||||
MCFG_Z80PIO_IN_PA_CB(READ8(fidelz80_state, vsc_pio_porta_r))
|
||||
MCFG_Z80PIO_IN_PB_CB(READ8(fidelz80_state, vsc_pio_portb_r))
|
||||
MCFG_Z80PIO_OUT_PB_CB(WRITE8(fidelz80_state, vsc_pio_portb_w))
|
||||
@ -1747,12 +1747,12 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(fidelz80_state::vbrc)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL(5'000'000)/2)
|
||||
MCFG_CPU_ADD("maincpu", Z80, 5.0_MHz_XTAL/2)
|
||||
MCFG_CPU_PROGRAM_MAP(vbrc_main_map)
|
||||
MCFG_CPU_IO_MAP(vbrc_main_io)
|
||||
MCFG_QUANTUM_PERFECT_CPU("maincpu")
|
||||
|
||||
MCFG_CPU_ADD("mcu", I8041, XTAL(5'000'000))
|
||||
MCFG_CPU_ADD("mcu", I8041, 5.0_MHz_XTAL)
|
||||
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(fidelz80_state, vbrc_mcu_p1_w))
|
||||
MCFG_MCS48_PORT_P2_IN_CB(READ8(fidelz80_state, vbrc_mcu_p2_r))
|
||||
MCFG_MCS48_PORT_P2_OUT_CB(DEVWRITE8("i8243", i8243_device, p2_w))
|
||||
@ -1775,7 +1775,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(fidelz80_state::dsc)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL(3'900'000)) // 3.9MHz resonator
|
||||
MCFG_CPU_ADD("maincpu", Z80, 3.9_MHz_XTAL) // 3.9MHz resonator
|
||||
MCFG_CPU_PROGRAM_MAP(dsc_map)
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", fidelz80_state, irq_on, attotime::from_hz(523)) // from 555 timer (22nF, 120K, 2.7K)
|
||||
MCFG_TIMER_START_DELAY(attotime::from_hz(523) - attotime::from_usec(41)) // active for 41us
|
||||
|
@ -298,7 +298,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(cfrogger_state::cfrogger)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M58846, XTAL(600'000))
|
||||
MCFG_CPU_ADD("maincpu", M58846, 600.0_kHz_XTAL)
|
||||
MCFG_MELPS4_READ_K_CB(READ16(cfrogger_state, input_r))
|
||||
MCFG_MELPS4_WRITE_S_CB(WRITE8(cfrogger_state, plate_w))
|
||||
MCFG_MELPS4_WRITE_F_CB(WRITE8(cfrogger_state, plate_w))
|
||||
@ -414,7 +414,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gjungler_state::gjungler)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M58846, XTAL(600'000))
|
||||
MCFG_CPU_ADD("maincpu", M58846, 600.0_kHz_XTAL)
|
||||
MCFG_MELPS4_READ_K_CB(READ16(gjungler_state, input_r))
|
||||
MCFG_MELPS4_WRITE_S_CB(WRITE8(gjungler_state, plate_w))
|
||||
MCFG_MELPS4_WRITE_F_CB(WRITE8(gjungler_state, plate_w))
|
||||
|
@ -264,7 +264,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kdribble_state::kdribble)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -337,7 +337,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(ktopgun_state::ktopgun)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -412,7 +412,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kcontra_state::kcontra)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -485,7 +485,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(ktmnt_state::ktmnt)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -555,7 +555,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kgradius_state::kgradius)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -623,7 +623,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kloneran_state::kloneran)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -695,7 +695,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kblades_state::kblades)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -768,7 +768,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(knfl_state::knfl)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -840,7 +840,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kbilly_state::kbilly)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -906,7 +906,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kbucky_state::kbucky)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -976,7 +976,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(kgarfld_state::kgarfld)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -1069,7 +1069,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_mmouse_state::gnw_mmouse)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM5A, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM5A, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT) // ?
|
||||
MCFG_SM500_WRITE_O_CB(WRITE8(hh_sm510_state, sm500_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1102,7 +1102,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_DERIVED(gnw_mmouse_state::nupogodi, gnw_mmouse)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_REPLACE("maincpu", KB1013VK12, XTAL(32'768))
|
||||
MCFG_CPU_REPLACE("maincpu", KB1013VK12, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM500_WRITE_O_CB(WRITE8(hh_sm510_state, sm500_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1175,7 +1175,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_mickdon_state::gnw_mickdon)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1259,7 +1259,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_dkong2_state::gnw_dkong2)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1344,7 +1344,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_mario_state::gnw_mario)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1436,7 +1436,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_dkjr_state::gnw_dkjr)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1518,7 +1518,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_mariocm_state::gnw_mariocm)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1603,7 +1603,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_smb_state::gnw_smb)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -1705,7 +1705,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(gnw_boxing_state::gnw_boxing)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -1815,7 +1815,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tgaunt_state::tgaunt)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -1917,7 +1917,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tddragon_state::tddragon)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2012,7 +2012,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tkarnov_state::tkarnov)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2106,7 +2106,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tvindictr_state::tvindictr)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2209,7 +2209,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tgaiden_state::tgaiden)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2299,7 +2299,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tbatman_state::tbatman)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2393,7 +2393,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tsharr2_state::tsharr2)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2488,7 +2488,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tgoldnaxe_state::tgoldnaxe)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2583,7 +2583,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(trobocop2_state::trobocop2)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2682,7 +2682,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(taltbeast_state::taltbeast)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2773,7 +2773,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tswampt_state::tswampt)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -2869,7 +2869,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tmchammer_state::tmchammer)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
@ -2963,7 +2963,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tbtoads_state::tbtoads)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3082,7 +3082,7 @@ static const s16 tsonic_speaker_levels[] = { 0, 0x7fff/3*1, 0x7fff/3*2, 0x7fff }
|
||||
MACHINE_CONFIG_START(tsonic_state::tsonic)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(tsonic_state, write_s))
|
||||
@ -3172,7 +3172,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tdummies_state::tdummies)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3267,7 +3267,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tsfight2_state::tsfight2)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3367,7 +3367,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tsddragon_state::tsddragon)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3466,7 +3466,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tnmarebc_state::tnmarebc)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3562,7 +3562,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tmkombat_state::tmkombat)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3657,7 +3657,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tshadow_state::tshadow)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3752,7 +3752,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tskelwarr_state::tskelwarr)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3848,7 +3848,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tbatfor_state::tbatfor)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -3944,7 +3944,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tjdredd_state::tjdredd)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -4040,7 +4040,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tapollo13_state::tapollo13)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -4131,7 +4131,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tsjam_state::tsjam)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768)) // no external XTAL
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL) // no external XTAL
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -4236,7 +4236,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tigarden_state::tigarden)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_R_MASK_OPTION(2) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
@ -4337,7 +4337,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(nummunch_state::nummunch)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM511, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", SM511, 32.768_kHz_XTAL)
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(hh_sm510_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(hh_sm510_state, input_w))
|
||||
|
@ -4727,7 +4727,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(fxmcr165_state::fxmcr165)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", TMS1100, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", TMS1100, 400.0_kHz_XTAL)
|
||||
MCFG_TMS1XXX_READ_K_CB(READ8(fxmcr165_state, read_k))
|
||||
MCFG_TMS1XXX_WRITE_R_CB(WRITE16(fxmcr165_state, write_r))
|
||||
MCFG_TMS1XXX_WRITE_O_CB(WRITE16(fxmcr165_state, write_o))
|
||||
|
@ -969,7 +969,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(bcclimbr_state::bcclimbr)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(bcclimbr_state, plate_w))
|
||||
@ -1186,7 +1186,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(invspace_state::invspace)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D552, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D552, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(invspace_state, grid_w))
|
||||
@ -1302,7 +1302,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(efball_state::efball)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_READ_C_CB(IOPORT("IN.2"))
|
||||
@ -1402,7 +1402,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(galaxy2_state::galaxy2)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(galaxy2_state, grid_w))
|
||||
@ -1520,7 +1520,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(astrocmd_state::astrocmd)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(astrocmd_state, grid_w))
|
||||
@ -1616,7 +1616,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(edracula_state::edracula)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(edracula_state, grid_w))
|
||||
@ -1704,7 +1704,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(mcompgin_state::mcompgin)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D650, XTAL(400'000)) // TDK FCR400K
|
||||
MCFG_CPU_ADD("maincpu", NEC_D650, 400.0_kHz_XTAL) // TDK FCR400K
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_E_CB(WRITE8(mcompgin_state, lcd_w))
|
||||
@ -2276,7 +2276,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tmpacman_state::tmpacman)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(430'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 430.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(tmpacman_state, grid_w))
|
||||
@ -2379,7 +2379,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tmscramb_state::tmscramb)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.1"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(tmscramb_state, grid_w))
|
||||
@ -2479,7 +2479,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tcaveman_state::tcaveman)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(IOPORT("IN.0"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(tcaveman_state, grid_w))
|
||||
MCFG_UCOM4_WRITE_D_CB(WRITE8(tcaveman_state, grid_w))
|
||||
@ -2611,7 +2611,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(alnchase_state::alnchase)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, XTAL(400'000))
|
||||
MCFG_CPU_ADD("maincpu", NEC_D553, 400.0_kHz_XTAL)
|
||||
MCFG_UCOM4_READ_A_CB(READ8(alnchase_state, input_r))
|
||||
MCFG_UCOM4_READ_B_CB(IOPORT("IN.2"))
|
||||
MCFG_UCOM4_WRITE_C_CB(WRITE8(alnchase_state, output_w))
|
||||
|
@ -93,6 +93,7 @@ public:
|
||||
void power_off();
|
||||
|
||||
void k28(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
@ -449,7 +450,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(k28_state::k28)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I8021, XTAL(3'579'545))
|
||||
MCFG_CPU_ADD("maincpu", I8021, 3.579545_MHz_XTAL)
|
||||
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(k28_state, mcu_p0_w))
|
||||
MCFG_MCS48_PORT_P1_IN_CB(READ8(k28_state, mcu_p1_r))
|
||||
MCFG_MCS48_PORT_P2_IN_CB(READ8(k28_state, mcu_p2_r))
|
||||
@ -457,7 +458,7 @@ MACHINE_CONFIG_START(k28_state::k28)
|
||||
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(k28_state, mcu_prog_w))
|
||||
MCFG_MCS48_PORT_T1_IN_CB(DEVREADLINE("speech", votrax_sc01_device, request)) // SC-01 A/R pin
|
||||
|
||||
MCFG_DEVICE_ADD("tms6100", TMS6100, XTAL(3'579'545)) // CLK tied to 8021 ALE pin
|
||||
MCFG_DEVICE_ADD("tms6100", TMS6100, 3.579545_MHz_XTAL) // CLK tied to 8021 ALE pin
|
||||
|
||||
MCFG_TIMER_ADD_NONE("on_button")
|
||||
|
||||
|
@ -443,7 +443,7 @@ READ8_MEMBER(novag6502_state::sexpert_input2_r)
|
||||
void novag6502_state::sexpert_set_cpu_freq()
|
||||
{
|
||||
// machines were released with either 5MHz or 6MHz CPU
|
||||
m_maincpu->set_unscaled_clock((ioport("FAKE")->read() & 1) ? (XTAL(12'000'000)/2) : (XTAL(10'000'000)/2));
|
||||
m_maincpu->set_unscaled_clock((ioport("FAKE")->read() & 1) ? (12.0_MHz_XTAL/2) : (10.0_MHz_XTAL/2));
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(novag6502_state, sexpert)
|
||||
@ -857,7 +857,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(novag6502_state::supercon)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M6502, XTAL(8'000'000)/2)
|
||||
MCFG_CPU_ADD("maincpu", M6502, 8.0_MHz_XTAL/2)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(novag6502_state, irq0_line_hold, 600) // guessed
|
||||
MCFG_CPU_PROGRAM_MAP(supercon_map)
|
||||
|
||||
@ -875,11 +875,11 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(novag6502_state::cforte)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", R65C02, XTAL(10'000'000)/2)
|
||||
MCFG_CPU_ADD("maincpu", R65C02, 10.0_MHz_XTAL/2)
|
||||
MCFG_CPU_PROGRAM_MAP(cforte_map)
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", novag6502_state, irq_on, attotime::from_hz(XTAL(32'768)/128)) // 256Hz
|
||||
MCFG_TIMER_START_DELAY(attotime::from_hz(XTAL(32'768)/128) - attotime::from_usec(11)) // active for 11us
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", novag6502_state, irq_off, attotime::from_hz(XTAL(32'768)/128))
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", novag6502_state, irq_on, attotime::from_hz(32.768_kHz_XTAL/128)) // 256Hz
|
||||
MCFG_TIMER_START_DELAY(attotime::from_hz(32.768_kHz_XTAL/128) - attotime::from_usec(11)) // active for 11us
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", novag6502_state, irq_off, attotime::from_hz(32.768_kHz_XTAL/128))
|
||||
|
||||
MCFG_NVRAM_ADD_1FILL("nvram")
|
||||
|
||||
@ -892,21 +892,21 @@ MACHINE_CONFIG_START(novag6502_state::cforte)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
MCFG_SOUND_ADD("beeper", BEEP, XTAL(32'768)/32) // 1024Hz
|
||||
MCFG_SOUND_ADD("beeper", BEEP, 32.768_kHz_XTAL/32) // 1024Hz
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(novag6502_state::sexpert)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M65C02, XTAL(10'000'000)/2) // or XTAL(12'000'000)/2
|
||||
MCFG_CPU_ADD("maincpu", M65C02, 10.0_MHz_XTAL/2) // or 12.0_MHz_XTAL/2
|
||||
MCFG_CPU_PROGRAM_MAP(sexpert_map)
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", novag6502_state, irq_on, attotime::from_hz(XTAL(32'768)/128)) // 256Hz
|
||||
MCFG_TIMER_START_DELAY(attotime::from_hz(XTAL(32'768)/128) - attotime::from_nsec(21500)) // active for 21.5us
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", novag6502_state, irq_off, attotime::from_hz(XTAL(32'768)/128))
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_on", novag6502_state, irq_on, attotime::from_hz(32.768_kHz_XTAL/128)) // 256Hz
|
||||
MCFG_TIMER_START_DELAY(attotime::from_hz(32.768_kHz_XTAL/128) - attotime::from_nsec(21500)) // active for 21.5us
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("irq_off", novag6502_state, irq_off, attotime::from_hz(32.768_kHz_XTAL/128))
|
||||
|
||||
MCFG_DEVICE_ADD("acia", MOS6551, 0) // R65C51P2 - RTS to CTS, DCD to GND
|
||||
MCFG_MOS6551_XTAL(XTAL(1'843'200))
|
||||
MCFG_MOS6551_XTAL(1.8432_MHz_XTAL)
|
||||
MCFG_MOS6551_IRQ_HANDLER(INPUTLINE("maincpu", M6502_NMI_LINE))
|
||||
MCFG_MOS6551_RTS_HANDLER(DEVWRITELINE("acia", mos6551_device, write_cts))
|
||||
MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
|
||||
@ -939,7 +939,7 @@ MACHINE_CONFIG_START(novag6502_state::sexpert)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
MCFG_SOUND_ADD("beeper", BEEP, XTAL(32'768)/32) // 1024Hz
|
||||
MCFG_SOUND_ADD("beeper", BEEP, 32.768_kHz_XTAL/32) // 1024Hz
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -949,7 +949,7 @@ MACHINE_CONFIG_DERIVED(novag6502_state::sforte, sexpert)
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(sforte_map)
|
||||
MCFG_TIMER_MODIFY("irq_on")
|
||||
MCFG_TIMER_START_DELAY(attotime::from_hz(XTAL(32'768)/128) - attotime::from_usec(11)) // active for ?us (assume same as cforte)
|
||||
MCFG_TIMER_START_DELAY(attotime::from_hz(32.768_kHz_XTAL/128) - attotime::from_usec(11)) // active for ?us (assume same as cforte)
|
||||
|
||||
MCFG_DEFAULT_LAYOUT(layout_novag_sforte)
|
||||
MACHINE_CONFIG_END
|
||||
|
@ -182,12 +182,12 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(novag68k_state::diablo68k)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, XTAL(16'000'000))
|
||||
MCFG_CPU_ADD("maincpu", M68000, 16.0_MHz_XTAL)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(novag68k_state, irq2_line_hold, 256) // guessed
|
||||
MCFG_CPU_PROGRAM_MAP(diablo68k_map)
|
||||
|
||||
MCFG_DEVICE_ADD("acia", MOS6551, 0)
|
||||
MCFG_MOS6551_XTAL(XTAL(1'843'200))
|
||||
MCFG_MOS6551_XTAL(1.8432_MHz_XTAL)
|
||||
|
||||
MCFG_NVRAM_ADD_0FILL("nvram")
|
||||
|
||||
|
@ -244,7 +244,7 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(rzone_state::rzindy500)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM510, XTAL(32'768)) // no external XTAL
|
||||
MCFG_CPU_ADD("maincpu", SM510, 32.768_kHz_XTAL) // no external XTAL
|
||||
MCFG_SM510_R_MASK_OPTION(SM510_R_CONTROL_OUTPUT) // confirmed
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(rzone_state, input_r))
|
||||
@ -270,7 +270,7 @@ MACHINE_CONFIG_END
|
||||
MACHINE_CONFIG_START(rzone_state::rzbatfor)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", SM512, XTAL(32'768)) // no external XTAL
|
||||
MCFG_CPU_ADD("maincpu", SM512, 32.768_kHz_XTAL) // no external XTAL
|
||||
MCFG_SM510_WRITE_SEGS_CB(WRITE16(hh_sm510_state, sm510_lcd_segment_w))
|
||||
MCFG_SM510_READ_K_CB(READ8(rzone_state, input_r))
|
||||
MCFG_SM510_WRITE_S_CB(WRITE8(rzone_state, t2_write_s))
|
||||
|
@ -135,13 +135,13 @@ INPUT_PORTS_END
|
||||
MACHINE_CONFIG_START(tamag1_state::tama)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", E0C6S46, XTAL(32'768))
|
||||
MCFG_CPU_ADD("maincpu", E0C6S46, 32.768_kHz_XTAL)
|
||||
MCFG_E0C6S46_PIXEL_UPDATE_CB(tamag1_state, pixel_update)
|
||||
MCFG_E0C6S46_WRITE_R_CB(4, WRITE8(tamag1_state, speaker_w))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", LCD)
|
||||
MCFG_SCREEN_REFRESH_RATE(XTAL(32'768)/1024)
|
||||
MCFG_SCREEN_REFRESH_RATE(32.768_kHz_XTAL/1024)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MCFG_SCREEN_SIZE(40, 16)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 32-1, 0, 16-1)
|
||||
|
@ -423,7 +423,7 @@ K28 modules:
|
||||
// The typical osc freq curve for TMS5100 is unknown. Let's assume it is set to the default frequency,
|
||||
// which is 640kHz for 8KHz according to the TMS5100 documentation.
|
||||
|
||||
#define MASTER_CLOCK (XTAL(640'000))
|
||||
#define MASTER_CLOCK 640.0_kHz_XTAL
|
||||
|
||||
|
||||
class tispeak_state : public hh_tms1k_state
|
||||
|
Loading…
Reference in New Issue
Block a user