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https://github.com/holub/mame
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superqix: added a sync trampoline for reading the semaphores via the ay-3-8910 #1, MCFG_QUANTUM_PERFECT is no longer needed. [Lord Nightmare]
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@ -171,7 +171,7 @@ code at z80:0093:
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#include "cpu/z80/z80.h"
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#include "cpu/mcs51/mcs51.h"
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#include "sound/ay8910.h"
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#include "cpu/m6805/m68705.h"
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#include "screen.h"
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#include "speaker.h"
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@ -286,12 +286,23 @@ TIMER_CALLBACK_MEMBER(superqix_state::mcu_port3_w_cb)
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m_fromMCU = param;
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}
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TIMER_CALLBACK_MEMBER(superqix_state::z80_ay1_sync_address_w_cb)
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{
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m_ay1->address_w(m_maincpu->device_t::memory().space(AS_PROGRAM), 0, param, 0xff);
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}
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TIMER_CALLBACK_MEMBER(superqix_state::z80_ay2_iob_w_cb)
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{
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// the ay #2 iob bus and the mcu port 3 are literally directly connected together, so technically the result could be a binary AND of the two...
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m_fromZ80 = param;
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}
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WRITE8_MEMBER(superqix_state::z80_ay1_sync_address_w)
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{
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machine().scheduler().synchronize(timer_expired_delegate(FUNC(superqix_state::z80_ay1_sync_address_w_cb), this), data);
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}
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READ8_MEMBER(superqix_state::z80_ay2_iob_r)
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{
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// logerror("%04x: read mcu answer (%02x)\n",space.device().safe_pc(),m_fromMCU);
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@ -325,7 +336,7 @@ TIMER_CALLBACK_MEMBER(superqix_state::bootleg_mcu_port1_w_cb)
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m_bl_port1 = param;
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m_bl_fake_port2 &= ~(1<<((m_bl_port1&0xe)>>1)); // mask out the 'old bit'
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m_bl_fake_port2 |= ((m_bl_port1&1)<<((m_bl_port1&0xe)>>1)); // or in the 'new bit'
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mcu_port2_w(m_mcu->device_t::memory().space(AS_PROGRAM), 0, m_bl_fake_port2, 0xFF);
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mcu_port2_w(m_mcu->device_t::memory().space(AS_PROGRAM), 0, m_bl_fake_port2, 0xff);
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}
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WRITE8_MEMBER(superqix_state::bootleg_mcu_port1_w)
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@ -909,7 +920,7 @@ MACHINE_RESET_MEMBER(superqix_state, superqix)
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// the act of clearing this latch asserts the z80 reset, and the mcu must clear it itself by writing
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// to the p2 latch with bit 5 set.
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m_port2_raw = 0x01; // force the following function into latching a zero write by having bit 0 falling edge
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mcu_port2_w(m_mcu->device_t::memory().space(AS_PROGRAM), 0, 0x00, 0xFF);
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mcu_port2_w(m_mcu->device_t::memory().space(AS_PROGRAM), 0, 0x00, 0xff);
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m_mcu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
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}
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}
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@ -944,8 +955,8 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( pbillian_port_map, AS_IO, 8, hotsmash_state ) // used by both pbillian and hotsmash
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AM_RANGE(0x0000, 0x01ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // 6116 sram near the jamma connector, "COLOR RAM" during POST
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//AM_RANGE(0x0200, 0x03ff) AM_RAM // looks like leftover crap from a dev board which had double the color ram? zeroes written here, never read.
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AM_RANGE(0x0401, 0x0401) AM_DEVREAD("aysnd", ay8910_device, data_r) // ay i/o ports connect to "SYSTEM" and "BUTTONS" inputs which includes mcu semaphore flags
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AM_RANGE(0x0402, 0x0403) AM_DEVWRITE("aysnd", ay8910_device, data_address_w)
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AM_RANGE(0x0401, 0x0401) AM_DEVREAD("ay1", ay8910_device, data_r) // ay i/o ports connect to "SYSTEM" and "BUTTONS" inputs which includes mcu semaphore flags
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AM_RANGE(0x0402, 0x0403) AM_DEVWRITE("ay1", ay8910_device, data_address_w)
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AM_RANGE(0x0408, 0x0408) AM_READWRITE(hotsmash_Z80_mcu_r, hotsmash_Z80_mcu_w)
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AM_RANGE(0x0410, 0x0410) AM_WRITE(pbillian_0410_w) /* Coin Counters, ROM bank, NMI enable, Flipscreen */
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AM_RANGE(0x0418, 0x0418) AM_READ(nmi_ack_r)
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@ -957,7 +968,8 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( sqix_port_map, AS_IO, 8, superqix_state )
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AM_RANGE(0x0000, 0x00ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0x0401, 0x0401) AM_DEVREAD("ay1", ay8910_device, data_r)
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AM_RANGE(0x0402, 0x0403) AM_DEVWRITE("ay1", ay8910_device, data_address_w)
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AM_RANGE(0x0402, 0x0402) AM_DEVWRITE("ay1", ay8910_device, data_w)
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AM_RANGE(0x0403, 0x0403) AM_WRITE(z80_ay1_sync_address_w) // sync on address write, so semaphores are accurately read
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AM_RANGE(0x0405, 0x0405) AM_DEVREAD("ay2", ay8910_device, data_r)
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AM_RANGE(0x0406, 0x0407) AM_DEVWRITE("ay2", ay8910_device, data_address_w)
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AM_RANGE(0x0408, 0x0408) AM_READ(z80_semaphore_assert_r)
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@ -1340,7 +1352,7 @@ static MACHINE_CONFIG_START( pbillian )
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("aysnd", AY8910, XTAL_12MHz/8) // AY-3-8910A
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MCFG_SOUND_ADD("ay1", AY8910, XTAL_12MHz/8) // AY-3-8910A
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MCFG_AY8910_PORT_A_READ_CB(IOPORT("BUTTONS"))
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MCFG_AY8910_PORT_B_READ_CB(IOPORT("SYSTEM"))
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
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@ -1362,8 +1374,6 @@ static MACHINE_CONFIG_START( sqix )
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MCFG_CPU_ADD("mcu", I8751, XTAL_12MHz/3) /* TODO: VERIFY DIVISOR, is this 3mhz or 4mhz? */
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MCFG_CPU_IO_MAP(sqix_mcu_io_map)
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MCFG_QUANTUM_PERFECT_CPU("maincpu")
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MCFG_MACHINE_START_OVERRIDE(superqix_state,superqix)
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/* video hardware */
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@ -1,6 +1,7 @@
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// license:BSD-3-Clause
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// copyright-holders:Mirko Buffoni, Nicola Salmoria, Tomasz Slanina
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#include "cpu/m6805/m68705.h"
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#include "sound/ay8910.h"
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#include "sound/samples.h"
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class superqix_state_base : public driver_device
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@ -15,6 +16,7 @@ public:
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m_bitmapram2(*this, "bitmapram2"),
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m_gfxdecode(*this, "gfxdecode"),
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m_palette(*this, "palette"),
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m_ay1(*this, "ay1"),
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m_mcu(*this, "mcu") { }
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required_device<cpu_device> m_maincpu;
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@ -24,6 +26,7 @@ public:
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optional_shared_ptr<uint8_t> m_bitmapram2;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<palette_device> m_palette;
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required_device<ay8910_device> m_ay1;
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optional_device<cpu_device> m_mcu;
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// commmon 68705/8751/HLE
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@ -67,10 +70,13 @@ class superqix_state : public superqix_state_base
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{
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public:
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superqix_state(const machine_config &mconfig, device_type type, const char *tag)
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: superqix_state_base(mconfig, type, tag)
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: superqix_state_base(mconfig, type, tag),
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m_ay2(*this, "ay2")
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{
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}
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required_device<ay8910_device> m_ay2;
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// 8031 and/or 8751 MCU related
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uint8_t m_bl_port1;
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uint8_t m_bl_fake_port2;
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@ -82,6 +88,7 @@ public:
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DECLARE_WRITE8_MEMBER(mcu_port3_w);
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DECLARE_READ8_MEMBER(mcu_port3_r);
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DECLARE_READ8_MEMBER(bootleg_mcu_port3_r);
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DECLARE_WRITE8_MEMBER(z80_ay1_sync_address_w);
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DECLARE_READ8_MEMBER(z80_ay2_iob_r);
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DECLARE_WRITE8_MEMBER(z80_ay2_iob_w);
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DECLARE_WRITE8_MEMBER(bootleg_flipscreen_w);
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@ -98,6 +105,7 @@ protected:
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TIMER_CALLBACK_MEMBER(z80_semaphore_assert_cb);
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TIMER_CALLBACK_MEMBER(mcu_port2_w_cb);
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TIMER_CALLBACK_MEMBER(mcu_port3_w_cb);
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TIMER_CALLBACK_MEMBER(z80_ay1_sync_address_w_cb);
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TIMER_CALLBACK_MEMBER(z80_ay2_iob_w_cb);
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TIMER_CALLBACK_MEMBER(bootleg_mcu_port1_w_cb);
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};
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