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netlist: templatize 74107 and code maintenance.

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* removed some dead friend declarations
* optimized template times_ns2
This commit is contained in:
couriersud 2020-08-23 15:27:26 +02:00
parent 8cde9585e6
commit 113de38237
8 changed files with 84 additions and 142 deletions
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3
src/lib/netlist/devices/nld_4006.cpp
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@ -61,6 +61,7 @@ namespace netlist
{
}
private:
NETLIB_HANDLERI(inputs)
{
if (m_last_clock && !m_CLOCK())
@ -93,8 +94,6 @@ namespace netlist
}
}
friend class NETLIB_NAME(CD4006_dip);
private:
logic_input_t m_CLOCK;
object_array_t<logic_input_t, 4> m_I;
object_array_t<logic_output_t, 7> m_Q;

54
src/lib/netlist/devices/nld_74107.cpp
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@ -69,27 +69,21 @@ namespace netlist
namespace devices
{
static constexpr const std::array<netlist_time, 2> delay_107 = { NLTIME_FROM_NS(16), NLTIME_FROM_NS(25) };
static constexpr const std::array<netlist_time, 2> delay_107A = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(15) };
NETLIB_OBJECT(74107A)
template <typename D>
NETLIB_OBJECT(74107_base)
{
NETLIB_CONSTRUCTOR(74107A)
NETLIB_CONSTRUCTOR(74107_base)
, m_clk(*this, "CLK", NETLIB_DELEGATE(clk))
, m_Q(*this, "Q")
, m_QQ(*this, "QQ")
, m_J(*this, "J", NETLIB_DELEGATE(other))
, m_K(*this, "K", NETLIB_DELEGATE(other))
, m_clrQ(*this, "CLRQ", NETLIB_DELEGATE(other))
, m_Q(*this, "Q")
, m_QQ(*this, "QQ")
, m_power_pins(*this)
{
m_delay[0] = delay_107A[0];
m_delay[1] = delay_107A[1];
}
friend class NETLIB_NAME(74107_dip);
friend class NETLIB_NAME(74107);
private:
NETLIB_RESETI()
{
m_clk.set_state(logic_t::STATE_INP_HL);
@ -127,35 +121,35 @@ namespace netlist
newstate(((t ^ 1) & m_J()) | (t & (m_K() ^ 1)));
}
private:
void newstate(const netlist_sig_t state)
{
m_Q.push(state, D::delay::value(state));
m_QQ.push(state ^ 1, D::delay::value(state ^ 1));
}
logic_input_t m_clk;
logic_output_t m_Q;
logic_output_t m_QQ;
std::array<netlist_time, 2> m_delay;
logic_input_t m_J;
logic_input_t m_K;
logic_input_t m_clrQ;
logic_output_t m_Q;
logic_output_t m_QQ;
nld_power_pins m_power_pins;
void newstate(const netlist_sig_t state)
{
m_Q.push(state, m_delay[state]);
m_QQ.push(state ^ 1, m_delay[state ^ 1]);
}
};
NETLIB_OBJECT_DERIVED(74107, 74107A)
struct desc_74107 : public desc_base
{
public:
NETLIB_CONSTRUCTOR(74107)
{
m_delay[0] = delay_107[0];
m_delay[1] = delay_107[1];
}
using delay = times_ns2<16, 25>;
};
struct desc_74107A : public desc_base
{
using delay = times_ns2<15, 15>;
};
using NETLIB_NAME(74107) = NETLIB_NAME(74107_base)<desc_74107>;
using NETLIB_NAME(74107A) = NETLIB_NAME(74107_base)<desc_74107A>;
NETLIB_DEVICE_IMPL(74107, "TTL_74107", "+CLK,+J,+K,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(74107A, "TTL_74107A", "+CLK,+J,+K,+CLRQ,@VCC,@GND")

2
src/lib/netlist/devices/nld_74164.cpp
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@ -103,8 +103,6 @@ namespace netlist
m_ab = static_cast<unsigned>((m_AB() == 3) ? 1 : 0);
}
friend class NETLIB_NAME(74164_dip);
private:
object_array_t<logic_input_t, 2> m_AB;
logic_input_t m_CLRQ;
logic_input_t m_CLK;

3
src/lib/netlist/devices/nld_74166.cpp
View File

@ -50,6 +50,7 @@ namespace netlist
{
}
private:
NETLIB_RESETI()
{
m_shifter = 0;
@ -103,8 +104,6 @@ namespace netlist
m_QH.push(qh, delay); //FIXME
}
friend class NETLIB_NAME(74166_dip);
private:
object_array_t<logic_input_t, 8> m_DATA;
logic_input_t m_SER;
logic_input_t m_CLRQ;

3
src/lib/netlist/devices/nld_74194.cpp
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@ -50,14 +50,13 @@ namespace netlist
{
}
private:
NETLIB_RESETI()
{
m_last_CLK = 0;
m_last_Q = 0;
}
friend class NETLIB_NAME(74194_dip);
private:
// FIXME: Timing
NETLIB_HANDLERI(inputs)
{

60
src/lib/netlist/devices/nld_7493.cpp
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@ -57,66 +57,6 @@
#include "nld_7493.h"
#include "netlist/nl_base.h"
//- Identifier: TTL_7493_DIP
//- Title: 7493 Binary Counters
//- Description:
//- Each of these monolithic counters contains four master-slave
//- flip-flops and additional gating to provide a divide-by-two
//- counter and a three-stage binary counter for which the
//- count cycle length is divide-by-five for the 90A and divide-by-eight
//- for the 93A.
//-
//- All of these counters have a gated zero reset and the 90A
//- also has gated set-to-nine inputs for use in BCD nine’s complement
//- applications.
//-
//- To use their maximum count length (decade or four-bit binary),
//- the B input is connected to the Q A output. The input count pulses
//- are applied to input A and the outputs are as described in the
//- appropriate truth table. A symmetrical divide-by-ten count can be
//- obtained from the 90A counters by connecting the Q D output to the
//- A input and applying the input count to the B input which gives
//- a divide-by-ten square wave at output Q A.
//-
//- Pinalias: B,R01,R02,NC,VCC,NC,NC,QC,QB,GND,QD,QA,NC,A
//- Package: DIP
//- NamingConvention: Naming conventions follow National Semiconductor datasheet
//- Limitations: Internal resistor network currently fixed to 5k
//- more limitations
//- Example: ne555_astable.c,ne555_example
//- FunctionTable:
//- Counter Sequence
//-
//- | COUNT || QD | QC | QB | QA |
//- |------:||:--:|:--:|:--:|:--:|
//- | 0 || 0 | 0 | 0 | 0 |
//- | 1 || 0 | 0 | 0 | 1 |
//- | 2 || 0 | 0 | 1 | 0 |
//- | 3 || 0 | 0 | 1 | 1 |
//- | 4 || 0 | 1 | 0 | 0 |
//- | 5 || 0 | 1 | 0 | 1 |
//- | 6 || 0 | 1 | 1 | 0 |
//- | 7 || 0 | 1 | 1 | 1 |
//- | 8 || 1 | 0 | 0 | 0 |
//- | 9 || 1 | 0 | 0 | 1 |
//- | 10 || 1 | 0 | 1 | 0 |
//- | 11 || 1 | 0 | 1 | 1 |
//- | 12 || 1 | 1 | 0 | 0 |
//- | 13 || 1 | 1 | 0 | 1 |
//- | 14 || 1 | 1 | 1 | 0 |
//- | 15 || 1 | 1 | 1 | 1 |
//-
//- Note C Output QA is connected to input B
//-
//- Reset Count Function table
//-
//- | R01 | R02 | QD | QC | QB | QA |
//- |:---:|:---:|:--:|:--:|:--:|:--:|
//- | 1 | 1 | 0 | 0 | 0 | 0 |
//- | 0 | X | COUNT ||||
//- | X | 0 | COUNT ||||
//-
//-
namespace netlist
{

93
src/lib/netlist/macro/nlm_ttl74xx_lib.cpp
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@ -1354,56 +1354,69 @@ NETLIST_END()
)
NETLIST_END()
//- Identifier: TTL_7493_DIP
//- Title: DM7493A Binary Counter
//- Description: These monolithic counters contains four
//- master-slave flip-flops and additional gating to provide
//- a divide-by-two counter and a three-stage binary counter
//- for which the count cycle length is divide-by-eight.
//- Identifier: TTL_7493_DIP
//- Title: 7493 Binary Counters
//- Description:
//- Each of these monolithic counters contains four master-slave
//- flip-flops and additional gating to provide a divide-by-two
//- counter and a three-stage binary counter for which the
//- count cycle length is divide-by-five for the 90A and divide-by-eight
//- for the 93A.
//-
//- These counters have a gated zero reset.
//- All of these counters have a gated zero reset and the 90A
//- also has gated set-to-nine inputs for use in BCD nine’s complement
//- applications.
//-
//- To use their maximum count length (decade or four-bit binary),
//- the B input is connected to the Q A output. The input count pulses
//- are applied to input A and the outputs are as described in the
//- appropriate truth table. A symmetrical divide-by-ten count can be
//- obtained from the 90A counters by connecting the Q D output to the
//- A input and applying the input count to the B input which gives
//- a divide-by-ten square wave at output Q A.
//-
//- To use their maximum count length (four-bit binary), the B input is connected
//- to the QA output. The input count pulses are applied to
//- input A and the outputs are as described in the appropriate
//- truth table.
//- Pinalias: B,R01,R02,NC,VCC,NC,NC,QC,QB,GND,QD,QA,NC,A
//- Package: DIP
//- NamingConvention: Naming conventions follow National Semiconductor datasheet
//- Limitations: Internal resistor network currently fixed to 5k
//- more limitations
//- Example: ne555_astable.c,ne555_example
//- FunctionTable:
//- http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS006533.PDF
//-
//- Count Sequence
//- +-------++----+----+----+----+
//- | Count || QD | QC | QB | QA |
//- +=======++====+====+====+====+
//- | 0 || 0 | 0 | 0 | 0 |
//- | 1 || 0 | 0 | 0 | 1 |
//- | 2 || 0 | 0 | 1 | 0 |
//- | 3 || 0 | 0 | 1 | 1 |
//- | 4 || 0 | 1 | 0 | 0 |
//- | 5 || 0 | 1 | 0 | 1 |
//- | 6 || 0 | 1 | 1 | 0 |
//- | 7 || 0 | 1 | 1 | 1 |
//- | 8 || 1 | 0 | 0 | 0 |
//- | 9 || 1 | 0 | 0 | 1 |
//- | 10 || 1 | 0 | 1 | 0 |
//- | 11 || 1 | 0 | 1 | 1 |
//- | 12 || 1 | 1 | 0 | 0 |
//- | 13 || 1 | 1 | 0 | 1 |
//- | 14 || 1 | 1 | 1 | 0 |
//- | 15 || 1 | 1 | 1 | 1 |
//- +-------++----+----+----+----+
//- Counter Sequence
//-
//- Reset/Count Function Table
//- +-----+-----++----+----+----+----+
//- | R01 | R02 || QD | QC | QB | QA |
//- +=====+=====++====+====+====+====+
//- | 1 | 1 || 0 | 0 | 0 | 0 |
//- | 0 | X || COUNT |
//- | X | 0 || COUNT |
//- +-----+-----++----+----+----+----+
//- | COUNT || QD | QC | QB | QA |
//- |------:||:--:|:--:|:--:|:--:|
//- | 0 || 0 | 0 | 0 | 0 |
//- | 1 || 0 | 0 | 0 | 1 |
//- | 2 || 0 | 0 | 1 | 0 |
//- | 3 || 0 | 0 | 1 | 1 |
//- | 4 || 0 | 1 | 0 | 0 |
//- | 5 || 0 | 1 | 0 | 1 |
//- | 6 || 0 | 1 | 1 | 0 |
//- | 7 || 0 | 1 | 1 | 1 |
//- | 8 || 1 | 0 | 0 | 0 |
//- | 9 || 1 | 0 | 0 | 1 |
//- | 10 || 1 | 0 | 1 | 0 |
//- | 11 || 1 | 0 | 1 | 1 |
//- | 12 || 1 | 1 | 0 | 0 |
//- | 13 || 1 | 1 | 0 | 1 |
//- | 14 || 1 | 1 | 1 | 0 |
//- | 15 || 1 | 1 | 1 | 1 |
//-
//- Note C Output QA is connected to input B
//-
//- Reset Count Function table
//-
//- | R01 | R02 | QD | QC | QB | QA |
//- |:---:|:---:|:--:|:--:|:--:|:--:|
//- | 1 | 1 | 0 | 0 | 0 | 0 |
//- | 0 | X | COUNT ||||
//- | X | 0 | COUNT ||||
//-
//-
static NETLIST_START(TTL_7493_DIP)
TTL_7493(A)
NC_PIN(NC)

8
src/lib/netlist/nltypes.h
View File

@ -265,7 +265,7 @@ namespace netlist
{
static constexpr netlist_time value(std::size_t N)
{
return NLTIME_FROM_NS(N == 0 ? value0 : value1);
return N == 0 ? NLTIME_FROM_NS(value0) : NLTIME_FROM_NS(value1);
}
};
@ -278,9 +278,9 @@ namespace netlist
{
static constexpr netlist_time value(std::size_t N)
{
return NLTIME_FROM_NS(N == 0 ? value0 :
N == 1 ? value1 :
value2);
return N == 0 ? NLTIME_FROM_NS(value0) :
N == 1 ? NLTIME_FROM_NS(value1) :
NLTIME_FROM_NS(value2);
}
};