remove more MCFG_ (nw)

This commit is contained in:
Vas Crabb 2018-07-07 23:39:05 +10:00
parent b747b711bb
commit 11b47cb003
38 changed files with 412 additions and 483 deletions

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@ -26,9 +26,7 @@
#define I8251_TAG "ic15"
#define I8255_0_TAG "ic17"
#define I8255_1_TAG "ic16"
#define COM8116_TAG "ic14"
#define RS232_TAG "rs232"
#define CORVUS_HDC_TAG "corvus"
@ -91,7 +89,7 @@ void softbox_device::softbox_io(address_map &map)
map(0x0c, 0x0c).w(FUNC(softbox_device::dbrg_w));
map(0x10, 0x13).rw(I8255_0_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write));
map(0x14, 0x17).rw(I8255_1_TAG, FUNC(i8255_device::read), FUNC(i8255_device::write));
map(0x18, 0x18).rw(CORVUS_HDC_TAG, FUNC(corvus_hdc_device::read), FUNC(corvus_hdc_device::write));
map(0x18, 0x18).rw(m_hdc, FUNC(corvus_hdc_device::read), FUNC(corvus_hdc_device::write));
}
@ -262,11 +260,11 @@ MACHINE_CONFIG_START(softbox_device::device_add_mconfig)
MCFG_I8255_IN_PORTC_CB(READ8(*this, softbox_device, ppi1_pc_r))
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, softbox_device, ppi1_pc_w))
MCFG_DEVICE_ADD(COM8116_TAG, COM8116, XTAL(5'068'800))
MCFG_COM8116_FR_HANDLER(WRITELINE(I8251_TAG, i8251_device, write_rxc))
MCFG_COM8116_FT_HANDLER(WRITELINE(I8251_TAG, i8251_device, write_txc))
COM8116(config, m_dbrg, 5.0688_MHz_XTAL);
m_dbrg->fr_handler().set(I8251_TAG, FUNC(i8251_device::write_rxc));
m_dbrg->ft_handler().set(I8251_TAG, FUNC(i8251_device::write_txc));
MCFG_DEVICE_ADD(CORVUS_HDC_TAG, CORVUS_HDC, 0)
MCFG_DEVICE_ADD(m_hdc, CORVUS_HDC, 0)
MCFG_HARDDISK_ADD("harddisk1")
MCFG_HARDDISK_INTERFACE("corvus_hdd")
MCFG_HARDDISK_ADD("harddisk2")
@ -322,8 +320,8 @@ softbox_device::softbox_device(const machine_config &mconfig, const char *tag, d
: device_t(mconfig, SOFTBOX, tag, owner, clock)
, device_ieee488_interface(mconfig, *this)
, m_maincpu(*this, Z80_TAG)
, m_dbrg(*this, COM8116_TAG)
, m_hdc(*this, CORVUS_HDC_TAG)
, m_dbrg(*this, "ic14")
, m_hdc(*this, "corvus")
, m_leds(*this, "led%u", 0U)
, m_ifc(0)
{

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@ -22,13 +22,14 @@ sun_keyboard_adaptor_device::~sun_keyboard_adaptor_device()
}
MACHINE_CONFIG_START(sun_keyboard_adaptor_device::device_add_mconfig)
MCFG_DEVICE_ADD(m_keyboard_port, SUNKBD_PORT, default_sun_keyboard_devices, nullptr)
MCFG_SUNKBD_RXD_HANDLER(WRITELINE(*this, sun_keyboard_adaptor_device, output_rxd))
MACHINE_CONFIG_END
void sun_keyboard_adaptor_device::device_add_mconfig(machine_config &config)
{
SUNKBD_PORT(config, m_keyboard_port, default_sun_keyboard_devices, nullptr);
m_keyboard_port->rxd_handler().set(FUNC(sun_keyboard_adaptor_device::output_rxd));
}
WRITE_LINE_MEMBER( sun_keyboard_adaptor_device::input_txd )
WRITE_LINE_MEMBER(sun_keyboard_adaptor_device::input_txd)
{
m_keyboard_port->write_txd(state);
}

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@ -103,8 +103,8 @@ WRITE_LINE_MEMBER( s100_dj2db_device::fdc_drq_w )
//-------------------------------------------------
MACHINE_CONFIG_START(s100_dj2db_device::device_add_mconfig)
MCFG_DEVICE_ADD(BR1941_TAG, COM8116, 5.0688_MHz_XTAL)
MCFG_COM8116_FR_HANDLER(WRITELINE(*this, s100_dj2db_device, fr_w))
COM8116(config, m_dbrg, 5.0688_MHz_XTAL);
m_dbrg->fr_handler().set(FUNC(s100_dj2db_device::fr_w));
MCFG_DEVICE_ADD(MB8866_TAG, MB8866, 10_MHz_XTAL / 5)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, s100_dj2db_device, fdc_intrq_w))

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@ -8,10 +8,6 @@
#include "diserial.h"
#define MCFG_SUNKBD_RXD_HANDLER(cb) \
downcast<sun_keyboard_port_device &>(*device).set_rxd_handler(DEVCB_##cb);
class device_sun_keyboard_port_interface;
@ -33,7 +29,7 @@ public:
virtual ~sun_keyboard_port_device();
// static configuration helpers
template <class Object> devcb_base &set_rxd_handler(Object &&cb) { return m_rxd_handler.set_callback(std::forward<Object>(cb)); }
auto rxd_handler() { return m_rxd_handler.bind(); }
DECLARE_WRITE_LINE_MEMBER( write_txd );

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@ -42,6 +42,9 @@ public:
z80_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void z80_set_cycle_tables(const uint8_t *op, const uint8_t *cb, const uint8_t *ed, const uint8_t *xy, const uint8_t *xycb, const uint8_t *ex);
template <typename... T> void set_memory_map(T &&... args) { set_addrmap(AS_PROGRAM, std::forward<T>(args)...); }
template <typename... T> void set_m1_map(T &&... args) { set_addrmap(AS_OPCODES, std::forward<T>(args)...); }
template <typename... T> void set_io_map(T &&... args) { set_addrmap(AS_IO, std::forward<T>(args)...); }
template<class Object> devcb_base &set_irqack_cb(Object &&cb) { return m_irqack_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_refresh_cb(Object &&cb) { return m_refresh_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_halt_cb(Object &&cb) { return m_halt_cb.set_callback(std::forward<Object>(cb)); }

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@ -34,25 +34,6 @@
#pragma once
//**************************************************************************
// CONFIGURATION MACROS
//**************************************************************************
#define MCFG_AM9513_OUT1_CALLBACK(_devcb) \
downcast<am9513_device &>(*device).set_out_cb(0, DEVCB_##_devcb);
#define MCFG_AM9513_OUT2_CALLBACK(_devcb) \
downcast<am9513_device &>(*device).set_out_cb(1, DEVCB_##_devcb);
#define MCFG_AM9513_OUT3_CALLBACK(_devcb) \
downcast<am9513_device &>(*device).set_out_cb(2, DEVCB_##_devcb);
#define MCFG_AM9513_OUT4_CALLBACK(_devcb) \
downcast<am9513_device &>(*device).set_out_cb(3, DEVCB_##_devcb);
#define MCFG_AM9513_OUT5_CALLBACK(_devcb) \
downcast<am9513_device &>(*device).set_out_cb(4, DEVCB_##_devcb);
#define MCFG_AM9513_FOUT_CALLBACK(_devcb) \
downcast<am9513_device &>(*device).set_fout_cb(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -66,8 +47,6 @@ public:
am9513_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// static configuration
template<class Object> devcb_base &set_out_cb(int c, Object &&cb) { assert(c >= 0 && c < 5); return m_out_cb[c].set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_fout_cb(Object &&cb) { return m_fout_cb.set_callback(std::forward<Object>(cb)); }
auto out1_cb() { return m_out_cb[0].bind(); }
auto out2_cb() { return m_out_cb[1].bind(); }
auto out3_cb() { return m_out_cb[2].bind(); }

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@ -27,22 +27,6 @@
#pragma once
///*************************************************************************
// INTERFACE CONFIGURATION MACROS
///*************************************************************************
#define MCFG_COM8116_FX4_HANDLER(_devcb) \
downcast<com8116_device &>(*device).set_fx4_handler(DEVCB_##_devcb);
#define MCFG_COM8116_FR_HANDLER(_devcb) \
downcast<com8116_device &>(*device).set_fr_handler(DEVCB_##_devcb);
#define MCFG_COM8116_FT_HANDLER(_devcb) \
downcast<com8116_device &>(*device).set_ft_handler(DEVCB_##_devcb);
///*************************************************************************
// TYPE DEFINITIONS
///*************************************************************************
@ -55,9 +39,6 @@ public:
// construction/destruction
com8116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_fx4_handler(Object &&cb) { return m_fx4_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_fr_handler(Object &&cb) { return m_fr_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_ft_handler(Object &&cb) { return m_ft_handler.set_callback(std::forward<Object>(cb)); }
auto fx4_handler() { return m_fx4_handler.bind(); }
auto fr_handler() { return m_fr_handler.bind(); }
auto ft_handler() { return m_ft_handler.bind(); }

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@ -5,19 +5,11 @@
RST interrupt vector buffer
**********************************************************************/
#ifndef MAME_MACHINE_RSTBUF_H
#define MAME_MACHINE_RSTBUF_H
#pragma once
#ifndef MAME_DEVICES_MACHINE_RSTBUF_H
#define MAME_DEVICES_MACHINE_RSTBUF_H
//**************************************************************************
// CONFIGURATION MACROS
//**************************************************************************
#define MCFG_RST_BUFFER_INT_CALLBACK(_devcb) \
downcast<rst_buffer_device &>(*device).set_int_callback(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -28,7 +20,7 @@ class rst_buffer_device : public device_t
{
public:
// configuration
template<class Object> devcb_base &set_int_callback(Object &&object) { return m_int_cb.set_callback(std::forward<Object>(object)); }
auto int_callback() { return m_int_cb.bind(); }
// getter (required override)
virtual u8 get_vector() const = 0;
@ -104,4 +96,4 @@ protected:
DECLARE_DEVICE_TYPE(RST_POS_BUFFER, rst_pos_buffer_device)
DECLARE_DEVICE_TYPE(RST_NEG_BUFFER, rst_neg_buffer_device)
#endif // MAME_DEVICES_MACHINE_RSTBUF_H
#endif // MAME_MACHINE_RSTBUF_H

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@ -211,23 +211,23 @@ MACHINE_CONFIG_START(ampex_state::ampex)
MCFG_DEVICE_ADD("maincpu", Z80, XTAL(23'814'000) / 9) // clocked by 8224?
MCFG_DEVICE_PROGRAM_MAP(mem_map)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL(23'814'000) / 2, 105 * CHAR_WIDTH, 0, 80 * CHAR_WIDTH, 270, 0, 250)
MCFG_SCREEN_UPDATE_DRIVER(ampex_state, screen_update)
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_raw(23.814_MHz_XTAL / 2, 105 * CHAR_WIDTH, 0, 80 * CHAR_WIDTH, 270, 0, 250);
screen.set_screen_update(FUNC(ampex_state::screen_update));
MCFG_DEVICE_ADD("vtac", CRT5037, XTAL(23'814'000) / 2 / CHAR_WIDTH)
MCFG_TMS9927_CHAR_WIDTH(CHAR_WIDTH)
MCFG_TMS9927_VSYN_CALLBACK(WRITELINE(*this, ampex_state, vsyn_w))
MCFG_VIDEO_SET_SCREEN("screen")
MCFG_DEVICE_ADD("uart", AY31015, 0) // COM8017, actually
MCFG_AY31015_WRITE_SO_CB(WRITELINE(*this, ampex_state, so_w))
MCFG_AY31015_WRITE_DAV_CB(WRITELINE(*this, ampex_state, dav_w))
MCFG_AY31015_AUTO_RDAV(true)
AY31015(config, m_uart, 0); // COM8017, actually
m_uart->write_so_callback().set(FUNC(ampex_state::so_w));
m_uart->write_dav_callback().set(FUNC(ampex_state::dav_w));
m_uart->set_auto_rdav(true);
MCFG_DEVICE_ADD("dbrg", COM5016_5, XTAL(4'915'200))
MCFG_COM8116_FR_HANDLER(WRITELINE("uart", ay31015_device, write_rcp))
MCFG_COM8116_FT_HANDLER(WRITELINE("uart", ay31015_device, write_tcp))
COM5016_5(config, m_dbrg, 4.9152_MHz_XTAL);
m_dbrg->fr_handler().set(m_uart, FUNC(ay31015_device::write_rcp));
m_dbrg->ft_handler().set(m_uart, FUNC(ay31015_device::write_tcp));
MACHINE_CONFIG_END
ROM_START( dialog80 )

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@ -70,8 +70,6 @@
#define RS232_K_TAG "rs232kbd"
#define RS232_D_TAG "rs232debug"
#define RS232_M_TAG "rs232mouse"
#define COM8116_A_TAG "com8116_a"
#define COM8116_B_TAG "com8116_b"
#define ADLC_TAG "adlc"
#define PIA_TAG "pia"
#define PSG_TAG "psg"
@ -101,8 +99,8 @@ public:
, m_acia2(*this, ACIA2_TAG)
, m_acia3(*this, ACIA3_TAG)
, m_adlc(*this, ADLC_TAG)
, m_dbrga(*this, COM8116_A_TAG)
, m_dbrgb(*this, COM8116_B_TAG)
, m_dbrga(*this, "com8116_a")
, m_dbrgb(*this, "com8116_b")
, m_pia(*this, PIA_TAG)
, m_psg(*this, PSG_TAG)
, m_earom(*this, EAROM_TAG)
@ -536,13 +534,13 @@ MACHINE_CONFIG_START(bitgraph_state::bg_motherboard)
MCFG_RS232_CTS_HANDLER(WRITELINE(ACIA2_TAG, acia6850_device, write_cts))
// XXX actual part may be something else
MCFG_DEVICE_ADD(COM8116_A_TAG, COM8116, XTAL(5'068'800))
MCFG_COM8116_FR_HANDLER(WRITELINE(*this, bitgraph_state, com8116_a_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(*this, bitgraph_state, com8116_a_ft_w))
COM8116(config, m_dbrga, 5.0688_MHz_XTAL);
m_dbrga->fr_handler().set(FUNC(bitgraph_state::com8116_a_fr_w));
m_dbrga->ft_handler().set(FUNC(bitgraph_state::com8116_a_ft_w));
MCFG_DEVICE_ADD(COM8116_B_TAG, COM8116, XTAL(5'068'800))
MCFG_COM8116_FR_HANDLER(WRITELINE(*this, bitgraph_state, com8116_b_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(*this, bitgraph_state, com8116_b_ft_w))
COM8116(config, m_dbrgb, 5.0688_MHz_XTAL);
m_dbrgb->fr_handler().set(FUNC(bitgraph_state::com8116_b_fr_w));
m_dbrgb->ft_handler().set(FUNC(bitgraph_state::com8116_b_ft_w));
MCFG_DEVICE_ADD(PIA_TAG, PIA6821, 0)
MCFG_PIA_READCA1_HANDLER(READLINE(*this, bitgraph_state, pia_ca1_r))

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@ -4361,36 +4361,35 @@ MACHINE_CONFIG_START(ddenlovr_state::htengoku)
MCFG_DEVICE_IO_MAP(htengoku_io_map)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("mainirq", rst_pos_buffer_device, inta_cb) // IM 0 needs an opcode on the data bus
MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(htengoku_banked_map)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000)
ADDRESS_MAP_BANK(config, m_bankdev, 0);
m_bankdev->set_addrmap(0, &ddenlovr_state::htengoku_banked_map);
m_bankdev->set_data_width(8);
m_bankdev->set_addr_width(20);
m_bankdev->set_stride(0x8000);
MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,dynax)
MCFG_MACHINE_RESET_OVERRIDE(ddenlovr_state,dynax)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, "mainirq", 0).int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, layer_half_w)) // half of the interleaved layer to write to
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, layer_half2_w)) //
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(*this, dynax_state, blitter_ack_w)) // Blitter IRQ Ack
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(dynax_state::flipscreen_w));
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::layer_half_w)); // half of the interleaved layer to write to
m_mainlatch->q_out_cb<2>().set(FUNC(dynax_state::layer_half2_w)); //
m_mainlatch->q_out_cb<5>().set(FUNC(dynax_state::blitter_ack_w)); // Blitter IRQ Ack
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 336-1, 0+8, 256-1-8)
MCFG_SCREEN_UPDATE_DRIVER(ddenlovr_state, screen_update_htengoku)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, ddenlovr_state, sprtmtch_vblank_w))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(512, 256);
m_screen->set_visarea(0, 336-1, 0+8, 256-1-8);
m_screen->set_screen_update(FUNC(ddenlovr_state::screen_update_htengoku));
m_screen->set_video_attributes(VIDEO_ALWAYS_UPDATE);
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set(FUNC(ddenlovr_state::sprtmtch_vblank_w));
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, hnoridur_blit_pixel_w))

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@ -4205,23 +4205,22 @@ MACHINE_CONFIG_START(dynax_state::cdracula)
// MCFG_NVRAM_ADD_0FILL("nvram") // no battery
MCFG_DEVICE_ADD("mainirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, m_mainirq, 0).int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w)) // Flip Screen
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(*this, dynax_state, blitter_ack_w)) // Blitter IRQ Ack
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(*this, dynax_state, blit_palbank_w)) // Layers Palettes (High Bit)
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::flipscreen_w)); // Flip Screen
m_mainlatch->q_out_cb<4>().set(FUNC(dynax_state::blitter_ack_w)); // Blitter IRQ Ack
m_mainlatch->q_out_cb<5>().set(FUNC(dynax_state::blit_palbank_w)); // Layers Palettes (High Bit)
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(58.56)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(16, 512-16-1, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_cdracula)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dynax_state, sprtmtch_vblank_w))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(58.56);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(512, 256);
m_screen->set_visarea(16, 512-16-1, 16, 256-1);
m_screen->set_screen_update(FUNC(dynax_state::screen_update_cdracula));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set(FUNC(dynax_state::sprtmtch_vblank_w));
MCFG_DEVICE_ADD(m_blitter, CDRACULA_BLITTER, 0)
MCFG_CDRACULA_BLITTER_VRAM_OUT_CB(WRITE8(*this, dynax_state, cdracula_blit_pixel_w))
@ -4259,8 +4258,7 @@ MACHINE_CONFIG_START(dynax_state::hanamai)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, m_mainirq, 0).int_callback().set_inputline(m_maincpu, 0);
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(m_msm, FUNC(msm5205_device::reset_w)).invert(); // MSM5205 reset
@ -4273,14 +4271,14 @@ MACHINE_CONFIG_START(dynax_state::hanamai)
m_mainlatch->q_out_cb<7>().set(FUNC(dynax_state::layer_half_w)); // half of the interleaved layer to write to
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1-4, 16+8, 255-8)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_hanamai)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dynax_state, sprtmtch_vblank_w))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(512, 256);
m_screen->set_visarea(0, 512-1-4, 16+8, 255-8);
m_screen->set_screen_update(FUNC(dynax_state::screen_update_hanamai));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set(FUNC(dynax_state::sprtmtch_vblank_w));
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, hanamai_blit_pixel_w))
@ -4296,8 +4294,7 @@ MACHINE_CONFIG_START(dynax_state::hanamai)
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("aysnd", AY8912, 22000000 / 8)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.20)
AY8912(config, "aysnd", 22000000 / 8).add_route(ALL_OUTPUTS, "mono", 0.20);
MCFG_DEVICE_ADD("ym2203", YM2203, 22000000 / 8)
MCFG_YM2203_IRQ_HANDLER(WRITELINE("mainirq", rst_pos_buffer_device, rst1_w))
@ -4339,28 +4336,27 @@ MACHINE_CONFIG_START(dynax_state::hnoridur)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, m_mainirq, 0).int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC25
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, layer_half2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(*this, dynax_state, blitter_ack_w))
LS259(config, m_mainlatch); // IC25
m_mainlatch->q_out_cb<0>().set(FUNC(dynax_state::flipscreen_w));
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::layer_half_w));
m_mainlatch->q_out_cb<2>().set(FUNC(dynax_state::layer_half2_w));
m_mainlatch->q_out_cb<7>().set(FUNC(dynax_state::blitter_ack_w));
MCFG_DEVICE_ADD("outlatch", LS259, 0) // IC61
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, coincounter_1_w))
ls259_device &outlatch(LS259(config, "outlatch")); // IC61
outlatch.q_out_cb<0>().set(FUNC(dynax_state::coincounter_0_w));
outlatch.q_out_cb<1>().set(FUNC(dynax_state::coincounter_1_w));
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256+22)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1-4, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_hnoridur)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dynax_state, sprtmtch_vblank_w))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(512, 256+22);
m_screen->set_visarea(0, 512-1-4, 16, 256-1);
m_screen->set_screen_update(FUNC(dynax_state::screen_update_hnoridur));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set(FUNC(dynax_state::sprtmtch_vblank_w));
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, hnoridur_blit_pixel_w))
@ -4412,30 +4408,29 @@ MACHINE_CONFIG_START(dynax_state::hjingi)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, m_mainirq, 0).int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, layer_half2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(*this, dynax_state, blitter_ack_w))
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(dynax_state::flipscreen_w));
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::layer_half_w));
m_mainlatch->q_out_cb<2>().set(FUNC(dynax_state::layer_half2_w));
m_mainlatch->q_out_cb<7>().set(FUNC(dynax_state::blitter_ack_w));
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, hjingi_hopper_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(*this, dynax_state, hjingi_lockout_w))
ls259_device &outlatch(LS259(config, "outlatch"));
outlatch.q_out_cb<0>().set(FUNC(dynax_state::coincounter_0_w));
outlatch.q_out_cb<1>().set(FUNC(dynax_state::coincounter_1_w));
outlatch.q_out_cb<2>().set(FUNC(dynax_state::hjingi_hopper_w));
outlatch.q_out_cb<3>().set(FUNC(dynax_state::hjingi_lockout_w));
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1-4, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_hnoridur)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dynax_state, sprtmtch_vblank_w))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(512, 256);
m_screen->set_visarea(0, 512-1-4, 16, 256-1);
m_screen->set_screen_update(FUNC(dynax_state::screen_update_hnoridur));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set(FUNC(dynax_state::sprtmtch_vblank_w));
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, hnoridur_blit_pixel_w))
@ -4481,25 +4476,24 @@ MACHINE_CONFIG_START(dynax_state::sprtmtch)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, m_mainirq, 0).int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // UF12 on Intergirl
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(*this, dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(*this, dynax_state, blitter_ack_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(*this, dynax_state, blit_palbank_w))
LS259(config, m_mainlatch); // UF12 on Intergirl
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::flipscreen_w));
m_mainlatch->q_out_cb<2>().set(FUNC(dynax_state::coincounter_0_w));
m_mainlatch->q_out_cb<3>().set(FUNC(dynax_state::coincounter_1_w));
m_mainlatch->q_out_cb<4>().set(FUNC(dynax_state::blitter_ack_w));
m_mainlatch->q_out_cb<5>().set(FUNC(dynax_state::blit_palbank_w));
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_sprtmtch)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dynax_state, sprtmtch_vblank_w))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(512, 256);
m_screen->set_visarea(0, 512-1, 16, 256-1);
m_screen->set_screen_update(FUNC(dynax_state::screen_update_sprtmtch));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set(FUNC(dynax_state::sprtmtch_vblank_w));
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, drgpunch_blit_pixel_w))
@ -4548,25 +4542,25 @@ MACHINE_CONFIG_START(dynax_state::mjfriday)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC15
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_blit_dest1_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_blit_dest0_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, blit_palbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(*this, dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(*this, dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_layer1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_layer0_enable_w))
LS259(config, m_mainlatch); // IC15
m_mainlatch->q_out_cb<0>().set(FUNC(dynax_state::mjdialq2_blit_dest1_w));
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::mjdialq2_blit_dest0_w));
m_mainlatch->q_out_cb<2>().set(FUNC(dynax_state::blit_palbank_w));
m_mainlatch->q_out_cb<3>().set(FUNC(dynax_state::flipscreen_w));
m_mainlatch->q_out_cb<4>().set(FUNC(dynax_state::coincounter_0_w));
m_mainlatch->q_out_cb<5>().set(FUNC(dynax_state::coincounter_1_w));
m_mainlatch->q_out_cb<6>().set(FUNC(dynax_state::mjdialq2_layer1_enable_w));
m_mainlatch->q_out_cb<7>().set(FUNC(dynax_state::mjdialq2_layer0_enable_w));
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(256, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_mjdialq2)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dynax_state, mjfriday_vblank_w))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(256, 256);
m_screen->set_visarea(0, 256-1, 16, 256-1);
m_screen->set_screen_update(FUNC(dynax_state::screen_update_mjdialq2));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set(FUNC(dynax_state::mjfriday_vblank_w));
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, mjdialq2_blit_pixel_w))
@ -4619,12 +4613,10 @@ MACHINE_CONFIG_START(dynax_state::yarunara)
MCFG_DEVICE_REMOVE("outlatch") // ???
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_VISIBLE_AREA(0, 336-1, 8, 256-1-8-1)
m_screen->set_visarea(0, 336-1, 8, 256-1-8-1);
/* devices */
MCFG_DEVICE_ADD("rtc", MSM6242, XTAL(32'768))
MCFG_MSM6242_OUT_INT_HANDLER(WRITELINE("mainirq", rst_pos_buffer_device, rst1_w))
MSM6242(config, "rtc", 32.768_kHz_XTAL).out_int_handler().set(m_mainirq, FUNC(rst_pos_buffer_device::rst1_w));
MACHINE_CONFIG_END
MACHINE_CONFIG_START(dynax_state::mjangels)
@ -4708,36 +4700,34 @@ MACHINE_CONFIG_START(dynax_state::jantouki)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, m_mainirq, 0).int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("soundirq", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("soundcpu", 0))
RST_POS_BUFFER(config, m_soundirq, 0).int_callback().set_inputline(m_soundcpu, 0);
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, coincounter_0_w)) // Coin Counter
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(*this, dynax_state, blit2_palbank_w)) // Layers Palettes (High Bit)
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(*this, dynax_state, blit_palbank_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(*this, dynax_state, jantouki_blitter_ack_w)) // Blitter IRQ Ack
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(*this, dynax_state, jantouki_blitter2_ack_w)) // Blitter 2 IRQ Ack
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(dynax_state::coincounter_0_w)); // Coin Counter
m_mainlatch->q_out_cb<3>().set(FUNC(dynax_state::blit2_palbank_w)); // Layers Palettes (High Bit)
m_mainlatch->q_out_cb<5>().set(FUNC(dynax_state::blit_palbank_w));
m_mainlatch->q_out_cb<6>().set(FUNC(dynax_state::jantouki_blitter_ack_w)); // Blitter IRQ Ack
m_mainlatch->q_out_cb<7>().set(FUNC(dynax_state::jantouki_blitter2_ack_w)); // Blitter 2 IRQ Ack
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_pos_buffer_device, rst2_w))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
GENERIC_LATCH_8(config, m_soundlatch);
m_soundlatch->data_pending_callback().set(m_soundirq, FUNC(rst_pos_buffer_device::rst2_w));
m_soundlatch->set_separate_acknowledge(true);
/* video hardware */
MCFG_PALETTE_ADD("palette", 512)
MCFG_PALETTE_INIT_OWNER(dynax_state,sprtmtch) // static palette
MCFG_DEFAULT_LAYOUT(layout_dualhuov)
MCFG_SCREEN_ADD("top", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_jantouki_top)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, dynax_state, jantouki_vblank_w))
screen_device &top(SCREEN(config, "top", SCREEN_TYPE_RASTER));
top.set_refresh_hz(60);
top.set_vblank_time(ATTOSECONDS_IN_USEC(0));
top.set_size(512, 256);
top.set_visarea(0, 512-1, 16, 256-1);
top.set_screen_update(FUNC(dynax_state::screen_update_jantouki_top));
top.set_palette(m_palette);
top.screen_vblank().set(FUNC(dynax_state::jantouki_vblank_w));
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, jantouki_blit_pixel_w))
@ -4745,13 +4735,13 @@ MACHINE_CONFIG_START(dynax_state::jantouki)
MCFG_DYNAX_BLITTER_REV2_SCROLLY_CB(WRITE8(*this, dynax_state, dynax_blit_scrolly_w))
MCFG_DYNAX_BLITTER_REV2_READY_CB(WRITELINE(*this, dynax_state, jantouki_blitter_irq_w))
MCFG_SCREEN_ADD("bottom", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256)
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_jantouki_bottom)
MCFG_SCREEN_PALETTE("palette")
screen_device &bottom(SCREEN(config, "bottom", SCREEN_TYPE_RASTER));
bottom.set_refresh_hz(60);
bottom.set_vblank_time(ATTOSECONDS_IN_USEC(0));
bottom.set_size(512, 256);
bottom.set_visarea(0, 512-1, 16, 256-1);
bottom.set_screen_update(FUNC(dynax_state::screen_update_jantouki_bottom));
bottom.set_palette(m_palette);
MCFG_DEVICE_ADD(m_blitter2, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, jantouki_blit2_pixel_w))
@ -4764,8 +4754,7 @@ MACHINE_CONFIG_START(dynax_state::jantouki)
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("aysnd", AY8912, 22000000 / 8)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.20)
AY8912(config, "aysnd", 22000000 / 8).add_route(ALL_OUTPUTS, "mono", 0.20);
MCFG_DEVICE_ADD("ym2203", YM2203, 22000000 / 8)
MCFG_YM2203_IRQ_HANDLER(WRITELINE("soundirq", rst_pos_buffer_device, rst1_w))
@ -4780,7 +4769,7 @@ MACHINE_CONFIG_START(dynax_state::jantouki)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
/* devices */
MCFG_DEVICE_ADD("rtc", MSM6242, XTAL(32'768))
MSM6242(config, "rtc", 32.768_kHz_XTAL);
MACHINE_CONFIG_END
MACHINE_CONFIG_START(dynax_state::janyuki)
@ -4807,10 +4796,10 @@ MACHINE_CONFIG_START(dynax_state::mjelctrn)
MCFG_DEVICE_MODIFY("bankdev")
MCFG_DEVICE_PROGRAM_MAP(mjelctrn_banked_map)
MCFG_DEVICE_REPLACE("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, layer_half2_w))
LS259(config.replace(), m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(dynax_state::flipscreen_w));
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::layer_half_w));
m_mainlatch->q_out_cb<2>().set(FUNC(dynax_state::layer_half2_w));
// Q3, Q4 seem to be related to wrap around enable
MCFG_DEVICE_REMOVE("mainirq")
@ -4830,9 +4819,9 @@ MACHINE_CONFIG_START(dynax_state::mjembase)
MCFG_TMPZ84C015_IN_PA_CB(IOPORT("DSW1"))
MCFG_TMPZ84C015_IN_PB_CB(IOPORT("DSW2"))
MCFG_DEVICE_MODIFY("mainlatch") // 13C
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(*this, dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(*this, dynax_state, coincounter_1_w))
// 13C
m_mainlatch->q_out_cb<3>().set(FUNC(dynax_state::coincounter_0_w));
m_mainlatch->q_out_cb<4>().set(FUNC(dynax_state::coincounter_1_w));
MCFG_DEVICE_REMOVE("outlatch")
@ -4908,14 +4897,14 @@ MACHINE_CONFIG_START(dynax_state::tenkai)
m_mainlatch->q_out_cb<7>().set(FUNC(dynax_state::tenkai_blitter_ack_w));
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(512, 256+22)
MCFG_SCREEN_VISIBLE_AREA(4, 512-1, 4, 255-8-4) // hide first 4 horizontal pixels (see scroll of gal 4 in test mode)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_hnoridur)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ1))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(512, 256+22);
m_screen->set_visarea(4, 512-1, 4, 255-8-4); // hide first 4 horizontal pixels (see scroll of gal 4 in test mode)
m_screen->set_screen_update(FUNC(dynax_state::screen_update_hnoridur));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set_inputline(m_maincpu, INPUT_LINE_IRQ1);
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, hnoridur_blit_pixel_w))
@ -4939,8 +4928,7 @@ MACHINE_CONFIG_START(dynax_state::tenkai)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
/* devices */
MCFG_DEVICE_ADD("rtc", MSM6242, XTAL(32'768))
MCFG_MSM6242_OUT_INT_HANDLER(INPUTLINE("maincpu", INPUT_LINE_IRQ2))
MSM6242(config, "rtc", 32.768_kHz_XTAL).out_int_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ2);
MACHINE_CONFIG_END
MACHINE_CONFIG_START(dynax_state::majrjhdx)
@ -4978,25 +4966,25 @@ MACHINE_CONFIG_START(dynax_state::gekisha)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_blit_dest1_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_blit_dest0_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(*this, dynax_state, blit_palbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(*this, dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(*this, dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(*this, dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_layer1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(*this, dynax_state, mjdialq2_layer0_enable_w))
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(dynax_state::mjdialq2_blit_dest1_w));
m_mainlatch->q_out_cb<1>().set(FUNC(dynax_state::mjdialq2_blit_dest0_w));
m_mainlatch->q_out_cb<2>().set(FUNC(dynax_state::blit_palbank_w));
m_mainlatch->q_out_cb<3>().set(FUNC(dynax_state::flipscreen_w));
m_mainlatch->q_out_cb<4>().set(FUNC(dynax_state::coincounter_0_w));
m_mainlatch->q_out_cb<5>().set(FUNC(dynax_state::coincounter_1_w));
m_mainlatch->q_out_cb<6>().set(FUNC(dynax_state::mjdialq2_layer1_enable_w));
m_mainlatch->q_out_cb<7>().set(FUNC(dynax_state::mjdialq2_layer0_enable_w));
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(256, 256)
MCFG_SCREEN_VISIBLE_AREA(2, 256-1, 16, 256-1)
MCFG_SCREEN_UPDATE_DRIVER(dynax_state, screen_update_mjdialq2)
MCFG_SCREEN_PALETTE("palette")
MCFG_SCREEN_VBLANK_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
m_screen->set_size(256, 256);
m_screen->set_visarea(2, 256-1, 16, 256-1);
m_screen->set_screen_update(FUNC(dynax_state::screen_update_mjdialq2));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD(m_blitter, DYNAX_BLITTER_REV2, 0)
MCFG_DYNAX_BLITTER_REV2_VRAM_OUT_CB(WRITE8(*this, dynax_state, mjdialq2_blit_pixel_w))

View File

@ -1439,25 +1439,24 @@ MACHINE_CONFIG_START(hp64k_state::hp64k)
MCFG_TTL74123_OUTPUT_CHANGED_CB(WRITELINE(*this, hp64k_state , hp64k_floppy1_rdy));
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("beeper" , BEEP , 2500)
MCFG_SOUND_ROUTE(ALL_OUTPUTS , "mono" , 1.00)
BEEP(config, m_beeper, 2500).add_route(ALL_OUTPUTS, "mono", 1.00);
MCFG_TIMER_DRIVER_ADD("beep_timer" , hp64k_state , hp64k_beeper_off);
MCFG_DEVICE_ADD("baud_rate" , COM8116 , XTAL(5'068'800))
MCFG_COM8116_FR_HANDLER(WRITELINE(*this, hp64k_state , hp64k_baud_clk_w));
COM8116(config, m_baud_rate, 5.0688_MHz_XTAL);
m_baud_rate->fr_handler().set(FUNC(hp64k_state::hp64k_baud_clk_w));
MCFG_DEVICE_ADD("uart" , I8251 , 0)
MCFG_I8251_RXRDY_HANDLER(WRITELINE(*this, hp64k_state , hp64k_rxrdy_w));
MCFG_I8251_TXRDY_HANDLER(WRITELINE(*this, hp64k_state , hp64k_txrdy_w));
MCFG_I8251_TXD_HANDLER(WRITELINE(*this, hp64k_state , hp64k_txd_w));
MCFG_I8251_DTR_HANDLER(WRITELINE(*this, hp64k_state , hp64k_dtr_w));
MCFG_I8251_RTS_HANDLER(WRITELINE(*this, hp64k_state , hp64k_rts_w));
I8251(config, m_uart, 0);
m_uart->rxrdy_handler().set(FUNC(hp64k_state::hp64k_rxrdy_w));
m_uart->txrdy_handler().set(FUNC(hp64k_state::hp64k_txrdy_w));
m_uart->txd_handler().set(FUNC(hp64k_state::hp64k_txd_w));
m_uart->dtr_handler().set(FUNC(hp64k_state::hp64k_dtr_w));
m_uart->rts_handler().set(FUNC(hp64k_state::hp64k_rts_w));
MCFG_DEVICE_ADD("rs232" , RS232_PORT, default_rs232_devices , nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE(*this, hp64k_state , hp64k_rs232_rxd_w))
MCFG_RS232_DCD_HANDLER(WRITELINE(*this, hp64k_state , hp64k_rs232_dcd_w))
MCFG_RS232_CTS_HANDLER(WRITELINE(*this, hp64k_state , hp64k_rs232_cts_w))
RS232_PORT(config, m_rs232, default_rs232_devices, nullptr);
m_rs232->rxd_handler().set(FUNC(hp64k_state::hp64k_rs232_rxd_w));
m_rs232->dcd_handler().set(FUNC(hp64k_state::hp64k_rs232_dcd_w));
m_rs232->cts_handler().set(FUNC(hp64k_state::hp64k_rs232_cts_w));
MCFG_DEVICE_ADD("phi" , PHI , 0)
MCFG_PHI_INT_WRITE_CB(WRITELINE(*this, hp64k_state , hp64k_phi_int_w))

View File

@ -399,8 +399,8 @@
class kurukuru_state : public driver_device
{
public:
kurukuru_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
kurukuru_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),
m_v9938(*this, "v9938"),
@ -866,14 +866,12 @@ MACHINE_CONFIG_START(kurukuru_state::kurukuru)
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_neg_buffer_device, rst28_w))
GENERIC_LATCH_8(config, "soundlatch").data_pending_callback().set(m_soundirq, FUNC(rst_neg_buffer_device::rst28_w));
// latch irq vector is $ef (rst $28)
// timer irq vector is $f7 (rst $30)
// if both are asserted, the vector becomes $f7 AND $ef = $e7 (rst $20)
MCFG_DEVICE_ADD("soundirq", RST_NEG_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("audiocpu", 0))
RST_NEG_BUFFER(config, m_soundirq, 0).int_callback().set_inputline(m_audiocpu, 0);
MCFG_DEVICE_ADD("ym2149", YM2149, YM2149_CLOCK)
MCFG_AY8910_PORT_B_READ_CB(IOPORT("DSW2"))

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@ -1862,8 +1862,7 @@ MACHINE_CONFIG_START(m72_state::m72_audio_chips)
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_neg_buffer_device, rst18_w))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_DEVICE_ADD("soundirq", RST_NEG_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("soundcpu", 0))
RST_NEG_BUFFER(config, "soundirq", 0).int_callback().set_inputline(m_soundcpu, 0);
MCFG_DEVICE_MODIFY("soundcpu")
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("soundirq", rst_neg_buffer_device, inta_cb)

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@ -764,8 +764,7 @@ MACHINE_CONFIG_START(m90_state::m90)
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_neg_buffer_device, rst18_w))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_DEVICE_ADD("soundirq", RST_NEG_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("soundcpu", 0))
RST_NEG_BUFFER(config, "soundirq", 0).int_callback().set_inputline(m_soundcpu, 0);
MCFG_DEVICE_ADD("m72", IREM_M72_AUDIO)

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@ -73,7 +73,7 @@ public:
, m_crtc1(*this, "i8275_1")
, m_crtc2(*this, "i8275_2")
, m_p_chargen(*this, "chargen")
{ }
{ }
void ms6102(machine_config &config);
void ms6102_io(address_map &map);
@ -350,16 +350,15 @@ MACHINE_CONFIG_START(ms6102_state::ms6102)
MCFG_RIPPLE_COUNTER_STAGES(2)
MCFG_RIPPLE_COUNTER_COUNT_OUT_CB(WRITE8(*this, ms6102_state, kbd_uart_clock_w))
MCFG_DEVICE_ADD("keyboard", MS7002, 0)
MCFG_VT100_KEYBOARD_SIGNAL_OUT_CALLBACK(WRITELINE("589wa1", ay31015_device, write_si))
MS7002(config, m_keyboard, 0).signal_out_callback().set(m_kbd_uart, FUNC(ay31015_device::write_si));
// serial connection to host
MCFG_DEVICE_ADD("i8251", I8251, 0)
MCFG_I8251_TXD_HANDLER(WRITELINE("rs232", rs232_port_device, write_txd))
MCFG_I8251_RXRDY_HANDLER(WRITELINE(*this, ms6102_state, irq<3>))
I8251(config, m_i8251, 0);
m_i8251->txd_handler().set(m_rs232, FUNC(rs232_port_device::write_txd));
m_i8251->rxrdy_handler().set(FUNC(ms6102_state::irq<3>));
MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "null_modem")
MCFG_RS232_RXD_HANDLER(WRITELINE("i8251", i8251_device, write_rxd))
RS232_PORT(config, m_rs232, default_rs232_devices, "null_modem");
m_rs232->rxd_handler().set(m_i8251, FUNC(i8251_device::write_rxd));
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL(16'400'000) / 9)

View File

@ -3306,9 +3306,9 @@ MACHINE_CONFIG_START(rainbow_state::rainbow)
MCFG_DS1315_ADD("rtc") // DS1315 (ClikClok for DEC-100 B) * OPTIONAL *
MCFG_DEVICE_ADD("dbrg", COM8116_003, 24.0734_MHz_XTAL / 4) // 6.01835 MHz (nominally 6 MHz)
MCFG_COM8116_FR_HANDLER(WRITELINE(*this, rainbow_state, dbrg_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(*this, rainbow_state, dbrg_ft_w))
COM8116_003(config, m_dbrg, 24.0734_MHz_XTAL / 4); // 6.01835 MHz (nominally 6 MHz)
m_dbrg->fr_handler().set(FUNC(rainbow_state::dbrg_fr_w));
m_dbrg->ft_handler().set(FUNC(rainbow_state::dbrg_ft_w));
MCFG_DEVICE_ADD("mpsc", UPD7201_NEW, 24.0734_MHz_XTAL / 5 / 2) // 2.4073 MHz (nominally 2.5 MHz)
MCFG_Z80SIO_OUT_INT_CB(WRITELINE(*this, rainbow_state, mpsc_irq))

View File

@ -240,7 +240,6 @@ MACHINE_CONFIG_START(shisen_state::shisen)
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_shisen)
MCFG_PALETTE_ADD("palette", 256)
/* sound hardware */
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
@ -249,8 +248,7 @@ MACHINE_CONFIG_START(shisen_state::shisen)
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_neg_buffer_device, rst18_w))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_DEVICE_ADD("soundirq", RST_NEG_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("soundcpu", 0))
RST_NEG_BUFFER(config, "soundirq", 0).int_callback().set_inputline("soundcpu", 0);
MCFG_DEVICE_ADD("m72", IREM_M72_AUDIO)

View File

@ -389,9 +389,9 @@ MACHINE_CONFIG_START(softbox_state::softbox)
MCFG_I8255_IN_PORTC_CB(READ8(*this, softbox_state, ppi1_pc_r))
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, softbox_state, ppi1_pc_w))
MCFG_DEVICE_ADD(COM8116_TAG, COM8116, XTAL(5'068'800))
MCFG_COM8116_FR_HANDLER(WRITELINE(I8251_TAG, i8251_device, write_rxc))
MCFG_COM8116_FT_HANDLER(WRITELINE(I8251_TAG, i8251_device, write_txc))
com8116_device &dbrg(COM8116(config, COM8116_TAG, 5.0688_MHz_XTAL));
dbrg.fr_handler().set(I8251_TAG, FUNC(i8251_device::write_rxc));
dbrg.ft_handler().set(I8251_TAG, FUNC(i8251_device::write_txc));
MCFG_CBM_IEEE488_ADD("c8050")

View File

@ -655,13 +655,13 @@ MACHINE_CONFIG_START(sun2_state::sun2vme)
MCFG_SCREEN_VISIBLE_AREA(0, 1152-1, 0, 900-1)
MCFG_SCREEN_REFRESH_RATE(72)
MCFG_DEVICE_ADD("timer", AM9513A, 19.6608_MHz_XTAL / 4)
MCFG_AM9513_FOUT_CALLBACK(WRITELINE("timer", am9513_device, gate1_w))
MCFG_AM9513_OUT1_CALLBACK(INPUTLINE("maincpu", M68K_IRQ_7))
MCFG_AM9513_OUT2_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<0>))
MCFG_AM9513_OUT3_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<1>))
MCFG_AM9513_OUT4_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<2>))
MCFG_AM9513_OUT5_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<3>))
am9513a_device &timer(AM9513A(config, "timer", 19.6608_MHz_XTAL / 4));
timer.fout_cb().set("timer", FUNC(am9513_device::gate1_w));
timer.out1_cb().set_inputline(m_maincpu, M68K_IRQ_7);
timer.out2_cb().set("irq5", FUNC(input_merger_device::in_w<0>));
timer.out3_cb().set("irq5", FUNC(input_merger_device::in_w<1>));
timer.out4_cb().set("irq5", FUNC(input_merger_device::in_w<2>));
timer.out5_cb().set("irq5", FUNC(input_merger_device::in_w<3>));
MCFG_INPUT_MERGER_ANY_HIGH("irq5") // 74LS05 open collectors
MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M68K_IRQ_5))
@ -727,13 +727,13 @@ MACHINE_CONFIG_START(sun2_state::sun2mbus)
MCFG_SCREEN_VISIBLE_AREA(0, 1152-1, 0, 900-1)
MCFG_SCREEN_REFRESH_RATE(72)
MCFG_DEVICE_ADD("timer", AM9513, 39.3216_MHz_XTAL / 8)
MCFG_AM9513_FOUT_CALLBACK(WRITELINE("timer", am9513_device, gate1_w))
MCFG_AM9513_OUT1_CALLBACK(INPUTLINE("maincpu", M68K_IRQ_7))
MCFG_AM9513_OUT2_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<0>))
MCFG_AM9513_OUT3_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<1>))
MCFG_AM9513_OUT4_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<2>))
MCFG_AM9513_OUT5_CALLBACK(WRITELINE("irq5", input_merger_device, in_w<3>))
am9513a_device &timer(AM9513A(config, "timer", 39.3216_MHz_XTAL / 8));
timer.fout_cb().set("timer", FUNC(am9513_device::gate1_w));
timer.out1_cb().set_inputline(m_maincpu, M68K_IRQ_7);
timer.out2_cb().set("irq5", FUNC(input_merger_device::in_w<0>));
timer.out3_cb().set("irq5", FUNC(input_merger_device::in_w<1>));
timer.out4_cb().set("irq5", FUNC(input_merger_device::in_w<2>));
timer.out5_cb().set("irq5", FUNC(input_merger_device::in_w<3>));
MCFG_INPUT_MERGER_ANY_HIGH("irq5") // 74LS05 open collectors
MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M68K_IRQ_5))

View File

@ -220,8 +220,8 @@ fefc34a - start of mem_size, which queries ECC registers for each memory board
class sun3_state : public driver_device
{
public:
sun3_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
sun3_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_scc1(*this, SCC1_TAG),
m_scc2(*this, SCC2_TAG),
@ -234,7 +234,7 @@ public:
m_rom(*this, "user1"),
m_idprom(*this, "idprom"),
m_ram(*this, RAM_TAG)
{ }
{ }
void sun3(machine_config &config);
void sun3e(machine_config &config);
@ -1021,8 +1021,7 @@ MACHINE_CONFIG_START(sun3_state::sun3)
MCFG_DEVICE_ADD(SCC1_TAG, SCC8530N, 4.9152_MHz_XTAL)
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(KEYBOARD_TAG, sun_keyboard_port_device, write_txd))
MCFG_DEVICE_ADD(KEYBOARD_TAG, SUNKBD_PORT, default_sun_keyboard_devices, "type3hle")
MCFG_SUNKBD_RXD_HANDLER(WRITELINE(SCC1_TAG, z80scc_device, rxa_w))
SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type3hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w));
MCFG_DEVICE_ADD(SCC2_TAG, SCC8530N, 4.9152_MHz_XTAL)
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(RS232A_TAG, rs232_port_device, write_txd))
@ -1126,8 +1125,7 @@ MACHINE_CONFIG_START(sun3_state::sun3_50)
MCFG_DEVICE_ADD(SCC1_TAG, SCC8530N, 4.9152_MHz_XTAL)
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(KEYBOARD_TAG, sun_keyboard_port_device, write_txd))
MCFG_DEVICE_ADD(KEYBOARD_TAG, SUNKBD_PORT, default_sun_keyboard_devices, "type3hle")
MCFG_SUNKBD_RXD_HANDLER(WRITELINE(SCC1_TAG, z80scc_device, rxa_w))
SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type3hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w));
MCFG_DEVICE_ADD(SCC2_TAG, SCC8530N, 4.9152_MHz_XTAL)
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(RS232A_TAG, rs232_port_device, write_txd))

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@ -160,8 +160,8 @@
class sun3x_state : public driver_device
{
public:
sun3x_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
sun3x_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_scc1(*this, SCC1_TAG),
m_scc2(*this, SCC2_TAG),
@ -598,8 +598,7 @@ MACHINE_CONFIG_START(sun3x_state::sun3_80)
MCFG_DEVICE_ADD(SCC1_TAG, SCC8530N, 4.9152_MHz_XTAL)
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(KEYBOARD_TAG, sun_keyboard_port_device, write_txd))
MCFG_DEVICE_ADD(KEYBOARD_TAG, SUNKBD_PORT, default_sun_keyboard_devices, "type3hle")
MCFG_SUNKBD_RXD_HANDLER(WRITELINE(SCC1_TAG, z80scc_device, rxa_w))
SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type3hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w));
MCFG_DEVICE_ADD(SCC2_TAG, SCC8530N, 4.9152_MHz_XTAL)
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(RS232A_TAG, rs232_port_device, write_txd))

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@ -1937,8 +1937,7 @@ MACHINE_CONFIG_START(sun4_state::sun4)
MCFG_Z80SCC_OUT_INT_CB(WRITELINE(*this, sun4_state, scc1_int))
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(KEYBOARD_TAG, sun_keyboard_port_device, write_txd))
MCFG_DEVICE_ADD(KEYBOARD_TAG, SUNKBD_PORT, default_sun_keyboard_devices, "type4hle")
MCFG_SUNKBD_RXD_HANDLER(WRITELINE(SCC1_TAG, z80scc_device, rxa_w))
SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type4hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w));
// RS232 serial ports
MCFG_DEVICE_ADD(SCC2_TAG, SCC8530N, 4.9152_MHz_XTAL)
@ -2002,8 +2001,7 @@ MACHINE_CONFIG_START(sun4_state::sun4c)
MCFG_Z80SCC_OUT_INT_CB(WRITELINE(*this, sun4_state, scc1_int))
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(KEYBOARD_TAG, sun_keyboard_port_device, write_txd))
MCFG_DEVICE_ADD(KEYBOARD_TAG, SUNKBD_PORT, default_sun_keyboard_devices, "type5hle")
MCFG_SUNKBD_RXD_HANDLER(WRITELINE(SCC1_TAG, z80scc_device, rxa_w))
SUNKBD_PORT(config, KEYBOARD_TAG, default_sun_keyboard_devices, "type5hle").rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w));
// RS232 serial ports
MCFG_DEVICE_ADD(SCC2_TAG, SCC8530N, 4.9152_MHz_XTAL)

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@ -110,8 +110,7 @@ MACHINE_CONFIG_START(unistar_state::unistar)
MCFG_DEVICE_PROGRAM_MAP(unistar_mem)
MCFG_DEVICE_IO_MAP(unistar_io)
MCFG_DEVICE_ADD("stc", AM9513, 8_MHz_XTAL)
MCFG_AM9513_FOUT_CALLBACK(WRITELINE("stc", am9513_device, source1_w))
AM9513(config, "stc", 8_MHz_XTAL).fout_cb().set("stc", FUNC(am9513_device::source1_w));
MCFG_DEVICE_ADD("ppi", I8255A, 0)

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@ -351,17 +351,17 @@ MACHINE_CONFIG_START(v100_state::v100)
MCFG_DEVICE_IO_MAP(io_map)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(v100_state, irq_ack)
MCFG_DEVICE_ADD("usart1", I8251, XTAL(47'736'000) / 12) // divider not verified
I8251(config, m_usart[0], XTAL(47'736'000) / 12); // divider not verified
MCFG_DEVICE_ADD("brg1", COM8116, 5068800) // TODO: clock and divisors for this customized variant
MCFG_COM8116_FR_HANDLER(WRITELINE("usart1", i8251_device, write_rxc))
MCFG_COM8116_FT_HANDLER(WRITELINE("usart1", i8251_device, write_txc))
com8116_device &brg1(COM8116(config, "brg1", 5068800)); // TODO: clock and divisors for this customized variant
brg1.fr_handler().set(m_usart[0], FUNC(i8251_device::write_rxc));
brg1.ft_handler().set(m_usart[0], FUNC(i8251_device::write_txc));
MCFG_DEVICE_ADD("usart2", I8251, XTAL(47'736'000) / 12)
I8251(config, m_usart[1], XTAL(47'736'000) / 12);
MCFG_DEVICE_ADD("brg2", COM8116, 5068800)
MCFG_COM8116_FR_HANDLER(WRITELINE("usart2", i8251_device, write_rxc))
MCFG_COM8116_FT_HANDLER(WRITELINE("usart2", i8251_device, write_txc))
com8116_device &brg2(COM8116(config, "brg2", 5068800));
brg2.fr_handler().set(m_usart[1], FUNC(i8251_device::write_rxc));
brg2.ft_handler().set(m_usart[1], FUNC(i8251_device::write_txc));
MCFG_SCREEN_ADD("screen", RASTER)
//MCFG_SCREEN_RAW_PARAMS(XTAL(47'736'000) / 2, 102 * CHAR_WIDTH, 0, 80 * CHAR_WIDTH, 260, 0, 240)

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@ -110,12 +110,11 @@ MACHINE_CONFIG_START(v550_state::v550)
MCFG_DEVICE_ADD("mpsc", UPD7201_NEW, 4'000'000) // NEC D7201C
MCFG_Z80SIO_OUT_INT_CB(WRITELINE("mainint", input_merger_device, in_w<0>))
MCFG_INPUT_MERGER_ANY_HIGH("mainint")
MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
INPUT_MERGER_ANY_HIGH(config, "mainint").output_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD("brg1", COM8116, 5068800) // actually SMC COM8116T-020 (unknown clock)
MCFG_COM8116_FT_HANDLER(WRITELINE("mpsc", upd7201_new_device, txca_w))
MCFG_COM8116_FR_HANDLER(WRITELINE("mpsc", upd7201_new_device, rxca_w))
com8116_device &brg1(COM8116(config, "brg1", 5068800)); // actually SMC COM8116T-020 (unknown clock)
brg1.ft_handler().set("mpsc", FUNC(upd7201_new_device::txca_w));
brg1.fr_handler().set("mpsc", FUNC(upd7201_new_device::rxca_w));
com8116_device &brg2(COM8116(config, "brg2", 5068800)); // actually SMC COM8116T-020
brg2.ft_handler().set("mpsc", FUNC(upd7201_new_device::txcb_w));

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@ -507,7 +507,6 @@ MACHINE_CONFIG_START(vigilant_state::vigilant)
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_vigilant)
MCFG_PALETTE_ADD("palette", 512+32) /* 512 real palette, 32 virtual palette */
/* sound hardware */
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
@ -516,8 +515,7 @@ MACHINE_CONFIG_START(vigilant_state::vigilant)
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_neg_buffer_device, rst18_w))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_DEVICE_ADD("soundirq", RST_NEG_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("soundcpu", 0))
RST_NEG_BUFFER(config, "soundirq", 0).int_callback().set_inputline("soundcpu", 0);
MCFG_DEVICE_ADD("m72", IREM_M72_AUDIO)
@ -567,8 +565,7 @@ MACHINE_CONFIG_START(vigilant_state::buccanrs)
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_neg_buffer_device, rst18_w))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_DEVICE_ADD("soundirq", RST_NEG_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("soundcpu", 0))
RST_NEG_BUFFER(config, "soundirq", 0).int_callback().set_inputline("soundcpu", 0);
MCFG_DEVICE_ADD("m72", IREM_M72_AUDIO)
@ -625,7 +622,6 @@ MACHINE_CONFIG_START(vigilant_state::kikcubic)
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_kikcubic)
MCFG_PALETTE_ADD("palette", 256)
/* sound hardware */
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
@ -634,8 +630,7 @@ MACHINE_CONFIG_START(vigilant_state::kikcubic)
MCFG_GENERIC_LATCH_DATA_PENDING_CB(WRITELINE("soundirq", rst_neg_buffer_device, rst18_w))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_DEVICE_ADD("soundirq", RST_NEG_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("soundcpu", 0))
RST_NEG_BUFFER(config, "soundirq", 0).int_callback().set_inputline("soundcpu", 0);
MCFG_DEVICE_ADD("m72", IREM_M72_AUDIO)

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@ -1044,33 +1044,32 @@ MACHINE_CONFIG_START(vk100_state::vk100)
MCFG_SCREEN_RAW_PARAMS(XTAL(45'619'200)/3, 882, 0, 720, 370, 0, 350 ) // fake screen timings for startup until 6845 sets real ones
MCFG_SCREEN_UPDATE_DEVICE( "crtc", mc6845_device, screen_update )
MCFG_MC6845_ADD( "crtc", H46505, "screen", XTAL(45'619'200)/3/12)
MCFG_MC6845_SHOW_BORDER_AREA(false)
MCFG_MC6845_CHAR_WIDTH(12)
MCFG_MC6845_UPDATE_ROW_CB(vk100_state, crtc_update_row)
MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, vk100_state, crtc_vsync))
H46505(config, m_crtc, 45.6192_MHz_XTAL/3/12);
m_crtc->set_show_border_area(false);
m_crtc->set_char_width(12);
m_crtc->set_update_row_callback(FUNC(vk100_state::crtc_update_row), this);
m_crtc->out_vsync_callback().set(FUNC(vk100_state::crtc_vsync));
/* i8251 uart */
MCFG_DEVICE_ADD("i8251", I8251, 0)
MCFG_I8251_TXD_HANDLER(WRITELINE(RS232_TAG, rs232_port_device, write_txd))
MCFG_I8251_DTR_HANDLER(WRITELINE(RS232_TAG, rs232_port_device, write_dtr))
MCFG_I8251_RTS_HANDLER(WRITELINE(RS232_TAG, rs232_port_device, write_rts))
MCFG_I8251_RXRDY_HANDLER(WRITELINE(*this, vk100_state, i8251_rxrdy_int))
MCFG_I8251_TXRDY_HANDLER(WRITELINE(*this, vk100_state, i8251_txrdy_int))
I8251(config, m_uart, 0);
m_uart->txd_handler().set(RS232_TAG, FUNC(rs232_port_device::write_txd));
m_uart->dtr_handler().set(RS232_TAG, FUNC(rs232_port_device::write_dtr));
m_uart->rts_handler().set(RS232_TAG, FUNC(rs232_port_device::write_rts));
m_uart->rxrdy_handler().set(FUNC(vk100_state::i8251_rxrdy_int));
m_uart->txrdy_handler().set(FUNC(vk100_state::i8251_txrdy_int));
MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("i8251", i8251_device, write_rxd))
MCFG_RS232_DSR_HANDLER(WRITELINE("i8251", i8251_device, write_dsr))
rs232_port_device &rs232(RS232_PORT(config, RS232_TAG, default_rs232_devices, nullptr));
rs232.rxd_handler().set(m_uart, FUNC(i8251_device::write_rxd));
rs232.dsr_handler().set(m_uart, FUNC(i8251_device::write_dsr));
MCFG_DEVICE_ADD(COM5016T_TAG, COM8116, XTAL(5'068'800))
MCFG_COM8116_FR_HANDLER(WRITELINE("i8251", i8251_device, write_rxc))
MCFG_COM8116_FT_HANDLER(WRITELINE("i8251", i8251_device, write_txc))
com8116_device &dbrg(COM8116(config, COM5016T_TAG, 5.0688_MHz_XTAL));
dbrg.fr_handler().set(m_uart, FUNC(i8251_device::write_rxc));
dbrg.ft_handler().set(m_uart, FUNC(i8251_device::write_txc));
MCFG_DEFAULT_LAYOUT( layout_vk100 )
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD( "beeper", BEEP, 116 ) // 116 hz (page 172 of TM), but duty cycle is wrong here!
MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 0.25 )
BEEP(config, m_speaker, 116).add_route(ALL_OUTPUTS, "mono", 0.25); // 116 hz (page 172 of TM), but duty cycle is wrong here!
MACHINE_CONFIG_END
/* ROM definition */

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@ -55,8 +55,6 @@
#include "vt100.lh"
#define RS232_TAG "rs232"
class vt100_state : public driver_device
{
public:
@ -69,7 +67,7 @@ public:
m_pusart(*this, "pusart"),
m_nvr(*this, "nvr"),
m_rstbuf(*this, "rstbuf"),
m_rs232(*this, RS232_TAG),
m_rs232(*this, "rs232"),
m_printer_uart(*this, "printuart"),
m_p_ram(*this, "p_ram")
{
@ -192,8 +190,8 @@ void vt100_state::vt100_io(address_map &map)
map.unmap_value_high();
map.global_mask(0xff);
// 0x00, 0x01 PUSART (Intel 8251)
map(0x00, 0x00).rw("pusart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
map(0x01, 0x01).rw("pusart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
map(0x00, 0x00).rw(m_pusart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
map(0x01, 0x01).rw(m_pusart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
// 0x02 Baud rate generator
map(0x02, 0x02).w("dbrg", FUNC(com8116_device::stt_str_w));
// 0x22 Modem buffer
@ -205,7 +203,7 @@ void vt100_state::vt100_io(address_map &map)
// 0x62 NVR latch
map(0x62, 0x62).w(FUNC(vt100_state::nvr_latch_w));
// 0x82 Keyboard UART data
map(0x82, 0x82).rw("kbduart", FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit));
map(0x82, 0x82).rw(m_kbduart, FUNC(ay31015_device::receive), FUNC(ay31015_device::transmit));
// 0xA2 Video processor DC012
map(0xa2, 0xa2).w(m_crtc, FUNC(vt100_video_device::dc012_w));
// 0xC2 Video processor DC011
@ -341,15 +339,15 @@ MACHINE_CONFIG_START(vt100_state::vt100)
MCFG_VT_VIDEO_LBA3_LBA4_CALLBACK(WRITE8(*this, vt100_state, uart_clock_w))
MCFG_VT_VIDEO_LBA7_CALLBACK(WRITELINE("nvr", er1400_device, clock_w))
MCFG_DEVICE_ADD("pusart", I8251, XTAL(24'883'200) / 9)
MCFG_I8251_TXD_HANDLER(WRITELINE(RS232_TAG, rs232_port_device, write_txd))
MCFG_I8251_DTR_HANDLER(WRITELINE(RS232_TAG, rs232_port_device, write_dtr))
MCFG_I8251_RTS_HANDLER(WRITELINE(RS232_TAG, rs232_port_device, write_rts))
MCFG_I8251_RXRDY_HANDLER(WRITELINE("rstbuf", rst_pos_buffer_device, rst2_w))
I8251(config, m_pusart, XTAL(24'883'200) / 9);
m_pusart->txd_handler().set(m_rs232, FUNC(rs232_port_device::write_txd));
m_pusart->dtr_handler().set(m_rs232, FUNC(rs232_port_device::write_dtr));
m_pusart->rts_handler().set(m_rs232, FUNC(rs232_port_device::write_rts));
m_pusart->rxrdy_handler().set(m_rstbuf, FUNC(rst_pos_buffer_device::rst2_w));
MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("pusart", i8251_device, write_rxd))
MCFG_RS232_DSR_HANDLER(WRITELINE("pusart", i8251_device, write_dsr))
RS232_PORT(config, m_rs232, default_rs232_devices, nullptr);
m_rs232->rxd_handler().set(m_pusart, FUNC(i8251_device::write_rxd));
m_rs232->dsr_handler().set(m_pusart, FUNC(i8251_device::write_dsr));
com8116_device &dbrg(COM5016_013(config, "dbrg", XTAL(24'883'200) / 9)); // COM5016T-013 (or WD1943CD-02), 2.7648Mhz Clock
dbrg.fr_handler().set(m_pusart, FUNC(i8251_device::write_rxc));
@ -357,15 +355,13 @@ MACHINE_CONFIG_START(vt100_state::vt100)
ER1400(config, m_nvr, 0);
MCFG_DEVICE_ADD("keyboard", VT100_KEYBOARD, 0)
MCFG_VT100_KEYBOARD_SIGNAL_OUT_CALLBACK(WRITELINE("kbduart", ay31015_device, write_si))
VT100_KEYBOARD(config, m_keyboard, 0).signal_out_callback().set(m_kbduart, FUNC(ay31015_device::write_si));
MCFG_DEVICE_ADD("kbduart", AY31015, 0)
MCFG_AY31015_WRITE_DAV_CB(WRITELINE("rstbuf", rst_pos_buffer_device, rst1_w))
MCFG_AY31015_AUTO_RDAV(true)
AY31015(config, m_kbduart, 0);
m_kbduart->write_dav_callback().set(m_rstbuf, FUNC(rst_pos_buffer_device::rst1_w));
m_kbduart->set_auto_rdav(true);
MCFG_DEVICE_ADD("rstbuf", RST_POS_BUFFER, 0)
MCFG_RST_BUFFER_INT_CALLBACK(INPUTLINE("maincpu", 0))
RST_POS_BUFFER(config, m_rstbuf, 0).int_callback().set_inputline(m_maincpu, 0);
MACHINE_CONFIG_END
void vt100_state::stp_mem(address_map &map)
@ -385,23 +381,25 @@ void vt100_state::stp_io(address_map &map)
map(0xd0, 0xd0).rw("stpusart2", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
}
MACHINE_CONFIG_START(vt100_state::vt100ac)
void vt100_state::vt100ac(machine_config &config)
{
vt100(config);
MCFG_DEVICE_ADD("stpcpu", I8085A, 4915200)
MCFG_DEVICE_PROGRAM_MAP(stp_mem)
MCFG_DEVICE_IO_MAP(stp_io)
MCFG_DEVICE_ADD("stpusart0", I8251, 2457600)
MCFG_I8251_RXRDY_HANDLER(WRITELINE("stprxint", input_merger_device, in_w<0>))
MCFG_I8251_TXRDY_HANDLER(WRITELINE("stptxint", input_merger_device, in_w<0>))
i8085a_cpu_device &stpcpu(I8085A(config, "stpcpu", 4915200));
stpcpu.set_addrmap(AS_PROGRAM, &vt100_state::stp_mem);
stpcpu.set_addrmap(AS_IO, &vt100_state::stp_io);
MCFG_DEVICE_ADD("stpusart1", I8251, 2457600)
MCFG_I8251_RXRDY_HANDLER(WRITELINE("stprxint", input_merger_device, in_w<1>))
MCFG_I8251_TXRDY_HANDLER(WRITELINE("stptxint", input_merger_device, in_w<1>))
i8251_device &stpusart0(I8251(config, "stpusart0", 2457600));
stpusart0.rxrdy_handler().set("stprxint", FUNC(input_merger_device::in_w<0>));
stpusart0.txrdy_handler().set("stptxint", FUNC(input_merger_device::in_w<0>));
MCFG_DEVICE_ADD("stpusart2", I8251, 2457600) // for printer?
MCFG_I8251_RXRDY_HANDLER(WRITELINE("stprxint", input_merger_device, in_w<2>))
MCFG_I8251_TXRDY_HANDLER(WRITELINE("stptxint", input_merger_device, in_w<2>))
i8251_device &stpusart1(I8251(config, "stpusart1", 2457600));
stpusart1.rxrdy_handler().set("stprxint", FUNC(input_merger_device::in_w<1>));
stpusart1.txrdy_handler().set("stptxint", FUNC(input_merger_device::in_w<1>));
i8251_device &stpusart2(I8251(config, "stpusart2", 2457600)); // for printer?
stpusart2.rxrdy_handler().set("stprxint", FUNC(input_merger_device::in_w<2>));
stpusart2.txrdy_handler().set("stptxint", FUNC(input_merger_device::in_w<2>));
INPUT_MERGER_ANY_HIGH(config, "stptxint").output_handler().set_inputline("stpcpu", I8085_RST55_LINE);
@ -414,46 +412,48 @@ MACHINE_CONFIG_START(vt100_state::vt100ac)
dbrg.ft_handler().append("stpusart0", FUNC(i8251_device::write_txc));
dbrg.ft_handler().append("stpusart1", FUNC(i8251_device::write_txc));
dbrg.ft_handler().append("stpusart2", FUNC(i8251_device::write_txc));
MACHINE_CONFIG_END
}
MACHINE_CONFIG_START(vt100_state::vt180)
void vt100_state::vt180(machine_config &config)
{
vt100(config);
MCFG_DEVICE_ADD("z80cpu", Z80, XTAL(24'883'200) / 9)
MCFG_DEVICE_PROGRAM_MAP(vt180_mem)
MCFG_DEVICE_IO_MAP(vt180_io)
MACHINE_CONFIG_END
z80_device &z80cpu(Z80(config, "z80cpu", XTAL(24'883'200) / 9));
z80cpu.set_memory_map(&vt100_state::vt180_mem);
z80cpu.set_io_map(&vt100_state::vt180_io);
}
MACHINE_CONFIG_START(vt100_state::vt101)
vt100(config);
MCFG_DEVICE_REPLACE("maincpu", I8085A, XTAL(24'073'400) / 4)
MCFG_DEVICE_REPLACE(m_maincpu, I8085A, XTAL(24'073'400) / 4)
MCFG_DEVICE_PROGRAM_MAP(vt100_mem)
MCFG_DEVICE_IO_MAP(vt100_io)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(vt100_state, vt102_irq_callback)
MCFG_DEVICE_MODIFY("pusart")
MCFG_DEVICE_CLOCK(XTAL(24'073'400) / 8)
MCFG_I8251_TXRDY_HANDLER(INPUTLINE("maincpu", I8085_RST55_LINE)) // 8085 pin 9, mislabeled RST 7.5 on schematics
m_pusart->set_clock(XTAL(24'073'400) / 8);
m_pusart->txrdy_handler().set_inputline(m_maincpu, I8085_RST55_LINE); // 8085 pin 9, mislabeled RST 7.5 on schematics
MCFG_DEVICE_REPLACE("dbrg", COM8116_003, XTAL(24'073'400) / 4)
MCFG_COM8116_FR_HANDLER(WRITELINE("pusart", i8251_device, write_rxc))
MCFG_COM8116_FT_HANDLER(WRITELINE("pusart", i8251_device, write_txc))
com8116_003_device &dbrg(COM8116_003(config.replace(), "dbrg", XTAL(24'073'400) / 4));
dbrg.fr_handler().set(m_pusart, FUNC(i8251_device::write_rxc));
dbrg.ft_handler().set(m_pusart, FUNC(i8251_device::write_txc));
MCFG_DEVICE_MODIFY("kbduart")
MCFG_AY31015_WRITE_TBMT_CB(INPUTLINE("maincpu", I8085_RST65_LINE))
m_kbduart->write_tbmt_callback().set_inputline(m_maincpu, I8085_RST65_LINE);
MACHINE_CONFIG_END
MACHINE_CONFIG_START(vt100_state::vt102)
vt101(config);
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_IO_MAP(vt102_io)
MCFG_DEVICE_ADD("printuart", INS8250, XTAL(24'073'400) / 16)
MCFG_INS8250_OUT_TX_CB(WRITELINE("printer", rs232_port_device, write_txd))
MCFG_INS8250_OUT_INT_CB(INPUTLINE("maincpu", I8085_RST75_LINE)) // 8085 pin 7, mislabeled RST 5.5 on schematics
ins8250_device &printuart(INS8250(config, "printuart", XTAL(24'073'400) / 16));
printuart.out_tx_callback().set("printer", FUNC(rs232_port_device::write_txd));
printuart.out_int_callback().set_inputline(m_maincpu, I8085_RST75_LINE); // 8085 pin 7, mislabeled RST 5.5 on schematics
MCFG_DEVICE_ADD("printer", RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("printuart", ins8250_device, rx_w))
MCFG_RS232_DSR_HANDLER(WRITELINE("printuart", ins8250_device, dsr_w))
rs232_port_device &printer(RS232_PORT(config, "printer", default_rs232_devices, nullptr));
printer.rxd_handler().set("printuart", FUNC(ins8250_device::rx_w));
printer.dsr_handler().set("printuart", FUNC(ins8250_device::dsr_w));
MACHINE_CONFIG_END
/* VT1xx models:

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@ -469,14 +469,6 @@ WRITE_LINE_MEMBER( xerox820_state::fdc_drq_w )
update_nmi();
}
/* COM8116 Interface */
WRITE_LINE_MEMBER( xerox820_state::fr_w )
{
m_sio->rxca_w(state);
m_sio->txca_w(state);
}
/* Video */
uint32_t xerox820_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@ -655,9 +647,10 @@ MACHINE_CONFIG_START(xerox820_state::xerox820)
MCFG_DEVICE_ADD(RS232_B_TAG, RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE(Z80SIO_TAG, z80sio0_device, rxb_w))
MCFG_DEVICE_ADD(COM8116_TAG, COM8116, 5.0688_MHz_XTAL)
MCFG_COM8116_FR_HANDLER(WRITELINE(*this, xerox820_state, fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
com8116_device &dbrg(COM8116(config, COM8116_TAG, 5.0688_MHz_XTAL));
dbrg.fr_handler().set(m_sio, FUNC(z80dart_device::rxca_w));
dbrg.fr_handler().append(m_sio, FUNC(z80dart_device::txca_w));
dbrg.ft_handler().set(m_sio, FUNC(z80dart_device::rxtxcb_w));
MCFG_DEVICE_ADD(KEYBOARD_TAG, XEROX_820_KEYBOARD, 0)
MCFG_XEROX_820_KEYBOARD_KBSTB_CALLBACK(WRITELINE(Z80PIO_KB_TAG, z80pio_device, strobe_b))
@ -744,9 +737,10 @@ MACHINE_CONFIG_START(xerox820ii_state::xerox820ii)
MCFG_DEVICE_ADD(RS232_B_TAG, RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE(Z80SIO_TAG, z80sio0_device, rxb_w))
MCFG_DEVICE_ADD(COM8116_TAG, COM8116, 5.0688_MHz_XTAL)
MCFG_COM8116_FR_HANDLER(WRITELINE(*this, xerox820_state, fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
com8116_device &dbrg(COM8116(config, COM8116_TAG, 5.0688_MHz_XTAL));
dbrg.fr_handler().set(m_sio, FUNC(z80dart_device::rxca_w));
dbrg.fr_handler().append(m_sio, FUNC(z80dart_device::txca_w));
dbrg.ft_handler().set(m_sio, FUNC(z80dart_device::rxtxcb_w));
MCFG_DEVICE_ADD(KEYBOARD_TAG, XEROX_820_KEYBOARD, 0)
MCFG_XEROX_820_KEYBOARD_KBSTB_CALLBACK(WRITELINE(Z80PIO_KB_TAG, z80pio_device, strobe_b))

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@ -5,6 +5,11 @@
Irem M72 hardware
*************************************************************************/
#ifndef MAME_INCLUDES_M72_H
#define MAME_INCLUDES_M72_H
#pragma once
#include "audio/m72.h"
#include "sound/dac.h"
#include "machine/pic8259.h"
@ -27,8 +32,8 @@
class m72_state : public driver_device
{
public:
m72_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m72_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_soundcpu(*this, "soundcpu"),
m_mcu(*this, "mcu"),
@ -52,7 +57,7 @@ public:
m_m81_b_b_j3(*this, "JumperJ3"),
m_m82_rowscroll(0),
m_m82_tmcontrol(0)
{ }
{ }
void m72_base(machine_config &config);
void m72_audio_chips(machine_config &config);
@ -245,3 +250,5 @@ private:
void xmultipl_map(address_map &map);
void xmultiplm72_map(address_map &map);
};
#endif // MAME_INCLUDES_M72_H

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@ -1,5 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:Bryan McPhail
#ifndef MAME_INCLUDES_M90_H
#define MAME_INCLUDES_M90_H
#pragma once
#include "audio/m72.h"
#include "emupal.h"
@ -80,3 +85,5 @@ private:
void quizf1_main_cpu_io_map(address_map &map);
void quizf1_main_cpu_map(address_map &map);
};
#endif // MAME_INCLUDES_M90_H

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@ -1,19 +1,25 @@
// license:BSD-3-Clause
// copyright-holders:Nicola Salmoria
#ifndef MAME_INCLUDES_SHISEN_H
#define MAME_INCLUDES_SHISEN_H
#pragma once
#include "audio/m72.h"
#include "emupal.h"
class shisen_state : public driver_device
{
public:
shisen_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
shisen_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_audio (*this, "m72"),
m_audio(*this, "m72"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_paletteram(*this, "paletteram"),
m_videoram(*this, "videoram") { }
m_videoram(*this, "videoram")
{ }
void shisen(machine_config &config);
@ -46,3 +52,5 @@ private:
void shisen_sound_io_map(address_map &map);
void shisen_sound_map(address_map &map);
};
#endif // MAME_INCLUDES_SHISEN_H

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@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:Curt Coder, Mike Naberezny
#pragma once
#ifndef MAME_INCLUDES_SOFTBOX_H
#define MAME_INCLUDES_SOFTBOX_H
#pragma once
#include "bus/ieee488/ieee488.h"
#include "bus/imi7000/imi7000.h"
#include "cpu/z80/z80.h"

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@ -1,20 +1,26 @@
// license:BSD-3-Clause
// copyright-holders:Mike Balfour
#ifndef MAME_INCLUDES_VIGILANT_H
#define MAME_INCLUDES_VIGILANT_H
#pragma once
#include "audio/m72.h"
#include "emupal.h"
class vigilant_state : public driver_device
{
public:
vigilant_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
vigilant_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_audio(*this, "m72"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_generic_paletteram_8(*this, "paletteram"),
m_spriteram(*this, "spriteram"),
m_videoram(*this, "videoram") { }
m_videoram(*this, "videoram")
{ }
void vigilant(machine_config &config);
void kikcubic(machine_config &config);
@ -72,3 +78,5 @@ private:
void vigilant_io_map(address_map &map);
void vigilant_map(address_map &map);
};
#endif // MAME_INCLUDES_VIGILANT_H

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@ -81,7 +81,6 @@ public:
DECLARE_READ8_MEMBER( kbpio_pa_r );
DECLARE_WRITE8_MEMBER( kbpio_pa_w );
DECLARE_READ8_MEMBER( kbpio_pb_r );
DECLARE_WRITE_LINE_MEMBER( fr_w );
DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w );
DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );

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@ -17,14 +17,6 @@
#include "speaker.h"
//**************************************************************************
// CONFIGURATION MACROS
//**************************************************************************
#define MCFG_VT100_KEYBOARD_SIGNAL_OUT_CALLBACK(_devcb) \
downcast<vt100_keyboard_device &>(*device).set_signal_out_callback(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -38,7 +30,7 @@ public:
vt100_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// configuration
template <class Object> devcb_base &set_signal_out_callback(Object &&cb) { return m_signal_out_cb.set_callback(std::forward<Object>(cb)); }
auto signal_out_callback() { return m_signal_out_cb.bind(); }
DECLARE_WRITE_LINE_MEMBER(signal_line_w);