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srcclean (nw)

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This commit is contained in:
Vas Crabb 2016-10-23 22:35:45 +11:00
parent f1fefd7055
commit 129c0feeed
109 changed files with 1771 additions and 1771 deletions
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136
hash/segacd.xml
View File

@ -202,7 +202,7 @@ corrected set of dumps with sub-channels intact, but first the CHD parsers
needs to be updated to support it. Contenders for this field at the time
of writing include RawDump and TruRip dumps.
See: http://rawdump.net/
http://www.trurip.org/
http://www.trurip.org/
-->
<!-- The following images are from the redump.org set of dumps. -->
@ -3488,7 +3488,7 @@ See: http://rawdump.net/
</diskarea>
</part>
</software>
<software name="monkey">
<!-- Source: redump.org - http://redump.org/disc/36040/
<rom name="Secret of Monkey Island, The (USA).cue" size="3488" crc="04a1e02f" md5="027ccf6397d96b6d9a5b7b33adcaa9fc" sha1="2c14e74a3fca8214008621434a530d861268307c"/>
@ -5232,7 +5232,7 @@ See: http://rawdump.net/
<rom name="Media (CD-ROM)\BC Racers (1994)(Time Warner Interactive)(US).ccd" size="2990" crc="75ef5a02" md5="6d65d70b42192358761a2ad4cdd9a31e" sha1="64317ace80a4c67052a6f6174dafd1f86fd01a84"/>
<rom name="Media (CD-ROM)\BC Racers (1994)(Time Warner Interactive)(US).img" size="480673536" crc="5a313588" md5="5b537f47d1b36755e2fd7cda042fee04" sha1="a3233561fb73248e3cc09b542ce045b4b15a5a4a"/>
<rom name="Media (CD-ROM)\BC Racers (1994)(Time Warner Interactive)(US).sub" size="19619328" crc="ec7a4537" md5="1c1ffbdeeb5ca4644036544ede3bb7df" sha1="073b4e227275b69fb97d3d4add8f2b5f162d80ac"/>
-->
-->
<description>BC Racers (USA)</description>
<year>1994</year>
<publisher>Core Design</publisher>
@ -5293,32 +5293,32 @@ See: http://rawdump.net/
</software>
<!--
<software name="colrmech">
<description>Color Mechanica (USA)</description>
<year>2013</year>
<publisher>&lt;unlicensed&gt;</publisher>
<info name="release" value="20131227" />
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="color mechanica (usa)" status="nodump"/>
</diskarea>
</part>
</software>
<software name="colrmech">
<description>Color Mechanica (USA)</description>
<year>2013</year>
<publisher>&lt;unlicensed&gt;</publisher>
<info name="release" value="20131227" />
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="color mechanica (usa)" status="nodump"/>
</diskarea>
</part>
</software>
-->
<!-- This was exclusively bundled with the JVC X'Eye console -->
<!--
<software name="comptons200s" cloneof="comptons">
<description>Compton's Interactive Encyclopedia v2.00S (USA)</description>
<year>1994</year>
<publisher>Compton's NewMedia</publisher>
<info name="serial" value="T-118025"/>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="compton's interactive encyclopedia v2.00s (usa)" status="nodump"/>
</diskarea>
</part>
</software>
<software name="comptons200s" cloneof="comptons">
<description>Compton's Interactive Encyclopedia v2.00S (USA)</description>
<year>1994</year>
<publisher>Compton's NewMedia</publisher>
<info name="serial" value="T-118025"/>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="compton's interactive encyclopedia v2.00s (usa)" status="nodump"/>
</diskarea>
</part>
</software>
-->
<!-- This was exclusively bundled with the JVC X'Eye console -->
@ -5561,16 +5561,16 @@ See: http://rawdump.net/
</software>
<!--
<software name="musijpbr">
<description>Music from the Sega CD Games - Jurassic Park, Batman Returns (USA)</description>
<year>1993</year>
<publisher>Sega Multimedia Studio</publisher>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="music from the sega cd games - jurassic park, batman returns (usa)" status="nodump"/>
</diskarea>
</part>
</software>
<software name="musijpbr">
<description>Music from the Sega CD Games - Jurassic Park, Batman Returns (USA)</description>
<year>1993</year>
<publisher>Sega Multimedia Studio</publisher>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="music from the sega cd games - jurassic park, batman returns (usa)" status="nodump"/>
</diskarea>
</part>
</software>
-->
<software name="mypaint">
@ -5768,16 +5768,16 @@ See: http://rawdump.net/
<!--
<software name="surgical32x" cloneof="surgical">
<description>Surgical Strike (Bra, 32X)</description>
<year>1996</year>
<publisher>Sega</publisher>
<info name="serial" value="157036"/>
<info name="release" value="199601xx" />
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="surgical strike (bra, 32x)" status="nodump" />
</diskarea>
</part>
<description>Surgical Strike (Bra, 32X)</description>
<year>1996</year>
<publisher>Sega</publisher>
<info name="serial" value="157036"/>
<info name="release" value="199601xx" />
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="surgical strike (bra, 32x)" status="nodump" />
</diskarea>
</part>
</software>
-->
@ -5846,20 +5846,20 @@ See: http://rawdump.net/
</software>
<!--
This game was developed for the Sega Mega-CD system by Virtual Studio and was released in Europe.
A stateside release never happened, but in 2014 Good Deal Games released a set of reproduction disc
made from a prototype build of the US version of the game.
-->
This game was developed for the Sega Mega-CD system by Virtual Studio and was released in Europe.
A stateside release never happened, but in 2014 Good Deal Games released a set of reproduction disc
made from a prototype build of the US version of the game.
-->
<!--
<software name="smurfs">
<description>The Smurfs (USA, Prototype)</description>
<year>2014</year>
<publisher>Good Deal Games</publisher>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="the smurfs (usa, prototype)" status="nodump"/>
</diskarea>
</part>
<description>The Smurfs (USA, Prototype)</description>
<year>2014</year>
<publisher>Good Deal Games</publisher>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="the smurfs (usa, prototype)" status="nodump"/>
</diskarea>
</part>
</software>
-->
@ -5895,17 +5895,17 @@ See: http://rawdump.net/
</software>
<!--
<software name="wixeye">
<description>What is X'Eye Multi Entertainment System (USA)</description>
<year>1993?</year>
<publisher>JVC</publisher>
<info name="serial" value="SMJ-4110"/>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="what is x'eye multi entertainment system (usa)" status="nodump"/>
</diskarea>
</part>
</software>
<software name="wixeye">
<description>What is X'Eye Multi Entertainment System (USA)</description>
<year>1993?</year>
<publisher>JVC</publisher>
<info name="serial" value="SMJ-4110"/>
<part name="cdrom" interface="scd_cdrom">
<diskarea name="cdrom">
<disk name="what is x'eye multi entertainment system (usa)" status="nodump"/>
</diskarea>
</part>
</software>
-->
<software name="wolfchld">

6
scripts/src/3rdparty.lua
View File

@ -1483,14 +1483,14 @@ project "linenoise-ng"
kind (LIBTYPE)
addprojectflags()
configuration { "vs*" }
buildoptions {
"/wd4701", -- warning C4701: potentially uninitialized local variable 'xxx' used
}
configuration { }
configuration { }
includedirs {
MAME_DIR .. "3rdparty/linenoise-ng/include",
}

2
scripts/src/bus.lua
View File

@ -2919,7 +2919,7 @@ end
if (BUSES["HP9845_IO"]~=null) then
files {
MAME_DIR .. "src/devices/bus/hp9845_io/hp9845_io.cpp",
MAME_DIR .. "src/devices/bus/hp9845_io/98035.cpp"
MAME_DIR .. "src/devices/bus/hp9845_io/98035.cpp"
}
end

2
src/devices/bus/adamnet/kb.cpp
View File

@ -278,7 +278,7 @@ READ8_MEMBER( adam_keyboard_device::p1_r )
for (int i = 0; i < 13; i++)
{
if (!BIT(m_key_y, i)) data &= m_y[i]->read();
if (!BIT(m_key_y, i)) data &= m_y[i]->read();
}
return data;

1074
src/devices/bus/hp9845_io/98035.cpp
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File diff suppressed because it is too large Load Diff

46
src/devices/bus/hp9845_io/98035.h
View File

@ -2,9 +2,9 @@
// copyright-holders: F. Ulivi
/*********************************************************************
98035.h
98035.h
98035 module (Real time clock)
98035 module (Real time clock)
*********************************************************************/
@ -15,9 +15,9 @@
#include "hp9845_io.h"
#define HP98035_IBUFFER_LEN 16 // Totally arbitrary
#define HP98035_OBUFFER_LEN 16 // Totally arbitrary
#define HP98035_UNIT_COUNT 4 // Count of counter/timer units
#define HP98035_IBUFFER_LEN 16 // Totally arbitrary
#define HP98035_OBUFFER_LEN 16 // Totally arbitrary
#define HP98035_UNIT_COUNT 4 // Count of counter/timer units
class hp98035_io_card : public hp9845_io_card_device
{
@ -42,8 +42,8 @@ private:
bool m_intflag;
bool m_irq;
bool m_idr_full;
uint8_t m_idr; // Input Data Register
uint8_t m_odr; // Output Data Register
uint8_t m_idr; // Input Data Register
uint8_t m_odr; // Output Data Register
uint8_t m_error;
uint8_t m_triggered;
uint8_t m_lost_irq;
@ -54,30 +54,30 @@ private:
unsigned m_obuffer_ptr;
// Clock/timer state
unsigned m_msec; // Milliseconds
uint8_t m_sec; // Seconds
uint8_t m_min; // Minutes
uint8_t m_hrs; // Hours
uint8_t m_dom; // Day of month
uint8_t m_mon; // Month
unsigned m_msec; // Milliseconds
uint8_t m_sec; // Seconds
uint8_t m_min; // Minutes
uint8_t m_hrs; // Hours
uint8_t m_dom; // Day of month
uint8_t m_mon; // Month
// Strangely enough this RTC has no notion of current year
emu_timer *m_msec_timer;
// Timer units
typedef enum {
UNIT_IDLE, // Not active
UNIT_ACTIVE, // Active (output units: waiting for date/time match)
UNIT_WAIT_FOR_TO // Active, output units only: waiting for timeout
UNIT_IDLE, // Not active
UNIT_ACTIVE, // Active (output units: waiting for date/time match)
UNIT_WAIT_FOR_TO // Active, output units only: waiting for timeout
} unit_state_t;
typedef struct {
unit_state_t m_state; // State
bool m_input; // Input or output
uint8_t m_port; // Assigned port # (0 if not assigned)
uint8_t m_match_datetime[ 4 ]; // Date&time to match (month is not included)
unsigned m_delay; // Timer delay
unsigned m_period; // Timer period (when != 0)
unsigned m_value; // Current counter value
unit_state_t m_state; // State
bool m_input; // Input or output
uint8_t m_port; // Assigned port # (0 if not assigned)
uint8_t m_match_datetime[ 4 ]; // Date&time to match (month is not included)
unsigned m_delay; // Timer delay
unsigned m_period; // Timer period (when != 0)
unsigned m_value; // Current counter value
void init(void);
void deactivate(void);

38
src/devices/bus/hp9845_io/hp9845_io.cpp
View File

@ -18,10 +18,10 @@ const device_type HP9845_IO_SLOT = &device_creator<hp9845_io_slot_device>;
// |hp9845_io_slot_device|
// +---------------------+
hp9845_io_slot_device::hp9845_io_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, HP9845_IO_SLOT, "HP9845 I/O Slot", tag, owner, clock, "hp9845_io_slot", __FILE__),
device_slot_interface(mconfig, *this)
device_t(mconfig, HP9845_IO_SLOT, "HP9845 I/O Slot", tag, owner, clock, "hp9845_io_slot", __FILE__),
device_slot_interface(mconfig, *this)
{
//printf("hp9845_io_slot_device %s %p\n" , tag , this);
//printf("hp9845_io_slot_device %s %p\n" , tag , this);
}
hp9845_io_slot_device::~hp9845_io_slot_device()
@ -30,18 +30,18 @@ hp9845_io_slot_device::~hp9845_io_slot_device()
void hp9845_io_slot_device::device_start()
{
//printf("hp9845_io_slot_device::device_start\n");
//printf("hp9845_io_slot_device::device_start\n");
}
// +---------------------+
// |hp9845_io_card_device|
// +---------------------+
hp9845_io_card_device::hp9845_io_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_slot_card_interface(mconfig, *this),
m_sys(nullptr),
m_select_code_port(*this , "SC"),
m_my_sc(0)
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_slot_card_interface(mconfig, *this),
m_sys(nullptr),
m_select_code_port(*this , "SC"),
m_my_sc(0)
{
}
@ -51,32 +51,32 @@ hp9845_io_card_device::~hp9845_io_card_device()
void hp9845_io_card_device::device_reset()
{
m_my_sc = m_select_code_port->read() + HP9845_IO_FIRST_SC;
//printf("m_my_sc=%u\n" , m_my_sc);
m_my_sc = m_select_code_port->read() + HP9845_IO_FIRST_SC;
//printf("m_my_sc=%u\n" , m_my_sc);
}
void hp9845_io_card_device::irq_w(int state)
{
m_sys->irq_w(m_my_sc , state);
m_sys->irq_w(m_my_sc , state);
}
void hp9845_io_card_device::sts_w(int state)
{
m_sys->sts_w(m_my_sc , state);
m_sys->sts_w(m_my_sc , state);
}
void hp9845_io_card_device::flg_w(int state)
{
m_sys->flg_w(m_my_sc , state);
m_sys->flg_w(m_my_sc , state);
}
void hp9845_io_card_device::install_readwrite_handler(read16_delegate rhandler, write16_delegate whandler)
{
if (m_sys == nullptr) {
m_sys = dynamic_cast<hp9845b_state*>(&machine().root_device());
//printf("m_sys=%p\n" , m_sys);
m_sys->install_readwrite_handler(m_my_sc , rhandler, whandler);
}
if (m_sys == nullptr) {
m_sys = dynamic_cast<hp9845b_state*>(&machine().root_device());
//printf("m_sys=%p\n" , m_sys);
m_sys->install_readwrite_handler(m_my_sc , rhandler, whandler);
}
}
#include "98035.h"

2
src/devices/bus/hp9845_io/hp9845_io.h
View File

@ -19,7 +19,7 @@
MCFG_DEVICE_ADD(_tag, HP9845_IO_SLOT, 0) \
MCFG_DEVICE_SLOT_INTERFACE(hp9845_io_slot_devices, nullptr, false)
#define HP9845_IO_FIRST_SC 1 // Lowest SC used by I/O cards
#define HP9845_IO_FIRST_SC 1 // Lowest SC used by I/O cards
#define MCFG_HP9845_IO_SC\
PORT_START("SC") \

8
src/devices/bus/snes/sgb.h
View File

@ -90,11 +90,11 @@ public:
class sns_rom_sgb2_device : public sns_rom_sgb_device
{
public:
// construction/destruction
sns_rom_sgb2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// construction/destruction
sns_rom_sgb2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const override;
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const override;
virtual const tiny_rom_entry *device_rom_region() const override;
};

2
src/devices/cpu/m68000/m68kcpu.cpp
View File

@ -1063,7 +1063,7 @@ void m68000_base_device::state_import(const device_state_entry &entry)
case STATE_GENPC:
ppc = pc;
break;
case STATE_GENPCBASE:
pc = ppc;
break;

2
src/devices/cpu/se3208/se3208.cpp
View File

@ -1803,7 +1803,7 @@ void se3208_device::device_start()
state_add(STATE_GENPC, "GENPC", m_PC).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_PPC).noshow();
state_add(STATE_GENSP, "GENSP", m_SP).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_SR).formatstr("%10s").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_SR).formatstr("%10s").noshow();
m_icountptr = &m_icount;
}

14
src/devices/cpu/sh2/sh7604_bus.cpp
View File

@ -5,8 +5,8 @@
SH7604 BUS Controller
Lies at 0xffffffe0-0xffffffff
TODO:
- Host CPU setter (is_slave and clock are needed);
- timer clock emulation;
@ -44,7 +44,7 @@ WRITE16_MEMBER(sh7604_bus_device::bus_control_1_w)
throw emu_fatalerror("%s: enabled partial space share mode\n", tag());
}
READ16_MEMBER(sh7604_bus_device::bus_control_2_r) { return m_bcr2 & 0x00fc; }
READ16_MEMBER(sh7604_bus_device::bus_control_2_r) { return m_bcr2 & 0x00fc; }
WRITE16_MEMBER(sh7604_bus_device::bus_control_2_w)
{
COMBINE_DATA(&m_bcr2);
@ -53,7 +53,7 @@ WRITE16_MEMBER(sh7604_bus_device::bus_control_2_w)
}
READ16_MEMBER(sh7604_bus_device::wait_control_r) { return m_wcr; }
WRITE16_MEMBER(sh7604_bus_device::wait_control_w) { COMBINE_DATA(&m_wcr); }
WRITE16_MEMBER(sh7604_bus_device::wait_control_w) { COMBINE_DATA(&m_wcr); }
READ16_MEMBER(sh7604_bus_device::memory_control_r) { return m_mcr & 0xfefc; }
WRITE16_MEMBER(sh7604_bus_device::memory_control_w) { COMBINE_DATA(&m_mcr); }
@ -66,7 +66,7 @@ READ16_MEMBER(sh7604_bus_device::refresh_timer_status_r)
WRITE16_MEMBER(sh7604_bus_device::refresh_timer_control_w)
{
COMBINE_DATA(&m_rtcsr);
if(m_rtcsr & 0x40)
throw emu_fatalerror("%s: enabled timer irq register with clock setting = %02x\n",tag(),data & 0x38);
}
@ -101,7 +101,7 @@ static ADDRESS_MAP_START( bus_regs, AS_0, 16, sh7604_bus_device )
AM_RANGE(0x08, 0x09) AM_READWRITE(refresh_timer_status_r, refresh_timer_control_w)
AM_RANGE(0x0a, 0x0b) AM_READWRITE(refresh_timer_counter_r, refresh_timer_counter_w)
AM_RANGE(0x0c, 0x0d) AM_READWRITE(refresh_timer_constant_r, refresh_timer_constant_w)
// AM_RANGE(0x0e, 0x0f) unmapped, mirror?
// AM_RANGE(0x0e, 0x0f) unmapped, mirror?
ADDRESS_MAP_END
//-------------------------------------------------
@ -165,6 +165,6 @@ WRITE32_MEMBER( sh7604_bus_device::write )
if((data & 0xffff0000) != 0xa55a0000)
throw emu_fatalerror("%s: making bus write with ID signature = %04x!\n", tag(),data >> 16);
}
space.write_word(offset,data & 0xffff);
}

8
src/devices/cpu/sh2/sh7604_bus.h
View File

@ -27,12 +27,12 @@
// ======================> sh7604_bus_device
class sh7604_bus_device : public device_t,
public device_memory_interface
public device_memory_interface
{
public:
// construction/destruction
sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O operations
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( read );
@ -61,12 +61,12 @@ protected:
private:
bool m_is_slave;
const address_space_config m_space_config;
uint16_t m_bcr1;
uint16_t m_bcr2;
uint16_t m_wcr;
uint16_t m_mcr;
uint16_t m_rtcsr;
uint16_t m_rtcsr;
uint16_t m_rtcor;
};

4
src/devices/cpu/sh2/sh7604_sci.cpp
View File

@ -37,7 +37,7 @@ READ8_MEMBER(sh7604_sci_device::serial_mode_r)
WRITE8_MEMBER(sh7604_sci_device::serial_mode_w)
{
m_smr = data;
logerror("%s: serial mode set:\n",tag());
logerror("\tCommunication Mode: %s mode\n",data & 0x80 ? "clocked synchronous" : "asynchronous");
logerror("\tCharacter Length: %s mode\n",data & 0x40 ? "7-bit" : "8-bit");
@ -56,7 +56,7 @@ READ8_MEMBER(sh7604_sci_device::serial_control_r)
WRITE8_MEMBER(sh7604_sci_device::serial_control_w)
{
m_scr = data;
if(data & 0x30)
throw emu_fatalerror("%s: enabled serial control %02x\n", tag(),data);
}

6
src/devices/cpu/sh2/sh7604_sci.h
View File

@ -38,7 +38,7 @@ enum {
// ======================> sh7604_sci_device
class sh7604_sci_device : public device_t,
public device_memory_interface
public device_memory_interface
{
public:
// construction/destruction
@ -47,7 +47,7 @@ public:
// I/O operations
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( read );
DECLARE_READ8_MEMBER( serial_mode_r );
DECLARE_WRITE8_MEMBER( serial_mode_w );
DECLARE_READ8_MEMBER( bitrate_r );
@ -64,7 +64,7 @@ public:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
// virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
virtual void device_reset() override;
private:

10
src/devices/cpu/sh2/sh7604_wdt.cpp
View File

@ -3,7 +3,7 @@
/***************************************************************************
SH7604 Watchdog Timer Controller
TODO:
- Host CPU setter (clock and callback for irq and reset lines);
- memory map (needs to verify if ID write is ok);
@ -28,10 +28,10 @@ const device_type SH7604_WDT = &device_creator<sh7604_wdt_device>;
//**************************************************************************
static ADDRESS_MAP_START( wdt_regs, AS_0, 8, sh7604_wdt_device )
// AM_RANGE(0x00, 0x00) timer control/status
// AM_RANGE(0x01, 0x01) timer counter
// AM_RANGE(0x02, 0x02) write only, reset control register
// AM_RANGE(0x03, 0x03) read status register, write reset status register
// AM_RANGE(0x00, 0x00) timer control/status
// AM_RANGE(0x01, 0x01) timer counter
// AM_RANGE(0x02, 0x02) write only, reset control register
// AM_RANGE(0x03, 0x03) read status register, write reset status register
ADDRESS_MAP_END
//-------------------------------------------------

4
src/devices/cpu/sh2/sh7604_wdt.h
View File

@ -27,7 +27,7 @@
// ======================> sh7604_wdt_device
class sh7604_wdt_device : public device_t,
public device_memory_interface
public device_memory_interface
{
public:
// construction/destruction
@ -40,7 +40,7 @@ public:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
// virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
virtual void device_reset() override;
private:

2
src/devices/cpu/z80/z80.cpp
View File

@ -3617,7 +3617,7 @@ void z80_device::state_import( const device_state_entry &entry )
case STATE_GENPC:
m_prvpc = m_pc;
break;
case STATE_GENPCBASE:
m_pc = m_prvpc;
break;

4
src/devices/machine/aicartc.cpp
View File

@ -70,10 +70,10 @@ void aicartc_device::rtc_clock_updated(int year, int month, int day, int day_of_
// put the minutes
current_time += minute * 60;
// put the hours
current_time += hour * 60 * 60;
// put the days (note -1) */
current_time += (day - 1) * 60 * 60 * 24;

26
src/devices/machine/ds1386.cpp
View File

@ -4,27 +4,27 @@
Dallas DS1386/DS1386P RAMified Watchdog Timekeeper
Note: Largely untested.
Note: Largely untested.
**********************************************************************/
#include "ds1386.h"
#include "machine/timehelp.h"
#define DISABLE_OSC (0x80)
#define DISABLE_SQW (0x40)
#define DISABLE_OSC (0x80)
#define DISABLE_SQW (0x40)
#define COMMAND_TE (0x80)
#define COMMAND_IPSW (0x40)
#define COMMAND_IBH_LO (0x20)
#define COMMAND_PU_LVL (0x10)
#define COMMAND_WAM (0x08)
#define COMMAND_TDM (0x04)
#define COMMAND_WAF (0x02)
#define COMMAND_TDF (0x01)
#define COMMAND_TE (0x80)
#define COMMAND_IPSW (0x40)
#define COMMAND_IBH_LO (0x20)
#define COMMAND_PU_LVL (0x10)
#define COMMAND_WAM (0x08)
#define COMMAND_TDM (0x04)
#define COMMAND_WAF (0x02)
#define COMMAND_TDF (0x01)
#define HOURS_12_24 (0x40)
#define HOURS_AM_PM (0x20)
#define HOURS_12_24 (0x40)
#define HOURS_AM_PM (0x20)
const device_type DS1386_8K = &device_creator<ds1386_8k_device>;
const device_type DS1386_32K = &device_creator<ds1386_32k_device>;

100
src/devices/machine/ds1386.h
View File

@ -6,46 +6,46 @@
***********************************************************************
_____________
/INTA 1 | | 32 Vcc
/INTB 2 | | 31 SQW
/INTA 1 | | 32 Vcc
/INTB 2 | | 31 SQW
NC/A14 3 | | 30 Vcc
A12 4 | | 29 /WE
A7 5 | | 28 NC/A13
A6 6 | | 27 A8
A5 7 | | 26 A9
A4 8 | | 25 A11
A3 9 | | 24 /OE
A2 10 | | 23 A10
A1 11 | | 22 /CE
A0 12 | | 21 DQ7
DQ0 13 | | 20 DQ6
DQ1 14 | | 19 DQ5
DQ2 15 | | 18 DQ4
GND 16 |_____________| 17 DQ3
A12 4 | | 29 /WE
A7 5 | | 28 NC/A13
A6 6 | | 27 A8
A5 7 | | 26 A9
A4 8 | | 25 A11
A3 9 | | 24 /OE
A2 10 | | 23 A10
A1 11 | | 22 /CE
A0 12 | | 21 DQ7
DQ0 13 | | 20 DQ6
DQ1 14 | | 19 DQ5
DQ2 15 | | 18 DQ4
GND 16 |_____________| 17 DQ3
DS1386 8k/32k x 8
__________________________________
/ |
/ |
/INTB | 1 34 | /INTA
NC | 2 33 | SQW
NC | 3 32 | NC/A13
/PFO | 4 31 | NC/A14
Vcc | 5 30 | A12
/WE | 6 29 | A11
/OE | 7 28 | A10
/CE | 8 27 | A9
DQ7 | 9 26 | A8
DQ6 | 10 25 | A7
DQ5 | 11 24 | A6
DQ4 | 12 23 | A5
DQ3 | 13 22 | A4
DQ2 | 14 X1 GND Vbat X2 21 | A3
DQ1 | 15 ____ ____ ____ ____ 20 | A2
DQ0 | 16 | | | | | | | | 19 | A1
GND | 17 |____| |____| |____| |____| 18 | A0
|____________________________________|
__________________________________
/ |
/ |
/INTB | 1 34 | /INTA
NC | 2 33 | SQW
NC | 3 32 | NC/A13
/PFO | 4 31 | NC/A14
Vcc | 5 30 | A12
/WE | 6 29 | A11
/OE | 7 28 | A10
/CE | 8 27 | A9
DQ7 | 9 26 | A8
DQ6 | 10 25 | A7
DQ5 | 11 24 | A6
DQ4 | 12 23 | A5
DQ3 | 13 22 | A4
DQ2 | 14 X1 GND Vbat X2 21 | A3
DQ1 | 15 ____ ____ ____ ____ 20 | A2
DQ0 | 16 | | | | | | | | 19 | A1
GND | 17 |____| |____| |____| |____| 18 | A0
|____________________________________|
DS1386 8k/32k x 8, 34-Pin PowerCap Module Board
@ -117,10 +117,10 @@ protected:
enum
{
ALARM_DAYS_MATCH = 0x0,
ALARM_HOURS_MATCH = 0x1,
ALARM_DAYS_MATCH = 0x0,
ALARM_HOURS_MATCH = 0x1,
ALARM_MINUTES_MATCH = 0x3,
ALARM_PER_MINUTE = 0x7
ALARM_PER_MINUTE = 0x7
};
// device-level overrides
@ -174,17 +174,17 @@ protected:
std::unique_ptr<uint8_t[]> m_ram;
optional_region_ptr<uint8_t> m_default_data;
uint8_t m_hundredths;
uint8_t m_seconds;
uint8_t m_minutes;
uint8_t m_minutes_alarm;
uint8_t m_hours;
uint8_t m_hours_alarm;
uint8_t m_days;
uint8_t m_days_alarm;
uint8_t m_date;
uint8_t m_months_enables;
uint8_t m_years;
uint8_t m_hundredths;
uint8_t m_seconds;
uint8_t m_minutes;
uint8_t m_minutes_alarm;
uint8_t m_hours;
uint8_t m_hours_alarm;
uint8_t m_days;
uint8_t m_days_alarm;
uint8_t m_date;
uint8_t m_months_enables;
uint8_t m_years;
const size_t m_ram_size;
};

6
src/devices/machine/timehelp.h
View File

@ -2,9 +2,9 @@
// copyright-holders:Aaron Giles,smf
/***************************************************************************
timehelp.h
timehelp.h
Assorted shared functionality between timekeeping chips and RTCs.
Assorted shared functionality between timekeeping chips and RTCs.
***************************************************************************/
@ -48,4 +48,4 @@ public:
};
#endif // SRC_DEVICES_MACHINE_TIMEHELP_H
#endif // SRC_DEVICES_MACHINE_TIMEHELP_H

24
src/devices/machine/z80scc.cpp
View File

@ -567,7 +567,7 @@ READ8_MEMBER( z80scc_device::zbus_r )
return data;
}
switch ((m_chanB->m_wr0) & 7)
switch ((m_chanB->m_wr0) & 7)
{
case z80scc_channel::WR0_Z_SEL_SHFT_LEFT: ba = offset & 0x01; reg = (offset >> 1) & 0x0f; break; /* Shift Left mode */
case z80scc_channel::WR0_Z_SEL_SHFT_RIGHT: ba = offset & 0x10; reg = (offset >> 1) & 0x0f; break; /* Shift Right mode */
@ -600,7 +600,7 @@ WRITE8_MEMBER( z80scc_device::zbus_w )
return;
}
switch ((m_chanB->m_wr0) & 7)
switch ((m_chanB->m_wr0) & 7)
{
case z80scc_channel::WR0_Z_SEL_SHFT_LEFT: ba = offset & 0x01; reg = (offset >> 1) & 0x0f; break; /* Shift Left mode */
case z80scc_channel::WR0_Z_SEL_SHFT_RIGHT: ba = offset & 0x10; reg = (offset >> 1) & 0x0f; break; /* Shift Right mode */
@ -926,7 +926,7 @@ void z80scc_channel::device_reset()
m_rr3 = 0x00;
m_rr10 &= 0x40;
// reset external lines
// reset external lines
set_rts(m_wr5 & WR5_RTS ? 0 : 1);
set_dtr(m_wr14 & WR14_DTR_REQ_FUNC ? 0 : (m_wr5 & WR5_DTR ? 0 : 1));
@ -1036,7 +1036,7 @@ void z80scc_channel::tra_complete()
if ( (m_rr0 & RR0_TX_BUFFER_EMPTY) == 0 || // Takes care of the NMOS/CMOS 1 slot TX FIFO
m_tx_fifo_rp != m_tx_fifo_wp) // or there are more characters to send in a longer FIFO.
{
LOGTX((" %s() %s %c done sending, loading data from fifo:%02x '%c'\n", FUNCNAME, m_owner->tag(), 'A' + m_index,
LOGTX((" %s() %s %c done sending, loading data from fifo:%02x '%c'\n", FUNCNAME, m_owner->tag(), 'A' + m_index,
m_tx_data_fifo[m_tx_fifo_rp], isascii(m_tx_data_fifo[m_tx_fifo_rp]) ? m_tx_data_fifo[m_tx_fifo_rp] : ' '));
transmit_register_setup(m_tx_data_fifo[m_tx_fifo_rp]); // Reload the shift register
m_tx_fifo_rp_step();
@ -1054,7 +1054,7 @@ void z80scc_channel::tra_complete()
if (m_wr1 & WR1_TX_INT_ENABLE)
{
if ((m_uart->m_variant & SET_ESCC) &&
if ((m_uart->m_variant & SET_ESCC) &&
(m_wr7p & WR7P_TX_FIFO_EMPTY) &&
m_tx_fifo_wp == m_tx_fifo_rp) // ESCC and fifo empty bit set and fifo is completelly empty?
{
@ -1458,22 +1458,22 @@ uint8_t z80scc_channel::do_sccreg_rr15()
//-------------------------------------------------
uint8_t z80scc_channel::scc_register_read( uint8_t reg)
{
if (reg > 1)
if (reg > 1)
LOG(("%s %02x\n", FUNCNAME, reg));
uint8_t data = 0;
uint8_t wreg = 0;
/* Sort out 80X30 limitations in register access */
// if ((BIT(m_wr15, 2) == 0) || m_uart->m_variant == z80scc_device::TYPE_SCC8030)
// if ((BIT(m_wr15, 2) == 0) || m_uart->m_variant == z80scc_device::TYPE_SCC8030)
if (BIT(m_wr15, 2) == 0 || m_uart->m_variant & SET_NMOS)
{
if (reg > 3 && reg < 8) reg &= 0x03;
else if (reg == 9) reg = 13;
else if (reg == 11) reg = 15;
}
else if (BIT(m_wr15, 2) != 0)
else if (BIT(m_wr15, 2) != 0)
{
// if (m_uart->variant == z80scc_device::TYPE_SCC80230 && BIT(m_wr7p, 6) != 0)
// if (m_uart->variant == z80scc_device::TYPE_SCC80230 && BIT(m_wr7p, 6) != 0)
if (m_uart->m_variant & SET_ESCC && BIT(m_wr7p, 6) != 0)
{
if (reg > 3 && reg < 6) wreg = 1;
@ -1754,7 +1754,7 @@ void z80scc_channel::do_sccreg_wr5(uint8_t data)
}
else
{
// uint8_t old_wr5 = m_wr5;
// uint8_t old_wr5 = m_wr5;
m_wr5 = data;
LOG(("- Transmitter Enable %u\n", (data & WR5_TX_ENABLE) ? 1 : 0));
LOG(("- Transmitter Bits/Character %u\n", get_tx_word_length()));
@ -2265,7 +2265,7 @@ void z80scc_channel::data_write(uint8_t data)
// Check FIFO fullness and set TBE bit accordingly
if (m_tx_fifo_sz == 1)
{
m_rr0 &= ~RR0_TX_BUFFER_EMPTY; // If only one FIFO position it is full now!
m_rr0 &= ~RR0_TX_BUFFER_EMPTY; // If only one FIFO position it is full now!
}
else if (m_tx_fifo_wp + 1 == m_tx_fifo_rp || ( (m_tx_fifo_wp + 1 == m_tx_fifo_sz) && (m_tx_fifo_rp == 0) ))
{
@ -2295,7 +2295,7 @@ void z80scc_channel::data_write(uint8_t data)
// check if to fire interrupt
if (m_wr1 & WR1_TX_INT_ENABLE)
{
if ((m_uart->m_variant & SET_ESCC) &&
if ((m_uart->m_variant & SET_ESCC) &&
(m_wr7p & WR7P_TX_FIFO_EMPTY) &&
m_tx_fifo_wp == m_tx_fifo_rp) // ESCC and fifo empty bit set and fifo is completelly empty?
{

26
src/devices/machine/z80scc.h
View File

@ -169,7 +169,7 @@ public:
uint8_t do_sccreg_rr5();
uint8_t do_sccreg_rr6();
uint8_t do_sccreg_rr7();
uint8_t do_sccreg_rr7p(){ return 0; } // Needs to be implemented for Synchronous mode
uint8_t do_sccreg_rr7p(){ return 0; } // Needs to be implemented for Synchronous mode
// uint8_t do_sccreg_rr8(); Short cutted due to frequent use
uint8_t do_sccreg_rr9();
uint8_t do_sccreg_rr10();
@ -189,7 +189,7 @@ public:
void do_sccreg_wr5(uint8_t data);
void do_sccreg_wr6(uint8_t data);
void do_sccreg_wr7(uint8_t data);
void do_sccreg_wr7p(uint8_t data){}; // Needs to be implemented for Synchronous mode
void do_sccreg_wr7p(uint8_t data){}; // Needs to be implemented for Synchronous mode
void do_sccreg_wr8(uint8_t data);
void do_sccreg_wr9(uint8_t data);
void do_sccreg_wr10(uint8_t data);
@ -250,9 +250,9 @@ public:
uint8_t m_wr5; // REG_WR5_TX_CONTROL
uint8_t m_wr6; // REG_WR6_SYNC_OR_SDLC_A
uint8_t m_wr7; // REG_WR7_SYNC_OR_SDLC_F
uint8_t m_wr7p; //
uint8_t m_wr7p; //
uint8_t m_wr8; // REG_WR8_TRANSMIT_DATA
// uint8_t m_wr9; // REG_WR9_MASTER_INT_CTRL
// uint8_t m_wr9; // REG_WR9_MASTER_INT_CTRL
uint8_t m_wr10; // REG_WR10_MSC_RX_TX_CTRL
uint8_t m_wr11; // REG_WR11_CLOCK_MODES
uint8_t m_wr12; // REG_WR12_LO_BAUD_GEN
@ -521,14 +521,14 @@ protected:
enum
{
WR15_WR7PRIME = 0x01,
WR15_ZEROCOUNT = 0x02,
WR15_STATUS_FIFO = 0x04,
WR15_DCD = 0x08,
WR15_SYNC = 0x10,
WR15_CTS = 0x20,
WR15_TX_EOM = 0x40,
WR15_BREAK_ABORT = 0x80
WR15_WR7PRIME = 0x01,
WR15_ZEROCOUNT = 0x02,
WR15_STATUS_FIFO = 0x04,
WR15_DCD = 0x08,
WR15_SYNC = 0x10,
WR15_CTS = 0x20,
WR15_TX_EOM = 0x40,
WR15_BREAK_ABORT = 0x80
};
enum
@ -587,7 +587,7 @@ protected:
int m_tx_fifo_wp; // FIFO write pointer
int m_tx_fifo_sz; // FIFO size
uint8_t m_tx_error; // current error
// uint8_t m_tx_data; // transmit data register
// uint8_t m_tx_data; // transmit data register
int m_tx_clock; // transmit clock pulse count
int m_dtr; // data terminal ready

4
src/devices/sound/dac.cpp
View File

@ -6,9 +6,9 @@
Four quadrant multiplying DAC.
Binary Weighted Resistor Network, R-2R Ladder & PWM
Binary Weighted Resistor Network, R-2R Ladder & PWM
Binary, Ones Complement, Twos Complement or Sign Magnitude coding
Binary, Ones Complement, Twos Complement or Sign Magnitude coding
***************************************************************************/

12
src/devices/sound/gb.cpp
View File

@ -1008,7 +1008,7 @@ void gameboy_sound_device::sound_w_internal( int offset, uint8_t data )
}
if (m_snd_3.length == 0 && m_snd_3.length_enabled && !(m_snd_control.cycles & FRAME_CYCLES))
{
{
tick_length(m_snd_3);
}
}
@ -1072,7 +1072,7 @@ void gameboy_sound_device::sound_w_internal( int offset, uint8_t data )
}
if (m_snd_4.length == 0 && m_snd_4.length_enabled && !(m_snd_control.cycles & FRAME_CYCLES))
{
{
tick_length(m_snd_4);
}
}
@ -1162,8 +1162,8 @@ void dmg_apu_device::apu_power_off()
}
void cgb04_apu_device::apu_power_off()
{
void cgb04_apu_device::apu_power_off()
{
sound_w_internal(NR10, 0x00);
m_snd_1.duty = 0;
sound_w_internal(NR11, 0x00);
@ -1172,13 +1172,13 @@ void cgb04_apu_device::apu_power_off()
sound_w_internal(NR14, 0x00);
m_snd_1.length_counting = false;
m_snd_1.sweep_neg_mode_used = false;
sound_w_internal(NR21, 0x00);
sound_w_internal(NR22, 0x00);
sound_w_internal(NR23, 0x00);
sound_w_internal(NR24, 0x00);
m_snd_2.length_counting = false;
sound_w_internal(NR30, 0x00);
sound_w_internal(NR31, 0x00);
sound_w_internal(NR32, 0x00);

22
src/devices/video/gb_lcd.cpp
View File

@ -19,7 +19,7 @@ no sprites being displayed. If sprites are displayed then the timing of mode
3 and mode 0 will change.
* LCD turn on for a DMG (on a CGB the timing is a little bit different)
our state LY Mode #Cycles
our state LY Mode #Cycles
(GB_LCD_STATE_LY00_M2) 0 0 80 (?) The unit is actually in mode 0 here and the OAM area is unlocked
GB_LCD_STATE_LYXX_M3 0 3 169-172 Draw line 0 during this period
- Lock OAM area
@ -868,7 +868,7 @@ LOG(("scrollx_to_apply: %u\n", m_line.scrollx_to_apply));
{
// Interleave bits from plane0 and plane1
m_line.shift_register = (((((m_line.plane0 * U64(0x0101010101010101)) & U64(0x8040201008040201)) * U64(0x0102040810204081)) >> 49) & 0x5555)
| (((((m_line.plane1 * U64(0x0101010101010101)) & U64(0x8040201008040201)) * U64(0x0102040810204081)) >> 48) & 0xAAAA);
| (((((m_line.plane1 * U64(0x0101010101010101)) & U64(0x8040201008040201)) * U64(0x0102040810204081)) >> 48) & 0xAAAA);
}
if (m_line.pixels_drawn < 8)
{
@ -1961,12 +1961,12 @@ void dmg_ppu_device::update_oam_dma_state(uint64_t cycles)
}
if (m_oam_dma_start_cycles > 0)
{
{
if (cycles >= m_oam_dma_start_cycles)
{
for (int i = 0; i < 0xA0; i++)
{
m_oam[i] = m_program_space->read_byte(m_oam_dma_source_address + i);
m_oam[i] = m_program_space->read_byte(m_oam_dma_source_address + i);
}
m_oam_dma_start_cycles = 0;
@ -2161,7 +2161,7 @@ void dmg_ppu_device::update_state()
m_next_state = GB_LCD_STATE_LYXX_M3;
clear_line_state();
select_sprites();
// if (!m_enable_experimental_engine)
// if (!m_enable_experimental_engine)
{
m_window_y = WNDPOSY;
}
@ -2507,17 +2507,17 @@ void cgb_ppu_device::update_state()
LOG(("m_cycles_left = %d, cycles = %d, m_next_state = %s\n", m_cycles_left, cycles, state_to_string(m_next_state)));
if (m_cycles_left > 0)
{
{
if (cycles >= m_cycles_left) {
cycles -= m_cycles_left;
m_cycles_left = 0;
}
}
else
{
{
m_cycles_left -= cycles;
cycles = 0;
}
}
}
}
while (m_cycles_left == 0)
{
@ -3262,7 +3262,7 @@ bool cgb_ppu_device::stat_write(uint8_t new_data)
}
m_stat_mode1_int = (new_data & MODE_1_INT_ENABLED) ? true : false;
break;
case 2:
case 2:
// 0x20 -> 0x40 with LYC -> trigger
//m_stat_mode2_int = (new_data & MODE_2_INT_ENABLED) ? true : false;
if (LCDSTAT & MODE_2_INT_ENABLED)

42
src/devices/video/zeus2.cpp
View File

@ -1071,7 +1071,7 @@ void zeus2_device::zeus2_draw_model(uint32_t baseaddr, uint16_t count, int logit
if (logit)
{
//if ((cmd == 0x38) || (cmd == 0x2d))
// log_render_info(texdata);
// log_render_info(texdata);
if (cmd != 0x00 || (cmd == 0x00 && curoffs == count)) {
logerror("\t");
for (int offs = 0; offs < databufcount; offs++)
@ -1120,24 +1120,24 @@ void zeus2_device::zeus2_draw_model(uint32_t baseaddr, uint16_t count, int logit
// Direct commands from waveram buffer
//uint32_t cmdData[2];
//for (int subIndex = 0; subIndex < 2; ++subIndex) {
// uint32_t offset = (databuffer[subIndex] & 0xff) * 6;
// //printf("directRead curoffs: 0x%X\n", curoffs);
// for (int cmdIndex = 0; cmdIndex < 3; ++cmdIndex) {
// cmdData[0] = m_directCmd[offset + cmdIndex * 2 + 0];
// cmdData[1] = m_directCmd[offset + cmdIndex * 2 + 1];
// if (curoffs < 0x40)
// printf("directRead curoffs: 0x%X cmdData %08X %08X\n", curoffs, cmdData[0], cmdData[1]);
// if (cmdData[0] != 0 && cmdData[1] != 0) {
// // Error check
// if (cmdData[0] != 0x58 && cmdData[0] != 0x5A) {
// if (curoffs < 0x20)
// printf("case38 error curoffs: 0x%X cmdData %08X %08X\n", curoffs, cmdData[0], cmdData[1]);
// }
// else {
// zeus2_register32_w(cmdData[0] & 0x7f, cmdData[1], logit);
// }
// }
// }
// uint32_t offset = (databuffer[subIndex] & 0xff) * 6;
// //printf("directRead curoffs: 0x%X\n", curoffs);
// for (int cmdIndex = 0; cmdIndex < 3; ++cmdIndex) {
// cmdData[0] = m_directCmd[offset + cmdIndex * 2 + 0];
// cmdData[1] = m_directCmd[offset + cmdIndex * 2 + 1];
// if (curoffs < 0x40)
// printf("directRead curoffs: 0x%X cmdData %08X %08X\n", curoffs, cmdData[0], cmdData[1]);
// if (cmdData[0] != 0 && cmdData[1] != 0) {
// // Error check
// if (cmdData[0] != 0x58 && cmdData[0] != 0x5A) {
// if (curoffs < 0x20)
// printf("case38 error curoffs: 0x%X cmdData %08X %08X\n", curoffs, cmdData[0], cmdData[1]);
// }
// else {
// zeus2_register32_w(cmdData[0] & 0x7f, cmdData[1], logit);
// }
// }
// }
//}
//void *palbase = waveram0_ptr_from_expanded_addr(m_zeusbase[0x41]);
//uint8_t texel = databuffer[0];
@ -1153,8 +1153,8 @@ void zeus2_device::zeus2_draw_model(uint32_t baseaddr, uint16_t count, int logit
//m_frameDepth[m_renderAddr] = 0;
//m_frameColor[m_renderAddr++] = databuffer[1] & 0x00ffffff;
//if (logit)
// if ((curoffs + 1) % 16 == 0)
// logerror("\n");
// if ((curoffs + 1) % 16 == 0)
// logerror("\n");
}
else {
poly->zeus2_draw_quad(databuffer, texdata, logit);

2
src/emu/gamedrv.h
View File

@ -48,7 +48,7 @@ const uint32_t MACHINE_IS_INCOMPLETE = 0x01000000; // any official
const uint32_t MACHINE_NODEVICE_MICROPHONE = 0x02000000; // any game/system that has unemulated recording voice device peripheral
const uint32_t MACHINE_NODEVICE_CAMERA = 0x04000000; // any game/system that has unemulated capturing image device peripheral
const uint32_t MACHINE_NODEVICE_PRINTER = 0x08000000; // any game/system that has unemulated grabbing of screen content device
const uint32_t MACHINE_NODEVICE_LAN = 0x10000000; // any game/system that has unemulated multi-linking capability
const uint32_t MACHINE_NODEVICE_LAN = 0x10000000; // any game/system that has unemulated multi-linking capability
const uint32_t MACHINE_NODEVICE_WAN = 0x20000000; // any game/system that has unemulated networking capability
// useful combinations of flags

10
src/frontend/mame/console.cpp
View File

@ -45,9 +45,9 @@ console_frontend::~console_frontend()
void console_frontend::completion(char const* prefix, linenoiseCompletions* lc)
{
for (auto cmd : m_commands)
for (auto cmd : m_commands)
{
if (strncmp(prefix, cmd.first.c_str(), strlen(prefix)) == 0)
if (strncmp(prefix, cmd.first.c_str(), strlen(prefix)) == 0)
{
linenoiseAddCompletion(lc, cmd.first.c_str());
}
@ -68,7 +68,7 @@ void console_frontend::read_console(std::string &cmdLine)
while (m_wait.load())
{
using namespace std::chrono_literals;
std::this_thread::sleep_for(100ms);
std::this_thread::sleep_for(100ms);
}
if (!m_run.load()) break;
char* result = linenoise(m_prompt.c_str());
@ -89,7 +89,7 @@ void console_frontend::read_console(std::string &cmdLine)
}
}
void console_frontend::split_command(std::vector<std::string>& arg, std::string command)
void console_frontend::split_command(std::vector<std::string>& arg, std::string command)
{
int len = command.length();
bool qot = false, sqot = false;
@ -152,7 +152,7 @@ void console_frontend::start_console()
printf("\n");
printf("%s v%s\n%s\n\n", emulator_info::get_appname(), build_version, emulator_info::get_copyright_info());
std::thread cinThread(&console_frontend::read_console, this, std::ref(cmdLine));
while (m_run.load())

4
src/frontend/mame/console.h
View File

@ -25,7 +25,7 @@ public:
void start_console();
void completion(char const* prefix, linenoiseCompletions* lc);
private:
void read_console(std::string &cmdLine);
void split_command(std::vector<std::string>& arg, std::string command);
@ -36,7 +36,7 @@ private:
//osd_interface & m_osd;
std::atomic<bool> m_run;
std::atomic<bool> m_wait;
std::string m_prompt;
std::string m_prompt;
std::unordered_map<std::string, std::function<void(std::vector<std::string>& arg)>> m_commands;
};

2
src/frontend/mame/mame.cpp
View File

@ -178,7 +178,7 @@ int mame_machine_manager::execute()
// loop across multiple hard resets
bool exit_pending = false;
int error = EMU_ERR_NONE;
while (error == EMU_ERR_NONE && !exit_pending)
{
m_new_driver_pending = nullptr;

22
src/frontend/mame/ui/info.cpp
View File

@ -120,26 +120,26 @@ std::string machine_info::warnings_string()
}
if (m_machine.system().flags & MACHINE_NODEVICE_MICROPHONE )
buf << _("This machine has unemulated microphone device.\n");
buf << _("This machine has unemulated microphone device.\n");
if (m_machine.system().flags & MACHINE_NODEVICE_CAMERA )
buf << _("This machine has unemulated camera device.\n");
buf << _("This machine has unemulated camera device.\n");
if (m_machine.system().flags & MACHINE_NODEVICE_PRINTER )
buf << _("This machine has unemulated printer device.\n");
buf << _("This machine has unemulated printer device.\n");
if (m_machine.system().flags & MACHINE_NODEVICE_LAN )
buf << _("This machine has unemulated linking capabilities.\n");
buf << _("This machine has unemulated linking capabilities.\n");
if (m_machine.system().flags & MACHINE_NODEVICE_WAN )
buf << _("This machine has unemulated networking capabilities.\n");
buf << _("This machine has unemulated networking capabilities.\n");
if (m_machine.system().flags & MACHINE_NO_SOUND_HW )
{
buf << _("This machine has no sound hardware, MAME will produce no sounds, this is expected behaviour.\n");
}
// if there's a NOT WORKING, UNEMULATED PROTECTION or GAME MECHANICAL warning, make it stronger
if (m_machine.system().flags & (MACHINE_FATAL_FLAGS))
{

32
src/mame/drivers/akaiax80.cpp
View File

@ -8,19 +8,19 @@
ROMs provided by Arashikage
Hardware:
CPU: uPD7811 with internal ROM
Other H/W: 8253 PIT (x6), 8255 PPI (x2), 8279 keyboard/display controller
Voices (x8):
NJM4558D sawtooth generator (x2)
TC4011BP wave shaper
TC4013 sub oscillator
CEM 3372 VCA/VCF
Final out:
TL082CP low-pass filter
CPU: uPD7811 with internal ROM
Other H/W: 8253 PIT (x6), 8255 PPI (x2), 8279 keyboard/display controller
Voices (x8):
NJM4558D sawtooth generator (x2)
TC4011BP wave shaper
TC4013 sub oscillator
CEM 3372 VCA/VCF
Final out:
TL082CP low-pass filter
Service manual incl. schematics at:
https://archive.org/download/AkaiAX80ServiceManual/Akai%20AX80%20Service%20Manual.pdf
https://archive.org/download/AkaiAX80ServiceManual/Akai%20AX80%20Service%20Manual.pdf
****************************************************************************/
#include "emu.h"
@ -57,7 +57,7 @@ void ax80_state::machine_reset()
}
static ADDRESS_MAP_START( ax80_map, AS_PROGRAM, 8, ax80_state )
AM_RANGE(0x0000, 0x0fff) AM_ROM AM_REGION("maincpu", 0) // internal ROM
AM_RANGE(0x0000, 0x0fff) AM_ROM AM_REGION("maincpu", 0) // internal ROM
AM_RANGE(0x1000, 0x1003) AM_DEVREADWRITE(PIT0_TAG, pit8253_device, read, write)
AM_RANGE(0x1010, 0x1013) AM_DEVREADWRITE(PIT1_TAG, pit8253_device, read, write)
AM_RANGE(0x1020, 0x1023) AM_DEVREADWRITE(PIT2_TAG, pit8253_device, read, write)
@ -66,7 +66,7 @@ static ADDRESS_MAP_START( ax80_map, AS_PROGRAM, 8, ax80_state )
AM_RANGE(0x1050, 0x1053) AM_DEVREADWRITE(PIT5_TAG, pit8253_device, read, write)
AM_RANGE(0x1060, 0x1063) AM_DEVREADWRITE(PPI0_TAG, i8255_device, read, write)
AM_RANGE(0x1070, 0x1073) AM_DEVREADWRITE(PPI1_TAG, i8255_device, read, write)
AM_RANGE(0x4000, 0x5fff) AM_ROM AM_REGION("maincpu", 0x1000) // external program EPROM
AM_RANGE(0x4000, 0x5fff) AM_ROM AM_REGION("maincpu", 0x1000) // external program EPROM
AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xff00, 0xffff) AM_RAM
ADDRESS_MAP_END
@ -96,9 +96,9 @@ INPUT_PORTS_END
ROM_START( ax80 )
ROM_REGION(0x3000, "maincpu", 0)
// CPU internal mask
ROM_LOAD( "akai ax80 main cpu mask rom.bin", 0x000000, 0x001000, CRC(241c078f) SHA1(7f5d0d718f2d03ec446568ae440beaff0aac6bfd) )
ROM_LOAD( "akai ax80 main cpu mask rom.bin", 0x000000, 0x001000, CRC(241c078f) SHA1(7f5d0d718f2d03ec446568ae440beaff0aac6bfd) )
// external program EPROM
ROM_LOAD( "akai ax80 (rev k) rom.bin", 0x001000, 0x002000, CRC(a2f95ccf) SHA1(4e5f2c4c9a08ec1d38146cae786b400261a3dbb7) )
ROM_LOAD( "akai ax80 (rev k) rom.bin", 0x001000, 0x002000, CRC(a2f95ccf) SHA1(4e5f2c4c9a08ec1d38146cae786b400261a3dbb7) )
ROM_END
CONS( 1984, ax80, 0, 0, ax80, ax80, driver_device, 0, "Akai", "AX80", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )

48
src/mame/drivers/anzterm.cpp
View File

@ -371,25 +371,25 @@ public:
gfx_layout const screenfont =
{
8, 16, // 8x8
RGN_FRAC(1, 1), // whole region
1, // 1bpp
{ 0 }, // bitplane offset
{ 0*1, 1*1, 2*1, 3*1, 4*1, 5*1, 6*1, 7*1 }, // x offsets
8, 16, // 8x8
RGN_FRAC(1, 1), // whole region
1, // 1bpp
{ 0 }, // bitplane offset
{ 0*1, 1*1, 2*1, 3*1, 4*1, 5*1, 6*1, 7*1 }, // x offsets
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, // y offsets
128 // stride
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, // y offsets
128 // stride
};
gfx_layout const printfont =
{
8, 8, // 7x8
RGN_FRAC(1, 1), // whole region
1, // 1bpp
{ 0 }, // bitplane offset
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, // x offsets
{ 7*1, 6*1, 5*1, 4*1, 3*1, 2*1, 1*1, 0*1 }, // y offsets
64 // stride
8, 8, // 7x8
RGN_FRAC(1, 1), // whole region
1, // 1bpp
{ 0 }, // bitplane offset
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, // x offsets
{ 7*1, 6*1, 5*1, 4*1, 3*1, 2*1, 1*1, 0*1 }, // y offsets
64 // stride
};
GFXDECODE_START( anzterm )
@ -464,17 +464,17 @@ ROM_START( anzterm )
ROM_LOAD( "ck-a-pr01.ic4", 0x0000, 0x0800, CRC(d0981882) SHA1(b55fd313c9b3e00039501a53a53c820d98f2258a) )
ROM_LOAD( "ck-b-pr01.ic3", 0x0000, 0x0800, CRC(96c9d90d) SHA1(400980c7a2c5306be28b74284c626ef2ed24c1a5) )
// Undumped microcontroller ROM in MICR reader
ROM_REGION( 0x0fc0, "micrmcu", 0 )
ROM_LOAD( "mk3870.u14", 0x0000, 0x0fc0, NO_DUMP )
// Undumped microcontroller ROM in MICR reader
ROM_REGION( 0x0fc0, "micrmcu", 0 )
ROM_LOAD( "mk3870.u14", 0x0000, 0x0fc0, NO_DUMP )
// MICR reader data table ROMS, no idea how this stuff is used but dumps should be preserved
ROM_REGION( 0x5000, "micrdata", 0 )
ROM_LOAD( "cdn1-ebb.u20", 0x0000, 0x1000, CRC(0f9a9db3) SHA1(aedfe3ba7afb1d0a827fec5418369fca9348940f) )
ROM_LOAD( "cdn2-ebb.u16", 0x1000, 0x1000, CRC(648fff69) SHA1(59653d34067d9a3061857507868fd2147dadf537) )
ROM_LOAD( "6047204005.u15", 0x2000, 0x0800, CRC(70bfac37) SHA1(84081249ead5b957d98b3bd06665ef52d0a0243c) )
ROM_LOAD( "6048225001.u29", 0x3000, 0x1000, CRC(59c73999) SHA1(7dd12b500e13b177d19a24d148310541f7e660b4) )
ROM_LOAD( "ebb-fea-v96-9-23-83-f43a.u11", 0x4000, 0x1000, CRC(0e572470) SHA1(966e5eeb0114589a7cab3c29a1db48cdd8634be5) )
// MICR reader data table ROMS, no idea how this stuff is used but dumps should be preserved
ROM_REGION( 0x5000, "micrdata", 0 )
ROM_LOAD( "cdn1-ebb.u20", 0x0000, 0x1000, CRC(0f9a9db3) SHA1(aedfe3ba7afb1d0a827fec5418369fca9348940f) )
ROM_LOAD( "cdn2-ebb.u16", 0x1000, 0x1000, CRC(648fff69) SHA1(59653d34067d9a3061857507868fd2147dadf537) )
ROM_LOAD( "6047204005.u15", 0x2000, 0x0800, CRC(70bfac37) SHA1(84081249ead5b957d98b3bd06665ef52d0a0243c) )
ROM_LOAD( "6048225001.u29", 0x3000, 0x1000, CRC(59c73999) SHA1(7dd12b500e13b177d19a24d148310541f7e660b4) )
ROM_LOAD( "ebb-fea-v96-9-23-83-f43a.u11", 0x4000, 0x1000, CRC(0e572470) SHA1(966e5eeb0114589a7cab3c29a1db48cdd8634be5) )
ROM_END
COMP( 1986?, anzterm, 0, 0, anzterm, anzterm, driver_device, 0, "Burroughs", "EF315-I220 Teller Terminal (ANZ)", MACHINE_IS_SKELETON ) // year comes from sticker on bottom of case, it's more likely a 1983 revision

86
src/mame/drivers/cedar_magnet.cpp
View File

@ -7,32 +7,32 @@
- fix sound emulation
- fix sprite communication / banking
* bit "output bit 0x02 %d (IC21)" at 0x42 might be important
* mag_exzi currently requires a gross hack to stop the sprite CPU crashing on startup
* mag_xain sometimes leaves old sprites on the screen, probably due to a lost clear
command
* mag_exzi currently requires a gross hack to stop the sprite CPU crashing on startup
* mag_xain sometimes leaves old sprites on the screen, probably due to a lost clear
command
- fix flipscreen
- verify behavior of unknown / unused ports / interrupt sources etc.
- verify the disk images, convert to a better format that can natively store protection
* RAW data also available if required
* as mentioned, the disks are copy protected, see notes below
* are the bad tiles shortly into the first level of mag_exzi caused by a bad dump or
bad comms?
* as mentioned, the disks are copy protected, see notes below
* are the bad tiles shortly into the first level of mag_exzi caused by a bad dump or
bad comms?
- Use proper floppy drive emulation code that originally came from MESS (tied with above)
- verify all clocks and screen params (50hz seems to match original videos)
- work out why we need a protection hack and replace it with proper emulation
* there are no per-game protection devices, so it's something to do with the base hardware
* there seem to be 2 checks, one based on a weird sector on the discs, the other based on
a port read
* there seem to be 2 checks, one based on a weird sector on the discs, the other based on
a port read
- add additional hardware notes from ArcadeHacker
*/
/*
Magnet System by
EFO SA (Electrónica Funcional Operativa SA).
EFO SA (Electrónica Funcional Operativa SA).
based on Cedar hardware
@ -231,19 +231,19 @@ READ8_MEMBER(cedar_magnet_state::port7c_r)
READ8_MEMBER(cedar_magnet_state::port18_r)
{
// printf("%s: port18_r\n", device().machine().describe_context());
// printf("%s: port18_r\n", device().machine().describe_context());
return 0x00;
}
WRITE8_MEMBER(cedar_magnet_state::port18_w)
{
// printf("%s: port18_w %02x\n", device().machine().describe_context(), data);
// printf("%s: port18_w %02x\n", device().machine().describe_context(), data);
}
READ8_MEMBER(cedar_magnet_state::port19_r)
{
uint8_t ret = 0x00;
// printf("%s: port19_r\n", device().machine().describe_context());
// printf("%s: port19_r\n", device().machine().describe_context());
// 9496 in a,($19)
// 9498 bit 2,a
@ -255,19 +255,19 @@ READ8_MEMBER(cedar_magnet_state::port19_r)
READ8_MEMBER(cedar_magnet_state::port1a_r)
{
// printf("%s: port1a_r\n", device().machine().describe_context());
// printf("%s: port1a_r\n", device().machine().describe_context());
return 0x00;
}
WRITE8_MEMBER(cedar_magnet_state::port19_w)
{
// printf("%s: port19_w %02x\n", device().machine().describe_context(), data);
// printf("%s: port19_w %02x\n", device().machine().describe_context(), data);
}
WRITE8_MEMBER(cedar_magnet_state::port1b_w)
{
// printf("%s: port1b_w %02x\n", device().machine().describe_context(), data);
// printf("%s: port1b_w %02x\n", device().machine().describe_context(), data);
}
/***********************
@ -325,7 +325,7 @@ void cedar_magnet_state::video_start()
WRITE8_MEMBER(cedar_magnet_state::soundlatch_w)
{
// printf("%s: writing soundlatch_w! %02x\n", device().machine().describe_context(), data);
// printf("%s: writing soundlatch_w! %02x\n", device().machine().describe_context(), data);
portff_data = data;
m_cedsound->write_command(data);
}
@ -373,8 +373,8 @@ READ8_MEMBER(cedar_magnet_state::other_cpu_r)
if (cpus_accessed != 1)
logerror("%s: reading multiple CPUS!!! %04x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
// if ((offset==0) || (offset2 == 0xe) || (offset2 == 0xf) || (offset2 == 0x68))
// logerror("%s: reading banked bus area %04x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
// if ((offset==0) || (offset2 == 0xe) || (offset2 == 0xf) || (offset2 == 0x68))
// logerror("%s: reading banked bus area %04x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
return ret;
}
@ -388,11 +388,11 @@ WRITE8_MEMBER(cedar_magnet_state::other_cpu_w)
int soundselect = (m_ic49_pio_pb_val & 0x70) >> 4;
int windowbank = (m_ic49_pio_pb_val & 0x0c) >> 2;
int unk2 = (m_ic49_pio_pb_val & 0x03) >> 0;
int cpus_accessed = 0;
int offset2 = offset + windowbank * 0x4000;
if (spriteselect == 0x1)
{
cpus_accessed++;
@ -415,14 +415,14 @@ WRITE8_MEMBER(cedar_magnet_state::other_cpu_w)
{
cpus_accessed++;
m_cedsound->write_cpu_bus(offset2, data);
// printf("%s: sound cpu write %04x %02x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,data, bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
// printf("%s: sound cpu write %04x %02x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,data, bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
}
if (cpus_accessed != 1)
logerror("%s: writing multiple CPUS!!! %04x %02x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,data, bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
// if ((offset==0) || (offset2 == 0xe) || (offset2 == 0xf) || (offset2 == 0x68))
// printf("%s: other cpu write %04x %02x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,data, bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
// if ((offset==0) || (offset2 == 0xe) || (offset2 == 0xf) || (offset2 == 0x68))
// printf("%s: other cpu write %04x %02x - bank bits %d %d %d %d %d %d %d\n", device().machine().describe_context(), offset,data, bankbit0, plane0select, plane1select, spriteselect, soundselect, windowbank, unk2);
}
@ -477,7 +477,7 @@ WRITE8_MEMBER( cedar_magnet_state::ic48_pio_pa_w ) // 0x20
if (LOG_IC48_PIO_PA) printf("output bit 0x40 %d (bank)\n", (data >> 6)&1); // A6 -> 2 74HC10 3NAND IC19
if (LOG_IC48_PIO_PA) printf("output bit 0x20 %d (bank)\n", (data >> 5)&1); // A5 -> 4 74HC10 3NAND IC19
if (LOG_IC48_PIO_PA) printf("input bit 0x10 %d (interrupt source related?)\n", (data >> 4)&1); // 10 in // A4 <- 9 74HC74 IC20 <- input from 18 74LS244 IC61
if (LOG_IC48_PIO_PA) printf("input bit 0x08 %d (COIN1)\n", (data >> 3)&1); // 08 in // A3 <- 4 74HC14P (inverter) IC4 <- EDGE 21 COIN1
if (LOG_IC48_PIO_PA) printf("input bit 0x08 %d (COIN1)\n", (data >> 3)&1); // 08 in // A3 <- 4 74HC14P (inverter) IC4 <- EDGE 21 COIN1
if (LOG_IC48_PIO_PA) printf("output bit 0x04 %d (plane0 CPU/bus related?)\n", (data >> 2)&1); // A2 -> 45 J6
if (LOG_IC48_PIO_PA) printf("output bit 0x02 %d (plane0 CPU/bus related?)\n", (data >> 1)&1); // A1 -> 47 J6
if (LOG_IC48_PIO_PA) printf("input bit 0x01 %d (plane0 CPU/bus related?)\n", (data >> 0)&1); // A0 -> 49 J6
@ -514,15 +514,15 @@ WRITE8_MEMBER(cedar_magnet_state::ic48_pio_pb_w) // 0x22
if (LOG_IC48_PIO_PB) printf("%s: ic48_pio_pb_w %02x\n", device().machine().describe_context(), data);
// address 0x22 - pio ic48 port b
if (LOG_IC48_PIO_PB) printf("input bit 0x80 %d (COIN2)\n", (data >> 7)&1); // B7 <- 2 74HC14P (inverter) IC4 <- EDGE 22 COIN2
if (LOG_IC48_PIO_PB) printf("input bit 0x80 %d (COIN2)\n", (data >> 7)&1); // B7 <- 2 74HC14P (inverter) IC4 <- EDGE 22 COIN2
if (LOG_IC48_PIO_PB) printf("output bit 0x40 (J6) (sprite CPU/bus related?) %d\n", (data >> 6)&1); // B6 -> 41 J6
if (LOG_IC48_PIO_PB) printf("output bit 0x20 (J6) (sprite CPU/bus related?) %d\n", (data >> 5)&1); // B5 -> 43 J6
if (LOG_IC48_PIO_PB) printf("input bit 0x10 (J6) (sprite CPU/bus related?) %d\n", (data >> 4)&1); // B4 -> 44 J6
if (LOG_IC48_PIO_PB) printf("input bit 0x10 (J6) (sprite CPU/bus related?) %d\n", (data >> 4)&1); // B4 -> 44 J6
if (LOG_IC48_PIO_PB) printf("output bit 0x08 (Q8) %d\n", (data >> 3)&1); // B3 -> Q8 transistor
if (LOG_IC48_PIO_PB) printf("output bit 0x04 (J6) (plane1 CPU/bus related?) %d\n", (data >> 2)&1); // B2 -> 46 J6
if (LOG_IC48_PIO_PB) printf("output bit 0x02 (J6) (plane1 CPU/bus related?) %d\n", (data >> 1)&1); // B1 -> 48 J6
if (LOG_IC48_PIO_PB) printf("input bit 0x01 (J6) (plane1 CPU/bus related?) %d\n", (data >> 0)&1); // B0 -> 50 J6
int plane1select = (m_ic48_pio_pb_val & 0x07) >> 0;
int spriteselect = (m_ic48_pio_pb_val & 0x70) >> 4;
@ -569,7 +569,7 @@ WRITE8_MEMBER( cedar_magnet_state::ic49_pio_pb_w ) // 0x42
int soundselect = (m_ic49_pio_pb_val & 0x70) >> 4;
handle_sub_board_cpu_lines(m_cedsound, oldsoundselect, soundselect);
}
@ -612,7 +612,7 @@ static INPUT_PORTS_START( cedar_magnet )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
PORT_START("P2_IN")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
@ -630,7 +630,7 @@ INPUT_PORTS_END
INTERRUPT_GEN_MEMBER(cedar_magnet_state::irq)
{
if (m_prothack)
if (m_prothack)
m_prothack(this);
m_maincpu->set_input_line(0, HOLD_LINE);
@ -667,16 +667,16 @@ static MACHINE_CONFIG_START( cedar_magnet, cedar_magnet_state )
MCFG_ADDRESS_MAP_BANK_STRIDE(0x100)
MCFG_DEVICE_ADD("z80pio_ic48", Z80PIO, 4000000/2)
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_state, ic48_pio_pa_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_state, ic48_pio_pa_w))
MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_state, ic48_pio_pb_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(cedar_magnet_state, ic48_pio_pb_w))
MCFG_DEVICE_ADD("z80pio_ic49", Z80PIO, 4000000/2)
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_state, ic49_pio_pa_r)) // NOT USED
// MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_state, ic49_pio_pa_w)) // NOT USED
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_state, ic49_pio_pa_r)) // NOT USED
// MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_state, ic49_pio_pa_w)) // NOT USED
MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_state, ic49_pio_pb_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(cedar_magnet_state, ic49_pio_pb_w))
@ -737,17 +737,17 @@ ROM_START( mag_xain )
ROM_END
/*
protection? (Time Scanner note)
one part of the code is a weird loop checking values from port 0x7c while doing other nonsensical stuff, a flag gets set to 0xff if it fails
protection? (Time Scanner note)
the other part is after reading the weird extra block on the disk (score / protection data at 0xea400 in the disk image*) and again a flag
gets set to 0xff in certain conditions there's then a check after inserting a coin, these values can't be 0xff at that point, and there
doesn't appear to be any code to reset them.
one part of the code is a weird loop checking values from port 0x7c while doing other nonsensical stuff, a flag gets set to 0xff if it fails
*0xea400 is/was track 4e, side 00, sector 01 for future reference if the floppy format changes
the other part is after reading the weird extra block on the disk (score / protection data at 0xea400 in the disk image*) and again a flag
gets set to 0xff in certain conditions there's then a check after inserting a coin, these values can't be 0xff at that point, and there
doesn't appear to be any code to reset them.
all games have the same code in them but at different addresses
*0xea400 is/was track 4e, side 00, sector 01 for future reference if the floppy format changes
all games have the same code in them but at different addresses
*/

2
src/mame/drivers/cedar_magnet.h
View File

@ -43,7 +43,7 @@ public:
m_cedplane0(*this, "cedplane0"),
m_cedplane1(*this, "cedplane1"),
m_cedsprite(*this, "cedsprite")
{
{
m_ic48_pio_pa_val = 0xff;
m_ic48_pio_pb_val = 0xff;
m_ic49_pio_pb_val = 0xff;

2
src/mame/drivers/cedar_magnet_board.cpp
View File

@ -10,7 +10,7 @@
cedar_magnet_board_device::cedar_magnet_board_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
// m_ram(*this, "ram")
// m_ram(*this, "ram")
{
}

2
src/mame/drivers/cedar_magnet_board.h
View File

@ -22,7 +22,7 @@ public:
uint8_t* m_ram;
z80_device* m_cpu;
virtual uint8_t read_cpu_bus(int offset);
virtual void write_cpu_bus(int offset, uint8_t data);

26
src/mame/drivers/cedar_magnet_flop.cpp
View File

@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
// todo, scrap this and use the core SAB 2797B emulation
// todo, scrap this and use the core SAB 2797B emulation
// (FM - MFM type) @ 1.25mhz (oscillates 1.250~1.251)
@ -75,17 +75,17 @@ READ8_MEMBER(cedar_magnet_flop_device::port63_r)
if (m_secoffs == 0)
{
// this is weird data, protection??
if(read_offset_base==0xea400)
printf("reading sector %d offset %d (from disk image at %04x) (cur track %02x cur side %02x cur sector %02x)\n", m_flopsec, m_secoffs, read_offset, m_curtrack, side, m_flopsec);
if(read_offset_base==0xea400)
printf("reading sector %d offset %d (from disk image at %04x) (cur track %02x cur side %02x cur sector %02x)\n", m_flopsec, m_secoffs, read_offset, m_curtrack, side, m_flopsec);
}
m_secoffs++;
if (m_secoffs == sector_size)
{
//printf("finished sector read\n");
m_flopstat &= ~0x05;
m_flopstat &= ~0x05;
m_secoffs = 0;
m_flopsec++;
}
@ -95,13 +95,13 @@ READ8_MEMBER(cedar_magnet_flop_device::port63_r)
printf("read past sector!! %d\n", m_secoffs);
m_secoffs++;
}
}
else
{
fatalerror("read data in non-read mode?\n");
}
//
//
return ret;
}
@ -139,9 +139,9 @@ WRITE8_MEMBER(cedar_magnet_flop_device::port60_w)
case 0xd0:
//printf("force interrupt?\n");
// m_flopstat = 0x06;
// m_flopstat &= ~0x07;
// m_maincpu->set_input_line(0, HOLD_LINE);
// m_flopstat = 0x06;
// m_flopstat &= ~0x07;
// m_maincpu->set_input_line(0, HOLD_LINE);
break;
@ -210,7 +210,7 @@ WRITE8_MEMBER(cedar_magnet_flop_device::write)
switch (offset & 3)
{
case 0x00:port60_w(space, offset, data);break;
// case 0x01:port61_w(space, offset, data);break;
// case 0x01:port61_w(space, offset, data);break;
case 0x02:port62_w(space, offset, data);break;
case 0x03:port63_w(space, offset, data);break;
default:break;
@ -229,4 +229,4 @@ READ8_MEMBER(cedar_magnet_flop_device::read)
}
return 0x00;
}
}

16
src/mame/drivers/cedar_magnet_plane.cpp
View File

@ -59,7 +59,7 @@ WRITE8_MEMBER(cedar_magnet_plane_device::plane_portcd_w)
WRITE8_MEMBER(cedar_magnet_plane_device::plane_portce_w)
{
m_curline = data;
}
WRITE8_MEMBER(cedar_magnet_plane_device::plane_portcf_w)
@ -75,17 +75,17 @@ static MACHINE_CONFIG_FRAGMENT( cedar_magnet_plane )
MCFG_CPU_VBLANK_INT_DRIVER(":screen", cedar_magnet_board_device, irq)
MCFG_DEVICE_ADD("z80pio0", Z80PIO, 4000000/2)
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_plane_device, pio0_pa_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_plane_device, pio0_pa_w))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_plane_device, pio0_pb_r))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_plane_device, pio0_pb_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(cedar_magnet_plane_device, pio0_pb_w))
MCFG_DEVICE_ADD("z80pio1", Z80PIO, 4000000/2)
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_plane_device, pio1_pa_r))
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_plane_device, pio1_pa_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_plane_device, pio1_pa_w))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_plane_device, pio1_pb_r))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_plane_device, pio1_pb_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(cedar_magnet_plane_device, pio1_pb_w))
MACHINE_CONFIG_END
@ -93,7 +93,7 @@ MACHINE_CONFIG_END
READ8_MEMBER(cedar_magnet_plane_device::pio0_pa_r)
{
// this is read
// logerror("%s: pio0_pa_r\n", machine().describe_context());
// logerror("%s: pio0_pa_r\n", machine().describe_context());
return 0x00;
}

10
src/mame/drivers/cedar_magnet_plane.h
View File

@ -19,15 +19,15 @@ class cedar_magnet_plane_device : public cedar_magnet_board_device
public:
// construction/destruction
cedar_magnet_plane_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(pio0_pa_r);
DECLARE_WRITE8_MEMBER(pio0_pa_w);
// DECLARE_READ8_MEMBER(pio0_pb_r);
// DECLARE_READ8_MEMBER(pio0_pb_r);
DECLARE_WRITE8_MEMBER(pio0_pb_w);
// DECLARE_READ8_MEMBER(pio1_pa_r);
// DECLARE_READ8_MEMBER(pio1_pa_r);
DECLARE_WRITE8_MEMBER(pio1_pa_w);
// DECLARE_READ8_MEMBER(pio1_pb_r);
// DECLARE_READ8_MEMBER(pio1_pb_r);
DECLARE_WRITE8_MEMBER(pio1_pb_w);
DECLARE_WRITE8_MEMBER(plane_portcc_w);
@ -51,7 +51,7 @@ public:
protected:
virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_start() override;
// virtual void device_reset() override;
// virtual void device_reset() override;
private:
};

34
src/mame/drivers/cedar_magnet_sound.cpp
View File

@ -22,8 +22,8 @@ cedar_magnet_sound_device::cedar_magnet_sound_device(const machine_config &mconf
READ8_MEMBER(cedar_magnet_sound_device::top_port14_r)
{
// uint8_t ret = m_command;
// m_command = 0;
// uint8_t ret = m_command;
// m_command = 0;
return rand();
}
@ -46,10 +46,10 @@ static ADDRESS_MAP_START( cedar_magnet_sound_io, AS_IO, 8, cedar_magnet_sound_de
AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("aysnd0", ay8910_device, address_w)
AM_RANGE(0x0d, 0x0d) AM_DEVWRITE("aysnd0", ay8910_device, data_w)
AM_RANGE(0x10, 0x10) AM_DEVWRITE("aysnd1", ay8910_device, address_w)
AM_RANGE(0x11, 0x11) AM_DEVWRITE("aysnd1", ay8910_device, data_w)
AM_RANGE(0x14, 0x14) AM_READ(top_port14_r)
ADDRESS_MAP_END
@ -57,12 +57,12 @@ ADDRESS_MAP_END
WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z0_w)
{
// printf("USED ctc0_z0_w %d\n", state);
// printf("USED ctc0_z0_w %d\n", state);
}
WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_z1_w)
{
// printf("USED ctc0_z1_w %d\n", state);
// printf("USED ctc0_z1_w %d\n", state);
}
@ -96,15 +96,15 @@ WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc0_int_w)
WRITE_LINE_MEMBER(cedar_magnet_sound_device::ctc1_int_w)
{
/*
switch (rand()&0x1)
{
case 0x00:
m_ctc0->trg0(rand()&1);
break;
case 0x01:
m_ctc0->trg1(rand()&1);
break;
}
switch (rand()&0x1)
{
case 0x00:
m_ctc0->trg0(rand()&1);
break;
case 0x01:
m_ctc0->trg1(rand()&1);
break;
}
*/
}
@ -121,7 +121,7 @@ static MACHINE_CONFIG_FRAGMENT( cedar_magnet_sound )
MCFG_CPU_ADD("topcpu", Z80,4000000)
MCFG_CPU_PROGRAM_MAP(cedar_magnet_sound_map)
MCFG_CPU_IO_MAP(cedar_magnet_sound_io)
// MCFG_Z80_DAISY_CHAIN(daisy_chain)
// MCFG_Z80_DAISY_CHAIN(daisy_chain)
MCFG_DEVICE_ADD("ctc0", Z80CTC, 4000000/8 )
MCFG_Z80CTC_INTR_CB(WRITELINE(cedar_magnet_sound_device, ctc0_int_w))
@ -131,7 +131,7 @@ static MACHINE_CONFIG_FRAGMENT( cedar_magnet_sound )
MCFG_DEVICE_ADD("ctc1", Z80CTC, 4000000/8 )
MCFG_Z80CTC_INTR_CB(INPUTLINE("topcpu", INPUT_LINE_IRQ0))
// MCFG_Z80CTC_INTR_CB(DEVWRITELINE("ctc0", z80ctc_device, trg0))
// MCFG_Z80CTC_INTR_CB(DEVWRITELINE("ctc0", z80ctc_device, trg0))
MCFG_Z80CTC_INTR_CB(WRITELINE(cedar_magnet_sound_device, ctc1_int_w))
MCFG_Z80CTC_ZC0_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(cedar_magnet_sound_device, ctc1_z1_w))

4
src/mame/drivers/cedar_magnet_sound.h
View File

@ -24,7 +24,7 @@ class cedar_magnet_sound_device : public cedar_magnet_board_device
public:
// construction/destruction
cedar_magnet_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
required_device<z80ctc_device> m_ctc0;
required_device<z80ctc_device> m_ctc1;
@ -32,7 +32,7 @@ public:
void write_command(uint8_t data);
uint8_t m_command;
DECLARE_WRITE_LINE_MEMBER(ctc1_z0_w);
DECLARE_WRITE_LINE_MEMBER(ctc1_z1_w);
DECLARE_WRITE_LINE_MEMBER(ctc1_z2_w);

50
src/mame/drivers/cedar_magnet_sprite.cpp
View File

@ -74,9 +74,9 @@ ADDRESS_MAP_END
void cedar_magnet_sprite_device::do_blit()
{
// printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n");
// printf("~~~~~~~~~~~~~~~~~ drawing sprite with x:%02x y:%02x code:%04x size:%02x unk:%02x\n", m_loweraddr, m_upperaddr, (m_spritecodehigh << 8) | m_spritecodelow, m_spritesize, pio0_pb_data);
// printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n");
// printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n");
// printf("~~~~~~~~~~~~~~~~~ drawing sprite with x:%02x y:%02x code:%04x size:%02x unk:%02x\n", m_loweraddr, m_upperaddr, (m_spritecodehigh << 8) | m_spritecodelow, m_spritesize, pio0_pb_data);
// printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n");
int ysize;
int xsize;
@ -114,10 +114,10 @@ void cedar_magnet_sprite_device::do_blit()
int ypos = (m_upperaddr + y);
uint8_t data = m_ram[source + ((m_uppersprite & 0x3) * 0x10000)];
if (!(pio0_pb_data & 0x02))
data = rand();
source++;
xpos &= 0xff;
@ -159,7 +159,7 @@ void cedar_magnet_sprite_device::do_blit()
WRITE8_MEMBER(cedar_magnet_sprite_device::sprite_port80_w)
{
m_spritecodelow = data;
// printf("%s:sprite numlow / trigger %02x\n", machine().describe_context(), data);
// printf("%s:sprite numlow / trigger %02x\n", machine().describe_context(), data);
do_blit();
}
@ -168,20 +168,20 @@ WRITE8_MEMBER(cedar_magnet_sprite_device::sprite_port84_w)
{
m_spritecodehigh = data;
m_high_write = 1;
// printf("%s:sprite numhigh %02x\n", machine().describe_context(), data);
// printf("%s:sprite numhigh %02x\n", machine().describe_context(), data);
}
WRITE8_MEMBER(cedar_magnet_sprite_device::sprite_port88_w)
{
// frequent
// printf("%s:sprite_y_coordinate %02x\n", machine().describe_context(), data);
// printf("%s:sprite_y_coordinate %02x\n", machine().describe_context(), data);
m_upperaddr = data;
}
WRITE8_MEMBER(cedar_magnet_sprite_device::pio2_pa_w)
{
// frequent
// printf("%s:sprite_x_coordinate %02x\n", machine().describe_context(), data);
// printf("%s:sprite_x_coordinate %02x\n", machine().describe_context(), data);
m_loweraddr = data;
}
@ -195,7 +195,7 @@ WRITE8_MEMBER(cedar_magnet_sprite_device::sprite_port8c_w)
// possible watchdog?
WRITE8_MEMBER(cedar_magnet_sprite_device::sprite_port9c_w)
{
// printf("%s:sprite_port9c_w %02x\n", machine().describe_context(), data);
// printf("%s:sprite_port9c_w %02x\n", machine().describe_context(), data);
}
static MACHINE_CONFIG_FRAGMENT( cedar_magnet_sprite )
@ -205,24 +205,24 @@ static MACHINE_CONFIG_FRAGMENT( cedar_magnet_sprite )
MCFG_CPU_VBLANK_INT_DRIVER(":screen", cedar_magnet_board_device, irq)
MCFG_DEVICE_ADD("z80pio0", Z80PIO, 4000000/2)
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_sprite_device, pio0_pa_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_sprite_device, pio0_pa_w))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_sprite_device, pio0_pb_r))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_sprite_device, pio0_pb_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(cedar_magnet_sprite_device, pio0_pb_w))
MCFG_DEVICE_ADD("z80pio1", Z80PIO, 4000000/2)
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_sprite_device, pio1_pa_r))
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_sprite_device, pio1_pa_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_sprite_device, pio1_pa_w))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_sprite_device, pio1_pb_r))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_sprite_device, pio1_pb_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(cedar_magnet_sprite_device, pio1_pb_w))
MCFG_DEVICE_ADD("z80pio2", Z80PIO, 4000000/2)
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_sprite_device, pio2_pa_r))
// MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_IN_PA_CB(READ8(cedar_magnet_sprite_device, pio2_pa_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(cedar_magnet_sprite_device, pio2_pa_w))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_sprite_device, pio2_pb_r))
// MCFG_Z80PIO_IN_PB_CB(READ8(cedar_magnet_sprite_device, pio2_pb_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(cedar_magnet_sprite_device, pio2_pb_w))
MCFG_DEVICE_ADD("sp_sub_ram", ADDRESS_MAP_BANK, 0)
@ -237,7 +237,7 @@ MACHINE_CONFIG_END
READ8_MEMBER(cedar_magnet_sprite_device::pio0_pa_r)
{
// actually read
// printf("%s: pio0_pa_r\n", machine().describe_context());
// printf("%s: pio0_pa_r\n", machine().describe_context());
return 0x00;
}
@ -309,15 +309,15 @@ void cedar_magnet_sprite_device::device_reset()
uint32_t cedar_magnet_sprite_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int palbase)
{
// printf("-----------------------------------------------------------------------------------------------------------\n");
// printf("--------------------------------------------- FRAME -------------------------------------------------------\n");
// printf("-----------------------------------------------------------------------------------------------------------\n");
// printf("-----------------------------------------------------------------------------------------------------------\n");
// printf("--------------------------------------------- FRAME -------------------------------------------------------\n");
// printf("-----------------------------------------------------------------------------------------------------------\n");
uint8_t* mem = m_framebuffer;
int count = 0;
// if (!(m_m_spritesize & 0x40))
// return 0;
// if (!(m_m_spritesize & 0x40))
// return 0;
for (int y = 0;y < 256;y++)
{

18
src/mame/drivers/cedar_magnet_sprite.h
View File

@ -23,7 +23,7 @@ class cedar_magnet_sprite_device : public cedar_magnet_board_device
public:
// construction/destruction
cedar_magnet_sprite_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
uint8_t m_framebuffer[0x10000];
uint8_t pio2_pb_data;
@ -31,17 +31,17 @@ public:
DECLARE_READ8_MEMBER(pio0_pa_r);
DECLARE_WRITE8_MEMBER(pio0_pa_w);
// DECLARE_READ8_MEMBER(pio0_pb_r);
// DECLARE_READ8_MEMBER(pio0_pb_r);
DECLARE_WRITE8_MEMBER(pio0_pb_w);
// DECLARE_READ8_MEMBER(pio1_pa_r);
// DECLARE_READ8_MEMBER(pio1_pa_r);
DECLARE_WRITE8_MEMBER(pio1_pa_w);
// DECLARE_READ8_MEMBER(pio1_pb_r);
// DECLARE_READ8_MEMBER(pio1_pb_r);
DECLARE_WRITE8_MEMBER(pio1_pb_w);
// DECLARE_READ8_MEMBER(pio2_pa_r);
// DECLARE_READ8_MEMBER(pio2_pa_r);
DECLARE_WRITE8_MEMBER(pio2_pa_w);
// DECLARE_READ8_MEMBER(pio2_pb_r);
// DECLARE_READ8_MEMBER(pio2_pb_r);
DECLARE_WRITE8_MEMBER(pio2_pb_w);
DECLARE_WRITE8_MEMBER(sprite_port80_w);
@ -54,14 +54,14 @@ public:
uint8_t m_upperaddr;
uint8_t m_loweraddr;
void do_blit();
uint8_t m_spritesize;
uint8_t pio0_pb_data;
uint8_t m_spritecodelow;
uint8_t m_spritecodehigh;
int m_high_write;
uint8_t m_uppersprite;
@ -70,7 +70,7 @@ public:
required_device<z80pio_device> m_pio0;
required_device<z80pio_device> m_pio1;
required_device<z80pio_device> m_pio2;
uint32_t draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int palbase);
protected:
virtual machine_config_constructor device_mconfig_additions() const override;

24
src/mame/drivers/cischeat.cpp
View File

@ -215,9 +215,9 @@ static ADDRESS_MAP_START( bigrun_map, AS_PROGRAM, 16, cischeat_state )
AM_RANGE(0x082400, 0x082401) AM_WRITE(active_layers_w)
/* It's actually 0x840000-0x847ff, divided in four banks and shared with other boards.
Each board expects reads from the other boards and writes to own bank.
Amusingly, if you run the communication test as ID = X then soft reset -> ID = Y, what was at ID = X gets an OK in the second test
so it's likely to be the only thing needed. */
Each board expects reads from the other boards and writes to own bank.
Amusingly, if you run the communication test as ID = X then soft reset -> ID = Y, what was at ID = X gets an OK in the second test
so it's likely to be the only thing needed. */
AM_RANGE(0x084000, 0x0847ff) AM_RAM // Linking with other units
AM_RANGE(0x088000, 0x08bfff) AM_RAM AM_SHARE("share2") // Sharedram with sub CPU#2
AM_RANGE(0x08c000, 0x08ffff) AM_RAM AM_SHARE("share1") // Sharedram with sub CPU#1
@ -359,7 +359,7 @@ READ16_MEMBER(cischeat_state::wildplt_xy_r)
case 1: return ioport("P2Y")->read() | (ioport("P2X")->read()<<8);
case 2: return ioport("P1Y")->read() | (ioport("P1X")->read()<<8);
}
return 0xffff;
}
@ -369,7 +369,7 @@ READ16_MEMBER(cischeat_state::wildplt_mux_r)
uint16_t split_in = 0xffff;
switch(m_wildplt_output & 0xc)
{
// case 0: return ioport("IN1")->read();
// case 0: return ioport("IN1")->read();
case 4: split_in = ioport("IN1_1")->read(); break;
case 8: split_in = ioport("IN1_2")->read(); break;
}
@ -405,11 +405,11 @@ static ADDRESS_MAP_START( wildplt_map, AS_PROGRAM, 16, cischeat_state )
AM_RANGE(0x082308, 0x082309) AM_READNOP AM_WRITE(f1gpstar_comms_w)
AM_RANGE(0x082400, 0x082401) AM_WRITE(active_layers_w)
// AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
// AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
AM_RANGE(0x090000, 0x097fff) AM_RAM AM_SHARE("share2") // Sharedram with sub CPU#2
AM_RANGE(0x098000, 0x09ffff) AM_RAM AM_SHARE("share1") // Sharedram with sub CPU#1
/* Only writes to the first 0x40000 bytes affect the tilemaps: */
/* either these games support larger tilemaps or have more ram than needed */
AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_DEVWRITE("scroll0", megasys1_tilemap_device, write) AM_SHARE("scroll0") // Scroll ram 0
@ -1416,7 +1416,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( f1gpstr2 )
PORT_INCLUDE( f1gpstar )
PORT_MODIFY("IN4")
PORT_DIPNAME( 0x0e, 0x00, "Unit ID" ) PORT_DIPLOCATION("SW03:2,3,4") // -> !f901c
PORT_DIPSETTING( 0x00, "1 (McLaren)" )
@ -1489,9 +1489,9 @@ static INPUT_PORTS_START( wildplt )
PORT_START("IN1_1")
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW )
PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW )
PORT_BIT( 0xfff3, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN1_2")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("P1 Bomb")
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_START1 )
@ -1895,8 +1895,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(cischeat_state::bigrun_scanline)
if(scanline == 0)
m_cpu1->set_input_line(2, HOLD_LINE);
// if(scanline == 69)
// m_cpu1->set_input_line(1, HOLD_LINE);
// if(scanline == 69)
// m_cpu1->set_input_line(1, HOLD_LINE);
}

6
src/mame/drivers/cmi.cpp
View File

@ -274,9 +274,9 @@ private:
uint8_t m_env_dir_ctrl;
uint8_t m_vol_latch;
uint8_t m_flt_latch;
uint8_t m_rp;
uint8_t m_ws;
int m_dir;
uint8_t m_rp;
uint8_t m_ws;
int m_dir;
double m_freq;
bool m_active;

4
src/mame/drivers/crystal.cpp
View File

@ -1388,8 +1388,8 @@ ROM_START( crzyddz2 )
ROM_LOAD( "rom.u48", 0x000000, 0x1000000, CRC(e24257c4) SHA1(569d79a61ff6d35100ba5727069363146df9e0b7) )
ROM_REGION( 0x1000000, "maincpu", ROMREGION_ERASEFF )
ROM_COPY( "user1", 0x000000, 0x000000, 0x1000000 ) // copy flash here
ROM_LOAD( "27c322.u36", 0x000000, 0x0200000, CRC(b3177f39) SHA1(2a28bf8045bd2e053d88549b79fbc11f30ef9a32) ) // 1ST AND 2ND HALF IDENTICAL
ROM_COPY( "user1", 0x000000, 0x000000, 0x1000000 ) // copy flash here
ROM_LOAD( "27c322.u36", 0x000000, 0x0200000, CRC(b3177f39) SHA1(2a28bf8045bd2e053d88549b79fbc11f30ef9a32) ) // 1ST AND 2ND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x0200000 )
ROM_REGION( 0x4280, "pic", 0 ) // hy04

8
src/mame/drivers/decocass.cpp
View File

@ -275,10 +275,10 @@ static INPUT_PORTS_START( cocean1a ) /* 10 */
PORT_DIPSETTING( 0x00, "1 Coin 100 Credits" )
PORT_DIPNAME( 0x04, 0x04, "Game Select" ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x04, "1 to 8 Lines" )
PORT_DIPSETTING( 0x00, "Center Line" )
PORT_DIPSETTING( 0x00, "Center Line" )
PORT_DIPNAME( 0x08, 0x08, "Background Music" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, "Pay Out %" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x10, "Payout 75%")
PORT_DIPSETTING( 0x00, "Payout 85%")
@ -1216,12 +1216,12 @@ ROM_START( cocean1a ) // version MD 1-A-0 verified, 061 blocks, decrypted main d
ROM_LOAD( "dp-1100-a.rom", 0x0000, 0x0020, CRC(1bc9fccb) SHA1(ffc59c7660d5c87a8deca294f80260b6bc7c3027) )
ROM_END
ROM_START( cocean6b ) // version MD 10-B-0 not verified, 068 blocks, decrypted main data CRC(410d1f19)
ROM_START( cocean6b ) // version MD 10-B-0 not verified, 068 blocks, decrypted main data CRC(410d1f19)
DECOCASS_BIOS_BO_ROMS
ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */
ROM_LOAD( "dt-1106-b-0.cas", 0x0000, 0x4500, CRC(fa6ffc95) SHA1(95f881503aa8cd97d04b327abeb68891d053563f) )
ROM_REGION( 0x00020, "dongle", 0 ) /* dongle data */
ROM_LOAD( "dp-1100-b.rom", 0x0000, 0x0020, CRC(e09ae5de) SHA1(7dec067d0739a6dad2607132641b66880a5b7751) )
ROM_END

36
src/mame/drivers/equites.cpp
View File

@ -1716,8 +1716,8 @@ ROM_START( splndrbta )
ROM_LOAD16_BYTE( "4red.15c", 0x08000, 0x4000, CRC(d02a5606) SHA1(6bb2e5d95ea711452dd40218bd90488d70f82006) )
ROM_REGION( 0x10000, "audiocpu", 0 ) // 8085A ROMs
ROM_LOAD( "8v.1l", 0x00000, 0x4000, CRC(71b2ec29) SHA1(89c630c5bf9c4752b01006183d1419fe6a458f5c) )
ROM_LOAD( "9v.1h", 0x04000, 0x4000, CRC(e95abcb5) SHA1(1680875fc16d1a4e1054ccdabdf6fd06d434a163) )
ROM_LOAD( "8v.1l", 0x00000, 0x4000, CRC(71b2ec29) SHA1(89c630c5bf9c4752b01006183d1419fe6a458f5c) )
ROM_LOAD( "9v.1h", 0x04000, 0x4000, CRC(e95abcb5) SHA1(1680875fc16d1a4e1054ccdabdf6fd06d434a163) )
ROM_REGION( 0x2000, "alpha_8201:mcu", 0 )
ROM_LOAD( "alpha-8303_44801b42.bin", 0x0000, 0x2000, CRC(66adcb37) SHA1(e1c72ecb161129dcbddc0b16dd90e716d0c79311) )
@ -1808,36 +1808,36 @@ ROM_END
ROM_START( splndrbt2 )
ROM_REGION( 0x10000, "maincpu", 0 ) // 68000 ROMs(16k x 4)
ROM_LOAD16_BYTE( "1.a16", 0x00001, 0x4000, CRC(0fd3121d) SHA1(f9767af477442a09a70c04e4d427914557fddcd9) )
ROM_LOAD16_BYTE( "2.c16", 0x00000, 0x4000, CRC(227d8a1b) SHA1(8ce976e6d3dce1236a784e48f4829f42c801249c) )
ROM_LOAD16_BYTE( "3.a15", 0x08001, 0x4000, CRC(936f7cc9) SHA1(ef1601097659700f4a4b53fb57cd6d73efa03e0d) )
ROM_LOAD16_BYTE( "4.c15", 0x08000, 0x4000, CRC(3ff7c7b5) SHA1(4997efd4427f09a5427f752d0147b648fbdce252) )
ROM_LOAD16_BYTE( "1.a16", 0x00001, 0x4000, CRC(0fd3121d) SHA1(f9767af477442a09a70c04e4d427914557fddcd9) )
ROM_LOAD16_BYTE( "2.c16", 0x00000, 0x4000, CRC(227d8a1b) SHA1(8ce976e6d3dce1236a784e48f4829f42c801249c) )
ROM_LOAD16_BYTE( "3.a15", 0x08001, 0x4000, CRC(936f7cc9) SHA1(ef1601097659700f4a4b53fb57cd6d73efa03e0d) )
ROM_LOAD16_BYTE( "4.c15", 0x08000, 0x4000, CRC(3ff7c7b5) SHA1(4997efd4427f09a5427f752d0147b648fbdce252) )
ROM_REGION( 0x10000, "audiocpu", 0 ) // 8085A ROMs
ROM_LOAD( "s1.m1", 0x00000, 0x02000, CRC(045eac1b) SHA1(49ecc73b999719e470b2ef0afee6a84df620e0d9) )
ROM_LOAD( "s2.l1", 0x02000, 0x02000, CRC(65a3d094) SHA1(f6415eb323478a2d38acd4507404d9530fac77c4) )
ROM_LOAD( "s3.k1", 0x04000, 0x02000, CRC(980d38be) SHA1(c07f9851cfb6352781568f333d931b4ca08fd888) )
ROM_LOAD( "s4.h1", 0x06000, 0x02000, CRC(10f45af4) SHA1(00fa599bad8bf3ba6deee54165f381403096e8f9) )
ROM_LOAD( "s5.f1", 0x08000, 0x02000, CRC(0d76cac0) SHA1(15d0d5860035f06020589115b40d347c06d7ecbe) )
ROM_LOAD( "s6.e1", 0x0a000, 0x02000, CRC(bc65d469) SHA1(45145974d3ae7040fd00c776418702166c06b0dc) )
ROM_LOAD( "s1.m1", 0x00000, 0x02000, CRC(045eac1b) SHA1(49ecc73b999719e470b2ef0afee6a84df620e0d9) )
ROM_LOAD( "s2.l1", 0x02000, 0x02000, CRC(65a3d094) SHA1(f6415eb323478a2d38acd4507404d9530fac77c4) )
ROM_LOAD( "s3.k1", 0x04000, 0x02000, CRC(980d38be) SHA1(c07f9851cfb6352781568f333d931b4ca08fd888) )
ROM_LOAD( "s4.h1", 0x06000, 0x02000, CRC(10f45af4) SHA1(00fa599bad8bf3ba6deee54165f381403096e8f9) )
ROM_LOAD( "s5.f1", 0x08000, 0x02000, CRC(0d76cac0) SHA1(15d0d5860035f06020589115b40d347c06d7ecbe) )
ROM_LOAD( "s6.e1", 0x0a000, 0x02000, CRC(bc65d469) SHA1(45145974d3ae7040fd00c776418702166c06b0dc) )
ROM_REGION( 0x2000, "alpha_8201:mcu", 0 )
ROM_LOAD( "alpha-8303_44801b42.bin", 0x0000, 0x2000, CRC(66adcb37) SHA1(e1c72ecb161129dcbddc0b16dd90e716d0c79311) )
ROM_REGION( 0x2000, "gfx1", 0 ) // chars
ROM_LOAD( "5.b8", 0x00000, 0x02000, CRC(77a5dc55) SHA1(49f19e8816629b661c135b0db6f6e087eb2690ff) )
ROM_LOAD( "5.b8", 0x00000, 0x02000, CRC(77a5dc55) SHA1(49f19e8816629b661c135b0db6f6e087eb2690ff) )
ROM_REGION( 0x8000, "gfx2", 0 ) // tiles
ROM_LOAD( "8.m13", 0x00000, 0x4000, CRC(c2c86621) SHA1(a715c70ace98502f2c0d4a81539cd79d19e9b6c4) )
ROM_LOAD( "9.m12", 0x04000, 0x4000, CRC(4f7da6ff) SHA1(0516271df4a36d6ea38d1b8a5e471e1d2a79e8c1) )
ROM_LOAD( "8.m13", 0x00000, 0x4000, CRC(c2c86621) SHA1(a715c70ace98502f2c0d4a81539cd79d19e9b6c4) )
ROM_LOAD( "9.m12", 0x04000, 0x4000, CRC(4f7da6ff) SHA1(0516271df4a36d6ea38d1b8a5e471e1d2a79e8c1) )
ROM_REGION( 0x10000, "gfx3", 0 ) // sprites
ROM_LOAD( "8.n18", 0x00000, 0x4000, CRC(15b8277b) SHA1(36d80e9c1200f587cafdf43fafafe844d56296aa) )
ROM_LOAD( "8.n18", 0x00000, 0x4000, CRC(15b8277b) SHA1(36d80e9c1200f587cafdf43fafafe844d56296aa) )
// empty space to unpack previous ROM
// ROM_CONTINUE( 0x04000, 0x2000 )
// empty space to unpack previous ROM
ROM_LOAD( "5.m18", 0x08000, 0x4000, CRC(5f618b39) SHA1(2891067e71b8e1183ee5741487faa1561316cade) )
ROM_LOAD( "7.m17", 0x0c000, 0x4000, CRC(abdd8483) SHA1(df8c8338c24fa487c49b01ce26db7eb28c8c6b85) )
ROM_LOAD( "5.m18", 0x08000, 0x4000, CRC(5f618b39) SHA1(2891067e71b8e1183ee5741487faa1561316cade) )
ROM_LOAD( "7.m17", 0x0c000, 0x4000, CRC(abdd8483) SHA1(df8c8338c24fa487c49b01ce26db7eb28c8c6b85) )
ROM_REGION( 0x0500, "proms", 0 )
ROM_LOAD( "r.3a", 0x0000, 0x100, CRC(ca1f08ce) SHA1(e46e2850d3ee3c8cbb23c10645f07d406c7ff50b) ) // R

2
src/mame/drivers/fidel6502.cpp
View File

@ -4,7 +4,7 @@
/******************************************************************************
Fidelity Electronics 6502 based board driver
NOTE: MAME doesn't include a generalized implementation for boardpieces yet,
greatly affecting user playability of emulated electronic board games.
As workaround for the chess games, use an external chess GUI on the side,

4
src/mame/drivers/fidelz80.cpp
View File

@ -782,7 +782,7 @@ READ8_MEMBER(fidelz80_state::vcc_speech_r)
MACHINE_START_MEMBER(fidelz80_state,vcc)
{
machine_start();
// game relies on RAM initialized filled with 1
for (int i = 0; i < 0x400; i++)
m_maincpu->space(AS_PROGRAM).write_byte(i + 0x4000, 0xff);
@ -1502,7 +1502,7 @@ static MACHINE_CONFIG_START( vcc, fidelz80_state )
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", fidelz80base_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_fidel_vcc)
MCFG_MACHINE_START_OVERRIDE(fidelz80_state,vcc)
/* sound hardware */

16
src/mame/drivers/funtech.cpp
View File

@ -66,15 +66,15 @@ public:
uint8_t m_vreg;
tilemap_t *m_fg_tilemap;
DECLARE_WRITE8_MEMBER(fgram_w);
TILE_GET_INFO_MEMBER(get_fg_tile_info);
tilemap_t *m_reel1_tilemap;
tilemap_t *m_reel2_tilemap;
tilemap_t *m_reel3_tilemap;
DECLARE_WRITE8_MEMBER(reel1_ram_w);
DECLARE_WRITE8_MEMBER(reel2_ram_w);
DECLARE_WRITE8_MEMBER(reel3_ram_w);
@ -174,7 +174,7 @@ void fun_tech_corp_state::video_start()
m_reel1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(fun_tech_corp_state::get_reel1_tile_info),this),TILEMAP_SCAN_ROWS,8,32, 64, 8);
m_reel2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(fun_tech_corp_state::get_reel2_tile_info),this),TILEMAP_SCAN_ROWS,8,32, 64, 8);
m_reel3_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(fun_tech_corp_state::get_reel3_tile_info),this),TILEMAP_SCAN_ROWS,8,32, 64, 8);
m_reel1_tilemap->set_scroll_cols(64);
m_reel2_tilemap->set_scroll_cols(64);
m_reel3_tilemap->set_scroll_cols(64);
@ -229,7 +229,7 @@ uint32_t fun_tech_corp_state::screen_update_funtech(screen_device &screen, bitma
INTERRUPT_GEN_MEMBER(fun_tech_corp_state::funtech_vblank_interrupt)
{
// if (m_nmi_enable)
// if (m_nmi_enable)
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
@ -341,11 +341,11 @@ static INPUT_PORTS_START( funtech )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hold 4, Double")
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Hold 3, Small, Stop 3")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Hold 2, Big, Stop 2")
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r)
PORT_DIPNAME( 0x08, 0x08, "IN1-08" ) // some kind of key-out? reduces credits to 0
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -500,7 +500,7 @@ static MACHINE_CONFIG_START( funtech, fun_tech_corp_state )
MCFG_GFXDECODE_ADD("gfxdecode", "palette", funtech)
MCFG_PALETTE_ADD("palette", 0x200)
MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
MCFG_NVRAM_ADD_1FILL("nvram")
MCFG_TICKET_DISPENSER_ADD("hopper", attotime::from_msec(50), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)

8
src/mame/drivers/gei.cpp
View File

@ -1471,12 +1471,12 @@ ROM_START( gepoker3 ) /* v50.02 with control dated 9-30-84 */
ROM_LOAD( "cont_9-30_m105_pts.2c", 0x00000, 0x2000, CRC(08b996f2) SHA1(5f5efb5015ec9571cc94734c18debfadaa28f585) )
ROM_LOAD( "hrom_6-25_m105_pts.1c", 0x0e000, 0x2000, CRC(6ddc1750) SHA1(ee19206b7f4a98e3e7647414127f4e09b3e9134f) )
/* Banked roms */
ROM_LOAD( "pokr_chig_2-12_m105.1", 0x10000, 0x2000, CRC(a1cbf67b) SHA1(a6cd081bbb19b2dd1a84b7750eac8a5258a663eb) )//not original sticker, twice the size of a regular rom, but still don't match
ROM_LOAD( "pokr_chig_2-12_m105.1", 0x10000, 0x2000, CRC(a1cbf67b) SHA1(a6cd081bbb19b2dd1a84b7750eac8a5258a663eb) )//not original sticker, twice the size of a regular rom, but still don't match
ROM_CONTINUE( 0x10000, 0x2000) /* Discarding 1nd half, 0xff filled*/
ROM_LOAD( "bljk_9-30_m105_pts.2", 0x12000, 0x2000, CRC(82804184) SHA1(2e2e6a80c99c8eb226dc54c1d32d0bf24de300a4) )
ROM_LOAD( "bljk_9-30_m105_pts.2", 0x12000, 0x2000, CRC(82804184) SHA1(2e2e6a80c99c8eb226dc54c1d32d0bf24de300a4) )
ROM_LOAD( "bone_8-16_m105_pts.3", 0x14000, 0x2000, CRC(52d66cb6) SHA1(57db34906fcafd37f3a361df209dafe080aeac16) )
ROM_LOAD( "slot_9-30_m105_pts.4", 0x16000, 0x2000, CRC(713c3963) SHA1(a9297c04fc44522ca6891516a2c744712132896a) )
ROM_LOAD( "bingo_8-16_m105.5", 0x18000, 0x2000, CRC(de87ed0a) SHA1(4a26d93368c1a39dd38aabe450c34203101f0ef7) ) //not original sticker selftest report 10-7-86 date!!
ROM_LOAD( "slot_9-30_m105_pts.4", 0x16000, 0x2000, CRC(713c3963) SHA1(a9297c04fc44522ca6891516a2c744712132896a) )
ROM_LOAD( "bingo_8-16_m105.5", 0x18000, 0x2000, CRC(de87ed0a) SHA1(4a26d93368c1a39dd38aabe450c34203101f0ef7) ) //not original sticker selftest report 10-7-86 date!!
ROM_END
ROM_START( amuse ) /* v50.08 with most roms for IAM dated 8-16-84 */

2
src/mame/drivers/hh_amis2k.cpp
View File

@ -14,7 +14,7 @@
TODO:
- driver needs a cleanup when another AMI S2000 handheld gets dumped/added
- sound emulation could still be improved
- when the game strobes a led faster, it should appear brighter, for example when
the ball hits one of the bumpers

4
src/mame/drivers/hh_ucom4.cpp
View File

@ -1695,11 +1695,11 @@ WRITE8_MEMBER(grobot9_state::lamps_w)
{
// E1: speaker out
m_speaker->level_w(data >> 1 & 1);
// E3: input mux high bit
m_inp_mux = (m_inp_mux & 7) | (data & 8);
}
// D,F,E0: lamps
m_port[offset] = data;
display_matrix(9, 1, m_port[NEC_UCOM4_PORTD] | m_port[NEC_UCOM4_PORTF] << 4 | m_port[NEC_UCOM4_PORTE] << 8, 1);

2
src/mame/drivers/homedata.cpp
View File

@ -554,7 +554,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mrokumei_sound_io_map, AS_IO, 8, homedata_state )
AM_RANGE(0x0000, 0xffff) AM_READ(mrokumei_sound_io_r) /* read address is 16-bit */
AM_RANGE(0x0040, 0x0040) AM_MIRROR(0xff00) AM_DEVWRITE("dac", dac_byte_interface, write) /* write address is only 8-bit */
// hourouki mirror...
// hourouki mirror...
AM_RANGE(0x007f, 0x007f) AM_MIRROR(0xff00) AM_DEVWRITE("dac", dac_byte_interface, write) /* write address is only 8-bit */
ADDRESS_MAP_END

2
src/mame/drivers/igs017.cpp
View File

@ -560,7 +560,7 @@ DRIVER_INIT_MEMBER(igs017_state,tarzan)
DRIVER_INIT_MEMBER(igs017_state,tarzana)
{
tarzana_decrypt_program_rom();
// tarzana_decrypt_tiles(); // to do
// tarzana_decrypt_tiles(); // to do
}
// starzan

80
src/mame/drivers/indy_indigo2.cpp
View File

@ -58,12 +58,12 @@
#include "machine/ds1386.h"
#include "machine/z80scc.h"
#define SCC_TAG "scc"
#define PI1_TAG "pi1"
#define KBDC_TAG "kbdc"
#define PIT_TAG "pit"
#define SCC_TAG "scc"
#define PI1_TAG "pi1"
#define KBDC_TAG "kbdc"
#define PIT_TAG "pit"
#define SCC_CLOCK XTAL_10MHz
#define SCC_CLOCK XTAL_10MHz
#define MCFG_IOC2_GUINNESS_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SGI_IOC2_GUINNESS, 0)
@ -96,7 +96,7 @@ protected:
required_device<mips3_device> m_maincpu;
required_device<scc85C30_device> m_scc;
required_device<pc_lpt_device> m_pi1; // we assume standard parallel port (SPP) mode
required_device<pc_lpt_device> m_pi1; // we assume standard parallel port (SPP) mode
// TODO: SGI parallel port (SGIPP), HP BOISE high speed parallel port (HPBPP), and Ricoh scanner modes
required_device<kbdc8042_device> m_kbdc;
required_device<pit8254_device> m_pit;
@ -123,9 +123,9 @@ protected:
uint8_t m_int3_timer_clear_reg;
uint8_t m_int3_err_status_reg;
uint32_t m_par_read_cnt;
uint32_t m_par_cntl;
uint8_t m_system_id;
uint32_t m_par_read_cnt;
uint32_t m_par_cntl;
uint8_t m_system_id;
};
class ioc2_guinness_device : public ioc2_device
@ -159,9 +159,9 @@ ioc2_full_house_device::ioc2_full_house_device(const machine_config &mconfig, co
static INPUT_PORTS_START( front_panel )
PORT_START("panel_buttons")
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Power") PORT_CHANGED_MEMBER(DEVICE_SELF, ioc2_device, power_button, 0)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Volume Down") PORT_CHANGED_MEMBER(DEVICE_SELF, ioc2_device, volume_down, 0)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Volume Up") PORT_CHANGED_MEMBER(DEVICE_SELF, ioc2_device, volume_up, 0)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Power") PORT_CHANGED_MEMBER(DEVICE_SELF, ioc2_device, power_button, 0)
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Volume Down") PORT_CHANGED_MEMBER(DEVICE_SELF, ioc2_device, volume_down, 0)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Volume Up") PORT_CHANGED_MEMBER(DEVICE_SELF, ioc2_device, volume_up, 0)
INPUT_PORTS_END
ioport_constructor ioc2_device::device_input_ports() const
@ -220,12 +220,12 @@ ioc2_device::ioc2_device(const machine_config &mconfig, device_type type, const
{
}
#define FRONT_PANEL_POWER_STATE (0x01)
#define FRONT_PANEL_POWER_BUTTON_INT (0x02)
#define FRONT_PANEL_VOL_DOWN_INT (0x10)
#define FRONT_PANEL_VOL_DOWN_HOLD (0x20)
#define FRONT_PANEL_VOL_UP_INT (0x40)
#define FRONT_PANEL_VOL_UP_HOLD (0x80)
#define FRONT_PANEL_POWER_STATE (0x01)
#define FRONT_PANEL_POWER_BUTTON_INT (0x02)
#define FRONT_PANEL_VOL_DOWN_INT (0x10)
#define FRONT_PANEL_VOL_DOWN_HOLD (0x20)
#define FRONT_PANEL_VOL_UP_INT (0x40)
#define FRONT_PANEL_VOL_UP_HOLD (0x80)
void ioc2_device::device_start()
{
@ -336,9 +336,9 @@ READ32_MEMBER( ioc2_device::read )
case 0x68/4: // DMA_SEL Register
// Bits 2-0 not quite understood, seem to be copy/paste error in SGI's own documents:
//
// 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.]
// 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?]
// 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?]
// 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.]
// 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?]
// 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?]
return m_dma_sel;
case 0x70/4: // Reset Register
@ -347,15 +347,15 @@ READ32_MEMBER( ioc2_device::read )
case 0x78/4: // Write Register
// Not yet implemented, some bits unnecessary:
//
// Bit Oper Description
// 7 RW Margin High. Set low for normal +5V operation, high to step supply up to +5.5V. Cleared at reset.
// 6 RW Margin Low. Set lowf or normal +5V operation, high to step supply down to +4.5V. Cleared at reset.
// 5 RW UART1 PC Mode. Set low to configure Port1 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset.
// 4 RW UART2 PC Mode. Set low to configure Port2 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset.
// 3 RW Ethernet Auto Select (active high). Set low for manual mode, high to have LXT901 automatically select TP or AUI based on link integrity. Cleared at reset.
// 2 RW Ethernet Port Select. Set low for TP, high for AUI. This setting is only used when Auto Select is in manual mode. Cleared at reset.
// 1 RW Ethernet UTP/STP select. Set low to select 150 ohm termination fro shielded TP (default), set high to select 100 ohm termination for unshielded TP. Cleared at reset.
// 0 RW Ethernet Normal Threshold (NTH) select. Set low to select the normal TP squelch threshold (default), high to reduce threshold by 4.5 dB (set low when reset).
// Bit Oper Description
// 7 RW Margin High. Set low for normal +5V operation, high to step supply up to +5.5V. Cleared at reset.
// 6 RW Margin Low. Set lowf or normal +5V operation, high to step supply down to +4.5V. Cleared at reset.
// 5 RW UART1 PC Mode. Set low to configure Port1 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset.
// 4 RW UART2 PC Mode. Set low to configure Port2 for RS422 Mac mode, high to select RS232 PC mode. Cleared at reset.
// 3 RW Ethernet Auto Select (active high). Set low for manual mode, high to have LXT901 automatically select TP or AUI based on link integrity. Cleared at reset.
// 2 RW Ethernet Port Select. Set low for TP, high for AUI. This setting is only used when Auto Select is in manual mode. Cleared at reset.
// 1 RW Ethernet UTP/STP select. Set low to select 150 ohm termination fro shielded TP (default), set high to select 100 ohm termination for unshielded TP. Cleared at reset.
// 0 RW Ethernet Normal Threshold (NTH) select. Set low to select the normal TP squelch threshold (default), high to reduce threshold by 4.5 dB (set low when reset).
return m_write_reg;
case 0x80/4: // INT3 Local0 Status Register
@ -398,10 +398,10 @@ READ32_MEMBER( ioc2_device::read )
return 0;
}
#define DMA_SEL_CLOCK_SEL_MASK (0x30)
#define DMA_SEL_CLOCK_SEL_10MHz (0x00)
#define DMA_SEL_CLOCK_SEL_6_67MHz (0x10)
#define DMA_SEL_CLOCK_SEL_EXT (0x20)
#define DMA_SEL_CLOCK_SEL_MASK (0x30)
#define DMA_SEL_CLOCK_SEL_10MHz (0x00)
#define DMA_SEL_CLOCK_SEL_6_67MHz (0x10)
#define DMA_SEL_CLOCK_SEL_EXT (0x20)
WRITE32_MEMBER( ioc2_device::write )
{
@ -440,10 +440,10 @@ WRITE32_MEMBER( ioc2_device::write )
{
// Bits 2-0 not quite understood, seem to be copy/paste error in SGI's own documents:
//
// 5:4 RW Serial Port Clock Select: 00 selects a 10MHz internal clock (default), 01 selects a 6.67MHz internal clock, and 02 or 03 selects the external clock input.
// 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.]
// 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?]
// 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?]
// 5:4 RW Serial Port Clock Select: 00 selects a 10MHz internal clock (default), 01 selects a 6.67MHz internal clock, and 02 or 03 selects the external clock input.
// 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.]
// 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?]
// 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?]
uint8_t old = m_dma_sel;
m_dma_sel = data;
uint8_t diff = old ^ m_dma_sel;
@ -559,8 +559,8 @@ INPUT_CHANGED_MEMBER( ioc2_device::volume_down )
}
}
#define IOC2_TAG "ioc2"
#define RTC_TAG "ds1386"
#define IOC2_TAG "ioc2"
#define RTC_TAG "ds1386"
struct hpc3_t
{

2
src/mame/drivers/itgambl2.cpp
View File

@ -1077,7 +1077,7 @@ ROM_END
1x 17x2 pins connector (J5)
2x trimmer (P1-A/S)(P2-VOL)
2x 8x2 switches DIP (SW1,SW2)
1x battery 3.6V (BT1)
1x battery 3.6V (BT1)
*/
ROM_START( granfrat )

4
src/mame/drivers/jalmah.cpp
View File

@ -40,7 +40,7 @@ TODO:
the programs are actually into the m68k program itself (like hachamf/tdragon/ddealer);
-Video code could be optimized too (for example by calling the priority function only when
priority number is updated), might also need a merging with Jaleco Mega System 1/NMK16 drivers;
Notes (1st MCU ver.):
-$f000e is bogus,maybe the program snippets can modify this value,or the MCU itself can
do that,returning the contents of D0 register seems enough for now...
@ -54,7 +54,7 @@ Notes (1st MCU ver.):
-$f0020 is for the sound program,same for all games, for example mjzoomin hasn't any clear
write to $80040 area and the program jumps to $f0020 when there should be a sample.
-Likewise, D0 upper byte is used but currently ignored.
============================================================================================
Debug cheats:

10
src/mame/drivers/midvunit.cpp
View File

@ -378,7 +378,7 @@ READ32_MEMBER(midvunit_state::midvunit_output_r)
return m_output;
}
void midvunit_state::set_input(const char *s)
void midvunit_state::set_input(const char *s)
{
m_galil_input = s;
m_galil_input_index = 0;
@ -451,13 +451,13 @@ WRITE32_MEMBER(midvunit_state::midvunit_output_w)
else if (strstr(m_galil_output,"MG \"Z\", _TSZ {$2.0}"))
set_input("Z$00");
/*else if (strstr(m_galil_output,"MG \"G\""))
set_input("G");
set_input("G");
else if (strstr(m_galil_output,"MG \"W\""))
set_input("W");
set_input("W");
else if (strstr(m_galil_output,"MG \"S\""))
set_input("S");
set_input("S");
else if (strstr(m_galil_output,"MG \"Q\""))
set_input("Q");*/
set_input("Q");*/
else
set_input(":");
logerror("Galil Command: %s\n", m_galil_output);

2
src/mame/drivers/mini2440.cpp
View File

@ -232,7 +232,7 @@ static MACHINE_CONFIG_START( mini2440, mini2440_state )
MCFG_SCREEN_UPDATE_DEVICE("s3c2440", s3c2440_device, screen_update)
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("ldac", UDA1341TS, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0) // uda1341ts.u12
MCFG_SOUND_ADD("ldac", UDA1341TS, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0) // uda1341ts.u12
MCFG_SOUND_ADD("rdac", UDA1341TS, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0) // uda1341ts.u12
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE_EX(0, "ldac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "ldac", -1.0, DAC_VREF_NEG_INPUT)

24
src/mame/drivers/mjsenpu.cpp
View File

@ -28,7 +28,7 @@
Instead of properly representing each of the dips, the 1st switch in
each bank ends up turning on/off the entire row display (for rows 2/3
it shifts row 1 by one pixel)
This then means the 2nd switch changes the digit in the 1st position
so
@ -57,7 +57,7 @@ public:
m_oki(*this, "oki"),
m_hopper(*this, "hopper"),
m_mainram(*this, "mainram"),
// m_vram(*this, "vram"),
// m_vram(*this, "vram"),
m_palette(*this, "palette")
{
}
@ -68,7 +68,7 @@ public:
required_device<ticket_dispenser_device> m_hopper;
required_shared_ptr<uint32_t> m_mainram;
// required_shared_ptr<uint32_t> m_vram;
// required_shared_ptr<uint32_t> m_vram;
uint8_t m_pal[0x200];
uint32_t m_vram0[0x20000 / 4];
uint32_t m_vram1[0x20000 / 4];
@ -80,7 +80,7 @@ public:
DECLARE_WRITE8_MEMBER(palette_low_w);
DECLARE_WRITE8_MEMBER(palette_high_w);
void set_palette(int offset);
DECLARE_WRITE8_MEMBER(control_w);
DECLARE_WRITE8_MEMBER(mux_w);
@ -154,7 +154,7 @@ WRITE8_MEMBER(mjsenpu_state::control_w)
m_oki->set_rom_bank((data&0x10)>>4);
// bits 0x08 is used in the alt payout / hopper mode (see dipswitches)
// 0x04 seem to be hopper/ticket related? different ones get used depending on the dips
m_hopper->write(space, 0, data & 0x04);
@ -164,8 +164,8 @@ WRITE8_MEMBER(mjsenpu_state::control_w)
// bit 0x01 alternates frequently, using as video buffer, but that's a complete guess
m_control = data;
// if (data &~0x9e)
// printf("control_w %02x\n", data);
// if (data &~0x9e)
// printf("control_w %02x\n", data);
}
WRITE8_MEMBER(mjsenpu_state::mux_w)
@ -306,9 +306,9 @@ static INPUT_PORTS_START( mjsenpu )
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW1")
PORT_DIPNAME( 0x00000003, 0x00000003, DEF_STR( Coin_A ) )
@ -443,7 +443,7 @@ void mjsenpu_state::machine_reset()
{
}
/*
/*
following clocks are on the PCB
22.1184
@ -499,14 +499,14 @@ ROM_END
READ32_MEMBER(mjsenpu_state::mjsenpu_speedup_r)
{
int pc = m_maincpu->pc();
if (pc == 0xadb8)
{
space.device().execute().spin_until_interrupt();
}
else
{
// printf("%08x\n", pc);
// printf("%08x\n", pc);
}
return m_mainram[0x23468/4];

2
src/mame/drivers/mjsister.cpp
View File

@ -360,7 +360,7 @@ static INPUT_PORTS_START( mjsister )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW2") /* not on PCB */
PORT_START("DSW2") /* not on PCB */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0")

2
src/mame/drivers/nbmj8891.cpp
View File

@ -1243,7 +1243,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( scandal )
// do not have the manual
// do not have the manual
PORT_START("DSWA")
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSWA:1,2,3")
PORT_DIPSETTING( 0x07, "1 (Easy)" )

2
src/mame/drivers/nbmj8991.cpp
View File

@ -625,7 +625,7 @@ static INPUT_PORTS_START( qmhayaku )
PORT_DIPNAME( 0x40, 0x40, "Character Display Test" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("DSWA:8") // manual states this is unused
PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("DSWA:8") // manual states this is unused
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )

2
src/mame/drivers/ninjakd2.cpp
View File

@ -1657,7 +1657,7 @@ void ninjakd2_state::robokid_motion_error_kludge(uint16_t offset)
// It looks like it's due to a buggy random number generator,
// then it possibly happens on the real arcade cabinet too.
// I doubt it is protection related, but you can never be sure.
// Update 131016: there's also a 5208 VECTOR ERROR happening at worm mid-boss on stage 10, I'm prone to think it's
// Update 131016: there's also a 5208 VECTOR ERROR happening at worm mid-boss on stage 10, I'm prone to think it's
// a timing/sprite fault on our side therefore marking as UNEMULATED_PROTECTION until this is resolved. -AS
uint8_t *ROM = memregion("maincpu")->base() + offset;
ROM[0] = 0xe6;

104
src/mame/drivers/niyanpai.cpp
View File

@ -331,35 +331,35 @@ static INPUT_PORTS_START( niyanpai )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSWA")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSWA:1,2")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSWA:1,2")
PORT_DIPSETTING( 0x03, "1" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x00, "4" )
PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:3,4")
PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "Game Sounds" ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPNAME( 0x20, 0x00, "Game Sounds" ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
PORT_START("DSWB")
PORT_DIPNAME( 0x01, 0x00, "Nudity" ) PORT_DIPLOCATION("DSWB:1")
PORT_DIPNAME( 0x01, 0x00, "Nudity" ) PORT_DIPLOCATION("DSWB:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPNAME( 0x80, 0x80, "Graphic ROM Test" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@ -458,50 +458,50 @@ INPUT_PORTS_END
static INPUT_PORTS_START( musobana ) // I don't have manual for this game.
PORT_START("DSWA")
PORT_DIPNAME( 0x03, 0x03, "Game Out" ) PORT_DIPLOCATION("DSWA:1,2")
PORT_DIPNAME( 0x03, 0x03, "Game Out" ) PORT_DIPLOCATION("DSWA:1,2")
PORT_DIPSETTING( 0x03, "90% (Easy)" )
PORT_DIPSETTING( 0x02, "80%" )
PORT_DIPSETTING( 0x01, "70%" )
PORT_DIPSETTING( 0x00, "60% (Hard)" )
PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:3,4")
PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) )
PORT_DIPNAME( 0x10, 0x10, "DIPSW 1-5" ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPNAME( 0x10, 0x10, "DIPSW 1-5" ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "DIPSW 1-7" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPNAME( 0x40, 0x40, "DIPSW 1-7" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, "Game Type" ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPNAME( 0x80, 0x00, "Game Type" ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPSETTING( 0x80, "Medal Type" )
PORT_DIPSETTING( 0x00, "Credit Type" )
PORT_START("DSWB")
PORT_DIPNAME( 0x03, 0x03, "Bet Min" ) PORT_DIPLOCATION("DSWB:1,2")
PORT_DIPNAME( 0x03, 0x03, "Bet Min" ) PORT_DIPLOCATION("DSWB:1,2")
PORT_DIPSETTING( 0x03, "1" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x00, "5" )
PORT_DIPNAME( 0x0c, 0x00, "Bet Max" ) PORT_DIPLOCATION("DSWB:3,4")
PORT_DIPNAME( 0x0c, 0x00, "Bet Max" ) PORT_DIPLOCATION("DSWB:3,4")
PORT_DIPSETTING( 0x0c, "1" )
PORT_DIPSETTING( 0x08, "5" )
PORT_DIPSETTING( 0x04, "10" )
PORT_DIPSETTING( 0x00, "20" )
PORT_DIPNAME( 0x10, 0x10, "DIPSW 2-5" ) PORT_DIPLOCATION("DSWB:5")
PORT_DIPNAME( 0x10, 0x10, "DIPSW 2-5" ) PORT_DIPLOCATION("DSWB:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, "Score Pool" ) PORT_DIPLOCATION("DSWB:6")
PORT_DIPNAME( 0x20, 0x20, "Score Pool" ) PORT_DIPLOCATION("DSWB:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "DIPSW 2-7" ) PORT_DIPLOCATION("DSWB:7")
PORT_DIPNAME( 0x40, 0x40, "DIPSW 2-7" ) PORT_DIPLOCATION("DSWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "DIPSW 2-8" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPNAME( 0x80, 0x80, "DIPSW 2-8" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -574,54 +574,54 @@ INPUT_PORTS_END
static INPUT_PORTS_START( mhhonban ) // I don't have manual for this game.
PORT_START("DSWA")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 1-1" ) PORT_DIPLOCATION("DSWA:1")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 1-1" ) PORT_DIPLOCATION("DSWA:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "DIPSW 1-2" ) PORT_DIPLOCATION("DSWA:2")
PORT_DIPNAME( 0x02, 0x02, "DIPSW 1-2" ) PORT_DIPLOCATION("DSWA:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "DIPSW 1-3" ) PORT_DIPLOCATION("DSWA:3")
PORT_DIPNAME( 0x04, 0x04, "DIPSW 1-3" ) PORT_DIPLOCATION("DSWA:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:4")
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
PORT_DIPNAME( 0x10, 0x00, "DIPSW 1-5" ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPNAME( 0x10, 0x00, "DIPSW 1-5" ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "DIPSW 1-7" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPNAME( 0x40, 0x40, "DIPSW 1-7" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "DIPSW 1-8" ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPNAME( 0x80, 0x80, "DIPSW 1-8" ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSWB")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 2-1" ) PORT_DIPLOCATION("DSWB:1")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 2-1" ) PORT_DIPLOCATION("DSWB:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "DIPSW 2-2" ) PORT_DIPLOCATION("DSWB:2")
PORT_DIPNAME( 0x02, 0x02, "DIPSW 2-2" ) PORT_DIPLOCATION("DSWB:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "DIPSW 2-3" ) PORT_DIPLOCATION("DSWB:3")
PORT_DIPNAME( 0x04, 0x04, "DIPSW 2-3" ) PORT_DIPLOCATION("DSWB:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, "DIPSW 2-4" ) PORT_DIPLOCATION("DSWB:4")
PORT_DIPNAME( 0x08, 0x08, "DIPSW 2-4" ) PORT_DIPLOCATION("DSWB:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, "DIPSW 2-5" ) PORT_DIPLOCATION("DSWB:5")
PORT_DIPNAME( 0x10, 0x10, "DIPSW 2-5" ) PORT_DIPLOCATION("DSWB:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, "DIPSW 2-6" ) PORT_DIPLOCATION("DSWB:6")
PORT_DIPNAME( 0x20, 0x20, "DIPSW 2-6" ) PORT_DIPLOCATION("DSWB:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "DIPSW 2-7" ) PORT_DIPLOCATION("DSWB:7")
PORT_DIPNAME( 0x40, 0x40, "DIPSW 2-7" ) PORT_DIPLOCATION("DSWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "Option Test" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPNAME( 0x80, 0x80, "Option Test" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@ -640,54 +640,54 @@ INPUT_PORTS_END
static INPUT_PORTS_START( zokumahj ) // I don't have manual for this game.
PORT_START("DSWA")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 1-1" ) PORT_DIPLOCATION("DSWA:1")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 1-1" ) PORT_DIPLOCATION("DSWA:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "DIPSW 1-2" ) PORT_DIPLOCATION("DSWA:2")
PORT_DIPNAME( 0x02, 0x02, "DIPSW 1-2" ) PORT_DIPLOCATION("DSWA:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "DIPSW 1-3" ) PORT_DIPLOCATION("DSWA:3")
PORT_DIPNAME( 0x04, 0x04, "DIPSW 1-3" ) PORT_DIPLOCATION("DSWA:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:4")
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DSWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
PORT_DIPNAME( 0x10, 0x10, "DIPSW 1-5" ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPNAME( 0x10, 0x10, "DIPSW 1-5" ) PORT_DIPLOCATION("DSWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "DIPSW 1-7" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPNAME( 0x40, 0x40, "DIPSW 1-7" ) PORT_DIPLOCATION("DSWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "DIPSW 1-8" ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPNAME( 0x80, 0x80, "DIPSW 1-8" ) PORT_DIPLOCATION("DSWA:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSWB")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 2-1" ) PORT_DIPLOCATION("DSWB:1")
PORT_DIPNAME( 0x01, 0x01, "DIPSW 2-1" ) PORT_DIPLOCATION("DSWB:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "DIPSW 2-2" ) PORT_DIPLOCATION("DSWB:2")
PORT_DIPNAME( 0x02, 0x02, "DIPSW 2-2" ) PORT_DIPLOCATION("DSWB:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "DIPSW 2-3" ) PORT_DIPLOCATION("DSWB:3")
PORT_DIPNAME( 0x04, 0x04, "DIPSW 2-3" ) PORT_DIPLOCATION("DSWB:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, "DIPSW 2-4" ) PORT_DIPLOCATION("DSWB:4")
PORT_DIPNAME( 0x08, 0x08, "DIPSW 2-4" ) PORT_DIPLOCATION("DSWB:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, "DIPSW 2-5" ) PORT_DIPLOCATION("DSWB:5")
PORT_DIPNAME( 0x10, 0x10, "DIPSW 2-5" ) PORT_DIPLOCATION("DSWB:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, "DIPSW 2-6" ) PORT_DIPLOCATION("DSWB:6")
PORT_DIPNAME( 0x20, 0x20, "DIPSW 2-6" ) PORT_DIPLOCATION("DSWB:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "DIPSW 2-7" ) PORT_DIPLOCATION("DSWB:7")
PORT_DIPNAME( 0x40, 0x40, "DIPSW 2-7" ) PORT_DIPLOCATION("DSWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "Option Test" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPNAME( 0x80, 0x80, "Option Test" ) PORT_DIPLOCATION("DSWB:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )

2
src/mame/drivers/octopus.cpp
View File

@ -201,7 +201,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(serial_clock_w);
DECLARE_WRITE_LINE_MEMBER(parallel_busy_w) { m_printer_busy = state; }
DECLARE_WRITE_LINE_MEMBER(parallel_slctout_w) { m_printer_slctout = state; }
DECLARE_WRITE_LINE_MEMBER(dack0_w) { m_dma1->hack_w(state ? 0 : 1); } // for all unused DMA channel?
DECLARE_WRITE_LINE_MEMBER(dack1_w) { if(!state) m_current_dma = 1; else if(m_current_dma == 1) m_current_dma = -1; } // HD
DECLARE_WRITE_LINE_MEMBER(dack2_w) { if(!state) m_current_dma = 2; else if(m_current_dma == 2) m_current_dma = -1; } // RAM refresh

380
src/mame/drivers/rainbow.cpp
View File

@ -1,4 +1,4 @@
// Define suppresses costly smooth scroll / updates when debugging:
// Define suppresses costly smooth scroll / updates when debugging:
// ENABLE BY UNCOMMENTING. ADDITIONALLY, SET SMOOTH SCROLL IN EMULATION (DISABLE BY SETTING JUMP SCROLL. To enter SETUP hit ScrollLock)-
//#define BOOST_DEBUG_PERFORMANCE
@ -13,7 +13,7 @@
// Two modes: highres and medres mode (different bank length..?)
// - MEDRES: palette of 16 colors out of 4096. 384 x 240
// - HIGRES: palette of 4 colors out of 4096. 800 x 240
// Palette takes 2 byte per palette entry. CLUT ("color map") is 32 byte long.
// Palette takes 2 byte per palette entry. CLUT ("color map") is 32 byte long.
------------------------------------------------------------------------------------------------
THE DEC 'R-M-B' COLOR CABLE VS. THE UNOFFICIAL 'R-G-B' MODE (A BIT OF HISTORY)
@ -25,10 +25,10 @@ THE DEC 'R-M-B' COLOR CABLE VS. THE UNOFFICIAL 'R-G-B' MODE (A BIT OF HISTORY)
// A patch from one of the archives corrects the GWBASIC palette problem when using 2 monitors [Bavarese].
EMULATION SPECIFIC
// If a program disables text output (via port $0A), a log message is given.
// If a program disables text output (via port $0A), a log message is given.
// DUAL MONITOR enables both screens, even if onboard graphics has been accidently shut off
// (helps debugging semi broken programs, for example Doodle).
// DUAL MONITOR enables both screens, even if onboard graphics has been accidently shut off
// (helps debugging semi broken programs, for example Doodle).
SCREEN 1 vs. SCREEN 2 IN EMULATION
// All GDC 7220 output is displayed on the right. Be it color or monochrome, Option Graphics output is on screen 2.
@ -36,8 +36,8 @@ SCREEN 1 vs. SCREEN 2 IN EMULATION
// The type of monochrome monitor (VR-210 A, B or C) is selectable via another DIP (coarsly simulates a phosphor color).
BUGS
- MEDRES LOOKS CORRECT
- HIRES-MODE UNTESTED.
- MEDRES LOOKS CORRECT
- HIRES-MODE UNTESTED.
- VECTOR MODE SEEMS TO DISPLAY NOTHING AT ALL (16 bit access botched?) Examples: MMIND (MasterMind, after BMP logo), SOLIT (Solitair).
- GDC diagnostic disk bails out on 11 of 13 low level tests. SCROLL CHECK crashes CPU.
@ -51,18 +51,18 @@ UNKNOWN IMPLEMENTATION DETAILS:
// b. SCROLL BUFFER initialization (details) unclear. What happens when a programs does not write all 256 bytes? Value of uninitialized areas?
Play, then retry (y) SCRAM to see the effect. Scram doesn't seem to write all (256) bytes, a GDC RESET is only executed at startup...
(PAGE 48 OF PDF HAS A SUPERFICIAL DESCRIPTION OF THE SCROLL BUFFER)
// c. UNVERIFIED XTAL / CLOCK:
// There is a 31.188 Mhz crystal in DUELL's hand written Option Graphics circuit (31.188 possibly measured, as it cannot be found in XTAL).
// According to the datasheet, the NEC 7220 was certified for 4.0 , 5.0, and 5.5 Mhz and the 7220A for 6.0, 7.0, and 8.0 Mhz
// d. UPD7220 oddities: * refresh rate much too fast at 32Mhz/4 (Upd7220 LOG says 492 Mhz?!).
// * 7220 pixel stretch / visible area looks odd (pixels stretched out too wide at 384 x 240. Compare the real SCRAM screenshot online)
// * 7220 pixel stretch / visible area looks odd (pixels stretched out too wide at 384 x 240. Compare the real SCRAM screenshot online)
// e. FIXME (MAME/MESS): what happens when the left screen is at 50 Hz and the right at 60 Hz?
// According to Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
// (the partial update system gets very confused because it expects both the screens to end at the same time
// and if that isn't the case large parts of one screen end up not updating at all)
// According to Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
// (the partial update system gets very confused because it expects both the screens to end at the same time
// and if that isn't the case large parts of one screen end up not updating at all)
*/
// license:GPL-2.0+
@ -159,7 +159,7 @@ Can't be added if RD51 hard disk controller present (J4 + J5). For programming i
* ( NO DUMP YET ) PC CHARACTER SET (Suitable Solutions?). Supported by IBM PC software emulator named CodeBlue (see 3.1 patch)
* ( NO DUMP YET ) TECHNICAL CHARACTER SET (TCS; available for Rainbow 100, 100B, 100+; $95 from DEC)
Source: price list of a DEC reseller.
Source: price list of a DEC reseller.
Contains 94 graphic characters from $A1 - $FE, including symbols and characters used in technical applications,
see http://support.attachmate.com/techdocs/1184.html and http://vt100.net/charsets/technical.html
@ -269,7 +269,7 @@ DIAGNOSTIC-LEDs |J3 | |J2 | |J1 |
| ROM (4K) ...J7... | ...J9 = RX50 |
| |
|-------------PCB# 5416206 / 5016205-01C1-------------|
CONNECTORS ("J"):
...J5... ...J4... both: RD51 controller (hard disk)
...J5... ...J4... both: EXTENDED COMM. controller
@ -351,29 +351,29 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
#define GDC_SELECT_WRITE_BUFFER 0x01 // 0xFE
#define GDC_SELECT_PATTERN_MULTIPLIER 0x02 // 0xFD
#define GDC_SELECT_PATTERN 0x04 // 0xFB
#define GDC_SELECT_FG_BG 0x08 // 0xF7
#define GDC_SELECT_FG_BG 0x08 // 0xF7
#define GDC_SELECT_ALU_PS 0x10 // 0xEF
#define GDC_SELECT_COLOR_MAP 0x20 // 0xDF
#define GDC_SELECT_MODE_REGISTER 0x40 // 0xBF
#define GDC_SELECT_SCROLL_MAP 0x80 // 0x7F
// MODE REGISTER
#define GDC_MODE_HIGHRES 0x01
#define GDC_MODE_VECTOR 0x02
// MODE REGISTER
#define GDC_MODE_HIGHRES 0x01
#define GDC_MODE_VECTOR 0x02
// ( " ) READBACK OPERATION (if ENABLE_WRITES = 0):
#define GDC_MODE_ENABLE_WRITES 0x10
#define GDC_MODE_ENABLE_WRITES 0x10
#define GDC_MODE_READONLY_SCROLL_MAP 0x20
// ( " ) READBACK OPERATION (plane select = bit mask in bits 2 + 3 of MODE register):
#define GDC_MODE_READBACK_PLANE_MASK 12
#define GDC_MODE_READBACK_PLANE_00 0x00
#define GDC_MODE_READBACK_PLANE_01 0x04
#define GDC_MODE_READBACK_PLANE_02 0x08
#define GDC_MODE_READBACK_PLANE_03 0x0c
#define GDC_MODE_READBACK_PLANE_00 0x00
#define GDC_MODE_READBACK_PLANE_01 0x04
#define GDC_MODE_READBACK_PLANE_02 0x08
#define GDC_MODE_READBACK_PLANE_03 0x0c
#define GDC_MODE_ENABLE_VSYNC_IRQ 0x40
#define GDC_MODE_ENABLE_VIDEO 0x80
#define GDC_MODE_ENABLE_VIDEO 0x80
// ALU_PS REGISTER (bits 5 + 4):
#define ALU_PS_MODE_MASK 48
@ -452,7 +452,7 @@ public:
m_mpsc(*this, "upd7201"),
m_dbrg(*this, "com8116"),
m_kbd8251(*this, "kbdser"),
m_lk201(*this, LK201_TAG),
@ -548,7 +548,7 @@ public:
DECLARE_FLOPPY_FORMATS(floppy_formats);
UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
DECLARE_READ16_MEMBER(vram_r);
DECLARE_WRITE16_MEMBER(vram_w);
DECLARE_WRITE_LINE_MEMBER(GDC_vblank_irq);
@ -556,7 +556,7 @@ public:
protected:
virtual void machine_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
enum
{ // LOWEST PRIORITY
@ -603,7 +603,7 @@ private:
required_shared_ptr<uint8_t> m_shared;
optional_device<ds1315_device> m_rtc;
required_device<upd7220_device> m_hgdc; // GDC-NEW
required_device<screen_device> m_screen2;
required_device<palette_device> m_palette2;
@ -623,7 +623,7 @@ private:
hard_disk_file *rainbow_hdc_file(int ref);
uint8_t m_GDC_WRITE_BUFFER[16]; // 16 x 8 bits for CPU, 8 x 16 for GDC
uint8_t m_GDC_WRITE_BUFFER[16]; // 16 x 8 bits for CPU, 8 x 16 for GDC
uint8_t m_GDC_COLOR_MAP[32];
uint8_t m_GDC_SCROLL_BUFFER_PRELOAD[256];
uint8_t m_GDC_SCROLL_BUFFER[256];
@ -631,11 +631,11 @@ private:
uint8_t m_GDC_INDIRECT_REGISTER, m_GDC_MODE_REGISTER, m_GDC_scroll_index, m_GDC_color_map_index, m_GDC_write_buffer_index;
uint8_t m_GDC_ALU_PS_REGISTER, m_GDC_FG_BG;
uint8_t m_vpat, m_patmult, m_patcnt, m_patidx;
uint16_t m_GDC_WRITE_MASK;
bool m_scroll_buffer_changed, m_color_map_changed;
bool m_ONBOARD_GRAPHICS_SELECTED; // (internal switch, on board video to mono out)
bool m_SCREEN_BLANK;
int INT88, INTZ80;
@ -680,34 +680,34 @@ private:
emu_timer *cmd_timer;
const int vectors[9] = { 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x02 };
};
};
// GDC RESET MACRO - used in "machine_reset" & GDC_EXTRA_REGISTER_w !
#define GDC_RESET_MACRO \
m_GDC_INDIRECT_REGISTER = 0; \
m_GDC_MODE_REGISTER = 0; \
m_GDC_WRITE_MASK = 0; \
m_GDC_write_buffer_index = 0; \
m_GDC_scroll_index = 0; \
m_GDC_color_map_index = 0; \
m_GDC_ALU_PS_REGISTER = 0; \
m_vpat = 0; \
m_patmult = 0; \
m_patcnt = 0; \
m_patidx = 7; \
m_GDC_FG_BG = 0; \
#define GDC_RESET_MACRO \
m_GDC_INDIRECT_REGISTER = 0; \
m_GDC_MODE_REGISTER = 0; \
m_GDC_WRITE_MASK = 0; \
m_GDC_write_buffer_index = 0; \
m_GDC_scroll_index = 0; \
m_GDC_color_map_index = 0; \
m_GDC_ALU_PS_REGISTER = 0; \
m_vpat = 0; \
m_patmult = 0; \
m_patcnt = 0; \
m_patidx = 7; \
m_GDC_FG_BG = 0; \
m_color_map_changed = true; \
for(int i=0; i <256; i++) { m_GDC_SCROLL_BUFFER[i] = m_GDC_SCROLL_BUFFER_PRELOAD[i] = i; };\
m_scroll_buffer_changed = true; \
m_scroll_buffer_changed = true; \
printf("\n** NEC 7220 GDC RESET **\n");
UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
{
#ifdef BOOST_DEBUG_PERFORMANCE
uint8_t *ram = memregion("maincpu")->base();
if( !(m_p_vol_ram[0x84] == 0x00) )
{
if( !(m_p_vol_ram[0x84] == 0x00) )
{
if( (MOTOR_DISABLE_counter) || (ram[0xEFFFE] & 16) ) // if HDD/FDD ACTIVITY -OR- SMOOTH SCROLL IN PROGRESS
return;
}
@ -716,27 +716,27 @@ UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
const rgb_t *paletteX = m_palette2->palette()->entry_list_raw();
int xi;
uint16_t plane0, plane1, plane2, plane3;
uint16_t plane0, plane1, plane2, plane3;
uint8_t pen;
if(!(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VIDEO))
return; // no output from graphics option
return; // no output from graphics option
// ********************* GET BITMAP DATA FOR 4 PLANES ***************************************
// _READ_ BIT MAP from 2 or 4 planes (plane 0 is least, plane 3 most significant). See page 42 / 43
if(m_GDC_MODE_REGISTER & GDC_MODE_HIGHRES)
{
// _READ_ BIT MAP from 2 or 4 planes (plane 0 is least, plane 3 most significant). See page 42 / 43
if(m_GDC_MODE_REGISTER & GDC_MODE_HIGHRES)
{
// HIGH RES (2 planes, 2 color bits, 4 color map entries / 4 MONOCHROME SHADES)
// MANUAL: (GDC "sees" 2 planes X 16 bits X 16K words)!
// !!! m_video_ram is defined as uint16_t !!!
// !!! m_video_ram is defined as uint16_t !!!
plane0 = m_video_ram[ ((address & 0x7fff) + 0x00000) >> 1 ]; // Video Ram is defined as LITTLE_ENDIAN, 16 (?):
plane1 = m_video_ram[ ((address & 0x7fff) + 0x20000) >> 1 ]; // 8 x 32 K is 0x40000, see page 16
plane2 = 0;
plane3 = 0;
}
else
{
else
{
// MED.RESOLUTION (4 planes, 4 color bits, 16 color map entries / 16 (4) MONOCHROME SHADES)
// MANUAL SAYS: (GDC "sees" 4 planes X 16 bits X 8K words)!
plane0 = m_video_ram[((address & 0x3fff) + 0x00000) >> 1];
@ -746,17 +746,17 @@ UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
}
// ********************* GET BITMAP DATA per PLANE ***************************************
bool mono = (m_inp13->read() == MONO_MONITOR) ? true : false; // 1 = MONO, 2 = COLOR, 3 = DUAL MONITOR
bool mono = (m_inp13->read() == MONO_MONITOR) ? true : false; // 1 = MONO, 2 = COLOR, 3 = DUAL MONITOR
for(xi=0;xi<16;xi++)
{
pen = BIT(plane0 , xi) |
( BIT(plane1 , xi) << 1 ) |
pen = BIT(plane0 , xi) |
( BIT(plane1 , xi) << 1 ) |
( BIT(plane2 , xi) << 2 ) |
( BIT(plane3 , xi) << 3 );
if (bitmap.cliprect().contains(x + xi, y))
bitmap.pix32(y, x + xi) = paletteX[mono ? (pen + 16) : pen];
bitmap.pix32(y, x + xi) = paletteX[mono ? (pen + 16) : pen];
}
}
@ -871,7 +871,7 @@ AM_RANGE(0x11, 0x11) AM_DEVREADWRITE("kbdser", i8251_device, status_r, control_w
// * Color graphics option (uses NEC upd7220 GDC). REFERENCE: Programmer's Reference: AA-AE36A-TV.
// Either 384 x 240 x 16 or 800 x 240 x 4 colors (out of 4096). 8 x 64 K video RAM.
// Color graphics independent from text output if 8088 port $0a (bit 2) is zero.
// Color graphics independent from text output if 8088 port $0a (bit 2) is zero.
// This driver offers a DIP switch to enable or disable COLOR GRAPHICS altogether (affects "system_parameter_r" ...)
@ -1030,12 +1030,12 @@ PORT_DIPSETTING(0x00, DEF_STR(Off))
PORT_DIPSETTING(0x01, DEF_STR(On))
PORT_START("MONITOR CONFIGURATION") // GDC-NEW
PORT_DIPNAME(0x03, 0x03, "MONITOR CONFIGURATION")
PORT_DIPNAME(0x03, 0x03, "MONITOR CONFIGURATION")
PORT_DIPSETTING(0x01, "MONO ONLY (SCREEN 2: 16 monochrome shades)")
PORT_DIPSETTING(0x02, "COLOR ONLY (SCREEN 2: R-G-B; mono -> green)")
PORT_DIPSETTING(0x03, "DUAL MONITOR (SCREEN 1: TEXT; SCREEN 2: R-G-B)")
INPUT_PORTS_END
void rainbow_state::machine_reset()
{
// Configure RAM
@ -1196,35 +1196,35 @@ uint32_t rainbow_state::screen_update_rainbow(screen_device &screen, bitmap_ind1
#ifdef BOOST_DEBUG_PERFORMANCE
uint8_t *ram = memregion("maincpu")->base();
if( !(m_p_vol_ram[0x84] == 0x00) )
{
if( !(m_p_vol_ram[0x84] == 0x00) )
{
if( (MOTOR_DISABLE_counter) || (ram[0xEFFFE] & 16) ) // if HDD/FDD ACTIVITY -OR- SMOOTH SCROLL IN PROGRESS
return 0;
}
#endif
int monitor_selected = m_inp13->read();
if(monitor_selected != old_monitor)
{
int monitor_selected = m_inp13->read();
if(monitor_selected != old_monitor)
{
old_monitor = monitor_selected;
m_color_map_changed = true;
}
int palette_selected = m_inp9->read();
if(palette_selected != old_palette)
{
if(palette_selected != old_palette)
{
old_palette = palette_selected;
m_color_map_changed = true;
}
m_crtc->palette_select(palette_selected);
// GDC-NEW
// GDC-NEW
// NEC 7220 output (MONO or COLOR) can only be shown on the RIGHT hand side,
// so disable TEXT out if 'dual monitor' is unselected.
// BLANK SCREEN : ONLY IF 1) graphics option output selected AND 2) no multi monitor setup selected
if( m_SCREEN_BLANK ||
( (!m_ONBOARD_GRAPHICS_SELECTED) && (monitor_selected != 3))
if( m_SCREEN_BLANK ||
( (!m_ONBOARD_GRAPHICS_SELECTED) && (monitor_selected != 3))
)
m_crtc->video_blanking(bitmap, cliprect);
else
@ -2352,70 +2352,70 @@ WRITE_LINE_MEMBER(rainbow_state::GDC_vblank_irq)
const uint8_t v_levels[16] = { 255, 217, 201,186, 171, 156, 140, 125, 110, 97, 79, 66, 54, 31, 18, 0 };
if(m_scroll_buffer_changed)
{
{
m_scroll_buffer_changed = false;
for(xi = 0; xi < 256; xi++) // LOAD REAL SCROLL BUFFER FROM PRELOAD BUFFER:
m_GDC_SCROLL_BUFFER[xi] = m_GDC_SCROLL_BUFFER_PRELOAD[xi];
for(xi = 0; xi < 256; xi++) // LOAD REAL SCROLL BUFFER FROM PRELOAD BUFFER:
m_GDC_SCROLL_BUFFER[xi] = m_GDC_SCROLL_BUFFER_PRELOAD[xi];
}
if(m_color_map_changed)
{
{
m_color_map_changed = false;
for(xi=0;xi<16;xi++) // DELAYED LOAD OF PALETTE ...
{
for(xi=0;xi<16;xi++) // DELAYED LOAD OF PALETTE ...
{
uint8_t colordata1 = m_GDC_COLOR_MAP[xi];
uint8_t colordata2 = m_GDC_COLOR_MAP[xi + 16]; // Does it matter if the palette is incomplete...?
uint8_t colordata2 = m_GDC_COLOR_MAP[xi + 16]; // Does it matter if the palette is incomplete...?
// Color map: 32 x 8
// 2nd 16 Byte 1st 16 Bytes (colordata1)
// ----------- ------------
// 7..4 3..0 7..4 3..0
// Mono Blue Red Green
// Color map: 32 x 8
// 2nd 16 Byte 1st 16 Bytes (colordata1)
// ----------- ------------
// 7..4 3..0 7..4 3..0
// Mono Blue Red Green
mono = (colordata2 & 0xF0) >> 4; // FIXME: limit palette in appropriate modes on 100-A
blue = (colordata2 & 0x0F);
red = (colordata1 & 0xF0) >> 4;
green =(colordata1 & 0x0F);
// NOTE: SECOND 16 BYTES ARE MONO PALETTE, _FIRST_ 16 ARE COLOR PALETTE * HERE * (on the VT240 driver, it is the other way round)
// NOTE: SECOND 16 BYTES ARE MONO PALETTE, _FIRST_ 16 ARE COLOR PALETTE * HERE * (on the VT240 driver, it is the other way round)
switch( m_inp13->read())
{
case MONO_MONITOR: // FIXME: bad colors!
{
{
case MONO_MONITOR: // FIXME: bad colors!
{
switch( m_inp9->read() ) // - monochrome monitor (phosphor) type (1,2,3)
{
{
case 1: // BLACK & WHITE
m_palette2->set_pen_color(xi + 16, pal4bit(mono), pal4bit(mono), pal4bit(mono) );
m_palette2->set_pen_color(xi + 16, pal4bit(mono), pal4bit(mono), pal4bit(mono) );
break;
case 2: // SHADES OF GREEN
// For now, a hand picked value from VTVIDEO * is coarsly transformed into a RGB value.
case 2: // SHADES OF GREEN
// For now, a hand picked value from VTVIDEO * is coarsly transformed into a RGB value.
red = uint8_t( ( 35.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) ); // 80 % = NORMAL *
green = uint8_t( (145.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
blue = uint8_t( ( 75.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
break;
case 3: // AMBER. Assumption: "normal" value at 80 % is 213, 146, 82 (decimal)
red = uint8_t( (213.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) ); // 80 % = NORMAL * is 3.19f (100 % would be 2.55f)
green = uint8_t( (146.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
blue = uint8_t( ( 82.0f / 80.0f) * ( v_levels[ mono ] / 3.19f) );
m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
m_palette2->set_pen_color(xi + 16, rgb_t( red, green, blue) );
break;
}
// 255 durch 2.55 ist 100 255 durch x ist 80
}
case COLOR_MONITOR: // w.official COLOR CABLE (mono out wired to green gun)
m_palette2->set_pen_color(xi, pal4bit( red ) , pal4bit( mono ) , pal4bit( blue ) );
case COLOR_MONITOR: // w.official COLOR CABLE (mono out wired to green gun)
m_palette2->set_pen_color(xi, pal4bit( red ) , pal4bit( mono ) , pal4bit( blue ) );
break;
case DUAL_MONITOR: // Dual monitor configuration with homebrew cable (R G B, separate onboard circuit is mono)
m_palette2->set_pen_color(xi, pal4bit( red ), pal4bit( green ), pal4bit( blue ) );
m_palette2->set_pen_color(xi, pal4bit( red ), pal4bit( green ), pal4bit( blue ) );
break;
}
} // palette (loop)
} // color map changed?
@ -2426,7 +2426,7 @@ WRITE_LINE_MEMBER(rainbow_state::GDC_vblank_irq)
if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VSYNC_IRQ) // 0x40
raise_8088_irq(IRQ_GRF_INTR_L);
}
INTERRUPT_GEN_MEMBER(rainbow_state::vblank_irq)
{
raise_8088_irq(IRQ_8088_VBL);
@ -2496,23 +2496,23 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
m_SCREEN_BLANK = (data & 2) ? false : true;
// Switch determines how the monochrome output pin is taken from:
// 0 = M(ono) out from system module (DC011/DC012). Default, also used to setup dual monitors.
// 0 = M(ono) out from system module (DC011/DC012). Default, also used to setup dual monitors.
// 1 = M(ono) output from GRAPHICS OPTION. (G)reen remains unused with a single COLOR monitor.
m_ONBOARD_GRAPHICS_SELECTED = (data & 0x04) ? false : true;
if(!m_ONBOARD_GRAPHICS_SELECTED)
{
m_ONBOARD_GRAPHICS_SELECTED = (data & 0x04) ? false : true;
if(!m_ONBOARD_GRAPHICS_SELECTED)
{
if(m_inp7->read() == 1)
printf("\nHINT: GRAPHICS OPTION ON. TEXT ONLY (DC011/DC012) OUTPUT NOW DISABLED.\n");
else
{ printf("\nALARM: GRAPHICS OPTION * SWITCHED OFF * VIA DIP. TEXT OUTPUT STILL ENABLED!\n");
{ printf("\nALARM: GRAPHICS OPTION * SWITCHED OFF * VIA DIP. TEXT OUTPUT STILL ENABLED!\n");
m_ONBOARD_GRAPHICS_SELECTED = true;
}
printf("DATA: %x (PC=%x)\n", data, machine().device("maincpu")->safe_pc());
}
// BIT 3: PARITY TEST (1 = enables parity test on memory option board).
if(data & 0x08)
{
{
printf("\n*** UNEMULATED PARITY TEST [on RAM EXTENSION] - (bit 3 in diagnostic_w) ");
// FIXME: parity test = NMI? When should NMI fire? Per RAM bank?
// m_i8088->set_input_line_and_vector(INPUT_LINE_NMI, ASSERT_LINE, 0x02);
@ -2645,36 +2645,36 @@ WRITE_LINE_MEMBER(rainbow_state::irq_hi_w)
// ********************************* NEC UPD7220 ***********************************************
// Readback mode: correct place? Not for vector mode (really)...?
// NOTE: "More than one plane at a time can be enabled for a write operation; however,
// NOTE: "More than one plane at a time can be enabled for a write operation; however,
// only one plane can be enabled for a read operation at anyone time."
READ16_MEMBER(rainbow_state::vram_r)
{
{
if((!(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR)) || space.debugger_access()) // (NOT VECTOR MODE)
{
//offset = ((offset & 0x18000) >> 1) | (offset & 0x3fff); // VT 240
//*******************************************************************************************************************************
// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
// SEE PAGE 48 OF PDF FOR A DESCRIPTION OF THE SCROLL_MAP / SCROLL BUFFER:
offset = ( m_GDC_SCROLL_BUFFER[ ( (offset & 0x3FC0) >> 6 ) ] << 6) | (offset & 0x3F);
offset = ( m_GDC_SCROLL_BUFFER[ ( (offset & 0x3FC0) >> 6 ) ] << 6) | (offset & 0x3F);
//*******************************************************************************************************************************
int readback_plane = 0;
// READBACK CODE DISABLED, FOR BETTER DEBUGGING (CANT SEE ANYTHING...):
if( !(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) ) // 0x10 // READBACK OPERATION - if ENABLE_WRITES NOT SET
if( !(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) ) // 0x10 // READBACK OPERATION - if ENABLE_WRITES NOT SET
{
readback_plane = (m_GDC_MODE_REGISTER & GDC_MODE_READBACK_PLANE_MASK) >> 2; // READBACK PLANE 00..02, mask in bits 2+3
// printf(" READBACK MODE * ON *; plane selected: %02x ", readback_plane);
}
readback_plane = (m_GDC_MODE_REGISTER & GDC_MODE_READBACK_PLANE_MASK) >> 2; // READBACK PLANE 00..02, mask in bits 2+3
// printf(" READBACK MODE * ON *; plane selected: %02x ", readback_plane);
}
return m_video_ram[ (offset & 0xffff) + (0x8000 * readback_plane)];
//return m_video_ram[(offset & 0x7fff) + (0x8000 * readback_plane)]; // VT240
}
//return m_video_ram[(offset & 0x7fff) + (0x8000 * readback_plane)]; // VT240
}
return 0;
}
// NOT PRESENT: enable line erase (10) / DMA scroll (11)
// NOT PRESENT: enable line erase (10) / DMA scroll (11)
// ??? VT 240 ???: LOGIC UNIT SELECT
// SELECT_VECTOR_PATTERN_REGISTER -> IS_VECTOR_MODE !
@ -2687,7 +2687,7 @@ WRITE16_MEMBER(rainbow_state::vram_w)
{
//*******************************************************************************************************************************
// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
// NEW SCROLL_MAP - "valid for reading, writing, and refreshing"
// SEE PAGE 48 OF PDF FOR A DESCRIPTION OF THE SCROLL_MAP / SCROLL BUFFER:
offset = ( m_GDC_SCROLL_BUFFER[ ( (offset & 0x3FC0) >> 6 ) ] << 6) | (offset & 0x3F);
//*******************************************************************************************************************************
@ -2706,9 +2706,9 @@ WRITE16_MEMBER(rainbow_state::vram_w)
}
offset &= 0xffff; // same as in VT240?
uint16_t chr = data; // VT240 : uint8_t
uint16_t chr = data; // VT240 : uint8_t
if(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR) // VT240 : if(SELECT_VECTOR_PATTERN_REGISTER)
if(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR) // VT240 : if(SELECT_VECTOR_PATTERN_REGISTER)
{
chr = BITSWAP8(m_vpat, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx, m_patidx);
chr |= (chr << 8);
@ -2721,34 +2721,34 @@ WRITE16_MEMBER(rainbow_state::vram_w)
}
else
{
chr = m_GDC_WRITE_BUFFER[ m_GDC_write_buffer_index++ ];
chr = m_GDC_WRITE_BUFFER[ m_GDC_write_buffer_index++ ];
m_GDC_write_buffer_index &= 0xf;
chr |= (m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] << 8);
m_GDC_write_buffer_index &= 0xf;
}
if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) // 0x10
if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) // 0x10
{
// ALU_PS register: controls logic used in writing to the bitmap / inhibiting of writing to specified planes.
// plane select and logic operations on write buffer... (and more) **** SEE PAGE 36 ****
int ps = m_GDC_ALU_PS_REGISTER & 0x0F; // PLANE SELECT 0..3 // VT 240 : ~m_GDC_ALU_PS_REGISTER & 3;
uint8_t fore = ( (m_GDC_FG_BG & 0xf0) ) >> 4;
uint8_t back = (m_GDC_FG_BG & 0x0f); // background : 0..3 confirmed, see p.39 AA-AE36A (PDF)
uint8_t fore = ( (m_GDC_FG_BG & 0xf0) ) >> 4;
uint8_t back = (m_GDC_FG_BG & 0x0f); // background : 0..3 confirmed, see p.39 AA-AE36A (PDF)
for(int i = 0; i <= 3; i++)
{
if( BIT(ps,i ) )
{
uint16_t mem = m_video_ram[(offset & 0xffff) + (0x8000 * i)]; // VT240
uint16_t mem = m_video_ram[(offset & 0xffff) + (0x8000 * i)]; // VT240
uint16_t out = 0; // VT240 : uint8_t
for(int j = 0; j <= 15; j++) // REPLACE MODE : one replaced by FG, zero by BG ( 16 instead of 8 bit on VT240 )
out |= BIT(chr, j) ? ((fore & 1) << j) : ((back & 1) << j);
switch (m_GDC_ALU_PS_REGISTER & ALU_PS_MODE_MASK)
{
case OVERLAY_MODE: // (OR)
{
case OVERLAY_MODE: // (OR)
out |= mem;
break;
@ -2756,17 +2756,17 @@ WRITE16_MEMBER(rainbow_state::vram_w)
out ^= ~mem;
break;
default: // ALL ELSE
default: // ALL ELSE
break;
}
if(!(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR)) // 0 : (NOT VECTOR MODE) Text Mode and Write Mask Batch
if(!(m_GDC_MODE_REGISTER & GDC_MODE_VECTOR)) // 0 : (NOT VECTOR MODE) Text Mode and Write Mask Batch
out = (out & ~m_GDC_WRITE_MASK) | (mem & m_GDC_WRITE_MASK); // // M_MASK (1st use)
else
out = (out & data) | (mem & ~data); // VECTOR MODE !
if(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_WRITES) // 0x10
m_video_ram[(offset & 0xffff) + (0x8000 * i)] = out;
m_video_ram[(offset & 0xffff) + (0x8000 * i)] = out;
} // if plane selected
fore >>= 1;
@ -2793,10 +2793,10 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
{
static int last_message, last_mode, last_readback, last_scroll_index;
if(offset > 0) // Port $50 reset done @ boot ROM 1EB4/8 regardless if option present.
if (m_inp7->read() != 1)
{
if(last_message != 1)
if(offset > 0) // Port $50 reset done @ boot ROM 1EB4/8 regardless if option present.
if (m_inp7->read() != 1)
{
if(last_message != 1)
{
printf("\nCOLOR GRAPHICS ADAPTER INVOKED. PLEASE TURN ON THE APPROPRIATE DIP SWITCH, THEN RESTART.\n");
printf("OFFSET: %x (PC=%x)\n", 0x50 +offset , machine().device("maincpu")->safe_pc());
@ -2807,21 +2807,21 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
switch(offset)
{
case 0: // Mode Register must be reloaded following any write to port 50 (software reset).
// Graphics option software reset. Any write to this port also resynchronizes the
// read/modify/write memory cycles of the Graphics Option to those of the GDC.
case 0: // Mode Register must be reloaded following any write to port 50 (software reset).
// Graphics option software reset. Any write to this port also resynchronizes the
// read/modify/write memory cycles of the Graphics Option to those of the GDC.
GDC_RESET_MACRO
break;
case 1: // 51h - DATA loaded into register previously written to 53h.
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_WRITE_BUFFER) // 0x01
{
m_GDC_write_buffer_index = 0; // (writing to 51h CLEARS the index counter)
{
m_GDC_write_buffer_index = 0; // (writing to 51h CLEARS the index counter)
break;
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_COLOR_MAP ) // 0x20
{
{
m_color_map_changed = true;
m_GDC_COLOR_MAP[m_GDC_color_map_index++] = ~data; // tilde data verified by DIAGNOSTIC!
@ -2831,7 +2831,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
printf("\n * COLOR MAP FULLY LOADED *");
for(int zi =0; zi <16; zi++)
{
{
int g = m_GDC_COLOR_MAP[zi] & 0x0F;
int r = (m_GDC_COLOR_MAP[zi] & 0xF0) >> 4;
@ -2845,11 +2845,11 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_SCROLL_MAP ) // 0x80
{
{
if(!( m_GDC_MODE_REGISTER & GDC_MODE_READONLY_SCROLL_MAP)) // ? READONLY / WRITE logic correct...?
{
m_GDC_SCROLL_BUFFER_PRELOAD[m_GDC_scroll_index] = data; // // WRITE TO SCROLL_MAP ( 256 x 8 )
{
m_GDC_SCROLL_BUFFER_PRELOAD[m_GDC_scroll_index] = data; // // WRITE TO SCROLL_MAP ( 256 x 8 )
if(m_GDC_scroll_index == 255)
printf("\n ---- SCROLL MAP FULLY LOADED ---*");
m_GDC_scroll_index++;
@ -2864,41 +2864,41 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
// SEE PAGE 37 OF AA-AE36A (PDF).
// NOTE : Pattern Multiplier MUST BE LOADED before loading PATTERN.
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_PATTERN_MULTIPLIER)
{
{
// On a Rainbow, 12 indicates a multiplier of 16-12 = 4 (example)
m_patmult = 16 - (data & 15); // 4 bit register // VT240: "patmult_w"
m_patmult = 16 - (data & 15); // 4 bit register // VT240: "patmult_w"
break;
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_PATTERN)
{
m_vpat = data;
{
m_vpat = data;
m_patcnt = m_patmult;
m_patidx = 7; // correct...?
break;
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_FG_BG) // 2 x 4
{
{
m_GDC_FG_BG = data; // Neither bitswap nor negated (and also not both)...
break; // Next: prepare FG / BG and PLANE in ALU - PLANE_SELECT register.
break; // Next: prepare FG / BG and PLANE in ALU - PLANE_SELECT register.
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_ALU_PS)
{
{
m_GDC_ALU_PS_REGISTER = ~data; // Negated...
break;
}
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_MODE_REGISTER)
{
m_GDC_MODE_REGISTER = data; // Neither bitswap nor negated (and also not both)...
if(last_message != 2)
{
last_message = 2;
if(data & GDC_MODE_HIGHRES)
if(data & GDC_MODE_HIGHRES)
printf(" * HIGH RESOLUTION * ");
else
printf(" MEDIUM RESOLUTION ");
@ -2907,7 +2907,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
if(last_mode != (data & GDC_MODE_VECTOR))
{
last_mode = data & GDC_MODE_VECTOR;
if(data & GDC_MODE_VECTOR)
if(data & GDC_MODE_VECTOR)
printf(" VECTOR MODE ");
else
printf(" WORD MODE ");
@ -2918,7 +2918,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
last_readback = data & GDC_MODE_ENABLE_WRITES;
if(data & GDC_MODE_ENABLE_WRITES) // 0x10
printf(" READBACK: OFF - ENABLE_WRITES ");
else // READBACK PLANE 00..02 - mask in bits 2+3:
else // READBACK PLANE 00..02 - mask in bits 2+3:
printf(" READBACK MODE; plane = %02x ", m_GDC_MODE_REGISTER & GDC_MODE_READBACK_PLANE_MASK); // unsure if PLANE is set... already?!
}
@ -2926,9 +2926,9 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
{
last_scroll_index = m_GDC_scroll_index;
if(data & GDC_MODE_READONLY_SCROLL_MAP) // 0x20
{ //printf(" SCROLL MAP READ_ONLY. Index : %02x ", m_GDC_scroll_index);
} else
{ printf(" SCROLL MAP IS WRITABLE. Index : %02x ", m_GDC_scroll_index);
{ //printf(" SCROLL MAP READ_ONLY. Index : %02x ", m_GDC_scroll_index);
} else
{ printf(" SCROLL MAP IS WRITABLE. Index : %02x ", m_GDC_scroll_index);
}
}
@ -2939,45 +2939,45 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
} // GDC_SELECT_MODE_REGISTER
printf("\n* UNIMPLEMENTED CASE. MODE = %02x / m_GDC_INDIRECT_REGISTER = %02x\n",m_GDC_MODE_REGISTER, m_GDC_INDIRECT_REGISTER);
break;
case 2:
// 52h Data written to this port is loaded into the Write Buffer
// While the CPU accesses the Write Buffer as sixteen 8-bit bytes,
// the GDC accesses the buffer as eight 16-bit words.
// A 16-bit Write Mask gives the GDC control over individual bits of a word.
// -------------------- WRITE BUFFER USED IN WORD MODE ONLY !
// "OUTPUT WRITE BUFFER IS THE INVERSE OF THE INPUT" (quote from 4-3 of the PDF)
// BITSWAP SEEMS NECESSARY (see digits in DOODLE)... !
m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] = ~BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); // see BITSWAP on VT240;
m_GDC_write_buffer_index &= 0xf; // write up to 16 bytes to port 52h.
break;
case 3: // 53h Indirect Register; address selection for indirect addressing. See 51h.
m_GDC_INDIRECT_REGISTER = data ^ 0xff;
case 2:
// 52h Data written to this port is loaded into the Write Buffer
// While the CPU accesses the Write Buffer as sixteen 8-bit bytes,
// the GDC accesses the buffer as eight 16-bit words.
// A 16-bit Write Mask gives the GDC control over individual bits of a word.
// -------------------- WRITE BUFFER USED IN WORD MODE ONLY !
// "OUTPUT WRITE BUFFER IS THE INVERSE OF THE INPUT" (quote from 4-3 of the PDF)
// BITSWAP SEEMS NECESSARY (see digits in DOODLE)... !
m_GDC_WRITE_BUFFER[m_GDC_write_buffer_index++] = ~BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7); // see BITSWAP on VT240;
m_GDC_write_buffer_index &= 0xf; // write up to 16 bytes to port 52h.
break;
case 3: // 53h Indirect Register; address selection for indirect addressing. See 51h.
m_GDC_INDIRECT_REGISTER = data ^ 0xff;
// Index to WRITE_BUFFER is reset via dummy write to port 51h (not here!).
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_COLOR_MAP ) // 0x20
m_GDC_color_map_index = 0; // (also clears the index counter)
m_GDC_color_map_index = 0; // (also clears the index counter)
// NEXT: 32 BYTE COLOR MAP, LOADED TO $51
if(m_GDC_INDIRECT_REGISTER & GDC_SELECT_SCROLL_MAP ) // 0x80
{
{
if(last_scroll_index != m_GDC_scroll_index)
{
last_scroll_index = m_GDC_scroll_index;
printf(" *** SCROLL INDEX COUNTER RESET, old value = %d", m_GDC_scroll_index);
}
m_GDC_scroll_index = 0; // (also clears the index counter)
} // NEXT: LOAD 256 BYTE SCROLL MAP INTO $51
m_GDC_scroll_index = 0; // (also clears the index counter)
} // NEXT: LOAD 256 BYTE SCROLL MAP INTO $51
break;
// --------- WRITE MASK (2 x 8 = 16 bits) USED IN WORD MODE ONLY !
// NOTE: there is NO specific order for the WRITE_MASK (according to txt/code samples in PDF)!
// NOTE: there is NO specific order for the WRITE_MASK (according to txt/code samples in PDF)!
// !! NEW: LOW... HI JUXTAPOSITION...!!
case 4: // 54h Write Mask LOW
m_GDC_WRITE_MASK = ( BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF );
m_GDC_WRITE_MASK = ( BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7) << 8 ) | ( m_GDC_WRITE_MASK & 0x00FF );
break;
case 5: // 55h Write Mask HIGH
m_GDC_WRITE_MASK = ( m_GDC_WRITE_MASK & 0xFF00 ) | BITSWAP8(data, 0, 1, 2, 3, 4, 5, 6, 7);
@ -3041,20 +3041,20 @@ MCFG_VT_VIDEO_RAM_CALLBACK(READ8(rainbow_state, read_video_ram_r))
MCFG_VT_VIDEO_CLEAR_VIDEO_INTERRUPT_CALLBACK(WRITELINE(rainbow_state, clear_video_interrupt))
// *************************** COLOR GRAPHICS (OPTION) **************************************
MCFG_DEVICE_ADD("upd7220", UPD7220, XTAL_32MHz / 4) // WAR: 31188000 / 4 TO BE VERIFIED. Duell schematics shows 31.188 (?) Mhz (/ 4 = 7.797 Mhz)
MCFG_DEVICE_ADD("upd7220", UPD7220, XTAL_32MHz / 4) // WAR: 31188000 / 4 TO BE VERIFIED. Duell schematics shows 31.188 (?) Mhz (/ 4 = 7.797 Mhz)
MCFG_UPD7220_VSYNC_CALLBACK(WRITELINE(rainbow_state, GDC_vblank_irq)) // "The vsync callback line needs to be below the 7220 DEVICE_ADD line."
MCFG_DEVICE_ADDRESS_MAP(AS_0, upd7220_map)
MCFG_UPD7220_DISPLAY_PIXELS_CALLBACK_OWNER(rainbow_state, hgdc_display_pixels)
MCFG_VIDEO_SET_SCREEN("screen2") // SET_SCREEN needs to be added after 7720 device in the machine config, not after the screen.
MCFG_PALETTE_ADD("palette2", 32)
MCFG_PALETTE_ADD("palette2", 32)
MCFG_SCREEN_ADD("screen2", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_UPDATE_DEVICE("upd7220", upd7220_device, screen_update)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not accurate
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not accurate
MCFG_SCREEN_SIZE(800, 256) // should be 240
MCFG_SCREEN_VISIBLE_AREA(0, 800-1, 0, 256-1) // should be 240

4
src/mame/drivers/segaybd.cpp
View File

@ -1229,7 +1229,7 @@ static INPUT_PORTS_START( pdriftl )
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) // Affects how the z80 access memory at 0x2000-0x2***
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) // Affects how the z80 access memory at 0x2000-0x2***
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
@ -1250,7 +1250,7 @@ static INPUT_PORTS_START( pdriftl )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("LinkID_DSW2")
PORT_DIPNAME( 0x0f, 0x01, "Cabinet ID" )
PORT_DIPSETTING( 0x00, "0" )

2
src/mame/drivers/sengokmj.cpp
View File

@ -21,7 +21,7 @@ Notes:
- To bypass the startup message, toggle "Reset" dip-switch or reset with F3.
- If the Work RAM is not hooked-up (areas $67xx),a sound sample is played.I can't understand what it says though,
appears to japanese words for "RAM failed".
- Snippets of a non-BET Version are scattered thru the code (for example a credit display).
- Snippets of a non-BET Version are scattered thru the code (for example a credit display).
Might be either undumped revision or selectable somehow.
CPU: uPD70116C-8 (V30)

10
src/mame/drivers/snowbros.cpp
View File

@ -572,7 +572,7 @@ static ADDRESS_MAP_START( yutnori_map, AS_PROGRAM, 16, snowbros_state )
AM_RANGE(0x30000c, 0x30000d) AM_WRITENOP
AM_RANGE(0x30000e, 0x30000f) AM_READNOP //AM_READ( yutnori_unk_r ) // ??
// AM_RANGE(0x400000, 0x400001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) // maybe?
// AM_RANGE(0x400000, 0x400001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) // maybe?
AM_RANGE(0x400000, 0x400001) AM_NOP
AM_RANGE(0x500000, 0x5001ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
@ -2013,7 +2013,7 @@ static MACHINE_CONFIG_START( yutnori, snowbros_state )
MCFG_CPU_PROGRAM_MAP(yutnori_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", snowbros_state, snowbros_irq, "screen", 0, 1)
// MCFG_WATCHDOG_ADD("watchdog") // maybe
// MCFG_WATCHDOG_ADD("watchdog") // maybe
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -2756,16 +2756,16 @@ ROM_START( yutnori )
ROM_REGION( 0x4010, "mcu", 0 ) /* PIC code */
ROM_LOAD( "pic16c64a-04-p", 0x000000, 0x4010, BAD_DUMP CRC(46fd3671) SHA1(54cf7a38f7743cdad73a2741183b2720ee42e6c8) ) // dump seems to be 99% empty, protected, only configuration bytes dumped?
ROM_REGION( 0x120000, "gfx1", ROMREGION_ERASE00 )
ROM_LOAD( "GRAPHICS_ROM_1", 0x000000, 0x80000, CRC(d4881b49) SHA1(e169b7eca48a0bd66ad55fe21197a4bb491198bb) )
ROM_LOAD( "GRAPHICS_ROM_2", 0x080000, 0x80000, CRC(8cd9ce60) SHA1(d1db929ca6128ec2ebe983e6161f200ba421bd31) )
ROM_LOAD( "GRAPHICS_ROM_3", 0x100000, 0x20000, CRC(04f7c2ac) SHA1(927fa0f76ff1801845776d47aa5311f485b0b809) )
ROM_REGION(0x80000, "oki1", 0 ) // 2 banks, 1 large sample in each (music)
ROM_LOAD("SOUND ROM", 0x000000, 0x080000, CRC(d24c2e43) SHA1(5c7a130048463558d695857ffc056a95a8072219) )
ROM_REGION(0x40000, "oki2", 0 )
ROM_REGION(0x40000, "oki2", 0 )
ROM_LOAD("VOICE_ROM", 0x000000, 0x040000, CRC(25e85201) SHA1(6c0001e2942f49b62e1bbf3a68c59abad1e2f94c) )
ROM_END

4
src/mame/drivers/statriv2.cpp
View File

@ -941,7 +941,7 @@ ROM_START( supertr )
ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT )
ROM_LOAD( "u36.bin", 0x00000, 0x01000, CRC(01f30203) SHA1(b902845af0e4d96446550539596354d9962d78be) )
ROM_REGION( 0x40000, "questions", 0 )
ROM_REGION( 0x40000, "questions", 0 )
ROM_LOAD( "q1.rom", 0x00000, 0x08000, NO_DUMP )
ROM_LOAD( "q2.rom", 0x08000, 0x08000, NO_DUMP )
ROM_LOAD( "q3.rom", 0x10000, 0x08000, NO_DUMP )
@ -950,7 +950,7 @@ ROM_START( supertr )
ROM_LOAD( "q6.rom", 0x28000, 0x08000, NO_DUMP )
ROM_LOAD( "q7.rom", 0x30000, 0x08000, NO_DUMP )
ROM_LOAD( "q8.rom", 0x38000, 0x08000, NO_DUMP )
ROM_REGION( 0x0140, "proms", 0 )
ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */
ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */

22
src/mame/drivers/stv.cpp
View File

@ -101,7 +101,7 @@ READ8_MEMBER(stv_state::stv_ioga_r)
printf("Reading from mirror %08x?\n",offset);
offset &= 0x1f; // mirror?
switch(offset)
{
case 0x01: res = ioport("PORTA")->read(); break; // P1
@ -2977,24 +2977,24 @@ ROM_END
ROM_START( choroqhr ) // set to 1p
STV_BIOS
ROM_REGION32_BE( 0x3000000, "cart", ROMREGION_ERASE00 ) /* SH2 code */
ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x200000, CRC(fd04598b) SHA1(4797127869fafae0ecfddc07b1c1325b11ca981a) )
ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x200000, CRC(09b8a154) SHA1(cfd212c6fe6188b9c665650b21f2fd80cd65268f) )
ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x200000, CRC(136ca5e9) SHA1(8697a415d0958e58f5cea5dcc767dd6a4cbdef5c) )
ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x200000, CRC(3c949563) SHA1(ab2a9f9ec23071cc236dee945b436a9cd73efb92) )
ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(7e93078d) SHA1(10fa99029a3e741ea0fddcf00ee07b5fd039bf19) )
ROM_LOAD16_WORD_SWAP( "ic32.bin", 0x0c00000, 0x200000, BAD_DUMP CRC(d311c5f6) SHA1(c210463ae5b4bcc498de786e05dec245c0d3b46e) ) // ic7 bad
ROM_LOAD16_WORD_SWAP( "ic22.bin", 0x0200000, 0x200000, CRC(fd04598b) SHA1(4797127869fafae0ecfddc07b1c1325b11ca981a) )
ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x200000, CRC(09b8a154) SHA1(cfd212c6fe6188b9c665650b21f2fd80cd65268f) )
ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x200000, CRC(136ca5e9) SHA1(8697a415d0958e58f5cea5dcc767dd6a4cbdef5c) )
ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x200000, CRC(3c949563) SHA1(ab2a9f9ec23071cc236dee945b436a9cd73efb92) )
ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(7e93078d) SHA1(10fa99029a3e741ea0fddcf00ee07b5fd039bf19) )
ROM_LOAD16_WORD_SWAP( "ic32.bin", 0x0c00000, 0x200000, BAD_DUMP CRC(d311c5f6) SHA1(c210463ae5b4bcc498de786e05dec245c0d3b46e) ) // ic7 bad
//ROM_LOAD16_WORD_SWAP( "ic32.bad2.bin", 0x000000, 0x200000, CRC(76709d73) SHA1(a7805e956ee1a3701a803d0af082c33c89c26c3a) )
//ROM_LOAD16_WORD_SWAP( "ic32.bad3.bin", 0x000000, 0x200000, CRC(b873cf3e) SHA1(8ed42a229e416125d7a2359faaea17208324feb0) )
//ROM_LOAD16_WORD_SWAP( "ic32.bad4.bin", 0x000000, 0x200000, CRC(ed808ad4) SHA1(b00791ec3ee6255bccde171279a1a14e322d0e6d) )
//ROM_LOAD16_WORD_SWAP( "ic32.bad5.bin", 0x000000, 0x200000, CRC(ed808ad4) SHA1(b00791ec3ee6255bccde171279a1a14e322d0e6d) )
//ROM_LOAD16_WORD_SWAP( "ic32.bad6.bin", 0x000000, 0x200000, CRC(ed808ad4) SHA1(b00791ec3ee6255bccde171279a1a14e322d0e6d) )
ROM_LOAD16_WORD_SWAP( "ic34.bin", 0x0e00000, 0x200000, CRC(be2ed0a0) SHA1(a9225ba6b78fa0119fc6484828f4d4cc6ea05d8f) )
ROM_LOAD16_WORD_SWAP( "ic36.bin", 0x1000000, 0x200000, CRC(9a4109e5) SHA1(ba59caac5f5a80fc52c507d8a47f322a380aa9a1) )
ROM_LOAD16_WORD_SWAP( "ic36.bin", 0x1000000, 0x200000, CRC(9a4109e5) SHA1(ba59caac5f5a80fc52c507d8a47f322a380aa9a1) )
ROM_REGION16_BE( 0x80, "eeprom", 0 ) // preconfigured to 1 player
ROM_LOAD( "choroqhr.nv", 0x0000, 0x0080, CRC(69a71aea) SHA1(08ca9cd70fa3fa6c3156edd966a81244bad5f0c2) )
ROM_LOAD( "choroqhr.nv", 0x0000, 0x0080, CRC(69a71aea) SHA1(08ca9cd70fa3fa6c3156edd966a81244bad5f0c2) )
ROM_END
ROM_START( pclub2 ) // set to 1p / runs with the USA bios
@ -3640,7 +3640,7 @@ GAME( 1998, twsoc98, twcup98, stv_5881, stv, stv_state, twcup98, ROT
GAME( 1996, magzun, stvbios, stv, stv, stv_state, magzun, ROT0, "Sega", "Magical Zunou Power (J 961031 V1.000)", MACHINE_NOT_WORKING | MACHINE_NODEVICE_MICROPHONE )
GAME( 1997, techbowl, stvbios, stv, stv, stv_state, stv, ROT0, "Sega", "Technical Bowling (J 971212 V1.000)", MACHINE_NOT_WORKING )
GAME( 1999, micrombc, stvbios, stv, stv, stv_state, stv, ROT0, "Sega", "Microman Battle Charge (J 990326 V1.000)", MACHINE_NOT_WORKING )
GAME( 1998, choroqhr, stvbios, stv, stv, stv_state, stv, ROT0, "Sega / Takara", "Choro Q Hyper Racing 5 (J 981230 V1.000)", MACHINE_NOT_WORKING )
GAME( 1998, choroqhr, stvbios, stv, stv, stv_state, stv, ROT0, "Sega / Takara", "Choro Q Hyper Racing 5 (J 981230 V1.000)", MACHINE_NOT_WORKING )
/* CD games */
GAME( 1995, sfish2, 0, stv, stv, stv_state, stv, ROT0, "Sega", "Sport Fishing 2 (UET 951106 V1.10e)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING )

10
src/mame/drivers/subsino2.cpp
View File

@ -1098,7 +1098,7 @@ WRITE16_MEMBER(subsino2_state::humlan_outputs_w)
break;
}
// popmessage("0: %04x", m_outputs16[0]);
// popmessage("0: %04x", m_outputs16[0]);
}
static ADDRESS_MAP_START( humlan_map, AS_PROGRAM, 16, subsino2_state )
@ -2646,8 +2646,8 @@ DRIVER_INIT_MEMBER(subsino2_state,new2001)
rom[0x19A2/2] = 0x4066;
// rts -> rte
rom[0x45E8/2] = 0x5670; // IRQ 8
rom[0x471C/2] = 0x5670; // IRQ 0
rom[0x45E8/2] = 0x5670; // IRQ 8
rom[0x471C/2] = 0x5670; // IRQ 0
}
/***************************************************************************
@ -2686,8 +2686,8 @@ DRIVER_INIT_MEMBER(subsino2_state,humlan)
rom[0x170A/2] = 0x4066;
// rts -> rte
rom[0x38B4/2] = 0x5670; // IRQ 8
rom[0x3A08/2] = 0x5670; // IRQ 0
rom[0x38B4/2] = 0x5670; // IRQ 8
rom[0x3A08/2] = 0x5670; // IRQ 0
}
/***************************************************************************

2
src/mame/drivers/ticalc1x.cpp
View File

@ -78,7 +78,7 @@ void cmulti8_state::prepare_display()
// M-digit is on in memory mode, upper row is off in single mode
uint32_t m = (m_inp_matrix[10]->read() & 0x10) ? 0x100000 : 0;
uint32_t mask = (m_inp_matrix[10]->read() & 0x20) ? 0xfffff : 0xffc00;
// R10 selects display row
uint32_t sel = (m_r & 0x400) ? (m_r & 0x3ff) : (m_r << 10 & 0xffc00);
display_matrix(8, 21, m_o, (sel & mask) | m);

44
src/mame/drivers/tranz330.cpp
View File

@ -2,14 +2,14 @@
// copyright-holders:Ryan Holtz
/**************************************************************************
VeriFone Tranz 330
VeriFone Tranz 330
All information gleaned from:
http://www.bigmessowires.com/2011/05/10/mapping-the-tranz-330/
All information gleaned from:
http://www.bigmessowires.com/2011/05/10/mapping-the-tranz-330/
Currently sits in a loop doing very little, based on the disassembly
it presumably needs some kind of interrupt in order to kick it into
running.
Currently sits in a loop doing very little, based on the disassembly
it presumably needs some kind of interrupt in order to kick it into
running.
Interrupt Vectors are located at 0200-02FF.
Display ram at 9000-90FF says GRAMING ERR 0 (part of PROGRAMING ERR message)
@ -39,28 +39,28 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( tranz330 )
PORT_START("COL.0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_1) PORT_NAME("1 QZ.")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_4) PORT_NAME("4 GHI")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_7) PORT_NAME("7 PRS")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_ASTERISK) PORT_NAME("* ,'\"")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_1) PORT_NAME("1 QZ.")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_4) PORT_NAME("4 GHI")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_7) PORT_NAME("7 PRS")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_ASTERISK) PORT_NAME("* ,'\"")
PORT_START("COL.1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_2) PORT_NAME("2 ABC")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_5) PORT_NAME("5 JKL")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_CODE(KEYCODE_8) PORT_NAME("8 TUV")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_CODE(KEYCODE_0) PORT_NAME("0 -SP")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_2) PORT_NAME("2 ABC")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_5) PORT_NAME("5 JKL")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_CODE(KEYCODE_8) PORT_NAME("8 TUV")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_CODE(KEYCODE_0) PORT_NAME("0 -SP")
PORT_START("COL.2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_CODE(KEYCODE_3) PORT_NAME("3 DEF")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_CODE(KEYCODE_6) PORT_NAME("6 MNO")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_CODE(KEYCODE_9) PORT_NAME("9 WXY")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON13 ) PORT_CODE(KEYCODE_H) PORT_NAME("#") // KEYCODE_H for 'hash mark'
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_CODE(KEYCODE_3) PORT_NAME("3 DEF")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_CODE(KEYCODE_6) PORT_NAME("6 MNO")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_CODE(KEYCODE_9) PORT_NAME("9 WXY")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON13 ) PORT_CODE(KEYCODE_H) PORT_NAME("#") // KEYCODE_H for 'hash mark'
PORT_START("COL.3")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON14 ) PORT_CODE(KEYCODE_C) PORT_NAME("CLEAR") // KEYCODE_C so as to not collide with potentially-used UI keys
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON15 ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("BACK SPACE")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON16 ) PORT_CODE(KEYCODE_A) PORT_NAME("ALPHA")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_CODE(KEYCODE_ENTER) PORT_NAME("FUNC | ENTER")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON14 ) PORT_CODE(KEYCODE_C) PORT_NAME("CLEAR") // KEYCODE_C so as to not collide with potentially-used UI keys
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON15 ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("BACK SPACE")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON16 ) PORT_CODE(KEYCODE_A) PORT_NAME("ALPHA")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_CODE(KEYCODE_ENTER) PORT_NAME("FUNC | ENTER")
INPUT_PORTS_END

2
src/mame/drivers/vidbrain.cpp
View File

@ -107,7 +107,7 @@ READ8_MEMBER( vidbrain_state::keyboard_r )
for (int i = 0; i < 8; i++)
{
if (BIT(m_keylatch, i)) data |= m_io[i]->read();
if (BIT(m_keylatch, i)) data |= m_io[i]->read();
}
if (!m_uv->kbd_r()) data |= m_uv201_31->read();

2
src/mame/etc/template_device.h
View File

@ -38,7 +38,7 @@ public:
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
// virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
virtual void device_reset() override;
};

4
src/mame/includes/mac.h
View File

@ -217,7 +217,7 @@ public:
emu_timer *m_overlay_timeout;
TIMER_CALLBACK_MEMBER(overlay_timeout_func);
DECLARE_READ32_MEMBER(rom_switch_r);
TIMER_DEVICE_CALLBACK_MEMBER(mac_scanline);
bool m_snd_enable;
bool m_main_buffer;
@ -421,7 +421,7 @@ private:
optional_device<screen_device> m_screen;
optional_device<palette_device> m_palette;
optional_device<dac_8bit_pwm_device> m_dac;
public:
emu_timer *m_scanline_timer;
emu_timer *m_adb_timer;

4
src/mame/includes/megasys1.h
View File

@ -80,13 +80,13 @@ public:
uint16_t m_sprite_flag;
// System B and C
uint16_t m_ip_latched;
uint16_t m_ip_latched;
// System C
uint16_t m_sprite_bank;
// System A only
int m_mcu_hs;
int m_mcu_hs;
uint16_t m_mcu_hs_ram[0x10];
// peekaboo

2
src/mame/includes/segaybd.h
View File

@ -62,7 +62,7 @@ public:
DECLARE_READ16_MEMBER( link_r );
DECLARE_READ16_MEMBER( link2_r );
DECLARE_WRITE16_MEMBER( link2_w );
// DECLARE_READ8_MEMBER( link_portc0_r );
// DECLARE_READ8_MEMBER( link_portc0_r );
// game-specific output handlers
void gforce2_output_cb1(uint16_t data);

36
src/mame/includes/tranz330.h
View File

@ -19,14 +19,14 @@
#include "sound/speaker.h"
#include "machine/clock.h"
#define CPU_TAG "cpu"
#define DART_TAG "dart"
#define CTC_TAG "ctc"
#define PIO_TAG "pio"
#define RTC_TAG "rtc"
#define VFD_TAG "vfd"
#define RS232_TAG "rs232"
#define SPEAKER_TAG "speaker"
#define CPU_TAG "cpu"
#define DART_TAG "dart"
#define CTC_TAG "ctc"
#define PIO_TAG "pio"
#define RTC_TAG "rtc"
#define VFD_TAG "vfd"
#define RS232_TAG "rs232"
#define SPEAKER_TAG "speaker"
class tranz330_state : public driver_device
{
@ -57,17 +57,17 @@ public:
DECLARE_READ8_MEMBER( card_r );
private:
required_device<cpu_device> m_cpu;
required_device<z80ctc_device> m_ctc;
required_device<z80dart_device> m_dart;
required_device<z80pio_device> m_pio;
required_device<msm6242_device> m_rtc;
required_device<mic10937_t> m_vfd;
required_device<rs232_port_device> m_rs232;
required_device<speaker_sound_device> m_speaker;
required_ioport_array<4> m_keypad;
required_device<cpu_device> m_cpu;
required_device<z80ctc_device> m_ctc;
required_device<z80dart_device> m_dart;
required_device<z80pio_device> m_pio;
required_device<msm6242_device> m_rtc;
required_device<mic10937_t> m_vfd;
required_device<rs232_port_device> m_rs232;
required_device<speaker_sound_device> m_speaker;
required_ioport_array<4> m_keypad;
uint8_t m_keypad_col_mask;
uint8_t m_keypad_col_mask;
};
#endif // VERIFONE_TRANZ330_H

2
src/mame/layout/crusnusa.lay
View File

@ -25,7 +25,7 @@
<bounds x="0.25" y="0.5" width="1.5" height="1.0" />
</text>
</element>
<element name="radio" defstate="0">
<disk state="0">
<bounds x="0" y="0" width="2.0" height="2.0" />

248
src/mame/layout/fts2in1.lay
View File

@ -11,127 +11,127 @@
</element>
<element name="stop1" defstate="0">
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<text string="HOLD 1">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="HOLD 1">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="STOP 1">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.35" width="1" height="0.25" />
</text>
<text string="STOP 1">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.35" width="1" height="0.25" />
</text>
<text string="TAKE">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
<text string="TAKE">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
</element>
<element name="stop2" defstate="0">
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<text string="HOLD 2">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="HOLD 2">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="STOP 2">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.35" width="1" height="0.25" />
</text>
<text string="STOP 2">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.35" width="1" height="0.25" />
</text>
<text string="BIG">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
<text string="BIG">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
</element>
<element name="stop3" defstate="0">
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<text string="HOLD 3">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="HOLD 3">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="STOP 3">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.35" width="1" height="0.25" />
</text>
<text string="STOP 3">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.35" width="1" height="0.25" />
</text>
<text string="SMALL">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
<text string="SMALL">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
</element>
<element name="hold4" defstate="0">
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<text string="HOLD 4">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="HOLD 4">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="DOUBLE">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
<text string="DOUBLE">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
</element>
<element name="hold5" defstate="0">
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<text string="HOLD 5">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="HOLD 5">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="BET">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
<text string="BET">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.65" width="1" height="0.25" />
</text>
</element>
<element name="start1" defstate="0">
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<rect state="1">
<color red="0.2" green="0.2" blue="1.0" />
</rect>
<rect state="0">
<color red="0.04" green="0.04" blue="0.20" />
</rect>
<text string="START">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
<text string="START">
<color red="1.0" green="0.0" blue="0.0" />
<bounds x="0" y="0.05" width="1" height="0.25" />
</text>
</element>
<view name="Simple Artwork">
@ -140,48 +140,48 @@
<bounds left="0" right="400" top="0" bottom="300" />
</screen>
<!-- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) (port IN1) -->
<bezel name="lamp1" element="start1" inputtag="IN1" inputmask="0x40">
<!-- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) (port IN1) -->
<bezel name="lamp1" element="start1" inputtag="IN1" inputmask="0x40">
<bounds x="10" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Hold 1, Take, Odds, Stop 1") -->
<bezel name="lamp5" element="stop1" inputtag="IN0" inputmask="0x10">
<bounds x="30" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Hold 1, Take, Odds, Stop 1") -->
<bezel name="lamp5" element="stop1" inputtag="IN0" inputmask="0x10">
<bounds x="30" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Hold 2, Big, Stop 2") -->
<bezel name="lamp3" element="stop2" inputtag="IN0" inputmask="0x80">
<bounds x="50" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Hold 2, Big, Stop 2") -->
<bezel name="lamp3" element="stop2" inputtag="IN0" inputmask="0x80">
<bounds x="50" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Hold 3, Small, Stop 3") -->
<bezel name="lamp2" element="stop3" inputtag="IN0" inputmask="0x40">
<bounds x="70" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hold 4, Double") -->
<bezel name="lamp4" element="hold4" inputtag="IN0" inputmask="0x20">
<bounds x="90" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Hold 3, Small, Stop 3") -->
<bezel name="lamp2" element="stop3" inputtag="IN0" inputmask="0x40">
<bounds x="70" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Hold 5, Bet") -->
<bezel name="lamp0" element="hold5" inputtag="IN0" inputmask="0x01" >
<bounds x="110" y="312" width="16" height="16" />
</bezel>
<!-- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hold 4, Double") -->
<bezel name="lamp4" element="hold4" inputtag="IN0" inputmask="0x20">
<bounds x="90" y="312" width="16" height="16" />
</bezel>
<!-- gets set when displaying a hand in poker, doesn't seem button related -->
<!-- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Hold 5, Bet") -->
<bezel name="lamp0" element="hold5" inputtag="IN0" inputmask="0x01" >
<bounds x="110" y="312" width="16" height="16" />
</bezel>
<!-- gets set when displaying a hand in poker, doesn't seem button related -->
<!--
<bezel name="lamp6" element="bluelamp">
<bounds x="130" y="312" width="16" height="16" />
<bezel name="lamp6" element="bluelamp">
<bounds x="130" y="312" width="16" height="16" />
</bezel>
-->
<!-- always set, maybe cabinet marquee or just global enable? -->
-->
<!-- always set, maybe cabinet marquee or just global enable? -->
<!--
<bezel name="lamp7" element="bluelamp">
<bounds x="150" y="312" width="16" height="16" />
<bezel name="lamp7" element="bluelamp">
<bounds x="150" y="312" width="16" height="16" />
</bezel>
-->
-->
</view>
</mamelayout>

10
src/mame/layout/sfrush.lay
View File

@ -14,7 +14,7 @@
<bounds x="0.34" y="0.185" width="1.29" height="0.78" />
</text>
</element>
<element name="music" defstate="0">
<rect state="0">
<bounds x="0" y="0" width="2.0" height="2.0" />
@ -130,7 +130,7 @@
<bounds x="0.2" y="1.0" width="1.6" height="0.8" />
</text>
</element>
<element name="leader" defstate="0">
<rect>
<bounds x="0" y="0" width="3.0" height="1.75" />
@ -145,7 +145,7 @@
<bounds x="0.5" y="0.3" width="2.0" height="1.15" />
</text>
</element>
<element name="winner" defstate="0">
<rect>
<bounds x="0" y="0" width="3.0" height="1.4" />
@ -183,11 +183,11 @@
<bezel name="lamp7" element="view1" inputtag="IN1" inputmask="0x01">
<bounds x="0.024" y="3.248" width="0.2" height="0.2" />
</bezel>
<bezel name="lamp8" element="leader">
<bounds x="1.45" y="3.1" width="0.5" height="0.23" />
</bezel>
<bezel name="lamp9" element="winner">
<bounds x="2.05" y="3.1" width="0.5" height="0.23" />
</bezel>

4
src/mame/layout/tranz330.lay
View File

@ -156,7 +156,7 @@
<backdrop name="button_back" element="button_aux_back"> <bounds x="120" y=" 84" width="25" height="25"/></backdrop>
<backdrop name="button_alpha" element="button_aux_back"> <bounds x="120" y="118" width="25" height="25"/></backdrop>
<backdrop name="button_enter" element="button_enter_back"><bounds x="120" y="152" width="25" height="25"/></backdrop>
<backdrop name="vfd_backdrop" element="vfd_back"> <bounds x=" 0" y=" 0" width="162" height="32"/></backdrop>
<bezel name="vfd0" element="vfd0" state="0"><bounds x=" 9" y="9" width="9" height="14"/></bezel>
@ -175,7 +175,7 @@
<bezel name="vfd13" element="vfd0" state="0"><bounds x="126" y="9" width="9" height="14"/></bezel>
<bezel name="vfd14" element="vfd0" state="0"><bounds x="135" y="9" width="9" height="14"/></bezel>
<bezel name="vfd15" element="vfd0" state="0"><bounds x="144" y="9" width="9" height="14"/></bezel>
<bezel name="button_1_text1" element="button_1_text"> <bounds x=" 18" y=" 54" width="25" height="8"/></bezel>
<bezel name="button_1_text2" element="button_1_num"> <bounds x=" 18" y=" 64" width="25" height="8"/></bezel>
<bezel name="button_2_text1" element="button_2_text"> <bounds x=" 52" y=" 54" width="25" height="8"/></bezel>

8
src/mame/machine/midwayic.cpp
View File

@ -883,7 +883,7 @@ void midway_ioasic_device::output_w(uint32_t data)
uint8_t flag = (data >> 8) & 0x8;
uint8_t op = (data >> 8) & 0x7;
uint8_t arg = data & 0xFF;
switch (op)
{
default:
@ -896,7 +896,7 @@ void midway_ioasic_device::output_w(uint32_t data)
machine().output().set_value("wheel", arg); // wheel motor delta. signed byte.
}
break;
case 0x4:
if (flag)
{
@ -904,7 +904,7 @@ void midway_ioasic_device::output_w(uint32_t data)
machine().output().set_lamp_value(bit, (arg >> bit) & 0x1);
}
break;
case 0x5:
if (flag)
{
@ -1112,7 +1112,7 @@ WRITE32_MEMBER( midway_ioasic_device::write )
else
midway_serial_pic2_device::write(space, 0, newreg);
break;
case IOASIC_PICIN:
output_w(data);
break;

8
src/mame/machine/sms.cpp
View File

@ -460,10 +460,10 @@ WRITE8_MEMBER(sms_state::smsj_audio_control_w)
m_smsj_audio_control = data & 0x03;
/* Mute settings:
0,0 : PSG only (power-on default)
0,1 : FM only
1,0 : Both PSG and FM disabled
1,1 : Both PSG and FM enabled
0,0 : PSG only (power-on default)
0,1 : FM only
1,0 : Both PSG and FM disabled
1,1 : Both PSG and FM enabled
*/
if (m_smsj_audio_control == 0x00 || m_smsj_audio_control == 0x03)
m_psg_sms->set_output_gain(ALL_OUTPUTS, 1.0);

4
src/mame/mame.lst
View File

@ -33698,7 +33698,7 @@ twinadv // (c) 1995 Barko Corp
twinadvk // (c) 1995 Barko Corp
twinkle // (c) 1997 SemiCom
wintbob // bootleg
yutnori // (c) 199? yutnori
yutnori // (c) 199? yutnori
@source:socrates.cpp
iqunlimz // 1991 IQ Unlimited (Z80)
@ -34145,7 +34145,7 @@ stuntair // (c) 1983 Nuova Videotron
astrass // 1998.06 Astra Super Stars (Sunsoft)
bakubaku // 1995.04 Bakubaku Animal
batmanfr // 1996.02 Batman Forever (Acclaim)
choroqhr // 1998.12 Choro Q Hyper Racing Five (Takara)
choroqhr // 1998.12 Choro Q Hyper Racing Five (Takara)
colmns97 // 1997.01 Columns 97
cotton2 // 1997.11 Cotton 2 (Success)
cottonbm // 1998.09 Cotton Boomerang (Success)

10
src/mame/video/chihiro.cpp
View File

@ -3489,12 +3489,12 @@ int nv2a_renderer::geforce_exec_method(address_space & space, uint32_t chanel, u
first create a row vector with components (x,y,z,1) then multiply the vector by the matrix
transformed = rowvector * matrix
in direct3d the matrix is stored as the sequence (first digit row, second digit column)
11 12 13 14
21 22 23 24
31 32 33 34
41 42 43 44
11 12 13 14
21 22 23 24
31 32 33 34
41 42 43 44
but it is sent transposed as the sequence
11 21 31 41 12 22 32 42 13 23 33 43 14 24 34 44
11 21 31 41 12 22 32 42 13 23 33 43 14 24 34 44
so in matrix.modelview[x][y] x is the column and y is the row of the direct3d matrix
*/
*(uint32_t *)(&matrix.modelview[maddress >> 2][maddress & 3]) = data;

2
src/mame/video/cninja.cpp
View File

@ -149,7 +149,7 @@ uint32_t cninja_state::screen_update_cninjabl2(screen_device &screen, bitmap_ind
m_deco_tilegen1->set_enable(1, 1 );
screen_update_cninja(screen, bitmap, cliprect);
return 0;
}

2
src/mame/video/model1.cpp
View File

@ -1336,7 +1336,7 @@ void model1_state::tgp_render(bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
list_offset = draw_direct(bitmap, cliprect, list_offset);
break;
}
}
case 3:
{
LOG_TGP(("VIDEO: viewport (%d, %d, %d, %d, %d, %d, %d)\n",

2
src/osd/asio.cpp
View File

@ -16,7 +16,7 @@
#elif defined(__GNUC__)
#pragma GCC diagnostic ignored "-Wsuggest-override"
#pragma GCC diagnostic ignored "-Wunused-variable"
#endif
#endif
#define ASIO_STANDALONE
#define ASIO_SEPARATE_COMPILATION

2
src/osd/asio.h
View File

@ -15,7 +15,7 @@
#elif defined(__GNUC__)
#pragma GCC diagnostic ignored "-Wsuggest-override"
#pragma GCC diagnostic ignored "-Wunused-variable"
#endif
#endif
#define ASIO_HEADER_ONLY
#define ASIO_STANDALONE

96
src/osd/modules/output/network.cpp
View File

@ -27,11 +27,11 @@ using client_set = std::set<output_client_ptr>;
class output_session : public output_client,
public std::enable_shared_from_this<output_session>
{
public:
output_session(asio::ip::tcp::socket socket, client_set *clients) :
m_socket(std::move(socket)),
output_session(asio::ip::tcp::socket socket, client_set *clients) :
m_socket(std::move(socket)),
m_clients(clients)
{
}
@ -39,44 +39,44 @@ public:
void start()
{
m_clients->insert(shared_from_this());
do_read();
do_read();
}
private:
void deliver(std::string &msg)
{
std::strncpy(m_data, msg.c_str(), max_length);
std::strncpy(m_data, msg.c_str(), max_length);
do_write(msg.size());
}
void do_read()
{
auto self(shared_from_this());
m_socket.async_read_some(asio::buffer(m_input_m_data, max_length),
[this, self](std::error_code ec, std::size_t length)
{
if (!ec)
{
do_read();
}
else
{
m_clients->erase(shared_from_this());
}
});
auto self(shared_from_this());
m_socket.async_read_some(asio::buffer(m_input_m_data, max_length),
[this, self](std::error_code ec, std::size_t length)
{
if (!ec)
{
do_read();
}
else
{
m_clients->erase(shared_from_this());
}
});
}
void do_write(std::size_t length)
{
auto self(shared_from_this());
asio::async_write(m_socket, asio::buffer(m_data, length),
[this, self](std::error_code ec, std::size_t /*length*/)
{
if (ec)
{
m_clients->erase(shared_from_this());
}
});
auto self(shared_from_this());
asio::async_write(m_socket, asio::buffer(m_data, length),
[this, self](std::error_code ec, std::size_t /*length*/)
{
if (ec)
{
m_clients->erase(shared_from_this());
}
});
}
asio::ip::tcp::socket m_socket;
@ -89,33 +89,33 @@ private:
class output_network_server
{
public:
output_network_server(asio::io_context& io_context, short port) :
m_acceptor(io_context, asio::ip::tcp::endpoint(asio::ip::tcp::v4(), port))
output_network_server(asio::io_context& io_context, short port) :
m_acceptor(io_context, asio::ip::tcp::endpoint(asio::ip::tcp::v4(), port))
{
do_accept();
do_accept();
}
void deliver_to_all(std::string msg)
{
for (auto client: m_clients)
client->deliver(msg);
client->deliver(msg);
}
private:
void do_accept()
{
m_acceptor.async_accept(
[this](std::error_code ec, asio::ip::tcp::socket socket)
{
if (!ec)
{
std::make_shared<output_session>(std::move(socket),&m_clients)->start();
}
m_acceptor.async_accept(
[this](std::error_code ec, asio::ip::tcp::socket socket)
{
if (!ec)
{
std::make_shared<output_session>(std::move(socket),&m_clients)->start();
}
do_accept();
});
do_accept();
});
}
asio::ip::tcp::acceptor m_acceptor;
client_set m_clients;
};
@ -125,23 +125,23 @@ class output_network : public osd_module, public output_module
{
public:
output_network()
: osd_module(OSD_OUTPUT_PROVIDER, "network"),
output_module(),
: osd_module(OSD_OUTPUT_PROVIDER, "network"),
output_module(),
m_io_context(nullptr), m_server(nullptr)
{
}
virtual ~output_network()
virtual ~output_network()
{
}
virtual int init(const osd_options &options) override
virtual int init(const osd_options &options) override
{
m_working_thread = std::thread([](output_network* self) { self->process_output(); }, this);
return 0;
}
virtual void exit() override
virtual void exit() override
{
m_io_context->stop();
m_working_thread.join();

2
src/osd/modules/output/win32_output.cpp
View File

@ -110,7 +110,7 @@ int output_win32::init(const osd_options &options)
assert(result == 0);
(void)result; // to silence gcc 4.6
// allocate message ids before creating the window
// allocate message ids before creating the window
// since the window proc gets called during creation
om_mame_start = RegisterWindowMessage(OM_MAME_START);
assert(om_mame_start != 0);

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