Make Libble Rabble to boot, missing RMW area and it shows, nw

This commit is contained in:
angelosa 2016-03-23 22:50:06 +01:00
parent c732632da8
commit 12ae217015

View File

@ -2,20 +2,22 @@
// copyright-holders:Angelo Salese
/****************************************
Libble Rabble (c) 1983 Namco
Toypop (c) 1986 Namco
"Universal System 16" Hardware (c) 1983/1986 Namco
Namco "Universal System 16" Hardware
Notes:
------
- Libble Rabble Easter egg:
- enter service mode
- turn off the service mode switch, and turn it on again quickly to remain
on the monitor test grid
- Enter the following sequence using the right joystick:
9xU 2xR 9xD 2xL
(c) 1983 NAMCO LTD. will appear on the screen.
TODO:
- PAL is presumably inverted with address bit 11 (0x800) for 0x6000-0x7fff area
between Libble Rabble and Toy Pop.
- Proper sprite DMA.
Notes:
------
- Libble Rabble Easter egg:
- enter service mode
- turn off the service mode switch, and turn it on again quickly to remain
on the monitor test grid
- Enter the following sequence using the right joystick:
9xU 2xR 9xD 2xL
(c) 1983 NAMCO LTD. will appear on the screen.
****************************************/
@ -72,6 +74,7 @@ public:
DECLARE_READ8_MEMBER(irq_enable_r);
DECLARE_WRITE8_MEMBER(irq_disable_w);
DECLARE_WRITE8_MEMBER(irq_ctrl_w);
DECLARE_PALETTE_INIT(toypop);
DECLARE_READ8_MEMBER(dipA_l);
DECLARE_READ8_MEMBER(dipA_h);
@ -266,6 +269,12 @@ WRITE8_MEMBER(namcos16_state::irq_disable_w)
m_master_irq_enable = false;
}
WRITE8_MEMBER(namcos16_state::irq_ctrl_w)
{
m_master_irq_enable = (offset & 0x8000) ? false : true;
}
WRITE8_MEMBER(namcos16_state::slave_halt_ctrl_w)
{
m_slave_cpu->set_input_line(INPUT_LINE_RESET,offset & 0x800 ? ASSERT_LINE : CLEAR_LINE);
@ -301,22 +310,36 @@ WRITE8_MEMBER(namcos16_state::flip)
flip_screen_set(data & 1);
}
static ADDRESS_MAP_START( master_map, AS_PROGRAM, 8, namcos16_state )
static ADDRESS_MAP_START( namcos16_master_base_map, AS_PROGRAM, 8, namcos16_state )
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("fgvram")
AM_RANGE(0x0400, 0x07ff) AM_RAM AM_SHARE("fgattr")
AM_RANGE(0x0800, 0x1fff) AM_RAM AM_SHARE("master_workram")
AM_RANGE(0x2800, 0x2fff) AM_RAM AM_SHARE("slave_sharedram")
// TODO: 0x6xxx-0x7xxx seems to be programmable somehow (PAL?)
// 0x6000 - 0x7fff i/o specific, guessing PAL controlled.
AM_RANGE(0x8000, 0x8fff) AM_WRITE(slave_halt_ctrl_w)
AM_RANGE(0x9000, 0x9fff) AM_WRITE(sound_halt_ctrl_w)
// 0xa000 palette bank
AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("master_rom",0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( master_liblrabl_map, AS_PROGRAM, 8, namcos16_state )
AM_IMPORT_FROM( namcos16_master_base_map )
AM_RANGE(0x6000, 0x63ff) AM_DEVREADWRITE("namco", namco_15xx_device, sharedram_r, sharedram_w)
AM_RANGE(0x6800, 0x680f) AM_DEVREADWRITE("58xx", namco58xx_device, read, write)
AM_RANGE(0x6810, 0x681f) AM_DEVREADWRITE("56xx_1", namco56xx_device, read, write)
AM_RANGE(0x6820, 0x682f) AM_DEVREADWRITE("56xx_2", namco56xx_device, read, write)
AM_RANGE(0x7000, 0x7fff) AM_READNOP AM_WRITE(irq_ctrl_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( master_toypop_map, AS_PROGRAM, 8, namcos16_state )
AM_IMPORT_FROM( namcos16_master_base_map )
AM_RANGE(0x6000, 0x600f) AM_DEVREADWRITE("58xx", namco58xx_device, read, write)
AM_RANGE(0x6010, 0x601f) AM_DEVREADWRITE("56xx_1", namco56xx_device, read, write)
AM_RANGE(0x6020, 0x602f) AM_DEVREADWRITE("56xx_2", namco56xx_device, read, write)
AM_RANGE(0x6800, 0x6bff) AM_DEVREADWRITE("namco", namco_15xx_device, sharedram_r, sharedram_w)
AM_RANGE(0x7000, 0x7000) AM_READWRITE(irq_enable_r,irq_disable_w)
AM_RANGE(0x8000, 0x8fff) AM_WRITE(slave_halt_ctrl_w)
AM_RANGE(0x9000, 0x9fff) AM_WRITE(sound_halt_ctrl_w)
// 0xa000 palette bank
AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("master_rom",0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_map, AS_PROGRAM, 16, namcos16_state )
@ -332,6 +355,8 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, namcos16_state )
AM_RANGE(0xe000, 0xffff) AM_ROM AM_REGION("sound_rom", 0)
ADDRESS_MAP_END
static INPUT_PORTS_START( liblrabl )
/* The inputs are not memory mapped, they are handled by three I/O chips. */
PORT_START("P1_RIGHT") /* 58XX #0 pins 22-29 */
@ -575,7 +600,7 @@ INTERRUPT_GEN_MEMBER(namcos16_state::slave_vblank_irq)
static MACHINE_CONFIG_START( liblrabl, namcos16_state )
MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4)
MCFG_CPU_PROGRAM_MAP(master_map)
MCFG_CPU_PROGRAM_MAP(master_liblrabl_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos16_state, master_vblank_irq)
MCFG_CPU_ADD("slave", M68000, MASTER_CLOCK)
@ -627,6 +652,8 @@ static MACHINE_CONFIG_START( liblrabl, namcos16_state )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( toypop, liblrabl )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(master_toypop_map)
MACHINE_CONFIG_END