mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
got rid of cop400 fake io memory map
This commit is contained in:
hap
parent
4e152d7a49
commit
12e5f62ee4
@ -104,20 +104,18 @@ const device_type COP445 = &device_creator<cop445_cpu_device>;
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#define ROM(a) m_direct->read_decrypted_byte(a)
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#define RAM_R(a) m_data->read_byte(a)
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#define RAM_W(a, v) m_data->write_byte(a, v)
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#define IN(a) m_io->read_byte(a)
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#define OUT(a, v) m_io->write_byte(a, v)
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#define IN_G() (IN(COP400_PORT_G) & m_g_mask)
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#define IN_L() IN(COP400_PORT_L)
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#define IN_SI() BIT(IN(COP400_PORT_SIO), 0)
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#define IN_CKO() BIT(IN(COP400_PORT_CKO), 0)
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#define IN_IN() (m_in_mask ? IN(COP400_PORT_IN) : 0)
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#define IN_G() (m_read_g(0, 0xff) & m_g_mask)
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#define IN_L() m_read_l(0, 0xff)
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#define IN_SI() BIT(m_read_si(), 0)
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#define IN_CKO() BIT(m_read_cko(), 0)
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#define IN_IN() (m_in_mask ? m_read_in(0, 0xff) : 0)
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#define OUT_G(v) OUT(COP400_PORT_G, (v) & m_g_mask)
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#define OUT_L(v) OUT(COP400_PORT_L, (v))
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#define OUT_D(v) OUT(COP400_PORT_D, (v) & m_d_mask)
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#define OUT_SK(v) OUT(COP400_PORT_SK, (v))
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#define OUT_SO(v) OUT(COP400_PORT_SIO, (v))
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#define OUT_G(v) m_write_g(0, (v) & m_g_mask, 0xff)
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#define OUT_L(v) m_write_l(0, v, 0xff)
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#define OUT_D(v) m_write_d(0, (v) & m_d_mask, 0xff)
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#define OUT_SK(v) m_write_sk(v)
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#define OUT_SO(v) m_write_so(v)
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#define PC m_pc
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#define A m_a
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@ -176,7 +174,16 @@ cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type
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: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
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, m_program_config("program", ENDIANNESS_LITTLE, 8, program_addr_bits, 0, internal_map_program)
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, m_data_config("data", ENDIANNESS_LITTLE, 8, data_addr_bits, 0, internal_map_data) // data width is really 4
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, m_io_config("io", ENDIANNESS_LITTLE, 8, 9, 0)
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, m_read_l(*this)
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, m_write_l(*this)
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, m_read_g(*this)
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, m_write_g(*this)
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, m_write_d(*this)
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, m_read_in(*this)
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, m_read_si(*this)
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, m_write_so(*this)
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, m_write_sk(*this)
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, m_read_cko(*this)
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, m_cki(COP400_CKI_DIVISOR_16)
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, m_cko(COP400_CKO_OSCILLATOR_OUTPUT)
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, m_microbus(COP400_MICROBUS_DISABLED)
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@ -952,7 +959,19 @@ void cop400_cpu_device::device_start()
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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m_data = &space(AS_DATA);
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m_io = &space(AS_IO);
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/* find i/o handlers */
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m_read_l.resolve_safe(0);
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m_write_l.resolve_safe();
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m_read_g.resolve_safe(0);
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m_write_g.resolve_safe();
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m_write_d.resolve_safe();
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m_read_in.resolve_safe(0);
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m_read_si.resolve_safe(0);
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m_write_so.resolve_safe();
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m_write_sk.resolve_safe();
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m_read_cko.resolve_safe(0);
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/* allocate serial timer */
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@ -16,6 +16,43 @@
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#ifndef __COP400__
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#define __COP400__
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// i/o pins
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// L pins: 8-bit bi-directional
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#define MCFG_COP400_READ_L_CB(_devcb) \
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cop400_cpu_device::set_read_l_callback(*device, DEVCB_##_devcb);
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#define MCFG_COP400_WRITE_L_CB(_devcb) \
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cop400_cpu_device::set_write_l_callback(*device, DEVCB_##_devcb);
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// G pins: 4-bit bi-directional
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#define MCFG_COP400_READ_G_CB(_devcb) \
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cop400_cpu_device::set_read_g_callback(*device, DEVCB_##_devcb);
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#define MCFG_COP400_WRITE_G_CB(_devcb) \
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cop400_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
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// D outputs: 4-bit general purpose output
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#define MCFG_COP400_WRITE_D_CB(_devcb) \
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cop400_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
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// IN inputs: 4-bit general purpose input
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#define MCFG_COP400_READ_IN_CB(_devcb) \
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cop400_cpu_device::set_read_in_callback(*device, DEVCB_##_devcb);
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// SI/SO lines: serial in/out or counter/gen.purpose
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#define MCFG_COP400_READ_SI_CB(_devcb) \
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cop400_cpu_device::set_read_si_callback(*device, DEVCB_##_devcb);
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#define MCFG_COP400_WRITE_SO_CB(_devcb) \
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cop400_cpu_device::set_write_so_callback(*device, DEVCB_##_devcb);
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// SK output line: logic-controlled clock or gen.purpose
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#define MCFG_COP400_WRITE_SK_CB(_devcb) \
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cop400_cpu_device::set_write_sk_callback(*device, DEVCB_##_devcb);
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// CKI/CKO lines: only CKO input here
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#define MCFG_COP400_READ_CKO_CB(_devcb) \
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cop400_cpu_device::set_read_cko_callback(*device, DEVCB_##_devcb);
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/***************************************************************************
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CONSTANTS
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***************************************************************************/
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@ -44,20 +81,6 @@ enum
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COP400_GENSP = STATE_GENSP
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};
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/* special I/O space ports */
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enum
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{
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COP400_PORT_L = 0x100,
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COP400_PORT_G,
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COP400_PORT_D,
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COP400_PORT_H,
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COP400_PORT_R,
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COP400_PORT_IN,
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COP400_PORT_SK,
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COP400_PORT_SIO,
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COP400_PORT_CKO
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};
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/* input lines */
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enum
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{
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@ -112,6 +135,18 @@ public:
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
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// static configuration helpers
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template<class _Object> static devcb_base &set_read_l_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_l.set_callback(object); }
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template<class _Object> static devcb_base &set_write_l_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_write_l.set_callback(object); }
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template<class _Object> static devcb_base &set_read_g_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_g.set_callback(object); }
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template<class _Object> static devcb_base &set_write_g_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_write_g.set_callback(object); }
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template<class _Object> static devcb_base &set_write_d_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_write_d.set_callback(object); }
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template<class _Object> static devcb_base &set_read_in_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_in.set_callback(object); }
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template<class _Object> static devcb_base &set_read_si_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_si.set_callback(object); }
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template<class _Object> static devcb_base &set_write_so_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_write_so.set_callback(object); }
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template<class _Object> static devcb_base &set_write_sk_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_write_sk.set_callback(object); }
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template<class _Object> static devcb_base &set_read_cko_callback(device_t &device, _Object object) { return downcast<cop400_cpu_device &>(device).m_read_cko.set_callback(object); }
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static void set_cki(device_t &device, cop400_cki_bond cki) { downcast<cop400_cpu_device &>(device).m_cki = cki; }
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static void set_cko(device_t &device, cop400_cko_bond cko) { downcast<cop400_cpu_device &>(device).m_cko = cko; }
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static void set_microbus(device_t &device, cop400_microbus microbus) { downcast<cop400_cpu_device &>(device).m_microbus = microbus; }
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@ -132,8 +167,7 @@ protected:
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
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{
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return (spacenum == AS_PROGRAM) ? &m_program_config :
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( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
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return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL );
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}
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// device_state_interface overrides
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@ -148,7 +182,18 @@ protected:
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address_space_config m_program_config;
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address_space_config m_data_config;
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address_space_config m_io_config;
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// i/o handlers
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devcb_read8 m_read_l;
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devcb_write8 m_write_l;
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devcb_read8 m_read_g;
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devcb_write8 m_write_g;
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devcb_write8 m_write_d;
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devcb_read8 m_read_in;
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devcb_read_line m_read_si;
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devcb_write_line m_write_so;
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devcb_write_line m_write_sk;
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devcb_read_line m_read_cko;
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cop400_cki_bond m_cki;
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cop400_cko_bond m_cko;
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@ -160,7 +205,6 @@ protected:
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address_space *m_program;
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direct_read_data *m_direct;
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address_space *m_data;
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address_space *m_io;
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UINT8 m_featuremask;
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@ -174,7 +218,7 @@ protected:
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UINT8 m_en; /* 4-bit enable register */
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UINT8 m_g; /* 4-bit general purpose I/O port */
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UINT8 m_q; /* 8-bit latch for L port */
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UINT16 m_sa, m_sb, m_sc; /* subroutine save registers (not present in COP440) */
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UINT16 m_sa, m_sb, m_sc; /* subroutine save registers (not present in COP440) */
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UINT8 m_sio; /* 4-bit shift register and counter */
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int m_skl; /* 1-bit latch for SK output */
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UINT8 m_h; /* 4-bit general purpose I/O port (COP440 only) */
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@ -196,15 +196,6 @@ static ADDRESS_MAP_START( draco_sound_map, AS_PROGRAM, 8, draco_state )
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AM_RANGE(0x000, 0x3ff) AM_ROMBANK("bank1")
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( draco_sound_io_map, AS_IO, 8, draco_state )
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AM_RANGE(COP400_PORT_D, COP400_PORT_D) AM_WRITE(sound_bankswitch_w)
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AM_RANGE(COP400_PORT_G, COP400_PORT_G) AM_WRITE(sound_g_w)
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AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_READWRITE(psg_r, psg_w)
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AM_RANGE(COP400_PORT_IN, COP400_PORT_IN) AM_READ(sound_in_r)
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AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_NOP
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AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_WRITENOP
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ADDRESS_MAP_END
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/* Input Ports */
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READ_LINE_MEMBER( cidelsa_state::cdp1869_pcb_r )
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@ -469,8 +460,12 @@ static MACHINE_CONFIG_START( draco, draco_state )
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MCFG_CPU_ADD(COP402N_TAG, COP402, DRACO_SND_CHR1)
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MCFG_CPU_PROGRAM_MAP(draco_sound_map)
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MCFG_CPU_IO_MAP(draco_sound_io_map)
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MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED )
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MCFG_COP400_WRITE_D_CB(WRITE8(draco_state, sound_bankswitch_w))
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MCFG_COP400_WRITE_G_CB(WRITE8(draco_state, sound_g_w))
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MCFG_COP400_READ_L_CB(READ8(draco_state, psg_r))
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MCFG_COP400_WRITE_L_CB(WRITE8(draco_state, psg_w))
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MCFG_COP400_READ_IN_CB(READ8(draco_state, sound_in_r))
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/* input/output hardware */
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MCFG_DEVICE_ADD("ic29", CDP1852, 0) // clock is really tied to CDP1869 CMSEL (pin 37)
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@ -113,7 +113,7 @@ public:
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required_shared_ptr<UINT8> m_videoram;
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required_shared_ptr<UINT8> m_colorram;
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required_shared_ptr<UINT8> m_spriteram;
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UINT8 * m_cop_io;
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UINT8 m_cop_port_l;
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/* tilemaps */
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tilemap_t * m_bg_tilemap;
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@ -137,8 +137,9 @@ public:
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DECLARE_READ8_MEMBER(adc_r);
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DECLARE_WRITE8_MEMBER(adc_w);
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DECLARE_WRITE8_MEMBER(plr2_w);
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DECLARE_READ8_MEMBER(cop_io_r);
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DECLARE_WRITE8_MEMBER(cop_io_w);
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DECLARE_READ8_MEMBER(cop_unk_r);
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DECLARE_READ_LINE_MEMBER(cop_serial_r);
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DECLARE_WRITE8_MEMBER(cop_l_w);
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DECLARE_READ8_MEMBER(protection_r);
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DECLARE_WRITE_LINE_MEMBER(looping_spcint);
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DECLARE_WRITE8_MEMBER(looping_sound_sw);
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@ -479,16 +480,20 @@ WRITE8_MEMBER(looping_state::plr2_w)
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*
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*************************************/
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READ8_MEMBER(looping_state::cop_io_r)
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READ8_MEMBER(looping_state::cop_unk_r)
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{
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// if (offset == 1) return machine().rand() & 0x01;
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return 1; // m_cop_io[offset];
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return 1;
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}
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WRITE8_MEMBER(looping_state::cop_io_w)
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READ_LINE_MEMBER(looping_state::cop_serial_r)
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{
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m_cop_io[offset] = data;
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if (offset == 0) logerror("%02x ",data);
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return 1;
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}
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WRITE8_MEMBER(looping_state::cop_l_w)
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{
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m_cop_port_l = data;
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logerror("%02x ",data);
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}
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READ8_MEMBER(looping_state::protection_r)
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@ -511,7 +516,7 @@ READ8_MEMBER(looping_state::protection_r)
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// cop write randomly fc (unfortunatly) but 61,67,b7,bf,db,e1,f3,fd,ff too and only these values
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// missing something
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if(m_cop_io[0] != 0xfc) return m_cop_io[0];
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if(m_cop_port_l != 0xfc) return m_cop_port_l;
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return 0xff;
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}
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@ -579,20 +584,6 @@ static ADDRESS_MAP_START( looping_sound_io_map, AS_IO, 8, looping_state )
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ADDRESS_MAP_END
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/* standard COP420 map */
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static ADDRESS_MAP_START( looping_cop_map, AS_PROGRAM, 8, looping_state )
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AM_RANGE(0x0000, 0x03ff) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( looping_cop_data_map, AS_DATA, 8, looping_state )
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AM_RANGE(0x0000, 0x003f) AM_RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( looping_cop_io_map, AS_IO, 8, looping_state )
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AM_RANGE(0x0100, 0x0107) AM_READWRITE(cop_io_r, cop_io_w)
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ADDRESS_MAP_END
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/*************************************
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*
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* Graphics definitions
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@ -633,10 +624,12 @@ static MACHINE_CONFIG_START( looping, looping_state )
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MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map)
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MCFG_CPU_ADD("mcu", COP420, COP_CLOCK)
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MCFG_CPU_PROGRAM_MAP(looping_cop_map)
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MCFG_CPU_DATA_MAP(looping_cop_data_map)
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MCFG_CPU_IO_MAP(looping_cop_io_map)
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MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED )
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MCFG_COP400_WRITE_L_CB(WRITE8(looping_state, cop_l_w))
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MCFG_COP400_READ_L_CB(READ8(looping_state, cop_unk_r))
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MCFG_COP400_READ_G_CB(READ8(looping_state, cop_unk_r))
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MCFG_COP400_READ_IN_CB(READ8(looping_state, cop_unk_r))
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MCFG_COP400_READ_SI_CB(READLINE(looping_state, cop_serial_r))
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -892,8 +885,8 @@ DRIVER_INIT_MEMBER(looping_state,looping)
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int length = memregion("maincpu")->bytes();
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UINT8 *rom = memregion("maincpu")->base();
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int i;
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m_cop_io = auto_alloc_array(machine(), UINT8, 0x08);
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m_cop_port_l = 0;
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/* bitswap the TMS9995 ROMs */
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for (i = 0; i < length; i++)
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@ -75,8 +75,8 @@ public:
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DECLARE_READ8_MEMBER(cop_g_r);
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DECLARE_WRITE8_MEMBER(control_w);
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DECLARE_WRITE8_MEMBER(cop_g_w);
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DECLARE_READ8_MEMBER(cop_si_r);
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DECLARE_WRITE8_MEMBER(cop_so_w);
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DECLARE_READ_LINE_MEMBER(cop_si_r);
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DECLARE_WRITE_LINE_MEMBER(cop_so_w);
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DECLARE_WRITE8_MEMBER(control2_w);
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DECLARE_READ8_MEMBER(dsw_b_r);
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DECLARE_READ8_MEMBER(laserdsc_data_r);
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@ -294,7 +294,7 @@ WRITE8_MEMBER(thayers_state::cop_g_w)
|
||||
|
||||
/* Keyboard */
|
||||
|
||||
READ8_MEMBER(thayers_state::cop_si_r)
|
||||
READ_LINE_MEMBER(thayers_state::cop_si_r)
|
||||
{
|
||||
/* keyboard data */
|
||||
|
||||
@ -327,11 +327,11 @@ READ8_MEMBER(thayers_state::cop_si_r)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(thayers_state::cop_so_w)
|
||||
WRITE_LINE_MEMBER(thayers_state::cop_so_w)
|
||||
{
|
||||
/* keyboard clock */
|
||||
|
||||
if (data)
|
||||
if (state)
|
||||
{
|
||||
m_rx_bit++;
|
||||
|
||||
@ -622,14 +622,6 @@ static ADDRESS_MAP_START( thayers_io_map, AS_IO, 8, thayers_state )
|
||||
AM_RANGE(0xf7, 0xf7) AM_WRITE(den2_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( thayers_cop_io_map, AS_IO, 8, thayers_state )
|
||||
AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_READWRITE(cop_l_r, cop_l_w)
|
||||
AM_RANGE(COP400_PORT_G, COP400_PORT_G) AM_READWRITE(cop_g_r, cop_g_w)
|
||||
AM_RANGE(COP400_PORT_D, COP400_PORT_D) AM_WRITE(cop_d_w)
|
||||
AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_WRITENOP
|
||||
AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_READ(cop_si_r) AM_WRITE(cop_so_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/* Input Ports */
|
||||
|
||||
CUSTOM_INPUT_MEMBER(thayers_state::laserdisc_enter_r)
|
||||
@ -780,15 +772,21 @@ void thayers_state::machine_reset()
|
||||
/* Machine Driver */
|
||||
|
||||
static MACHINE_CONFIG_START( thayers, thayers_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL_4MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(thayers_map)
|
||||
MCFG_CPU_IO_MAP(thayers_io_map)
|
||||
|
||||
MCFG_CPU_ADD("mcu", COP421, XTAL_4MHz/2) // COP421L-PCA/N
|
||||
MCFG_CPU_IO_MAP(thayers_cop_io_map)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED )
|
||||
|
||||
MCFG_COP400_READ_L_CB(READ8(thayers_state, cop_l_r))
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(thayers_state, cop_l_w))
|
||||
MCFG_COP400_READ_G_CB(READ8(thayers_state, cop_g_r))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(thayers_state, cop_g_w))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(thayers_state, cop_d_w))
|
||||
MCFG_COP400_READ_SI_CB(READLINE(thayers_state, cop_si_r))
|
||||
MCFG_COP400_WRITE_SO_CB(WRITELINE(thayers_state, cop_so_w))
|
||||
|
||||
MCFG_LASERDISC_PR7820_ADD("laserdisc")
|
||||
|
||||
|
||||
@ -42,14 +42,6 @@ static ADDRESS_MAP_START( io_map, AS_IO, 8, advision_state )
|
||||
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(vsync_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sound_io_map, AS_IO, 8, advision_state )
|
||||
AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_READ(sound_cmd_r)
|
||||
AM_RANGE(COP400_PORT_G, COP400_PORT_G) AM_WRITE(sound_g_w)
|
||||
AM_RANGE(COP400_PORT_D, COP400_PORT_D) AM_WRITE(sound_d_w)
|
||||
AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_NOP
|
||||
AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_NOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/* Input Ports */
|
||||
|
||||
static INPUT_PORTS_START( advision )
|
||||
@ -74,7 +66,9 @@ static MACHINE_CONFIG_START( advision, advision_state )
|
||||
|
||||
MCFG_CPU_ADD(COP411_TAG, COP411, 52631*16) // COP411L-KCN/N
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_RAM_POWER_SUPPLY, COP400_MICROBUS_DISABLED)
|
||||
MCFG_CPU_IO_MAP(sound_io_map)
|
||||
MCFG_COP400_READ_L_CB(READ8(advision_state, sound_cmd_r))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(advision_state, sound_g_w))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(advision_state, sound_d_w))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
|
||||
|
||||
@ -23,26 +23,6 @@ static ADDRESS_MAP_START(lisa_map, AS_PROGRAM, 16, lisa_state )
|
||||
AM_RANGE(0x000000, 0xffffff) AM_READWRITE(lisa_r, lisa_w) /* no fixed map, we use an MMU */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( lisa_cop_io_map, AS_IO, 8, lisa_state )
|
||||
AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_NOP
|
||||
AM_RANGE(COP400_PORT_G, COP400_PORT_G) AM_NOP
|
||||
AM_RANGE(COP400_PORT_D, COP400_PORT_D) AM_NOP
|
||||
AM_RANGE(COP400_PORT_IN, COP400_PORT_IN) AM_NOP
|
||||
AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_WRITENOP
|
||||
AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_NOP
|
||||
AM_RANGE(COP400_PORT_CKO, COP400_PORT_CKO) AM_READNOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( kb_cop_io_map, AS_IO, 8, lisa_state )
|
||||
AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_NOP
|
||||
AM_RANGE(COP400_PORT_G, COP400_PORT_G) AM_NOP
|
||||
AM_RANGE(COP400_PORT_D, COP400_PORT_D) AM_NOP
|
||||
AM_RANGE(COP400_PORT_IN, COP400_PORT_IN) AM_NOP
|
||||
AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_WRITENOP
|
||||
AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_NOP
|
||||
AM_RANGE(COP400_PORT_CKO, COP400_PORT_CKO) AM_READNOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(lisa_fdc_map, AS_PROGRAM, 8, lisa_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x1fff) // only 8k of address space
|
||||
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("fdc_ram") /* RAM (shared with 68000) */
|
||||
@ -120,11 +100,9 @@ static MACHINE_CONFIG_START( lisa, lisa_state )
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", lisa_state, lisa_interrupt)
|
||||
|
||||
MCFG_CPU_ADD(COP421_TAG, COP421, 3900000)
|
||||
MCFG_CPU_IO_MAP(lisa_cop_io_map)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
|
||||
MCFG_CPU_ADD(KB_COP421_TAG, COP421, 3900000) // ?
|
||||
MCFG_CPU_IO_MAP(kb_cop_io_map)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
|
||||
MCFG_CPU_ADD("fdccpu", M6504, 2000000) /* 16.000 MHz / 8 in when DIS asserted, 16.000 MHz / 9 otherwise (?) */
|
||||
|
||||
@ -492,20 +492,20 @@ READ8_MEMBER( newbrain_state::cop_in_r )
|
||||
return (m_cop_wr << 3) | (m_cop_access << 2) | (m_cop_rd << 1) | BIT(m_keydata, 2);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( newbrain_state::cop_so_w )
|
||||
WRITE_LINE_MEMBER( newbrain_state::cop_so_w )
|
||||
{
|
||||
// connected to K1
|
||||
m_cop_so = data;
|
||||
m_cop_so = state;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( newbrain_state::cop_sk_w )
|
||||
WRITE_LINE_MEMBER( newbrain_state::cop_sk_w )
|
||||
{
|
||||
// connected to K2
|
||||
m_segment_data[m_keylatch] >>= 1;
|
||||
m_segment_data[m_keylatch] = (m_cop_so << 15) | (m_segment_data[m_keylatch] & 0x7fff);
|
||||
}
|
||||
|
||||
READ8_MEMBER( newbrain_state::cop_si_r )
|
||||
READ_LINE_MEMBER( newbrain_state::cop_si_r )
|
||||
{
|
||||
// connected to TDI
|
||||
m_cop_tdi = (((m_cassette1)->input() > +1.0) || ((m_cassette2)->input() > +1.0)) ^ m_cop_tdo;
|
||||
@ -1019,16 +1019,6 @@ static ADDRESS_MAP_START( newbrain_a_io_map, AS_IO, 8, newbrain_state )
|
||||
AM_RANGE(0x16, 0x16) AM_MIRROR(0xffc0) AM_READ(user_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( newbrain_cop_io_map, AS_IO, 8, newbrain_state )
|
||||
AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_READWRITE(cop_l_r, cop_l_w)
|
||||
AM_RANGE(COP400_PORT_G, COP400_PORT_G) AM_READWRITE(cop_g_r, cop_g_w)
|
||||
AM_RANGE(COP400_PORT_D, COP400_PORT_D) AM_WRITE(cop_d_w)
|
||||
AM_RANGE(COP400_PORT_IN, COP400_PORT_IN) AM_READ(cop_in_r)
|
||||
AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_WRITE(cop_sk_w)
|
||||
AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_READWRITE(cop_si_r, cop_so_w)
|
||||
AM_RANGE(COP400_PORT_CKO, COP400_PORT_CKO) AM_READNOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( newbrain_fdc_map, AS_PROGRAM, 8, newbrain_eim_state )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x1fff) AM_ROM
|
||||
@ -1321,8 +1311,16 @@ static MACHINE_CONFIG_START( newbrain_a, newbrain_state )
|
||||
MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_TAG, newbrain_state, newbrain_interrupt)
|
||||
|
||||
MCFG_CPU_ADD(COP420_TAG, COP420, XTAL_16MHz/8) // COP420-GUW/N
|
||||
MCFG_CPU_IO_MAP(newbrain_cop_io_map)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
MCFG_COP400_READ_L_CB(READ8(newbrain_state, cop_l_r))
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(newbrain_state, cop_l_w))
|
||||
MCFG_COP400_READ_G_CB(READ8(newbrain_state, cop_g_r))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(newbrain_state, cop_g_w))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(newbrain_state, cop_d_w))
|
||||
MCFG_COP400_READ_IN_CB(READ8(newbrain_state, cop_in_r))
|
||||
MCFG_COP400_WRITE_SK_CB(WRITELINE(newbrain_state, cop_sk_w))
|
||||
MCFG_COP400_READ_SI_CB(READLINE(newbrain_state, cop_si_r))
|
||||
MCFG_COP400_WRITE_SO_CB(WRITELINE(newbrain_state, cop_so_w))
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", newbrain)
|
||||
|
||||
|
||||
@ -27,23 +27,16 @@ WRITE8_MEMBER( t400_test_suite_state::port_l_w )
|
||||
// printf("L: %u\n", data);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( cop_io, AS_IO, 8, t400_test_suite_state )
|
||||
AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_WRITE(port_l_w)
|
||||
AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_NOP
|
||||
AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_NOP
|
||||
AM_RANGE(COP400_PORT_CKO, COP400_PORT_CKO) AM_NOP
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static MACHINE_CONFIG_START( test_t410, t400_test_suite_state )
|
||||
MCFG_CPU_ADD("maincpu", COP410, 1000000)
|
||||
MCFG_CPU_IO_MAP(cop_io)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(t400_test_suite_state, port_l_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( test_t420, t400_test_suite_state )
|
||||
MCFG_CPU_ADD("maincpu", COP420, 1000000)
|
||||
MCFG_CPU_IO_MAP(cop_io)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(t400_test_suite_state, port_l_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
ROM_START( test410 )
|
||||
|
||||
@ -103,9 +103,9 @@ public:
|
||||
DECLARE_READ8_MEMBER( cop_g_r );
|
||||
DECLARE_WRITE8_MEMBER( cop_d_w );
|
||||
DECLARE_READ8_MEMBER( cop_in_r );
|
||||
DECLARE_WRITE8_MEMBER( cop_sk_w );
|
||||
DECLARE_READ8_MEMBER( cop_si_r );
|
||||
DECLARE_WRITE8_MEMBER( cop_so_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( cop_sk_w );
|
||||
DECLARE_READ_LINE_MEMBER( cop_si_r );
|
||||
DECLARE_WRITE_LINE_MEMBER( cop_so_w );
|
||||
DECLARE_READ8_MEMBER( tvl_r );
|
||||
DECLARE_WRITE8_MEMBER( tvl_w );
|
||||
DECLARE_WRITE8_MEMBER( tvctl_w );
|
||||
|
||||
Loading…
Reference in New Issue
Block a user