mirror of
https://github.com/holub/mame
synced 2025-04-16 21:44:32 +03:00
New NOT_WORKING machines
--- Motorola MVME12x [Katherine Rohl]
This commit is contained in:
Luigi Thirty
GitHub
parent
009a0ab3e0
commit
1300c4b6e0
@ -2376,6 +2376,8 @@ if (BUSES["VME"]~=null) then
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MAME_DIR .. "src/devices/bus/vme/vme.h",
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MAME_DIR .. "src/devices/bus/vme/vme_mzr8300.cpp",
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MAME_DIR .. "src/devices/bus/vme/vme_mzr8300.h",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme120.cpp",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme120.h",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme350.cpp",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme350.h",
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MAME_DIR .. "src/devices/bus/vme/vme_fccpu20.cpp",
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@ -3054,6 +3054,7 @@ files {
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MAME_DIR .. "src/mame/drivers/mekd5.cpp",
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MAME_DIR .. "src/mame/drivers/mvme147.cpp",
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MAME_DIR .. "src/mame/drivers/mvme162.cpp",
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MAME_DIR .. "src/mame/drivers/sys1121.cpp",
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MAME_DIR .. "src/mame/drivers/uchroma68.cpp",
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}
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475
src/devices/bus/vme/vme_mvme120.cpp
Normal file
475
src/devices/bus/vme/vme_mvme120.cpp
Normal file
@ -0,0 +1,475 @@
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// license:BSD-3-Clause
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// copyright-holders:Katherine Rohl
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/*
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* Motorola MVME120 CPU board.
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* This is an early MVME system from 1984, using standard Motorola parts
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* instead of the many ASICs of later boards.
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*
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* The following configurations were available:
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* MVME120 - 10MHz 68010, 128KB RAM, 4KB SRAM cache, 68451 MMU
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* MVME121 - 10MHz 68010, 512KB RAM, 4KB SRAM cache, 68451 MMU
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* MVME122 - 12.5MHz 68010, 128KB RAM, no cache, no MMU
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* MVME123 - 12.5MHz 68010, 512KB RAM, 4KB SRAM cache, no MMU
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*
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* Current state, it crashes at $F058D8 while testing CPU exception handling.
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* If you skip over that address (pc=F058E2 in the debugger) it continues
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* through the self-test.
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*
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* Looks like you also have to reboot the system once before the terminal
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* works properly? Still working on that.
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*/
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#include "emu.h"
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#include "vme_mvme120.h"
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#ifdef _MSC_VER
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#define FUNCNAME __func__
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#else
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#define FUNCNAME __PRETTY_FUNCTION__
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#endif
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#define LOG_PRINTF (1U << 1)
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#define LOG_SETUP (1U << 2)
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#define LOG_GENERAL (1U << 3)
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#define VERBOSE (LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
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#include "logmacro.h"
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#define LOGPRINTF(...) LOGMASKED(LOG_PRINTF, __VA_ARGS__)
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#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
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#define LOGGENERAL(...) LOGMASKED(LOG_GENERAL, __VA_ARGS__)
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// Clocks
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#define MVME120_MASTER_CLOCK 20_MHz_XTAL
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#define MVME120_CPU_CLOCK ( MVME120_MASTER_CLOCK / 2 )
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#define MVME120_MFP_CLOCK ( MVME120_CPU_CLOCK / 4 )
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#define MVME122_MASTER_CLOCK 25_MHz_XTAL
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#define MVME122_CPU_CLOCK ( MVME122_MASTER_CLOCK / 2 )
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#define MVME122_MFP_CLOCK ( MVME122_CPU_CLOCK / 4 )
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// The four MVME12x card variants.
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DEFINE_DEVICE_TYPE(VME_MVME120, vme_mvme120_card_device, "mvme120", "Motorola MVME-120")
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DEFINE_DEVICE_TYPE(VME_MVME121, vme_mvme121_card_device, "mvme121", "Motorola MVME-121")
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DEFINE_DEVICE_TYPE(VME_MVME122, vme_mvme122_card_device, "mvme122", "Motorola MVME-122")
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DEFINE_DEVICE_TYPE(VME_MVME123, vme_mvme123_card_device, "mvme123", "Motorola MVME-123")
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static INPUT_PORTS_START(mvme120)
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PORT_START("S3")
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// described as "autoboot" and "cache disable" in the manual
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PORT_DIPNAME(0x01, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("S3:1") PORT_CHANGED_MEMBER(DEVICE_SELF, vme_mvme120_device, s3_autoboot, 0)
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPNAME(0x02, 0x00, "Baud Rate Select") PORT_DIPLOCATION("S3:2") PORT_CHANGED_MEMBER(DEVICE_SELF, vme_mvme120_device, s3_baudrate, 0)
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PORT_DIPSETTING( 0x02, "10.0MHz CPU")
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PORT_DIPSETTING( 0x00, "12.5MHz CPU")
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PORT_DIPNAME(0x0C, 0x08, "Reset Vector Source") PORT_DIPLOCATION("S3:3,4")
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PORT_DIPSETTING( 0x08, "Onboard ROM")
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PORT_DIPSETTING( 0x04, "VMEbus")
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// Select whether MSR bit 7 monitors ACFAIL* or SYSFAIL* on the VME bus.
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PORT_START("J2")
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PORT_DIPNAME(0x01, 0x01, "ACFAIL*/SYSFAIL* Select")
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PORT_DIPSETTING( 0x00, "ACFAIL*")
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PORT_DIPSETTING( 0x01, "SYSFAIL*")
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PORT_START("J3-J4") // Different configurations of jumpers in J3 and J4.
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PORT_DIPNAME(0x03, 0x03, "VMEbus Request Level")
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PORT_DIPSETTING( 0x00, "Level 0")
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PORT_DIPSETTING( 0x01, "Level 1")
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PORT_DIPSETTING( 0x02, "Level 2")
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PORT_DIPSETTING( 0x03, "Level 3")
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PORT_START("J5")
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PORT_DIPNAME(0x01, 0x01, "Abort Switch Enable")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x01, DEF_STR( On ))
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PORT_START("J6")
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PORT_DIPNAME(0x01, 0x01, "Reset Switch Enable")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x01, DEF_STR( On ))
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PORT_START("J7") // Enable/disable VME IRQs reaching the MFP.
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PORT_DIPNAME(0x01, 0x01, "VME IRQ1") PORT_DIPLOCATION("J7:1")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x01, DEF_STR( On ))
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PORT_DIPNAME(0x02, 0x02, "VME IRQ2") PORT_DIPLOCATION("J7:2")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x02, DEF_STR( On ))
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PORT_DIPNAME(0x04, 0x04, "VME IRQ3") PORT_DIPLOCATION("J7:3")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x04, DEF_STR( On ))
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PORT_DIPNAME(0x08, 0x08, "VME IRQ4") PORT_DIPLOCATION("J7:4")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x08, DEF_STR( On ))
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PORT_DIPNAME(0x10, 0x10, "VME IRQ5") PORT_DIPLOCATION("J7:5")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x10, DEF_STR( On ))
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PORT_DIPNAME(0x20, 0x20, "VME IRQ6") PORT_DIPLOCATION("J7:6")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x20, DEF_STR( On ))
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PORT_DIPNAME(0x40, 0x40, "VME IRQ7") PORT_DIPLOCATION("J7:7")
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PORT_DIPSETTING( 0x00, DEF_STR( Off ))
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PORT_DIPSETTING( 0x40, DEF_STR( On ))
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// EPROM configuration is J8
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// Cache configuration is J9/J17
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INPUT_PORTS_END
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ioport_constructor vme_mvme120_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(mvme120);
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}
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vme_mvme120_device::vme_mvme120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, mvme12x_variant board_id) :
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device_t(mconfig, type, tag, owner, clock)
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, device_vme_card_interface(mconfig, *this)
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, m_maincpu(*this, "maincpu")
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, m_mfp(*this, "mfp")
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, m_rs232(*this, "rs232")
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, m_input_s3(*this, "S3")
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, m_sysrom(*this, "maincpu")
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, m_localram(*this, "localram")
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, m_board_id(board_id)
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{
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}
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vme_mvme120_card_device::vme_mvme120_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_mvme120_card_device(mconfig, VME_MVME120, tag, owner, clock)
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{
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}
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vme_mvme121_card_device::vme_mvme121_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_mvme121_card_device(mconfig, VME_MVME121, tag, owner, clock)
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{
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}
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vme_mvme122_card_device::vme_mvme122_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_mvme122_card_device(mconfig, VME_MVME122, tag, owner, clock)
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{
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}
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vme_mvme123_card_device::vme_mvme123_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: vme_mvme123_card_device(mconfig, VME_MVME123, tag, owner, clock)
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{
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}
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void vme_mvme120_device::mvme12x_base_mem(address_map &map)
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{
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map(0xf00000, 0xf0ffff).rom().region("maincpu", 0x00000); // ROM/EEPROM bank 1 - 120bug
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map(0xf10000, 0xf1ffff).rom().region("maincpu", 0x10000); // ROM/EEPROM bank 2 - unpopulated
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map(0xf20000, 0xf2003f).mirror(0x1ffc0).umask16(0x00ff).rw(m_mfp, FUNC(mc68901_device::read), FUNC(mc68901_device::write));
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map(0xf40000, 0xf40000).mirror(0x1fffc).rw(FUNC(vme_mvme120_card_device::ctrlreg_r), FUNC(vme_mvme120_card_device::ctrlreg_w));
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// $F60000-F6003F 68451 MMU, mirrored to $F7FFFF
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map(0xfa0000, 0xfeffff).rw(FUNC(vme_mvme120_card_device::vme_a24_r), FUNC(vme_mvme120_card_device::vme_a24_w)); // VMEbus 24-bit addresses
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map(0xff0000, 0xffffff).rw(FUNC(vme_mvme120_card_device::vme_a16_r), FUNC(vme_mvme120_card_device::vme_a16_w)); // VMEbus 16-bit addresses
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// $F80002-F80003 clear cache bank 2
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// $F80004-F80005 clear cache bank 1
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// $F80006-F80007 clear cache bank 1+2
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// (above mirrored to $F9FFFF)
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}
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void vme_mvme120_device::mvme120_mem(address_map &map)
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{
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mvme12x_base_mem(map);
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map(0x000000, 0x01ffff).ram().share(m_localram);
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map(0x020000, 0xefffff).rw(FUNC(vme_mvme120_card_device::vme_a24_r), FUNC(vme_mvme120_card_device::vme_a24_w)); // VMEbus 24-bit addresses
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// $F60000-F6003F 68451 MMU, mirrored to $F7FFFF
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// $F80002-F80003 clear cache bank 2
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// $F80004-F80005 clear cache bank 1
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// $F80006-F80007 clear cache bank 1+2
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// (above mirrored to $F9FFFF)
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}
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void vme_mvme120_device::mvme121_mem(address_map &map)
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{
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mvme12x_base_mem(map);
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map(0x000000, 0x07ffff).ram().share(m_localram);
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map(0x080000, 0xefffff).rw(FUNC(vme_mvme120_card_device::vme_a24_r), FUNC(vme_mvme120_card_device::vme_a24_w)); // VMEbus 24-bit addresses
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// $F60000-F6003F 68451 MMU, mirrored to $F7FFFF
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// $F80002-F80003 clear cache bank 2
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// $F80004-F80005 clear cache bank 1
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// $F80006-F80007 clear cache bank 1+2
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// (above mirrored to $F9FFFF)
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}
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void vme_mvme120_device::mvme122_mem(address_map &map)
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{
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mvme12x_base_mem(map);
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map(0x000000, 0x01ffff).ram().share(m_localram);
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map(0x020000, 0xefffff).rw(FUNC(vme_mvme120_card_device::vme_a24_r), FUNC(vme_mvme120_card_device::vme_a24_w)); // VMEbus 24-bit addresses
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// No MMU, no cache
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}
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void vme_mvme120_device::mvme123_mem(address_map &map)
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{
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mvme12x_base_mem(map);
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map(0x000000, 0x07ffff).ram().share(m_localram);
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map(0x020000, 0xefffff).rw(FUNC(vme_mvme120_card_device::vme_a24_r), FUNC(vme_mvme120_card_device::vme_a24_w)); // VMEbus 24-bit addresses
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// $F80002-F80003 clear cache bank 2
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// $F80004-F80005 clear cache bank 1
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// $F80006-F80007 clear cache bank 1+2
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// (above mirrored to $F9FFFF)
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}
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void vme_mvme120_device::device_start()
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{
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LOG("%s\n", FUNCNAME);
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}
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void vme_mvme120_device::device_reset()
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{
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LOG("%s\n", FUNCNAME);
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// First 4 machine cycles, ROM is mapped to the reset vector.
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address_space &program = m_maincpu->space(AS_PROGRAM);
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program.install_rom(0x000000, 0x000007, m_sysrom);
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m_memory_read_count = 0;
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m_rom_shadow_tap = program.install_read_tap(0x000000, 0x000007, "rom_shadow_r",[this](offs_t offset, u16 &data, u16 mem_mask)
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{
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rom_shadow_tap(offset, data, mem_mask);
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});
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ctrlreg_w(0, 0xFF); // /RESET flips the latch bits to $FF
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}
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uint16_t vme_mvme120_device::rom_shadow_tap(offs_t address, u16 data, u16 mem_mask)
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{
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if(!machine().side_effects_disabled())
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{
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if(m_memory_read_count >= 3)
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{
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// delete this tap
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m_rom_shadow_tap->remove();
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// reinstall ram over the rom shadow
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m_maincpu->space(AS_PROGRAM).install_ram(0x000000, 0x000007, m_localram);
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}
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m_memory_read_count++;
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}
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return data;
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}
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WRITE_LINE_MEMBER(vme_mvme120_device::watchdog_reset)
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{
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if(state)
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{
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LOG("%s: MFP watchdog reset\n", FUNCNAME);
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machine().schedule_soft_reset();
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}
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}
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WRITE_LINE_MEMBER(vme_mvme120_device::mfp_interrupt)
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{
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LOG("%s: MFP asserting interrupt\n", FUNCNAME);
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// MFP interrupts are gated by bit 2 of the control register.
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if(state && !BIT(m_ctrlreg, 2))
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{
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LOG("%s: MFP interrupt triggered 68K IRQ6\n", FUNCNAME);
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m_maincpu->set_input_line(M68K_IRQ_6, ASSERT_LINE);
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}
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if(!state)
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{
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m_maincpu->set_input_line(M68K_IRQ_6, CLEAR_LINE);
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}
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}
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void vme_mvme120_device::vme_bus_timeout()
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{
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m_mfp->i2_w(ASSERT_LINE);
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m_mfp->i2_w(CLEAR_LINE);
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m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
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m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
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}
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// Dummy VMEbus access
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uint16_t vme_mvme120_device::vme_a24_r()
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{
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if(!machine().side_effects_disabled())
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{
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vme_bus_timeout();
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}
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return 0;
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}
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void vme_mvme120_device::vme_a24_w(uint16_t data)
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{
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vme_bus_timeout();
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}
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uint16_t vme_mvme120_device::vme_a16_r()
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{
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if(!machine().side_effects_disabled())
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{
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vme_bus_timeout();
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}
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return 0;
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}
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void vme_mvme120_device::vme_a16_w(uint16_t data)
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{
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vme_bus_timeout();
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}
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uint8_t vme_mvme120_device::ctrlreg_r(offs_t offset)
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{
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// Control Register
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// b0 - BRDFAIL - Controls FAIL LED
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// b1 - /CTS - Asserts RTS on serial port 1
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// b2 - /IE - When asserted, MFP interrupts reach the CPU
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// b3 - /PAREN - When asserted, parity errors do not cause /BERR.
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// b4 - CACHEN - Enable SRAM cache
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// b5 - FREEZE - Cache cannot be updated (but can be invalidated)
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// b6 - /ALTCLR - "Allows bus error to start alternate interrupt mode" (?)
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// b7 - /WWP - When asserted, bad parity is written to RAM.
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return m_ctrlreg;
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}
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void vme_mvme120_device::ctrlreg_w(offs_t offset, uint8_t data)
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{
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LOG("%s: vme120 control register set to $%02X\n", FUNCNAME, data);
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m_ctrlreg = data;
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// Set lines according to the new ctrlreg status.
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m_rs232->write_rts(!BIT(m_ctrlreg, 1));
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}
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|
||||
static const input_device_default terminal_defaults[] =
|
||||
{
|
||||
DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
|
||||
DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 )
|
||||
DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_8 )
|
||||
DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_NONE )
|
||||
DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 )
|
||||
{ nullptr, 0, 0 }
|
||||
};
|
||||
|
||||
/*
|
||||
* Machine configuration
|
||||
*/
|
||||
void vme_mvme120_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
M68010(config, m_maincpu, MVME120_CPU_CLOCK);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vme_mvme120_card_device::mvme120_mem);
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_mvme120_card_device::mvme120_mem);
|
||||
|
||||
MC68901(config, m_mfp, MVME120_MFP_CLOCK);
|
||||
m_mfp->set_timer_clock(MVME120_MFP_CLOCK);
|
||||
m_mfp->out_so_cb().set("rs232", FUNC(rs232_port_device::write_txd));
|
||||
m_mfp->out_tao_cb().set("mfp", FUNC(mc68901_device::tbi_w));
|
||||
m_mfp->out_tbo_cb().set(FUNC(vme_mvme120_card_device::watchdog_reset));
|
||||
m_mfp->out_tco_cb().set("mfp", FUNC(mc68901_device::rc_w));
|
||||
m_mfp->out_tco_cb().append("mfp", FUNC(mc68901_device::tc_w));
|
||||
m_mfp->out_irq_cb().set(FUNC(vme_mvme120_card_device::mfp_interrupt));
|
||||
|
||||
RS232_PORT(config, m_rs232, default_rs232_devices, "terminal");
|
||||
m_rs232->rxd_handler().set("mfp", FUNC(mc68901_device::si_w));
|
||||
m_rs232->set_option_device_input_defaults("terminal", terminal_defaults);
|
||||
|
||||
// Missing: MMU, VMEbus
|
||||
|
||||
VME(config, "vme", 0);
|
||||
|
||||
/*
|
||||
// Onboard RAM is always visible to VMEbus. (Decoding controlled by U28.)
|
||||
m_vme->install_device(vme_device::A24_SC, 0, 0x1FFFF,
|
||||
read16_delegate(*this, FUNC(vme_mvme120_device::vme_to_ram_r)),
|
||||
write16_delegate(*this, FUNC(vme_mvme120_device::vme_to_ram_w)),
|
||||
0xFFFF);
|
||||
*/
|
||||
}
|
||||
|
||||
uint16_t vme_mvme120_device::vme_to_ram_r(address_space &space, offs_t address, uint16_t mem_mask)
|
||||
{
|
||||
return m_localram[address];
|
||||
}
|
||||
|
||||
void vme_mvme120_device::vme_to_ram_w(address_space &space, offs_t address, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
m_localram[address] = data;
|
||||
}
|
||||
|
||||
void vme_mvme120_card_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
vme_mvme120_device::device_add_mconfig(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vme_mvme120_card_device::mvme120_mem);
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_mvme120_card_device::mvme120_mem);
|
||||
}
|
||||
|
||||
void vme_mvme121_card_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
vme_mvme120_device::device_add_mconfig(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vme_mvme121_card_device::mvme121_mem);
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_mvme121_card_device::mvme121_mem);
|
||||
}
|
||||
|
||||
void vme_mvme122_card_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
vme_mvme120_device::device_add_mconfig(config);
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vme_mvme122_card_device::mvme122_mem);
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_mvme122_card_device::mvme122_mem);
|
||||
m_maincpu->set_clock(MVME122_CPU_CLOCK);
|
||||
|
||||
m_mfp->set_clock(MVME122_MFP_CLOCK);
|
||||
m_mfp->set_timer_clock(MVME122_MFP_CLOCK);
|
||||
}
|
||||
|
||||
void vme_mvme123_card_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
vme_mvme120_device::device_add_mconfig(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vme_mvme123_card_device::mvme123_mem);
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_mvme123_card_device::mvme123_mem);
|
||||
|
||||
m_maincpu->set_clock(MVME122_CPU_CLOCK);
|
||||
|
||||
m_mfp->set_clock(MVME122_MFP_CLOCK);
|
||||
m_mfp->set_timer_clock(MVME122_MFP_CLOCK);
|
||||
}
|
||||
|
||||
// DIP switch and jumpers
|
||||
INPUT_CHANGED_MEMBER(vme_mvme120_device::s3_autoboot)
|
||||
{
|
||||
// TODO: verify
|
||||
//m_mfp->i0_w(BIT(m_input_s3->read(), 0));
|
||||
}
|
||||
|
||||
INPUT_CHANGED_MEMBER(vme_mvme120_device::s3_baudrate)
|
||||
{
|
||||
// TODO: verify
|
||||
//m_mfp->i1_w(BIT(m_input_s3->read(), 1));
|
||||
}
|
||||
|
||||
// ROM definitions
|
||||
ROM_START(mvme120)
|
||||
ROM_REGION16_BE(0x20000, "maincpu", 0)
|
||||
ROM_DEFAULT_BIOS("12xbug-v2.0")
|
||||
|
||||
ROM_SYSTEM_BIOS(0, "12xbug-v2.0", "MVME120 12xbug v2.0")
|
||||
ROMX_LOAD("12xbug-2.0-u44.bin", 0x0000, 0x4000, CRC(87d62dac) SHA1(c57eb9f8aefe29794b8fc5f0afbaff9b59d38c73), ROM_SKIP(1) | ROM_BIOS(0))
|
||||
ROMX_LOAD("12xbug-2.0-u52.bin", 0x0001, 0x4000, CRC(5651b61d) SHA1(0d0004dff3c88b2f0b18951b4f2acd7f65f701b1), ROM_SKIP(1) | ROM_BIOS(0))
|
||||
|
||||
ROM_SYSTEM_BIOS(1, "12xbug-v1.1", "MVME120 12xbug v1.1")
|
||||
ROMX_LOAD("12xbug-1.1-u44.bin", 0x0000, 0x4000, CRC(bf4d6cf1) SHA1(371bb55611eddeb6231a92af7c1e34d4ec0321b5), ROM_SKIP(1) | ROM_BIOS(1))
|
||||
ROMX_LOAD("12xbug-1.1-u52.bin", 0x0001, 0x4000, CRC(76fabe32) SHA1(2f933d0eb46d00db0051ce23c3e53ccef75a2c69), ROM_SKIP(1) | ROM_BIOS(1))
|
||||
ROM_END
|
||||
|
||||
const tiny_rom_entry *vme_mvme120_device::device_rom_region() const
|
||||
{
|
||||
return ROM_NAME(mvme120);
|
||||
}
|
||||
154
src/devices/bus/vme/vme_mvme120.h
Normal file
154
src/devices/bus/vme/vme_mvme120.h
Normal file
@ -0,0 +1,154 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Katherine Rohl
|
||||
#ifndef MAME_BUS_VME_VME_MVME120_H
|
||||
#define MAME_BUS_VME_VME_MVME120_H
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "bus/vme/vme.h"
|
||||
#include "bus/rs232/rs232.h"
|
||||
#include "machine/clock.h"
|
||||
#include "machine/mc68901.h"
|
||||
|
||||
DECLARE_DEVICE_TYPE(VME_MVME120, vme_mvme120_card_device)
|
||||
DECLARE_DEVICE_TYPE(VME_MVME121, vme_mvme121_card_device)
|
||||
DECLARE_DEVICE_TYPE(VME_MVME122, vme_mvme122_card_device)
|
||||
DECLARE_DEVICE_TYPE(VME_MVME123, vme_mvme123_card_device)
|
||||
|
||||
//**************************************************************************
|
||||
// Base Device declaration
|
||||
//**************************************************************************
|
||||
class vme_mvme120_device : public device_t, public device_vme_card_interface
|
||||
{
|
||||
public:
|
||||
/* Board types */
|
||||
enum mvme12x_variant
|
||||
{
|
||||
mvme120_board,
|
||||
mvme121_board,
|
||||
mvme122_board,
|
||||
mvme123_board
|
||||
};
|
||||
|
||||
vme_mvme120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, mvme12x_variant board_id);
|
||||
|
||||
// Switch and jumper handlers
|
||||
DECLARE_INPUT_CHANGED_MEMBER(s3_autoboot);
|
||||
DECLARE_INPUT_CHANGED_MEMBER(s3_baudrate);
|
||||
|
||||
uint16_t vme_to_ram_r(address_space &space, offs_t offset, uint16_t mem_mask);
|
||||
void vme_to_ram_w(address_space &space, offs_t address, uint16_t data, uint16_t mem_mask);
|
||||
|
||||
protected:
|
||||
void device_add_mconfig(machine_config &config) override;
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
void mvme12x_base_mem(address_map &map);
|
||||
void mvme120_mem(address_map &map);
|
||||
void mvme121_mem(address_map &map);
|
||||
void mvme122_mem(address_map &map);
|
||||
void mvme123_mem(address_map &map);
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
|
||||
required_device<mc68901_device> m_mfp;
|
||||
required_device<rs232_port_device> m_rs232;
|
||||
|
||||
required_ioport m_input_s3;
|
||||
|
||||
memory_passthrough_handler *m_rom_shadow_tap;
|
||||
memory_passthrough_handler *m_ram_wwp_tap;
|
||||
|
||||
required_region_ptr<uint16_t> m_sysrom;
|
||||
required_shared_ptr<uint16_t> m_localram;
|
||||
|
||||
uint8_t m_ctrlreg; // "VME120 Control Register"
|
||||
uint8_t m_memory_read_count; // For boot ROM shadowing $000000
|
||||
|
||||
uint8_t ctrlreg_r(offs_t offset);
|
||||
void ctrlreg_w(offs_t offset, uint8_t data);
|
||||
|
||||
// VMEbus dummy lines
|
||||
void vme_bus_timeout();
|
||||
uint16_t vme_a24_r();
|
||||
void vme_a24_w(uint16_t data);
|
||||
uint16_t vme_a16_r();
|
||||
void vme_a16_w(uint16_t data);
|
||||
|
||||
uint16_t rom_shadow_tap(offs_t address, u16 data, u16 mem_mask);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(watchdog_reset);
|
||||
DECLARE_WRITE_LINE_MEMBER(mfp_interrupt);
|
||||
|
||||
const mvme12x_variant m_board_id;
|
||||
};
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// Board Device declarations
|
||||
//**************************************************************************
|
||||
|
||||
class vme_mvme120_card_device : public vme_mvme120_device
|
||||
{
|
||||
public:
|
||||
vme_mvme120_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
vme_mvme120_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
: vme_mvme120_device(mconfig, type, tag, owner, clock, mvme120_board)
|
||||
{ }
|
||||
|
||||
// optional information overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
class vme_mvme121_card_device : public vme_mvme120_device
|
||||
{
|
||||
public:
|
||||
vme_mvme121_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
vme_mvme121_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
: vme_mvme120_device(mconfig, type, tag, owner, clock, mvme121_board)
|
||||
{ }
|
||||
|
||||
// optional information overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
|
||||
class vme_mvme122_card_device : public vme_mvme120_device
|
||||
{
|
||||
public:
|
||||
vme_mvme122_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
vme_mvme122_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
: vme_mvme120_device(mconfig, type, tag, owner, clock, mvme122_board)
|
||||
{ }
|
||||
|
||||
// optional information overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
|
||||
class vme_mvme123_card_device : public vme_mvme120_device
|
||||
{
|
||||
public:
|
||||
vme_mvme123_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
vme_mvme123_card_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
: vme_mvme120_device(mconfig, type, tag, owner, clock, mvme123_board)
|
||||
{ }
|
||||
|
||||
// optional information overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
#endif // MAME_BUS_VME_VME_MVME120_H
|
||||
59
src/mame/drivers/sys1121.cpp
Normal file
59
src/mame/drivers/sys1121.cpp
Normal file
@ -0,0 +1,59 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Katherine Rohl
|
||||
/*
|
||||
* Motorola SYS1121 VME chassis.
|
||||
*
|
||||
* The basic configuration was an MVME12x MPU,
|
||||
* an MVME050 system controller, and an MVME320 disk
|
||||
* controller.
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "bus/vme/vme_mvme120.h"
|
||||
#include "logmacro.h"
|
||||
|
||||
namespace
|
||||
{
|
||||
class sys1121_state : public driver_device
|
||||
{
|
||||
public:
|
||||
sys1121_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
{
|
||||
}
|
||||
|
||||
void sys1121(machine_config &config);
|
||||
};
|
||||
|
||||
// Input ports
|
||||
static INPUT_PORTS_START(sys1121)
|
||||
INPUT_PORTS_END
|
||||
|
||||
static void mvme120_vme_cards(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("mvme120", VME_MVME120);
|
||||
device.option_add("mvme121", VME_MVME121);
|
||||
device.option_add("mvme122", VME_MVME122);
|
||||
device.option_add("mvme123", VME_MVME123);
|
||||
}
|
||||
|
||||
void sys1121_state::sys1121(machine_config &config)
|
||||
{
|
||||
VME(config, "vme", 0);
|
||||
VME_SLOT(config, "slot1", mvme120_vme_cards, "mvme120", 1, "vme");
|
||||
VME_SLOT(config, "slot2", mvme120_vme_cards, nullptr, 2, "vme");
|
||||
VME_SLOT(config, "slot3", mvme120_vme_cards, nullptr, 3, "vme");
|
||||
VME_SLOT(config, "slot4", mvme120_vme_cards, nullptr, 4, "vme");
|
||||
VME_SLOT(config, "slot5", mvme120_vme_cards, nullptr, 5, "vme");
|
||||
VME_SLOT(config, "slot6", mvme120_vme_cards, nullptr, 6, "vme");
|
||||
VME_SLOT(config, "slot7", mvme120_vme_cards, nullptr, 7, "vme");
|
||||
VME_SLOT(config, "slot8", mvme120_vme_cards, nullptr, 8, "vme");
|
||||
}
|
||||
|
||||
// This is a VME chassis so any ROMs are contained in the cards.
|
||||
ROM_START(sys1121)
|
||||
ROM_END
|
||||
}
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1984, sys1121, 0, 0, sys1121, sys1121, sys1121_state, empty_init, "Motorola", "SYS1121", MACHINE_IS_SKELETON )
|
||||
@ -40000,6 +40000,9 @@ s3670 //
|
||||
@source:synthex.cpp
|
||||
synthex //
|
||||
|
||||
@source:sys1121.cpp
|
||||
sys1121 // (c) 1984 Motorola
|
||||
|
||||
@source:sys2900.cpp
|
||||
sys2900 //
|
||||
|
||||
|
||||
@ -1025,6 +1025,7 @@ sx1000.cpp
|
||||
sym1.cpp
|
||||
symbolics.cpp
|
||||
synthex.cpp
|
||||
sys1121.cpp
|
||||
sys2900.cpp
|
||||
sys9002.cpp
|
||||
systec.cpp
|
||||
|
||||
Loading…
Reference in New Issue
Block a user