mirror of
https://github.com/holub/mame
synced 2025-06-29 23:48:56 +03:00
m6800: remove ONE_MORE_INSN macro, re-add irq logmacro,
hd6301x: add ext irq enable mask, add ext irq2
This commit is contained in:
parent
4abe6e2303
commit
131c5fbbad
@ -80,7 +80,10 @@ OP_HANDLER( asld )
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OP_HANDLER( tap )
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OP_HANDLER( tap )
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{
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{
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CC=A;
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CC=A;
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ONE_MORE_INSN();
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// TAP temporarily sets the I flag and blocks IRQ until the next opcode
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// (if the next opcode is TAP, IRQ is blocked again)
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execute_one();
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check_irq_lines();
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check_irq_lines();
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}
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}
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@ -131,8 +134,11 @@ OP_HANDLER( sec )
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/* $0e CLI */
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/* $0e CLI */
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OP_HANDLER( cli )
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OP_HANDLER( cli )
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{
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{
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uint8_t i = CC & 0x10;
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CLI;
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CLI;
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ONE_MORE_INSN();
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// pending IRQ won't be triggered until next machine cycle
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if (i) execute_one();
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check_irq_lines();
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check_irq_lines();
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}
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}
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@ -140,8 +146,6 @@ OP_HANDLER( cli )
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OP_HANDLER( sei )
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OP_HANDLER( sei )
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{
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{
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SEI;
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SEI;
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ONE_MORE_INSN();
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check_irq_lines();
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}
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}
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/* $10 SBA inherent -**** */
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/* $10 SBA inherent -**** */
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@ -210,7 +214,7 @@ OP_HANDLER( daa )
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if (msn>0x80 && lsn>0x09) cf |= 0x60;
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if (msn>0x80 && lsn>0x09) cf |= 0x60;
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if (msn>0x90 || CC&0x01) cf |= 0x60;
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if (msn>0x90 || CC&0x01) cf |= 0x60;
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t = cf + A;
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t = cf + A;
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CLR_NZV; /* keep carry from previous operation */
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CLR_NZV; // keep carry from previous operation
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SET_NZ8((uint8_t)t); SET_C8(t);
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SET_NZ8((uint8_t)t); SET_C8(t);
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A = t;
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A = t;
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}
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}
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@ -220,7 +224,7 @@ OP_HANDLER( daa )
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/* $1a SLP */ /* HD63701Y0 only */
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/* $1a SLP */ /* HD63701Y0 only */
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OP_HANDLER( slp )
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OP_HANDLER( slp )
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{
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{
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/* wait for next IRQ (same as waiting of wai) */
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// wait for next IRQ (same as waiting of WAI)
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m_wai_state |= M6800_SLP;
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m_wai_state |= M6800_SLP;
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check_irq_lines();
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check_irq_lines();
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@ -454,10 +458,8 @@ OP_HANDLER( mul )
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/* $3e WAI inherent ----- */
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/* $3e WAI inherent ----- */
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OP_HANDLER( wai )
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OP_HANDLER( wai )
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{
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{
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/*
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// WAI stacks the entire machine state on the hardware stack,
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* WAI stacks the entire machine state on the
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// then waits for an interrupt.
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* hardware stack, then waits for an interrupt.
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*/
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m_wai_state |= M6800_WAI;
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m_wai_state |= M6800_WAI;
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PUSHWORD(pPC);
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PUSHWORD(pPC);
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@ -67,6 +67,13 @@ TODO:
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#include "m6800.h"
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#include "m6800.h"
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#include "6800dasm.h"
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#include "6800dasm.h"
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#define LOG_IRQ (1U << 1)
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//#define VERBOSE (LOG_IRQ)
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#include "logmacro.h"
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#define LOGIRQ(...) LOGMASKED(LOG_IRQ, __VA_ARGS__)
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#define pPPC m_ppc
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#define pPPC m_ppc
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#define pPC m_pc
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#define pPC m_pc
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@ -122,17 +129,6 @@ TODO:
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#define PULLBYTE(b) S++; b = RM(SD)
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#define PULLBYTE(b) S++; b = RM(SD)
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#define PULLWORD(w) S++; w.d = RM(SD)<<8; S++; w.d |= RM(SD)
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#define PULLWORD(w) S++; w.d = RM(SD)<<8; S++; w.d |= RM(SD)
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/* operate one instruction for */
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#define ONE_MORE_INSN() { \
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uint8_t ireg; \
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pPPC = pPC; \
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debugger_instruction_hook(PCD); \
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ireg=M_RDOP(PCD); \
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PC++; \
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(this->*m_insn[ireg])(); \
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increment_counter(m_cycles[ireg]); \
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}
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/* CC masks HI NZVC
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/* CC masks HI NZVC
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7654 3210 */
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7654 3210 */
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#define CLR_HNZVC CC&=0xd0
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#define CLR_HNZVC CC&=0xd0
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@ -449,10 +445,12 @@ void m6800_cpu_device::WM16(uint32_t Addr, PAIR *p )
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}
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}
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/* IRQ enter */
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/* IRQ enter */
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void m6800_cpu_device::enter_interrupt(uint16_t irq_vector)
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void m6800_cpu_device::enter_interrupt(const char *message, uint16_t irq_vector)
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{
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{
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int cycles_to_eat = 0;
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int cycles_to_eat = 0;
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LOGIRQ("Take %s interrupt\n", message);
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if (m_wai_state & M6800_WAI)
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if (m_wai_state & M6800_WAI)
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{
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{
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cycles_to_eat = 4;
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cycles_to_eat = 4;
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@ -480,9 +478,9 @@ void m6800_cpu_device::check_irq_lines()
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{
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{
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m_wai_state &= ~M6800_SLP;
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m_wai_state &= ~M6800_SLP;
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m_nmi_pending = false;
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m_nmi_pending = false;
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enter_interrupt(0xfffc);
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enter_interrupt("NMI", 0xfffc);
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}
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}
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else if (m_irq_state[M6800_IRQ_LINE] != CLEAR_LINE)
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else if (check_irq1_enabled())
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{
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{
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/* standard IRQ */
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/* standard IRQ */
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m_wai_state &= ~M6800_SLP;
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m_wai_state &= ~M6800_SLP;
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@ -490,13 +488,18 @@ void m6800_cpu_device::check_irq_lines()
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if (!(CC & 0x10))
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if (!(CC & 0x10))
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{
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{
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standard_irq_callback(M6800_IRQ_LINE, m_pc.w.l);
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standard_irq_callback(M6800_IRQ_LINE, m_pc.w.l);
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enter_interrupt(0xfff8);
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enter_interrupt("IRQ1", 0xfff8);
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}
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}
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}
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}
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else
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else
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check_irq2();
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check_irq2();
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}
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}
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bool m6800_cpu_device::check_irq1_enabled()
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{
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return m_irq_state[M6800_IRQ_LINE] != CLEAR_LINE;
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}
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void m6800_cpu_device::increment_counter(int amount)
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void m6800_cpu_device::increment_counter(int amount)
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{
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{
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m_icount -= amount;
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m_icount -= amount;
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@ -579,7 +582,6 @@ void m6800_cpu_device::device_reset()
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m_wai_state = 0;
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m_wai_state = 0;
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m_nmi_state = 0;
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m_nmi_state = 0;
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m_nmi_pending = 0;
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m_nmi_pending = 0;
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m_irq_state[M6800_IRQ_LINE] = 0;
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}
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}
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@ -599,9 +601,7 @@ void m6800_cpu_device::execute_set_input(int irqline, int state)
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}
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}
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}
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}
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/****************************************************************************
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* Execute cycles CPU cycles. Return number of cycles really executed
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****************************************************************************/
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void m6800_cpu_device::execute_run()
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void m6800_cpu_device::execute_run()
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{
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{
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check_irq_lines();
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check_irq_lines();
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@ -616,16 +616,21 @@ void m6800_cpu_device::execute_run()
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}
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}
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else
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else
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{
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{
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pPPC = pPC;
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execute_one();
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debugger_instruction_hook(PCD);
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uint8_t ireg=M_RDOP(PCD);
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PC++;
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(this->*m_insn[ireg])();
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increment_counter(m_cycles[ireg]);
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}
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}
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} while (m_icount > 0);
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} while (m_icount > 0);
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}
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}
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void m6800_cpu_device::execute_one()
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{
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pPPC = pPC;
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debugger_instruction_hook(PCD);
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uint8_t ireg = M_RDOP(PCD);
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PC++;
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(this->*m_insn[ireg])();
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increment_counter(m_cycles[ireg]);
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}
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std::unique_ptr<util::disasm_interface> m6800_cpu_device::create_disassembler()
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std::unique_ptr<util::disasm_interface> m6800_cpu_device::create_disassembler()
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{
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{
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return std::make_unique<m680x_disassembler>(6800);
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return std::make_unique<m680x_disassembler>(6800);
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@ -15,18 +15,14 @@ enum
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enum
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enum
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{
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{
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M6800_IRQ_LINE = 0 /* IRQ line number */
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M6800_IRQ_LINE = 0, /* IRQ line number */
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M6800_LINE_MAX
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};
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};
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enum
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#define M6802_IRQ_LINE M6800_IRQ_LINE
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{
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#define M6808_IRQ_LINE M6800_IRQ_LINE
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M6802_IRQ_LINE = M6800_IRQ_LINE
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};
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enum
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{
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M6808_IRQ_LINE = M6800_IRQ_LINE
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};
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class m6800_cpu_device : public cpu_device
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class m6800_cpu_device : public cpu_device
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{
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{
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@ -55,6 +51,7 @@ protected:
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virtual uint32_t execute_input_lines() const noexcept override { return 2; }
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virtual uint32_t execute_input_lines() const noexcept override { return 2; }
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virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
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virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
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virtual void execute_run() override;
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virtual void execute_run() override;
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virtual void execute_one();
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virtual void execute_set_input(int inputnum, int state) override;
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virtual void execute_set_input(int inputnum, int state) override;
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// device_memory_interface overrides
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// device_memory_interface overrides
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@ -80,7 +77,7 @@ protected:
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uint8_t m_wai_state; /* WAI opcode state (or sleep opcode state) */
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uint8_t m_wai_state; /* WAI opcode state (or sleep opcode state) */
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uint8_t m_nmi_state; /* NMI line state */
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uint8_t m_nmi_state; /* NMI line state */
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uint8_t m_nmi_pending; /* NMI pending */
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uint8_t m_nmi_pending; /* NMI pending */
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uint8_t m_irq_state[3]; /* IRQ line state [IRQ1,TIN,IS3] */
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uint8_t m_irq_state[5]; /* IRQ line state [IRQ1,TIN,IS3,..] */
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/* Memory spaces */
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/* Memory spaces */
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memory_access<16, 0, 0, ENDIANNESS_BIG>::cache m_cprogram, m_copcodes;
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memory_access<16, 0, 0, ENDIANNESS_BIG>::cache m_cprogram, m_copcodes;
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@ -100,9 +97,11 @@ protected:
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uint32_t RM16(uint32_t Addr );
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uint32_t RM16(uint32_t Addr );
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void WM16(uint32_t Addr, PAIR *p );
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void WM16(uint32_t Addr, PAIR *p );
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void enter_interrupt(uint16_t irq_vector);
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void enter_interrupt(const char *message, uint16_t irq_vector);
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virtual bool check_irq1_enabled();
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virtual void check_irq2() { }
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virtual void check_irq2() { }
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void check_irq_lines();
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virtual void check_irq_lines();
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virtual void increment_counter(int amount);
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virtual void increment_counter(int amount);
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virtual void eat_cycles();
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virtual void eat_cycles();
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virtual void cleanup_counters() { }
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virtual void cleanup_counters() { }
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@ -33,8 +33,6 @@ TODO:
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#define LOG_TIMER (1U << 7)
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#define LOG_TIMER (1U << 7)
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//#define VERBOSE (LOG_PORT)
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//#define VERBOSE (LOG_PORT)
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//#define LOG_OUTPUT_STREAM std::cout
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//#define LOG_OUTPUT_STREAM std::cerr
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#include "logmacro.h"
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#include "logmacro.h"
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#define LOGTX(...) LOGMASKED(LOG_TX, __VA_ARGS__)
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#define LOGTX(...) LOGMASKED(LOG_TX, __VA_ARGS__)
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@ -566,12 +564,12 @@ bool m6801_cpu_device::check_irq2_sci()
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((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)));
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((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)));
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}
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}
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void m6801_cpu_device::take_irq2(uint16_t irq_vector)
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void m6801_cpu_device::take_irq2(const char *message, uint16_t irq_vector)
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{
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{
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m_wai_state &= ~M6800_SLP;
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m_wai_state &= ~M6800_SLP;
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if (!(m_cc & 0x10))
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if (!(m_cc & 0x10))
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enter_interrupt(irq_vector);
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enter_interrupt(message, irq_vector);
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}
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}
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void m6801_cpu_device::check_irq2()
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void m6801_cpu_device::check_irq2()
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@ -580,19 +578,19 @@ void m6801_cpu_device::check_irq2()
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{
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{
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if (!(m_cc & 0x10))
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if (!(m_cc & 0x10))
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standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
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standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
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take_irq2(0xfff6);
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take_irq2("ICI", 0xfff6);
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}
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}
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else if (check_irq2_oci())
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else if (check_irq2_oci())
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{
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{
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take_irq2(0xfff4);
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take_irq2("OCI", 0xfff4);
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}
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}
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else if (check_irq2_toi())
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else if (check_irq2_toi())
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{
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{
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take_irq2(0xfff2);
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take_irq2("TOI", 0xfff2);
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}
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}
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else if (check_irq2_sci())
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else if (check_irq2_sci())
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{
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{
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take_irq2(0xfff0);
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take_irq2("SCI", 0xfff0);
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}
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}
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}
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}
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@ -602,19 +600,19 @@ void m6801u4_cpu_device::check_irq2()
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{
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{
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if (!(m_cc & 0x10))
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if (!(m_cc & 0x10))
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standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
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standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
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take_irq2(0xfff6);
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take_irq2("ICI", 0xfff6);
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}
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}
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else if (check_irq2_oci() || (m_tcr[1] & m_tsr & (TSR_OCF2 | TSR_OCF3)))
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else if (check_irq2_oci() || (m_tcr[1] & m_tsr & (TSR_OCF2 | TSR_OCF3)))
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{
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{
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take_irq2(0xfff4);
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take_irq2("OCI", 0xfff4);
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}
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}
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else if (check_irq2_toi())
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else if (check_irq2_toi())
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{
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{
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take_irq2(0xfff2);
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take_irq2("TOI", 0xfff2);
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}
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}
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else if (check_irq2_sci())
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else if (check_irq2_sci())
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{
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{
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take_irq2(0xfff0);
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take_irq2("SCI", 0xfff0);
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}
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}
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}
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}
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@ -624,23 +622,29 @@ void hd6301x_cpu_device::check_irq2()
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{
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{
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if (!(m_cc & 0x10))
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if (!(m_cc & 0x10))
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standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
|
standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
|
||||||
take_irq2(0xfff6);
|
take_irq2("ICI", 0xfff6);
|
||||||
}
|
}
|
||||||
else if (check_irq2_oci() || (m_tcsr2 & (TCSR2_EOCI2|TCSR2_OCF2)) == (TCSR2_EOCI2|TCSR2_OCF2))
|
else if (check_irq2_oci() || (m_tcsr2 & (TCSR2_EOCI2|TCSR2_OCF2)) == (TCSR2_EOCI2|TCSR2_OCF2))
|
||||||
{
|
{
|
||||||
take_irq2(0xfff4);
|
take_irq2("OCI", 0xfff4);
|
||||||
}
|
}
|
||||||
else if (check_irq2_toi())
|
else if (check_irq2_toi())
|
||||||
{
|
{
|
||||||
take_irq2(0xfff2);
|
take_irq2("TOI", 0xfff2);
|
||||||
}
|
}
|
||||||
else if ((m_tcsr3 & 0xc0) == 0xc0)
|
else if ((m_tcsr3 & 0xc0) == 0xc0)
|
||||||
{
|
{
|
||||||
take_irq2(0xffec);
|
take_irq2("CMI", 0xffec);
|
||||||
|
}
|
||||||
|
else if (m_irq_state[HD6301_IRQ2_LINE] != CLEAR_LINE && m_ram_ctrl & 2)
|
||||||
|
{
|
||||||
|
if (!(m_cc & 0x10))
|
||||||
|
standard_irq_callback(HD6301_IRQ2_LINE, m_pc.w.l);
|
||||||
|
take_irq2("IRQ2", 0xffea);
|
||||||
}
|
}
|
||||||
else if (check_irq2_sci())
|
else if (check_irq2_sci())
|
||||||
{
|
{
|
||||||
take_irq2(0xfff0);
|
take_irq2("SCI", 0xfff0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -650,12 +654,17 @@ void hd6301y_cpu_device::check_irq2()
|
|||||||
{
|
{
|
||||||
if (!(m_cc & 0x10))
|
if (!(m_cc & 0x10))
|
||||||
standard_irq_callback(M6801_IS3_LINE, m_pc.w.l);
|
standard_irq_callback(M6801_IS3_LINE, m_pc.w.l);
|
||||||
take_irq2(0xfff8);
|
take_irq2("ISI", 0xfff8);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
hd6301x_cpu_device::check_irq2();
|
hd6301x_cpu_device::check_irq2();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
bool hd6301x_cpu_device::check_irq1_enabled()
|
||||||
|
{
|
||||||
|
return hd6301_cpu_device::check_irq1_enabled() && (m_ram_ctrl & 1);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
void m6801_cpu_device::set_timer_event()
|
void m6801_cpu_device::set_timer_event()
|
||||||
{
|
{
|
||||||
@ -1407,7 +1416,6 @@ void m6801_cpu_device::device_reset()
|
|||||||
m6800_cpu_device::device_reset();
|
m6800_cpu_device::device_reset();
|
||||||
|
|
||||||
m_standby_func(0);
|
m_standby_func(0);
|
||||||
m_irq_state[M6801_TIN_LINE] = 0;
|
|
||||||
m_is3_state = 0;
|
m_is3_state = 0;
|
||||||
|
|
||||||
std::fill(std::begin(m_port_ddr), std::end(m_port_ddr), 0);
|
std::fill(std::begin(m_port_ddr), std::end(m_port_ddr), 0);
|
||||||
@ -2472,9 +2480,15 @@ void m6801_cpu_device::rcr_w(uint8_t data)
|
|||||||
m_ram_ctrl = data;
|
m_ram_ctrl = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
void hd6301y_cpu_device::rcr_w(uint8_t data)
|
void hd6301x_cpu_device::rcr_w(uint8_t data)
|
||||||
{
|
{
|
||||||
m6801_cpu_device::rcr_w(data);
|
m6801_cpu_device::rcr_w(data);
|
||||||
|
check_irq_lines();
|
||||||
|
}
|
||||||
|
|
||||||
|
void hd6301y_cpu_device::rcr_w(uint8_t data)
|
||||||
|
{
|
||||||
|
hd6301x_cpu_device::rcr_w(data);
|
||||||
|
|
||||||
// software standby mode
|
// software standby mode
|
||||||
if (~data & 0x20)
|
if (~data & 0x20)
|
||||||
@ -2524,5 +2538,5 @@ std::unique_ptr<util::disasm_interface> hd6301_cpu_device::create_disassembler()
|
|||||||
|
|
||||||
void hd6301_cpu_device::take_trap()
|
void hd6301_cpu_device::take_trap()
|
||||||
{
|
{
|
||||||
enter_interrupt(0xffee);
|
enter_interrupt("TRAP", 0xffee);
|
||||||
}
|
}
|
||||||
|
@ -11,21 +11,18 @@
|
|||||||
|
|
||||||
enum
|
enum
|
||||||
{
|
{
|
||||||
M6801_IRQ_LINE = M6800_IRQ_LINE,
|
M6801_TIN_LINE = M6800_LINE_MAX, // P20/TIN Input Capture line (edge sense). Active edge is selectable by internal reg.
|
||||||
M6801_TIN_LINE, // P20/TIN Input Capture line (edge sense). Active edge is selectable by internal reg.
|
|
||||||
M6801_IS3_LINE, // SC1/IOS/IS3 (P54/IS on HD6301Y)
|
M6801_IS3_LINE, // SC1/IOS/IS3 (P54/IS on HD6301Y)
|
||||||
M6801_STBY_LINE // STBY pin, or internal standby
|
M6801_STBY_LINE, // STBY pin, or internal standby
|
||||||
|
|
||||||
|
M6801_LINE_MAX
|
||||||
};
|
};
|
||||||
|
|
||||||
enum
|
#define M6801_IRQ1_LINE M6800_IRQ_LINE
|
||||||
{
|
#define M6803_IRQ1_LINE M6800_IRQ_LINE
|
||||||
M6803_IRQ_LINE = M6800_IRQ_LINE
|
#define HD6301_IRQ1_LINE M6800_IRQ_LINE
|
||||||
};
|
|
||||||
|
|
||||||
enum
|
#define HD6301_IRQ2_LINE M6801_LINE_MAX // HD6301X/Y
|
||||||
{
|
|
||||||
HD6301_IRQ_LINE = M6800_IRQ_LINE
|
|
||||||
};
|
|
||||||
|
|
||||||
enum
|
enum
|
||||||
{
|
{
|
||||||
@ -179,7 +176,7 @@ protected:
|
|||||||
bool check_irq2_toi();
|
bool check_irq2_toi();
|
||||||
bool check_irq2_sci();
|
bool check_irq2_sci();
|
||||||
virtual void check_irq2() override;
|
virtual void check_irq2() override;
|
||||||
void take_irq2(uint16_t irq_vector);
|
void take_irq2(const char *message, uint16_t irq_vector);
|
||||||
|
|
||||||
virtual void increment_counter(int amount) override;
|
virtual void increment_counter(int amount) override;
|
||||||
virtual void eat_cycles() override;
|
virtual void eat_cycles() override;
|
||||||
@ -371,6 +368,7 @@ protected:
|
|||||||
uint8_t p7_data_r();
|
uint8_t p7_data_r();
|
||||||
void p7_data_w(uint8_t data);
|
void p7_data_w(uint8_t data);
|
||||||
virtual uint8_t rcr_r() override;
|
virtual uint8_t rcr_r() override;
|
||||||
|
virtual void rcr_w(uint8_t data) override;
|
||||||
|
|
||||||
uint8_t tcsr2_r();
|
uint8_t tcsr2_r();
|
||||||
void tcsr2_w(uint8_t data);
|
void tcsr2_w(uint8_t data);
|
||||||
@ -386,6 +384,7 @@ protected:
|
|||||||
uint8_t tcsr3_r();
|
uint8_t tcsr3_r();
|
||||||
void tcsr3_w(uint8_t data);
|
void tcsr3_w(uint8_t data);
|
||||||
|
|
||||||
|
virtual bool check_irq1_enabled() override;
|
||||||
virtual void check_irq2() override;
|
virtual void check_irq2() override;
|
||||||
virtual void set_timer_event() override;
|
virtual void set_timer_event() override;
|
||||||
virtual void modified_counters() override;
|
virtual void modified_counters() override;
|
||||||
|
@ -93,7 +93,7 @@ void y301xl_state::machine_start()
|
|||||||
|
|
||||||
void y301xl_state::machine_reset()
|
void y301xl_state::machine_reset()
|
||||||
{
|
{
|
||||||
m_maincpu->set_input_line(HD6301_IRQ_LINE, CLEAR_LINE);
|
m_maincpu->set_input_line(HD6301_IRQ1_LINE, CLEAR_LINE);
|
||||||
m_maincpu->set_input_line(M6801_STBY_LINE, CLEAR_LINE);
|
m_maincpu->set_input_line(M6801_STBY_LINE, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -107,7 +107,7 @@ INPUT_CHANGED_MEMBER(y301xl_state::power_off)
|
|||||||
if (newval && !m_maincpu->standby())
|
if (newval && !m_maincpu->standby())
|
||||||
{
|
{
|
||||||
// IRQ1 when power switch is set to SAVE, followed by STBY after a short delay
|
// IRQ1 when power switch is set to SAVE, followed by STBY after a short delay
|
||||||
m_maincpu->set_input_line(HD6301_IRQ_LINE, ASSERT_LINE);
|
m_maincpu->set_input_line(HD6301_IRQ1_LINE, ASSERT_LINE);
|
||||||
m_standbytimer->adjust(attotime::from_msec(50));
|
m_standbytimer->adjust(attotime::from_msec(50));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -60,7 +60,7 @@ void hx20_state::update_interrupt()
|
|||||||
{
|
{
|
||||||
int irq = m_rtc_irq || m_kbrequest;
|
int irq = m_rtc_irq || m_kbrequest;
|
||||||
|
|
||||||
m_maincpu->set_input_line(HD6301_IRQ_LINE, irq);
|
m_maincpu->set_input_line(HD6301_IRQ1_LINE, irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -186,7 +186,7 @@ u8 ctvboy_state::mc6847_vram_r(offs_t offset)
|
|||||||
void ctvboy_state::vblank_irq(int state)
|
void ctvboy_state::vblank_irq(int state)
|
||||||
{
|
{
|
||||||
if (!state)
|
if (!state)
|
||||||
m_maincpu->pulse_input_line(M6801_IRQ_LINE, attotime::from_usec(15));
|
m_maincpu->pulse_input_line(M6801_IRQ1_LINE, attotime::from_usec(15));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -353,7 +353,7 @@ void namcos1_state::audiocpu_irq_ack_w(u8 data)
|
|||||||
|
|
||||||
void namcos1_state::mcu_irq_ack_w(u8 data)
|
void namcos1_state::mcu_irq_ack_w(u8 data)
|
||||||
{
|
{
|
||||||
m_mcu->set_input_line(HD6301_IRQ_LINE, CLEAR_LINE);
|
m_mcu->set_input_line(HD6301_IRQ1_LINE, CLEAR_LINE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -265,6 +265,6 @@ void namcos1_state::screen_vblank(int state)
|
|||||||
m_maincpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
|
m_maincpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
|
||||||
m_subcpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
|
m_subcpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
|
||||||
m_audiocpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
|
m_audiocpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
|
||||||
m_mcu->set_input_line(HD6301_IRQ_LINE, ASSERT_LINE);
|
m_mcu->set_input_line(HD6301_IRQ1_LINE, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -511,8 +511,8 @@ void by6803_state::by6803(machine_config &config)
|
|||||||
m_pia0->writepb_handler().set(FUNC(by6803_state::pia0b_w));
|
m_pia0->writepb_handler().set(FUNC(by6803_state::pia0b_w));
|
||||||
m_pia0->ca2_handler().set(FUNC(by6803_state::pia0_ca2_w));
|
m_pia0->ca2_handler().set(FUNC(by6803_state::pia0_ca2_w));
|
||||||
m_pia0->cb2_handler().set(FUNC(by6803_state::pia0_cb2_w));
|
m_pia0->cb2_handler().set(FUNC(by6803_state::pia0_cb2_w));
|
||||||
m_pia0->irqa_handler().set_inputline("maincpu", M6803_IRQ_LINE);
|
m_pia0->irqa_handler().set_inputline("maincpu", M6803_IRQ1_LINE);
|
||||||
m_pia0->irqb_handler().set_inputline("maincpu", M6803_IRQ_LINE);
|
m_pia0->irqb_handler().set_inputline("maincpu", M6803_IRQ1_LINE);
|
||||||
TIMER(config, "timer_z").configure_periodic(FUNC(by6803_state::pia0_timer), attotime::from_hz(120)); // mains freq*2
|
TIMER(config, "timer_z").configure_periodic(FUNC(by6803_state::pia0_timer), attotime::from_hz(120)); // mains freq*2
|
||||||
|
|
||||||
PIA6821(config, m_pia1);
|
PIA6821(config, m_pia1);
|
||||||
|
@ -3801,7 +3801,7 @@ void dpb7000_state::dpb7000(machine_config &config)
|
|||||||
m_tds_cpu->in_p4_cb().set(FUNC(dpb7000_state::tds_p4_r));
|
m_tds_cpu->in_p4_cb().set(FUNC(dpb7000_state::tds_p4_r));
|
||||||
|
|
||||||
SCN2681(config, m_tds_duart, 3.6864_MHz_XTAL);
|
SCN2681(config, m_tds_duart, 3.6864_MHz_XTAL);
|
||||||
m_tds_duart->irq_cb().set_inputline(m_tds_cpu, M6803_IRQ_LINE);
|
m_tds_duart->irq_cb().set_inputline(m_tds_cpu, M6803_IRQ1_LINE);
|
||||||
m_tds_duart->a_tx_cb().set(m_acia[1], FUNC(acia6850_device::write_rxd));
|
m_tds_duart->a_tx_cb().set(m_acia[1], FUNC(acia6850_device::write_rxd));
|
||||||
m_tds_duart->b_tx_cb().set(FUNC(dpb7000_state::duart_b_w));
|
m_tds_duart->b_tx_cb().set(FUNC(dpb7000_state::duart_b_w));
|
||||||
|
|
||||||
|
@ -320,7 +320,7 @@ void roland_jx8p_state::jx8p(machine_config &config)
|
|||||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // TC5517APL + battery
|
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // TC5517APL + battery
|
||||||
|
|
||||||
mb63h149_device &keyscan(MB63H149(config, "keyscan", 16_MHz_XTAL));
|
mb63h149_device &keyscan(MB63H149(config, "keyscan", 16_MHz_XTAL));
|
||||||
keyscan.int_callback().set_inputline(m_assignercpu, HD6301_IRQ_LINE);
|
keyscan.int_callback().set_inputline(m_assignercpu, HD6301_IRQ1_LINE);
|
||||||
|
|
||||||
GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, nullptr, "jx8p_cart");
|
GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, nullptr, "jx8p_cart");
|
||||||
|
|
||||||
@ -351,7 +351,7 @@ void roland_jx8p_state::jx10(machine_config &config)
|
|||||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // TC5564PL-20 + battery
|
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // TC5564PL-20 + battery
|
||||||
|
|
||||||
mb63h149_device &keyscan(MB63H149(config, "keyscan", 16_MHz_XTAL));
|
mb63h149_device &keyscan(MB63H149(config, "keyscan", 16_MHz_XTAL));
|
||||||
keyscan.int_callback().set_inputline(m_assignercpu, HD6301_IRQ_LINE);
|
keyscan.int_callback().set_inputline(m_assignercpu, HD6301_IRQ1_LINE);
|
||||||
|
|
||||||
GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, nullptr, "jx8p_cart");
|
GENERIC_CARTSLOT(config, "cartslot", generic_plain_slot, nullptr, "jx8p_cart");
|
||||||
|
|
||||||
|
@ -106,7 +106,7 @@ void rvoice_state::rvoicepc(machine_config &config)
|
|||||||
|
|
||||||
mos6551_device &acia(MOS6551(config, "acia65c51", 0));
|
mos6551_device &acia(MOS6551(config, "acia65c51", 0));
|
||||||
acia.set_xtal(1.8432_MHz_XTAL);
|
acia.set_xtal(1.8432_MHz_XTAL);
|
||||||
acia.irq_handler().set_inputline(m_maincpu, HD6301_IRQ_LINE);
|
acia.irq_handler().set_inputline(m_maincpu, HD6301_IRQ1_LINE);
|
||||||
acia.txd_handler().set("rs232", FUNC(rs232_port_device::write_txd));
|
acia.txd_handler().set("rs232", FUNC(rs232_port_device::write_txd));
|
||||||
acia.rts_handler().set("rs232", FUNC(rs232_port_device::write_rts));
|
acia.rts_handler().set("rs232", FUNC(rs232_port_device::write_rts));
|
||||||
|
|
||||||
|
@ -990,7 +990,7 @@ void bublbobl_state::bublbobl(machine_config &config)
|
|||||||
mcu.in_p3_cb().set(FUNC(bublbobl_state::bublbobl_mcu_port3_r));
|
mcu.in_p3_cb().set(FUNC(bublbobl_state::bublbobl_mcu_port3_r));
|
||||||
mcu.out_p4_cb().set(FUNC(bublbobl_state::bublbobl_mcu_port4_w));
|
mcu.out_p4_cb().set(FUNC(bublbobl_state::bublbobl_mcu_port4_w));
|
||||||
|
|
||||||
m_screen->screen_vblank().set_inputline(m_mcu, M6801_IRQ_LINE); // same clock latches the INT pin on the second Z80
|
m_screen->screen_vblank().set_inputline(m_mcu, M6801_IRQ1_LINE); // same clock latches the INT pin on the second Z80
|
||||||
}
|
}
|
||||||
|
|
||||||
MACHINE_START_MEMBER(bublbobl_state,boblbobl)
|
MACHINE_START_MEMBER(bublbobl_state,boblbobl)
|
||||||
|
@ -1094,7 +1094,7 @@ void kikikai_state::add_mcu(machine_config &config)
|
|||||||
|
|
||||||
config.set_perfect_quantum(m_maincpu);
|
config.set_perfect_quantum(m_maincpu);
|
||||||
|
|
||||||
m_screen->screen_vblank().set_inputline(m_mcu, M6801_IRQ_LINE); // same clock latches the INT pin on the second Z80
|
m_screen->screen_vblank().set_inputline(m_mcu, M6801_IRQ1_LINE); // same clock latches the INT pin on the second Z80
|
||||||
}
|
}
|
||||||
|
|
||||||
void kikikai_state::kicknrun(machine_config &config)
|
void kikikai_state::kicknrun(machine_config &config)
|
||||||
|
@ -161,7 +161,7 @@ void ymtx81z_state::tx81z(machine_config &config)
|
|||||||
SPEAKER(config, "rspeaker").front_right();
|
SPEAKER(config, "rspeaker").front_right();
|
||||||
|
|
||||||
ym2414_device &ymsnd(YM2414(config, "ymsnd", 7.15909_MHz_XTAL / 2));
|
ym2414_device &ymsnd(YM2414(config, "ymsnd", 7.15909_MHz_XTAL / 2));
|
||||||
ymsnd.irq_handler().set_inputline(m_maincpu, HD6301_IRQ_LINE);
|
ymsnd.irq_handler().set_inputline(m_maincpu, HD6301_IRQ1_LINE);
|
||||||
ymsnd.add_route(0, "lspeaker", 0.60);
|
ymsnd.add_route(0, "lspeaker", 0.60);
|
||||||
ymsnd.add_route(1, "rspeaker", 0.60);
|
ymsnd.add_route(1, "rspeaker", 0.60);
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user