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https://github.com/holub/mame
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m680x0: Normalize type names to the short versions [O. Galibert]
This commit is contained in:
Olivier Galibert
parent
9ff8eaa129
commit
132e64cfd9
@ -101,9 +101,9 @@ public:
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};
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// construction/destruction
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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static constexpr uint8_t autovector(int level) { return 0x18 + level; }
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static constexpr u8 autovector(int level) { return 0x18 + level; }
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void autovectors_map(address_map &map);
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protected:
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@ -137,9 +137,9 @@ protected:
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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// device_execute_interface overrides
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virtual uint32_t execute_min_cycles() const override { return 4; };
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virtual uint32_t execute_max_cycles() const override { return 158; };
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virtual uint32_t execute_input_lines() const override { return m_interrupt_mixer ? 8 : 3; }; // number of input lines
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virtual u32 execute_min_cycles() const override { return 4; };
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virtual u32 execute_max_cycles() const override { return 158; };
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virtual u32 execute_input_lines() const override { return m_interrupt_mixer ? 8 : 3; }; // number of input lines
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virtual bool execute_input_edge_triggered(int inputnum) const override { return m_interrupt_mixer ? inputnum == M68K_IRQ_7 : false; }
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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@ -163,59 +163,59 @@ public:
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void set_cmpild_callback(write32_delegate callback);
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void set_rte_callback(write_line_delegate callback);
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void set_tas_write_callback(write8_delegate callback);
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uint16_t get_fc();
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u16 get_fc();
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void set_hmmu_enable(int enable);
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int get_pmmu_enable() {return m_pmmu_enabled;};
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void set_fpu_enable(int enable);
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void set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc);
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void set_buserror_details(u32 fault_addr, u8 rw, u8 fc);
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void disable_interrupt_mixer() { m_interrupt_mixer = false; }
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void set_cpu_space(int space_id) { m_cpu_space_id = space_id; }
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protected:
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
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const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits);
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
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const device_type type, u32 prg_data_width, u32 prg_address_bits);
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
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const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map);
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
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const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map);
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int m_has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */
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bool m_interrupt_mixer; /* Indicates whether to put a virtual 8->3 priority mixer on the input lines (default true) */
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int m_cpu_space_id; /* CPU space address space id (default AS_CPU_SPACE) */
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uint32_t m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
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u32 m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
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//
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uint32_t m_dar[16]; /* Data and Address Registers */
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uint32_t m_ppc; /* Previous program counter */
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uint32_t m_pc; /* Program Counter */
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uint32_t m_sp[7]; /* User, Interrupt, and Master Stack Pointers */
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uint32_t m_vbr; /* Vector Base Register (m68010+) */
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uint32_t m_sfc; /* Source Function Code Register (m68010+) */
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uint32_t m_dfc; /* Destination Function Code Register (m68010+) */
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uint32_t m_cacr; /* Cache Control Register (m68020, unemulated) */
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uint32_t m_caar; /* Cache Address Register (m68020, unemulated) */
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uint32_t m_ir; /* Instruction Register */
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u32 m_dar[16]; /* Data and Address Registers */
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u32 m_ppc; /* Previous program counter */
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u32 m_pc; /* Program Counter */
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u32 m_sp[7]; /* User, Interrupt, and Master Stack Pointers */
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u32 m_vbr; /* Vector Base Register (m68010+) */
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u32 m_sfc; /* Source Function Code Register (m68010+) */
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u32 m_dfc; /* Destination Function Code Register (m68010+) */
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u32 m_cacr; /* Cache Control Register (m68020, unemulated) */
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u32 m_caar; /* Cache Address Register (m68020, unemulated) */
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u32 m_ir; /* Instruction Register */
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floatx80 m_fpr[8]; /* FPU Data Register (m68030/040) */
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uint32_t m_fpiar; /* FPU Instruction Address Register (m68040) */
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uint32_t m_fpsr; /* FPU Status Register (m68040) */
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uint32_t m_fpcr; /* FPU Control Register (m68040) */
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uint32_t m_t1_flag; /* Trace 1 */
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uint32_t m_t0_flag; /* Trace 0 */
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uint32_t m_s_flag; /* Supervisor */
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uint32_t m_m_flag; /* Master/Interrupt state */
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uint32_t m_x_flag; /* Extend */
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uint32_t m_n_flag; /* Negative */
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uint32_t m_not_z_flag; /* Zero, inverted for speedups */
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uint32_t m_v_flag; /* Overflow */
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uint32_t m_c_flag; /* Carry */
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uint32_t m_int_mask; /* I0-I2 */
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uint32_t m_int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
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uint32_t m_stopped; /* Stopped state */
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uint32_t m_pref_addr; /* Last prefetch address */
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uint32_t m_pref_data; /* Data in the prefetch queue */
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uint32_t m_sr_mask; /* Implemented status register bits */
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uint32_t m_instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
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uint32_t m_run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
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u32 m_fpiar; /* FPU Instruction Address Register (m68040) */
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u32 m_fpsr; /* FPU Status Register (m68040) */
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u32 m_fpcr; /* FPU Control Register (m68040) */
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u32 m_t1_flag; /* Trace 1 */
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u32 m_t0_flag; /* Trace 0 */
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u32 m_s_flag; /* Supervisor */
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u32 m_m_flag; /* Master/Interrupt state */
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u32 m_x_flag; /* Extend */
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u32 m_n_flag; /* Negative */
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u32 m_not_z_flag; /* Zero, inverted for speedups */
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u32 m_v_flag; /* Overflow */
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u32 m_c_flag; /* Carry */
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u32 m_int_mask; /* I0-I2 */
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u32 m_int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
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u32 m_stopped; /* Stopped state */
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u32 m_pref_addr; /* Last prefetch address */
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u32 m_pref_data; /* Data in the prefetch queue */
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u32 m_sr_mask; /* Implemented status register bits */
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u32 m_instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
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u32 m_run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
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int m_has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
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int m_has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */
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int m_pmmu_enabled; /* Indicates if the PMMU is enabled */
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@ -223,34 +223,34 @@ protected:
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int m_fpu_just_reset; /* Indicates the FPU was just reset */
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/* Clocks required for instructions / exceptions */
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uint32_t m_cyc_bcc_notake_b;
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uint32_t m_cyc_bcc_notake_w;
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uint32_t m_cyc_dbcc_f_noexp;
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uint32_t m_cyc_dbcc_f_exp;
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uint32_t m_cyc_scc_r_true;
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uint32_t m_cyc_movem_w;
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uint32_t m_cyc_movem_l;
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uint32_t m_cyc_shift;
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uint32_t m_cyc_reset;
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u32 m_cyc_bcc_notake_b;
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u32 m_cyc_bcc_notake_w;
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u32 m_cyc_dbcc_f_noexp;
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u32 m_cyc_dbcc_f_exp;
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u32 m_cyc_scc_r_true;
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u32 m_cyc_movem_w;
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u32 m_cyc_movem_l;
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u32 m_cyc_shift;
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u32 m_cyc_reset;
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int m_initial_cycles;
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int m_icount; /* Number of clocks remaining */
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int m_reset_cycles;
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uint32_t m_tracing;
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u32 m_tracing;
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int m_address_error;
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uint32_t m_aerr_address;
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uint32_t m_aerr_write_mode;
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uint32_t m_aerr_fc;
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u32 m_aerr_address;
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u32 m_aerr_write_mode;
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u32 m_aerr_fc;
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/* Virtual IRQ lines state */
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uint32_t m_virq_state;
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uint32_t m_nmi_pending;
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u32 m_virq_state;
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u32 m_nmi_pending;
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const u16 *m_state_table;
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const uint8_t* m_cyc_instruction;
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const uint8_t* m_cyc_exception;
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const u8* m_cyc_instruction;
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const u8* m_cyc_exception;
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/* Callbacks to host */
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write_line_delegate m_reset_instr_callback; /* Called when a RESET instruction is encountered */
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@ -280,42 +280,42 @@ protected:
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address_space *m_space, *m_ospace;
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uint32_t m_iotemp;
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u32 m_iotemp;
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/* save state data */
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uint16_t m_save_sr;
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uint8_t m_save_stopped;
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uint8_t m_save_halted;
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u16 m_save_sr;
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u8 m_save_stopped;
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u8 m_save_halted;
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/* PMMU registers */
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uint32_t m_mmu_crp_aptr, m_mmu_crp_limit;
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uint32_t m_mmu_srp_aptr, m_mmu_srp_limit;
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uint32_t m_mmu_urp_aptr; /* 040 only */
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uint32_t m_mmu_tc;
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uint16_t m_mmu_sr;
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uint32_t m_mmu_sr_040;
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uint32_t m_mmu_atc_tag[MMU_ATC_ENTRIES], m_mmu_atc_data[MMU_ATC_ENTRIES];
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uint32_t m_mmu_atc_rr;
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uint32_t m_mmu_tt0, m_mmu_tt1;
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uint32_t m_mmu_itt0, m_mmu_itt1, m_mmu_dtt0, m_mmu_dtt1;
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uint32_t m_mmu_acr0, m_mmu_acr1, m_mmu_acr2, m_mmu_acr3;
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uint32_t m_mmu_last_page_entry, m_mmu_last_page_entry_addr;
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u32 m_mmu_crp_aptr, m_mmu_crp_limit;
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u32 m_mmu_srp_aptr, m_mmu_srp_limit;
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u32 m_mmu_urp_aptr; /* 040 only */
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u32 m_mmu_tc;
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u16 m_mmu_sr;
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u32 m_mmu_sr_040;
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u32 m_mmu_atc_tag[MMU_ATC_ENTRIES], m_mmu_atc_data[MMU_ATC_ENTRIES];
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u32 m_mmu_atc_rr;
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u32 m_mmu_tt0, m_mmu_tt1;
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u32 m_mmu_itt0, m_mmu_itt1, m_mmu_dtt0, m_mmu_dtt1;
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u32 m_mmu_acr0, m_mmu_acr1, m_mmu_acr2, m_mmu_acr3;
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u32 m_mmu_last_page_entry, m_mmu_last_page_entry_addr;
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uint16_t m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
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uint16_t m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
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uint16_t m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
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uint8_t m_mmu_tmp_sz; /* temporary hack: size for mmu */
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u16 m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
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u16 m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
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u16 m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
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u8 m_mmu_tmp_sz; /* temporary hack: size for mmu */
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uint32_t m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
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uint16_t m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
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uint16_t m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
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uint16_t m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
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uint16_t m_mmu_tmp_buserror_sz; /* temporary hack: (first) bus error size` */
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u32 m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
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u16 m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
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u16 m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
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u16 m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
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u16 m_mmu_tmp_buserror_sz; /* temporary hack: (first) bus error size` */
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bool m_mmu_tablewalk; /* set when MMU walks page tables */
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uint32_t m_mmu_last_logical_addr;
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uint32_t m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */
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uint32_t m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */
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u32 m_mmu_last_logical_addr;
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u32 m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */
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u32 m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */
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bool m_ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
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@ -345,9 +345,9 @@ protected:
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void default_autovectors_map(address_map &map);
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void m68ki_exception_interrupt(uint32_t int_level);
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void m68ki_exception_interrupt(u32 int_level);
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inline void m68ki_check_address_error(uint32_t ADDR, uint32_t WRITE_MODE, uint32_t FC)
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inline void m68ki_check_address_error(u32 ADDR, u32 WRITE_MODE, u32 FC)
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{
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if((ADDR)&1)
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{
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@ -380,22 +380,22 @@ class m68000_device : public m68000_base_device
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{
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public:
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// construction/destruction
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m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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virtual uint32_t execute_min_cycles() const override { return 4; };
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virtual uint32_t execute_max_cycles() const override { return 158; };
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virtual u32 execute_min_cycles() const override { return 4; };
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virtual u32 execute_max_cycles() const override { return 158; };
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// device-level overrides
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virtual void device_start() override;
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protected:
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m68000_device(const machine_config &mconfig, const device_type type, const char *tag, device_t *owner, uint32_t clock);
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m68000_device(const machine_config &mconfig, const device_type type, const char *tag, device_t *owner, u32 clock);
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m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
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const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map);
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m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
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const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map);
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};
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@ -405,12 +405,12 @@ class m68008_device : public m68000_base_device
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{
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public:
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// construction/destruction
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m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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virtual uint32_t execute_min_cycles() const override { return 4; };
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virtual uint32_t execute_max_cycles() const override { return 158; };
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virtual u32 execute_min_cycles() const override { return 4; };
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virtual u32 execute_max_cycles() const override { return 158; };
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// device-level overrides
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virtual void device_start() override;
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@ -420,12 +420,12 @@ class m68008fn_device : public m68000_base_device
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{
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public:
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// construction/destruction
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m68008fn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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m68008fn_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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virtual uint32_t execute_min_cycles() const override { return 4; };
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virtual uint32_t execute_max_cycles() const override { return 158; };
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virtual u32 execute_min_cycles() const override { return 4; };
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virtual u32 execute_max_cycles() const override { return 158; };
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// device-level overrides
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virtual void device_start() override;
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@ -435,12 +435,12 @@ class m68010_device : public m68000_base_device
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{
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public:
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// construction/destruction
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m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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virtual uint32_t execute_min_cycles() const override { return 4; };
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virtual uint32_t execute_max_cycles() const override { return 158; };
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virtual u32 execute_min_cycles() const override { return 4; };
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virtual u32 execute_max_cycles() const override { return 158; };
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// device-level overrides
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virtual void device_start() override;
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@ -450,12 +450,12 @@ class m68ec020_device : public m68000_base_device
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{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -465,12 +465,12 @@ class m68020_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -480,12 +480,12 @@ class m68020fpu_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -495,12 +495,12 @@ class m68020pmmu_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -510,12 +510,12 @@ class m68020hmmu_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
virtual bool memory_translate(int space, int intention, offs_t &address) override;
|
||||
|
||||
@ -527,12 +527,12 @@ class m68ec030_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -542,12 +542,12 @@ class m68030_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -557,12 +557,12 @@ class m68ec040_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -572,12 +572,12 @@ class m68lc040_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -587,12 +587,12 @@ class m68040_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -603,13 +603,13 @@ class scc68070_base_device : public m68000_base_device
|
||||
protected:
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 4; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 4; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
|
||||
scc68070_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
|
||||
scc68070_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
|
||||
const device_type type, address_map_constructor internal_map);
|
||||
};
|
||||
|
||||
@ -620,19 +620,19 @@ class fscpu32_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
|
||||
protected:
|
||||
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
|
||||
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map);
|
||||
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
|
||||
const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map);
|
||||
};
|
||||
|
||||
|
||||
@ -641,12 +641,12 @@ class mcf5206e_device : public m68000_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
virtual uint32_t execute_min_cycles() const override { return 2; };
|
||||
virtual uint32_t execute_max_cycles() const override { return 158; };
|
||||
virtual u32 execute_min_cycles() const override { return 2; };
|
||||
virtual u32 execute_max_cycles() const override { return 158; };
|
||||
|
||||
|
||||
// device-level overrides
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -39,7 +39,7 @@ unsigned char m68000_base_device::m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycle
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Used by shift & rotate instructions */
|
||||
const uint8_t m68000_base_device::m68ki_shift_8_table[65] =
|
||||
const u8 m68000_base_device::m68ki_shift_8_table[65] =
|
||||
{
|
||||
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
@ -48,7 +48,7 @@ const uint8_t m68000_base_device::m68ki_shift_8_table[65] =
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff
|
||||
};
|
||||
const uint16_t m68000_base_device::m68ki_shift_16_table[65] =
|
||||
const u16 m68000_base_device::m68ki_shift_16_table[65] =
|
||||
{
|
||||
0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
|
||||
0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
|
||||
@ -59,7 +59,7 @@ const uint16_t m68000_base_device::m68ki_shift_16_table[65] =
|
||||
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
|
||||
0xffff, 0xffff
|
||||
};
|
||||
const uint32_t m68000_base_device::m68ki_shift_32_table[65] =
|
||||
const u32 m68000_base_device::m68ki_shift_32_table[65] =
|
||||
{
|
||||
0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
|
||||
0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
|
||||
@ -78,7 +78,7 @@ const uint32_t m68000_base_device::m68ki_shift_32_table[65] =
|
||||
/* Number of clock cycles to use for exception processing.
|
||||
* I used 4 for any vectors that are undocumented for processing times.
|
||||
*/
|
||||
const uint8_t m68000_base_device::m68ki_exception_cycle_table[7][256] =
|
||||
const u8 m68000_base_device::m68ki_exception_cycle_table[7][256] =
|
||||
{
|
||||
{ /* 000 */
|
||||
40, /* 0: Reset - Initial Stack Pointer */
|
||||
@ -593,7 +593,7 @@ const uint8_t m68000_base_device::m68ki_exception_cycle_table[7][256] =
|
||||
},
|
||||
};
|
||||
|
||||
const uint8_t m68000_base_device::m68ki_ea_idx_cycle_table[64] =
|
||||
const u8 m68000_base_device::m68ki_ea_idx_cycle_table[64] =
|
||||
{
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, /* ..01.000 no memory indirect, base nullptr */
|
||||
@ -635,9 +635,9 @@ const uint8_t m68000_base_device::m68ki_ea_idx_cycle_table[64] =
|
||||
|
||||
void m68000_base_device::set_irq_line(int irqline, int state)
|
||||
{
|
||||
uint32_t old_level = m_int_level;
|
||||
uint32_t vstate = m_virq_state;
|
||||
uint32_t blevel;
|
||||
u32 old_level = m_int_level;
|
||||
u32 vstate = m_virq_state;
|
||||
u32 blevel;
|
||||
|
||||
if(state == ASSERT_LINE)
|
||||
vstate |= 1 << irqline;
|
||||
@ -688,7 +688,7 @@ void m68000_base_device::m68k_cause_bus_error()
|
||||
return;
|
||||
}
|
||||
|
||||
uint32_t sr = m68ki_init_exception();
|
||||
u32 sr = m68ki_init_exception();
|
||||
|
||||
m_run_mode = RUN_MODE_BERR_AERR_RESET_WSF;
|
||||
|
||||
@ -728,9 +728,9 @@ bool m68000_base_device::memory_translate(int space, int intention, offs_t &addr
|
||||
if ((space == AS_PROGRAM) && ((m_pmmu_enabled) || (CPU_TYPE_IS_040_PLUS())))
|
||||
{
|
||||
// FIXME: m_mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc
|
||||
uint16_t temp_mmu_tmp_sr = m_mmu_tmp_sr;
|
||||
u16 temp_mmu_tmp_sr = m_mmu_tmp_sr;
|
||||
int mode = m_s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM;
|
||||
// uint32_t va=address;
|
||||
// u32 va=address;
|
||||
|
||||
if (CPU_TYPE_IS_040_PLUS())
|
||||
{
|
||||
@ -835,7 +835,7 @@ void m68000_base_device::execute_run()
|
||||
m_run_mode = RUN_MODE_NORMAL;
|
||||
// save CPU address registers values at start of instruction
|
||||
int i;
|
||||
uint32_t tmp_dar[16];
|
||||
u32 tmp_dar[16];
|
||||
|
||||
for (i = 15; i >= 0; i--)
|
||||
{
|
||||
@ -856,7 +856,7 @@ void m68000_base_device::execute_run()
|
||||
|
||||
if (m_mmu_tmp_buserror_occurred)
|
||||
{
|
||||
uint32_t sr;
|
||||
u32 sr;
|
||||
|
||||
m_mmu_tmp_buserror_occurred = 0;
|
||||
|
||||
@ -930,7 +930,7 @@ void m68000_base_device::execute_run()
|
||||
|
||||
void m68000_base_device::init_cpu_common(void)
|
||||
{
|
||||
static uint32_t emulation_initialized = 0;
|
||||
static u32 emulation_initialized = 0;
|
||||
|
||||
//this = device;//deviceparam;
|
||||
m_program = &space(AS_PROGRAM);
|
||||
@ -1154,7 +1154,7 @@ void m68000_base_device::state_export(const device_state_entry &entry)
|
||||
|
||||
void m68000_base_device::state_string_export(const device_state_entry &entry, std::string &str) const
|
||||
{
|
||||
uint16_t sr;
|
||||
u16 sr;
|
||||
|
||||
switch (entry.index())
|
||||
{
|
||||
@ -1536,7 +1536,7 @@ void m68000_base_device::set_reset_callback(write_line_delegate callback)
|
||||
// fault_addr = address to indicate fault at
|
||||
// rw = 1 for read, 0 for write
|
||||
// fc = 3-bit function code of access (usually you'd just put what m68k_get_fc() returns here)
|
||||
void m68000_base_device::set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc)
|
||||
void m68000_base_device::set_buserror_details(u32 fault_addr, u8 rw, u8 fc)
|
||||
{
|
||||
m_aerr_address = fault_addr;
|
||||
m_aerr_write_mode = (rw << 4);
|
||||
@ -1559,7 +1559,7 @@ void m68000_base_device::set_tas_write_callback(write8_delegate callback)
|
||||
m_tas_write_callback = callback;
|
||||
}
|
||||
|
||||
uint16_t m68000_base_device::get_fc()
|
||||
u16 m68000_base_device::get_fc()
|
||||
{
|
||||
return m_mmu_tmp_fc;
|
||||
}
|
||||
@ -1570,7 +1570,7 @@ uint16_t m68000_base_device::get_fc()
|
||||
|
||||
void m68000_base_device::define_state(void)
|
||||
{
|
||||
uint32_t addrmask = (m_cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff;
|
||||
u32 addrmask = (m_cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff;
|
||||
|
||||
state_add(STATE_GENPC, "PC", m_pc).mask(addrmask).callimport();
|
||||
state_add(STATE_GENPCBASE, "CURPC", m_ppc).mask(addrmask).callimport().noshow();
|
||||
@ -2136,11 +2136,11 @@ std::unique_ptr<util::disasm_interface> mcf5206e_device::create_disassembler()
|
||||
|
||||
|
||||
/* Service an interrupt request and start exception processing */
|
||||
void m68000_base_device::m68ki_exception_interrupt(uint32_t int_level)
|
||||
void m68000_base_device::m68ki_exception_interrupt(u32 int_level)
|
||||
{
|
||||
uint32_t vector;
|
||||
uint32_t sr;
|
||||
uint32_t new_pc;
|
||||
u32 vector;
|
||||
u32 sr;
|
||||
u32 new_pc;
|
||||
|
||||
if(CPU_TYPE_IS_000())
|
||||
{
|
||||
@ -2207,8 +2207,8 @@ void m68000_base_device::m68ki_exception_interrupt(uint32_t int_level)
|
||||
// m68000_base_device - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
|
||||
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map)
|
||||
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
|
||||
const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map)
|
||||
: cpu_device(mconfig, type, tag, owner, clock),
|
||||
m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
|
||||
m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
|
||||
@ -2220,8 +2220,8 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
|
||||
}
|
||||
|
||||
|
||||
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
|
||||
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits)
|
||||
m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
|
||||
const device_type type, u32 prg_data_width, u32 prg_address_bits)
|
||||
: cpu_device(mconfig, type, tag, owner, clock),
|
||||
m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
|
||||
m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
|
||||
@ -2452,12 +2452,12 @@ DEFINE_DEVICE_TYPE(M68040, m68040_device, "m68040", "Motorola MC
|
||||
DEFINE_DEVICE_TYPE(FSCPU32, fscpu32_device, "fscpu32", "Freescale CPU32 Core")
|
||||
DEFINE_DEVICE_TYPE(MCF5206E, mcf5206e_device, "mcf5206e", "Freescale MCF5206E")
|
||||
|
||||
m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_device(mconfig, M68000, tag, owner, clock)
|
||||
{
|
||||
}
|
||||
|
||||
m68000_device::m68000_device(const machine_config &mconfig, const device_type type, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68000_device::m68000_device(const machine_config &mconfig, const device_type type, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, type, 16,24)
|
||||
{
|
||||
}
|
||||
@ -2467,8 +2467,8 @@ void m68000_device::device_start()
|
||||
init_cpu_m68000();
|
||||
}
|
||||
|
||||
m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
|
||||
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map)
|
||||
m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
|
||||
const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map)
|
||||
{
|
||||
}
|
||||
@ -2480,7 +2480,7 @@ m68000_device::m68000_device(const machine_config &mconfig, const char *tag, dev
|
||||
|
||||
/* m68008_device */
|
||||
|
||||
m68008_device::m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68008_device::m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68008, 8,20)
|
||||
{
|
||||
}
|
||||
@ -2491,7 +2491,7 @@ void m68008_device::device_start()
|
||||
}
|
||||
|
||||
|
||||
m68008fn_device::m68008fn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68008fn_device::m68008fn_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68008FN, 8,22)
|
||||
{
|
||||
}
|
||||
@ -2503,7 +2503,7 @@ void m68008fn_device::device_start()
|
||||
|
||||
|
||||
|
||||
m68010_device::m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68010_device::m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68010, 16,24)
|
||||
{
|
||||
}
|
||||
@ -2515,7 +2515,7 @@ void m68010_device::device_start()
|
||||
|
||||
|
||||
|
||||
m68020_device::m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68020_device::m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68020, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2526,7 +2526,7 @@ void m68020_device::device_start()
|
||||
}
|
||||
|
||||
|
||||
m68020fpu_device::m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68020fpu_device::m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68020FPU, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2537,7 +2537,7 @@ void m68020fpu_device::device_start()
|
||||
}
|
||||
|
||||
// 68020 with 68851 PMMU
|
||||
m68020pmmu_device::m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68020pmmu_device::m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68020PMMU, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2562,7 +2562,7 @@ bool m68020hmmu_device::memory_translate(int space, int intention, offs_t &addre
|
||||
|
||||
// 68020 with Apple HMMU & 68881 FPU
|
||||
// case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68khmmu); break;
|
||||
m68020hmmu_device::m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68020hmmu_device::m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68020HMMU, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2573,7 +2573,7 @@ void m68020hmmu_device::device_start()
|
||||
}
|
||||
|
||||
|
||||
m68ec020_device::m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68ec020_device::m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68EC020, 32,24)
|
||||
{
|
||||
}
|
||||
@ -2583,7 +2583,7 @@ void m68ec020_device::device_start()
|
||||
init_cpu_m68ec020();
|
||||
}
|
||||
|
||||
m68030_device::m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68030_device::m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68030, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2593,7 +2593,7 @@ void m68030_device::device_start()
|
||||
init_cpu_m68030();
|
||||
}
|
||||
|
||||
m68ec030_device::m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68ec030_device::m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68EC030, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2603,7 +2603,7 @@ void m68ec030_device::device_start()
|
||||
init_cpu_m68ec030();
|
||||
}
|
||||
|
||||
m68040_device::m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68040_device::m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68040, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2616,7 +2616,7 @@ void m68040_device::device_start()
|
||||
|
||||
|
||||
|
||||
m68ec040_device::m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68ec040_device::m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68EC040, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2628,7 +2628,7 @@ void m68ec040_device::device_start()
|
||||
|
||||
|
||||
|
||||
m68lc040_device::m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
m68lc040_device::m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, M68LC040, 32,32)
|
||||
{
|
||||
}
|
||||
@ -2639,7 +2639,7 @@ void m68lc040_device::device_start()
|
||||
}
|
||||
|
||||
|
||||
scc68070_base_device::scc68070_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
|
||||
scc68070_base_device::scc68070_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
|
||||
const device_type type, address_map_constructor internal_map)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, type, 16,32, internal_map)
|
||||
{
|
||||
@ -2651,13 +2651,13 @@ void scc68070_base_device::device_start()
|
||||
}
|
||||
|
||||
|
||||
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, FSCPU32, 32,32)
|
||||
{
|
||||
}
|
||||
|
||||
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
|
||||
const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map)
|
||||
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
|
||||
const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map)
|
||||
{
|
||||
}
|
||||
@ -2670,7 +2670,7 @@ void fscpu32_device::device_start()
|
||||
|
||||
|
||||
|
||||
mcf5206e_device::mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
mcf5206e_device::mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: m68000_base_device(mconfig, tag, owner, clock, MCF5206E, 32,32)
|
||||
{
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -2901,9 +2901,9 @@ std::string m68k_disassembler::d68020_unpk_mm()
|
||||
return util::string_format("unpk -(A%d), -(A%d), %s; (2+)", m_cpu_ir&7, (m_cpu_ir>>9)&7, get_imm_str_u16());
|
||||
}
|
||||
|
||||
std::string m68k_disassembler::fc_to_string(uint16_t modes)
|
||||
std::string m68k_disassembler::fc_to_string(u16 modes)
|
||||
{
|
||||
uint16_t fc = modes & 0x1f;
|
||||
u16 fc = modes & 0x1f;
|
||||
|
||||
if (fc == 0)
|
||||
{
|
||||
@ -3077,7 +3077,7 @@ std::string m68k_disassembler::d68851_pbcc32()
|
||||
std::string m68k_disassembler::d68851_pdbcc()
|
||||
{
|
||||
u32 temp_pc = m_cpu_pc;
|
||||
uint16_t modes = read_imm_16();
|
||||
u16 modes = read_imm_16();
|
||||
|
||||
return util::string_format("pb%s %x", m_mmucond[modes&0xf], temp_pc + make_int_16(read_imm_16()));
|
||||
}
|
||||
@ -3095,7 +3095,7 @@ std::string m68k_disassembler::d68040_fbcc_16()
|
||||
if(limit.first)
|
||||
return limit.second;
|
||||
u32 temp_pc = m_cpu_pc;
|
||||
int16_t disp = make_int_16(read_imm_16());
|
||||
s16 disp = make_int_16(read_imm_16());
|
||||
return util::string_format("fb%-s $%x", m_cpcc[m_cpu_ir & 0x3f], temp_pc + disp);
|
||||
}
|
||||
|
||||
|
||||
@ -117,7 +117,7 @@ protected:
|
||||
inline std::string get_ea_mode_str_16(u16 instruction) { return get_ea_mode_str(instruction, 1); }
|
||||
inline std::string get_ea_mode_str_32(u16 instruction) { return get_ea_mode_str(instruction, 2); }
|
||||
|
||||
std::string fc_to_string(uint16_t modes);
|
||||
std::string fc_to_string(u16 modes);
|
||||
|
||||
inline std::pair<bool, std::string> limit_cpu_types(u32 allowed);
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -16,44 +16,44 @@
|
||||
#endif
|
||||
|
||||
// MMU SR register fields
|
||||
static constexpr uint16_t M68K_MMU_SR_BUS_ERROR = 0x8000;
|
||||
static constexpr uint16_t M68K_MMU_SR_SUPERVISOR_ONLY = 0x2000;
|
||||
static constexpr uint16_t M68K_MMU_SR_WRITE_PROTECT = 0x0800;
|
||||
static constexpr uint16_t M68K_MMU_SR_INVALID = 0x0400;
|
||||
static constexpr uint16_t M68K_MMU_SR_MODIFIED = 0x0200;
|
||||
static constexpr uint16_t M68K_MMU_SR_TRANSPARENT = 0x0040;
|
||||
static constexpr u16 M68K_MMU_SR_BUS_ERROR = 0x8000;
|
||||
static constexpr u16 M68K_MMU_SR_SUPERVISOR_ONLY = 0x2000;
|
||||
static constexpr u16 M68K_MMU_SR_WRITE_PROTECT = 0x0800;
|
||||
static constexpr u16 M68K_MMU_SR_INVALID = 0x0400;
|
||||
static constexpr u16 M68K_MMU_SR_MODIFIED = 0x0200;
|
||||
static constexpr u16 M68K_MMU_SR_TRANSPARENT = 0x0040;
|
||||
|
||||
// MMU translation table descriptor field definitions
|
||||
static constexpr uint32_t M68K_MMU_DF_DT = 0x00000003;
|
||||
static constexpr uint32_t M68K_MMU_DF_DT_INVALID = 0x00000000;
|
||||
static constexpr uint32_t M68K_MMU_DF_DT_PAGE = 0x00000001;
|
||||
static constexpr uint32_t M68K_MMU_DF_DT_TABLE_4BYTE = 0x00000002;
|
||||
static constexpr uint32_t M68K_MMU_DF_DT_TABLE_8BYTE = 0x00000003;
|
||||
static constexpr uint32_t M68K_MMU_DF_WP = 0x00000004;
|
||||
static constexpr uint32_t M68K_MMU_DF_USED = 0x00000008;
|
||||
static constexpr uint32_t M68K_MMU_DF_MODIFIED = 0x00000010;
|
||||
static constexpr uint32_t M68K_MMU_DF_CI = 0x00000040;
|
||||
static constexpr uint32_t M68K_MMU_DF_SUPERVISOR = 0x00000100;
|
||||
static constexpr uint32_t M68K_MMU_DF_ADDR_MASK = 0xfffffff0;
|
||||
static constexpr uint32_t M68K_MMU_DF_IND_ADDR_MASK = 0xfffffffc;
|
||||
static constexpr u32 M68K_MMU_DF_DT = 0x00000003;
|
||||
static constexpr u32 M68K_MMU_DF_DT_INVALID = 0x00000000;
|
||||
static constexpr u32 M68K_MMU_DF_DT_PAGE = 0x00000001;
|
||||
static constexpr u32 M68K_MMU_DF_DT_TABLE_4BYTE = 0x00000002;
|
||||
static constexpr u32 M68K_MMU_DF_DT_TABLE_8BYTE = 0x00000003;
|
||||
static constexpr u32 M68K_MMU_DF_WP = 0x00000004;
|
||||
static constexpr u32 M68K_MMU_DF_USED = 0x00000008;
|
||||
static constexpr u32 M68K_MMU_DF_MODIFIED = 0x00000010;
|
||||
static constexpr u32 M68K_MMU_DF_CI = 0x00000040;
|
||||
static constexpr u32 M68K_MMU_DF_SUPERVISOR = 0x00000100;
|
||||
static constexpr u32 M68K_MMU_DF_ADDR_MASK = 0xfffffff0;
|
||||
static constexpr u32 M68K_MMU_DF_IND_ADDR_MASK = 0xfffffffc;
|
||||
|
||||
// MMU ATC Fields
|
||||
static constexpr uint32_t M68K_MMU_ATC_BUSERROR = 0x08000000;
|
||||
static constexpr uint32_t M68K_MMU_ATC_CACHE_IN = 0x04000000;
|
||||
static constexpr uint32_t M68K_MMU_ATC_WRITE_PR = 0x02000000;
|
||||
static constexpr uint32_t M68K_MMU_ATC_MODIFIED = 0x01000000;
|
||||
static constexpr uint32_t M68K_MMU_ATC_MASK = 0x00ffffff;
|
||||
static constexpr uint32_t M68K_MMU_ATC_SHIFT = 8;
|
||||
static constexpr uint32_t M68K_MMU_ATC_VALID = 0x08000000;
|
||||
static constexpr u32 M68K_MMU_ATC_BUSERROR = 0x08000000;
|
||||
static constexpr u32 M68K_MMU_ATC_CACHE_IN = 0x04000000;
|
||||
static constexpr u32 M68K_MMU_ATC_WRITE_PR = 0x02000000;
|
||||
static constexpr u32 M68K_MMU_ATC_MODIFIED = 0x01000000;
|
||||
static constexpr u32 M68K_MMU_ATC_MASK = 0x00ffffff;
|
||||
static constexpr u32 M68K_MMU_ATC_SHIFT = 8;
|
||||
static constexpr u32 M68K_MMU_ATC_VALID = 0x08000000;
|
||||
|
||||
// MMU Translation Control register
|
||||
static constexpr uint32_t M68K_MMU_TC_SRE = 0x02000000;
|
||||
static constexpr uint32_t M68K_MMU_TC_FCL = 0x01000000;
|
||||
static constexpr u32 M68K_MMU_TC_SRE = 0x02000000;
|
||||
static constexpr u32 M68K_MMU_TC_FCL = 0x01000000;
|
||||
|
||||
// TT register
|
||||
static constexpr uint16_t M68K_MMU_TT_ENABLE = 0x8000;
|
||||
static constexpr u16 M68K_MMU_TT_ENABLE = 0x8000;
|
||||
/* decodes the effective address */
|
||||
uint32_t DECODE_EA_32(int ea)
|
||||
u32 DECODE_EA_32(int ea)
|
||||
{
|
||||
int mode = (ea >> 3) & 0x7;
|
||||
int reg = (ea & 0x7);
|
||||
@ -66,17 +66,17 @@ uint32_t DECODE_EA_32(int ea)
|
||||
}
|
||||
case 3: // (An)+
|
||||
{
|
||||
uint32_t ea = EA_AY_PI_32();
|
||||
u32 ea = EA_AY_PI_32();
|
||||
return ea;
|
||||
}
|
||||
case 5: // (d16, An)
|
||||
{
|
||||
uint32_t ea = EA_AY_DI_32();
|
||||
u32 ea = EA_AY_DI_32();
|
||||
return ea;
|
||||
}
|
||||
case 6: // (An) + (Xn) + d8
|
||||
{
|
||||
uint32_t ea = EA_AY_IX_32();
|
||||
u32 ea = EA_AY_IX_32();
|
||||
return ea;
|
||||
}
|
||||
case 7:
|
||||
@ -85,19 +85,19 @@ uint32_t DECODE_EA_32(int ea)
|
||||
{
|
||||
case 0: // (xxx).W
|
||||
{
|
||||
uint32_t ea = OPER_I_16();
|
||||
u32 ea = OPER_I_16();
|
||||
return ea;
|
||||
}
|
||||
case 1: // (xxx).L
|
||||
{
|
||||
uint32_t d1 = OPER_I_16();
|
||||
uint32_t d2 = OPER_I_16();
|
||||
uint32_t ea = (d1 << 16) | d2;
|
||||
u32 d1 = OPER_I_16();
|
||||
u32 d2 = OPER_I_16();
|
||||
u32 ea = (d1 << 16) | d2;
|
||||
return ea;
|
||||
}
|
||||
case 2: // (d16, PC)
|
||||
{
|
||||
uint32_t ea = EA_PCDI_32();
|
||||
u32 ea = EA_PCDI_32();
|
||||
return ea;
|
||||
}
|
||||
default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
|
||||
@ -109,7 +109,7 @@ uint32_t DECODE_EA_32(int ea)
|
||||
return 0;
|
||||
}
|
||||
|
||||
void pmmu_set_buserror(uint32_t addr_in)
|
||||
void pmmu_set_buserror(u32 addr_in)
|
||||
{
|
||||
if (!machine().side_effects_disabled() && ++m_mmu_tmp_buserror_occurred == 1)
|
||||
{
|
||||
@ -122,13 +122,12 @@ void pmmu_set_buserror(uint32_t addr_in)
|
||||
|
||||
|
||||
// pmmu_atc_add: adds this address to the ATC
|
||||
void pmmu_atc_add(uint32_t logical, uint32_t physical, int fc, const int rw)
|
||||
void pmmu_atc_add(u32 logical, u32 physical, int fc, const int rw)
|
||||
{
|
||||
// get page size (i.e. # of bits to ignore); is 10 for Apollo
|
||||
int ps = (m_mmu_tc >> 20) & 0xf;
|
||||
const uint32_t atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps;
|
||||
uint32_t atc_data = (physical >> ps) << (ps - 8);
|
||||
|
||||
const u32 atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps;
|
||||
u32 atc_data = (physical >> ps) << (ps - 8);
|
||||
|
||||
if (m_mmu_tmp_sr & (M68K_MMU_SR_BUS_ERROR|M68K_MMU_SR_INVALID|M68K_MMU_SR_SUPERVISOR_ONLY))
|
||||
{
|
||||
@ -196,13 +195,13 @@ void pmmu_atc_flush()
|
||||
m_mmu_atc_rr = 0;
|
||||
}
|
||||
|
||||
void pmmu_atc_flush_fc_ea(const uint16_t modes)
|
||||
void pmmu_atc_flush_fc_ea(const u16 modes)
|
||||
{
|
||||
const int fcmask = (modes >> 5) & 7;
|
||||
const int fc = fc_from_modes(modes) & fcmask;
|
||||
const int ps = (m_mmu_tc >> 16) & 0xf;
|
||||
const int mode = (modes >> 10) & 7;
|
||||
uint32_t ea;
|
||||
u32 ea;
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
@ -245,12 +244,12 @@ void pmmu_atc_flush_fc_ea(const uint16_t modes)
|
||||
}
|
||||
|
||||
template<bool ptest>
|
||||
bool pmmu_atc_lookup(const uint32_t addr_in, const int fc, const bool rw,
|
||||
uint32_t& addr_out)
|
||||
bool pmmu_atc_lookup(const u32 addr_in, const int fc, const bool rw,
|
||||
u32& addr_out)
|
||||
{
|
||||
MMULOG("%s: LOOKUP addr_in=%08x, fc=%d, ptest=%d\n", __func__, addr_in, fc, ptest);
|
||||
const int ps = (m_mmu_tc >> 20) & 0xf;
|
||||
const uint32_t atc_tag = M68K_MMU_ATC_VALID | ((fc & 7) << 24) | ((addr_in >> ps) << (ps - 8));
|
||||
const u32 atc_tag = M68K_MMU_ATC_VALID | ((fc & 7) << 24) | ((addr_in >> ps) << (ps - 8));
|
||||
|
||||
for (int i = 0; i < MMU_ATC_ENTRIES; i++)
|
||||
{
|
||||
@ -260,7 +259,7 @@ bool pmmu_atc_lookup(const uint32_t addr_in, const int fc, const bool rw,
|
||||
continue;
|
||||
}
|
||||
|
||||
const uint32_t atc_data = m_mmu_atc_data[i];
|
||||
const u32 atc_data = m_mmu_atc_data[i];
|
||||
|
||||
if (!ptest && !rw)
|
||||
{
|
||||
@ -304,7 +303,7 @@ bool pmmu_atc_lookup(const uint32_t addr_in, const int fc, const bool rw,
|
||||
return false;
|
||||
}
|
||||
|
||||
bool pmmu_match_tt(const uint32_t addr_in, const int fc, const uint32_t tt, const bool rw)
|
||||
bool pmmu_match_tt(const u32 addr_in, const int fc, const u32 tt, const bool rw)
|
||||
{
|
||||
if (!(tt & M68K_MMU_TT_ENABLE))
|
||||
{
|
||||
@ -312,10 +311,10 @@ bool pmmu_match_tt(const uint32_t addr_in, const int fc, const uint32_t tt, cons
|
||||
}
|
||||
|
||||
// transparent translation enabled
|
||||
const uint32_t address_base = tt & 0xff000000;
|
||||
const uint32_t address_mask = ((tt << 8) & 0xff000000) ^ 0xff000000;
|
||||
const uint32_t fcmask = (~tt) & 7;
|
||||
const uint32_t fcbits = (tt >> 4) & 7;
|
||||
const u32 address_base = tt & 0xff000000;
|
||||
const u32 address_mask = ((tt << 8) & 0xff000000) ^ 0xff000000;
|
||||
const u32 fcmask = (~tt) & 7;
|
||||
const u32 fcbits = (tt >> 4) & 7;
|
||||
const bool rwmask = (~tt & 0x100);
|
||||
const bool rwbit = (tt & 0x200);
|
||||
|
||||
@ -338,7 +337,7 @@ bool pmmu_match_tt(const uint32_t addr_in, const int fc, const uint32_t tt, cons
|
||||
return true;
|
||||
}
|
||||
|
||||
void update_descriptor(const uint32_t tptr, const int type, const uint32_t entry, const bool rw)
|
||||
void update_descriptor(const u32 tptr, const int type, const u32 entry, const bool rw)
|
||||
{
|
||||
if (type == M68K_MMU_DF_DT_PAGE && !rw &&
|
||||
!(entry & M68K_MMU_DF_MODIFIED) &&
|
||||
@ -355,7 +354,7 @@ void update_descriptor(const uint32_t tptr, const int type, const uint32_t entry
|
||||
}
|
||||
|
||||
template<bool _long>
|
||||
void update_sr(const int type, const uint32_t tbl_entry, const int fc)
|
||||
void update_sr(const int type, const u32 tbl_entry, const int fc)
|
||||
{
|
||||
if (machine().side_effects_disabled())
|
||||
{
|
||||
@ -396,11 +395,11 @@ void update_sr(const int type, const uint32_t tbl_entry, const int fc)
|
||||
}
|
||||
|
||||
template<bool ptest>
|
||||
bool pmmu_walk_tables(uint32_t addr_in, int type, uint32_t table, const int fc,
|
||||
const int limit, const bool rw, uint32_t &addr_out)
|
||||
bool pmmu_walk_tables(u32 addr_in, int type, u32 table, const int fc,
|
||||
const int limit, const bool rw, u32 &addr_out)
|
||||
{
|
||||
int level = 0;
|
||||
const uint32_t bits = m_mmu_tc & 0xffff;
|
||||
const u32 bits = m_mmu_tc & 0xffff;
|
||||
const int pagesize = (m_mmu_tc >> 20) & 0xf;
|
||||
const int is = (m_mmu_tc >> 16) & 0xf;
|
||||
int bitpos = 12;
|
||||
@ -422,7 +421,7 @@ bool pmmu_walk_tables(uint32_t addr_in, int type, uint32_t table, const int fc,
|
||||
const int table_index = (bitpos == 16) ? fc : (addr_in >> (32 - indexbits));
|
||||
bitpos -= 4;
|
||||
const bool indirect = (!bitpos || !(bits >> bitpos)) && indexbits;
|
||||
uint32_t tbl_entry, tbl_entry2;
|
||||
u32 tbl_entry, tbl_entry2;
|
||||
|
||||
MMULOG("%s: type %d, table %08x, addr_in %08x, indexbits %d, pageshift %d, indirect %d table_index %08x, rw=%d fc=%d\n",
|
||||
__func__, type, table, addr_in, indexbits, pageshift, indirect, table_index, rw, fc);
|
||||
@ -537,9 +536,9 @@ bool pmmu_walk_tables(uint32_t addr_in, int type, uint32_t table, const int fc,
|
||||
|
||||
// pmmu_translate_addr_with_fc: perform 68851/68030-style PMMU address translation
|
||||
template<bool ptest, bool pload>
|
||||
uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, bool rw, const int limit = 7)
|
||||
u32 pmmu_translate_addr_with_fc(u32 addr_in, u8 fc, bool rw, const int limit = 7)
|
||||
{
|
||||
uint32_t addr_out = 0;
|
||||
u32 addr_out = 0;
|
||||
|
||||
|
||||
MMULOG("%s: addr_in=%08x, fc=%d, ptest=%d, rw=%d, limit=%d\n",
|
||||
@ -578,7 +577,7 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, bool rw, cons
|
||||
}
|
||||
|
||||
int type;
|
||||
uint32_t tbl_addr;
|
||||
u32 tbl_addr;
|
||||
// if SRP is enabled and we're in supervisor mode, use it
|
||||
if ((m_mmu_tc & M68K_MMU_TC_SRE) && (fc & 4))
|
||||
{
|
||||
@ -626,9 +625,9 @@ uint32_t pmmu_translate_addr_with_fc(uint32_t addr_in, uint8_t fc, bool rw, cons
|
||||
|
||||
// FC bits: 2 = supervisor, 1 = program, 0 = data
|
||||
// the 68040 is a subset of the 68851 and 68030 PMMUs - the page table sizes are fixed, there is no early termination, etc, etc.
|
||||
uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t ptest)
|
||||
u32 pmmu_translate_addr_with_fc_040(u32 addr_in, u8 fc, u8 ptest)
|
||||
{
|
||||
uint32_t addr_out, tt0, tt1;
|
||||
u32 addr_out, tt0, tt1;
|
||||
|
||||
addr_out = addr_in;
|
||||
m_mmu_tmp_sr = 0;
|
||||
@ -655,7 +654,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p
|
||||
{
|
||||
static constexpr int fcmask[4] = { 4, 4, 0, 0 };
|
||||
static constexpr int fcmatch[4] = { 0, 4, 0, 0 };
|
||||
uint32_t mask = (tt0 >> 16) & 0xff;
|
||||
u32 mask = (tt0 >> 16) & 0xff;
|
||||
mask ^= 0xff;
|
||||
mask <<= 24;
|
||||
|
||||
@ -675,7 +674,7 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p
|
||||
{
|
||||
static int fcmask[4] = { 4, 4, 0, 0 };
|
||||
static int fcmatch[4] = { 0, 4, 0, 0 };
|
||||
uint32_t mask = (tt1 >> 16) & 0xff;
|
||||
u32 mask = (tt1 >> 16) & 0xff;
|
||||
mask ^= 0xff;
|
||||
mask <<= 24;
|
||||
|
||||
@ -693,11 +692,11 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p
|
||||
|
||||
if (m_pmmu_enabled)
|
||||
{
|
||||
uint32_t root_idx = (addr_in >> 25) & 0x7f;
|
||||
uint32_t ptr_idx = (addr_in >> 18) & 0x7f;
|
||||
uint32_t page_idx, page;
|
||||
uint32_t root_ptr, pointer_ptr, page_ptr;
|
||||
uint32_t root_entry, pointer_entry, page_entry;
|
||||
u32 root_idx = (addr_in >> 25) & 0x7f;
|
||||
u32 ptr_idx = (addr_in >> 18) & 0x7f;
|
||||
u32 page_idx, page;
|
||||
u32 root_ptr, pointer_ptr, page_ptr;
|
||||
u32 root_entry, pointer_entry, page_entry;
|
||||
|
||||
// select supervisor or user root pointer
|
||||
if (fc & 4)
|
||||
@ -870,9 +869,9 @@ uint32_t pmmu_translate_addr_with_fc_040(uint32_t addr_in, uint8_t fc, uint8_t p
|
||||
}
|
||||
|
||||
// pmmu_translate_addr: perform 68851/68030-style PMMU address translation
|
||||
uint32_t pmmu_translate_addr(uint32_t addr_in, const bool rw)
|
||||
u32 pmmu_translate_addr(u32 addr_in, const bool rw)
|
||||
{
|
||||
uint32_t addr_out;
|
||||
u32 addr_out;
|
||||
|
||||
if (CPU_TYPE_IS_040_PLUS())
|
||||
{
|
||||
@ -887,7 +886,7 @@ uint32_t pmmu_translate_addr(uint32_t addr_in, const bool rw)
|
||||
|
||||
// m68851_mmu_ops: COP 0 MMU opcode handling
|
||||
|
||||
int fc_from_modes(const uint16_t modes)
|
||||
int fc_from_modes(const u16 modes)
|
||||
{
|
||||
if ((modes & 0x1f) == 0)
|
||||
{
|
||||
@ -930,9 +929,9 @@ int fc_from_modes(const uint16_t modes)
|
||||
return 0;
|
||||
}
|
||||
|
||||
void m68851_pload(const uint32_t ea, const uint16_t modes)
|
||||
void m68851_pload(const u32 ea, const u16 modes)
|
||||
{
|
||||
uint32_t ltmp = DECODE_EA_32(ea);
|
||||
u32 ltmp = DECODE_EA_32(ea);
|
||||
const int fc = fc_from_modes(modes);
|
||||
bool rw = (modes & 0x200);
|
||||
|
||||
@ -958,10 +957,10 @@ void m68851_pload(const uint32_t ea, const uint16_t modes)
|
||||
}
|
||||
}
|
||||
|
||||
void m68851_ptest(const uint32_t ea, const uint16_t modes)
|
||||
void m68851_ptest(const u32 ea, const u16 modes)
|
||||
{
|
||||
uint32_t v_addr = DECODE_EA_32(ea);
|
||||
uint32_t p_addr;
|
||||
u32 v_addr = DECODE_EA_32(ea);
|
||||
u32 p_addr;
|
||||
|
||||
const int level = (modes >> 10) & 7;
|
||||
const bool rw = (modes & 0x200);
|
||||
@ -990,7 +989,7 @@ void m68851_ptest(const uint32_t ea, const uint16_t modes)
|
||||
}
|
||||
}
|
||||
|
||||
void m68851_pmove_get(uint32_t ea, uint16_t modes)
|
||||
void m68851_pmove_get(u32 ea, u16 modes)
|
||||
{
|
||||
switch ((modes>>10) & 0x3f)
|
||||
{
|
||||
@ -1008,12 +1007,12 @@ void m68851_pmove_get(uint32_t ea, uint16_t modes)
|
||||
break;
|
||||
|
||||
case 0x12: // supervisor root pointer
|
||||
WRITE_EA_64(ea, (uint64_t)m_mmu_srp_limit<<32 | (uint64_t)m_mmu_srp_aptr);
|
||||
WRITE_EA_64(ea, (u64)m_mmu_srp_limit<<32 | (u64)m_mmu_srp_aptr);
|
||||
MMULOG("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", m_ppc, m_mmu_srp_limit, m_mmu_srp_aptr);
|
||||
break;
|
||||
|
||||
case 0x13: // CPU root pointer
|
||||
WRITE_EA_64(ea, (uint64_t)m_mmu_crp_limit<<32 | (uint64_t)m_mmu_crp_aptr);
|
||||
WRITE_EA_64(ea, (u64)m_mmu_crp_limit<<32 | (u64)m_mmu_crp_aptr);
|
||||
MMULOG("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", m_ppc, m_mmu_crp_limit, m_mmu_crp_aptr);
|
||||
break;
|
||||
|
||||
@ -1029,14 +1028,14 @@ void m68851_pmove_get(uint32_t ea, uint16_t modes)
|
||||
|
||||
}
|
||||
|
||||
void m68851_pmove_put(uint32_t ea, uint16_t modes)
|
||||
void m68851_pmove_put(u32 ea, u16 modes)
|
||||
{
|
||||
uint64_t temp64;
|
||||
u64 temp64;
|
||||
switch ((modes>>13) & 7)
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
uint32_t temp = READ_EA_32(ea);
|
||||
u32 temp = READ_EA_32(ea);
|
||||
|
||||
if (((modes >> 10) & 7) == 2)
|
||||
{
|
||||
@ -1136,7 +1135,7 @@ void m68851_pmove_put(uint32_t ea, uint16_t modes)
|
||||
if (m_cpu_type == CPU_TYPE_020)
|
||||
{
|
||||
// DomainOS on Apollo DN3000 will only reset this to 0
|
||||
uint16_t mmu_ac = READ_EA_16(ea);
|
||||
u16 mmu_ac = READ_EA_16(ea);
|
||||
if (mmu_ac != 0)
|
||||
{
|
||||
MMULOG("680x0 PMMU: pc=%x PMOVE to mmu_ac=%08x\n",
|
||||
@ -1152,14 +1151,14 @@ void m68851_pmove_put(uint32_t ea, uint16_t modes)
|
||||
}
|
||||
break;
|
||||
case 3: // MMU status
|
||||
uint32_t temp = READ_EA_32(ea);
|
||||
u32 temp = READ_EA_32(ea);
|
||||
logerror("680x0: unsupported PMOVE %x to MMU status, PC %x\n", temp, m_pc);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void m68851_pmove(uint32_t ea, uint16_t modes)
|
||||
void m68851_pmove(u32 ea, u16 modes)
|
||||
{
|
||||
switch ((modes >> 13) & 0x7)
|
||||
{
|
||||
@ -1197,8 +1196,8 @@ void m68851_pmove(uint32_t ea, uint16_t modes)
|
||||
|
||||
void m68851_mmu_ops()
|
||||
{
|
||||
uint16_t modes;
|
||||
uint32_t ea = m_ir & 0x3f;
|
||||
u16 modes;
|
||||
u32 ea = m_ir & 0x3f;
|
||||
|
||||
|
||||
// catch the 2 "weird" encodings up front (PBcc)
|
||||
@ -1269,9 +1268,9 @@ void m68851_mmu_ops()
|
||||
|
||||
|
||||
/* Apple HMMU translation is much simpler */
|
||||
inline uint32_t hmmu_translate_addr(uint32_t addr_in)
|
||||
inline u32 hmmu_translate_addr(u32 addr_in)
|
||||
{
|
||||
uint32_t addr_out;
|
||||
u32 addr_out;
|
||||
|
||||
addr_out = addr_in;
|
||||
|
||||
@ -1306,7 +1305,7 @@ inline uint32_t hmmu_translate_addr(uint32_t addr_in)
|
||||
}
|
||||
|
||||
public:
|
||||
int m68851_buserror(uint32_t& addr)
|
||||
int m68851_buserror(u32& addr)
|
||||
{
|
||||
if (!m_pmmu_enabled)
|
||||
{
|
||||
|
||||
File diff suppressed because it is too large
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Reference in New Issue
Block a user