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(MESS) unior : added DMA and CTRC devices (nw)
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@ -2,11 +2,11 @@
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Unior
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12/05/2009 Skeleton driver.
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2009-05-12 Skeleton driver.
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2013-10-09 Added DMA and CRTC
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Some info obtained from EMU-80.
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There are no manuals, diagrams, or anything else available afaik.
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The entire driver is guesswork.
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The schematic is difficult to read, and some code is guesswork.
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The monitor will only allow certain characters to be typed, thus the
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modifier keys appear to do nothing. There is no need to use the enter
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@ -26,7 +26,7 @@ L - list registers
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M
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ToDo:
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- All devices
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- Some devices
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- Beeper (requires a timer chip)
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- Cassette (requires a UART)
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- Colour?
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@ -35,32 +35,35 @@ ToDo:
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#include "emu.h"
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#include "cpu/i8085/i8085.h"
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#include "machine/8257dma.h"
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#include "video/i8275.h"
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class unior_state : public driver_device
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{
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public:
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unior_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_p_videoram(*this, "p_videoram"),
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m_maincpu(*this, "maincpu") { }
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_dma(*this, "dma")
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{ }
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DECLARE_WRITE8_MEMBER(vram_w);
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DECLARE_WRITE8_MEMBER(unior_4c_w);
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DECLARE_READ8_MEMBER(unior_4c_r);
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DECLARE_READ8_MEMBER(unior_4d_r);
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DECLARE_WRITE8_MEMBER(unior_50_w);
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DECLARE_WRITE8_MEMBER(unior_60_w);
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DECLARE_WRITE8_MEMBER(cpu_status_callback);
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DECLARE_PALETTE_INIT(unior);
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DECLARE_READ8_MEMBER(dma_r);
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UINT8 *m_p_vram;
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required_shared_ptr<UINT8> m_p_videoram;
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UINT8 *m_p_chargen;
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private:
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UINT8 m_4c;
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UINT8 m_cursor_col;
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UINT8 m_cursor_row;
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virtual void machine_reset();
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virtual void video_start();
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UINT32 screen_update_unior(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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required_device<cpu_device> m_maincpu;
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required_device<i8257_device> m_dma;
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};
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READ8_MEMBER( unior_state::unior_4c_r )
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@ -91,38 +94,22 @@ WRITE8_MEMBER( unior_state::unior_50_w )
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memcpy(m_p_vram, m_p_vram+80, 24*80);
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}
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WRITE8_MEMBER( unior_state::unior_60_w )
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{
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static UINT8 ctrl=0;
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if (offset)
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ctrl = 0; // port 61 - reset ctrl
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else
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if (ctrl)
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m_cursor_row = data; // port 60 - row
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else
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{
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m_cursor_col = data; // port 60 - column
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ctrl++;
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}
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}
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static ADDRESS_MAP_START( unior_mem, AS_PROGRAM, 8, unior_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0xf7af) AM_RAM
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AM_RANGE(0xf7b0, 0xf7ff) AM_RAM AM_SHARE("p_videoram") // status line
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AM_RANGE(0x0000, 0xf7ff) AM_RAM
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AM_RANGE(0xf800, 0xffff) AM_ROM AM_WRITE(vram_w) // main video
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( unior_io, AS_IO, 8, unior_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x30, 0x38) AM_NOP // dma data
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AM_RANGE(0x30, 0x38) AM_DEVREADWRITE("dma", i8257_device, i8257_r, i8257_w) // dma data
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AM_RANGE(0x3c, 0x3f) AM_NOP // cassette player control
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AM_RANGE(0x4c, 0x4c) AM_READWRITE(unior_4c_r,unior_4c_w)
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AM_RANGE(0x4d, 0x4d) AM_READ(unior_4d_r)
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AM_RANGE(0x4e, 0x4f) AM_NOP // possibly the control ports of a PIO
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AM_RANGE(0x50, 0x50) AM_WRITE(unior_50_w)
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AM_RANGE(0x60, 0x61) AM_READNOP AM_WRITE(unior_60_w)
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AM_RANGE(0x60, 0x61) AM_DEVREADWRITE("crtc", i8275_device, read, write)
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AM_RANGE(0xdc, 0xdf) AM_NOP // timer chip + beeper
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AM_RANGE(0xec, 0xed) AM_NOP // cassette data to&from UART
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ADDRESS_MAP_END
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@ -252,50 +239,6 @@ void unior_state::video_start()
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m_p_vram = memregion("vram")->base();
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}
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UINT32 unior_state::screen_update_unior(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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UINT8 y,ra,gfx;
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UINT16 sy=0,ma=0,x,chr;
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UINT8 *videoram;
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videoram = m_p_videoram;
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static UINT8 framecnt=0;
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framecnt++;
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for (y = 0; y < 25; y++)
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{
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for (ra = 0; ra < 8; ra++)
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{
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UINT16 *p = &bitmap.pix16(sy++);
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for (x = 0; x < 80; x++)
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{
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chr = videoram[x+ma];
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gfx = m_p_chargen[(chr<<3) | ra ];
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/* cursor */
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if ((y == m_cursor_row) && (x == m_cursor_col) && (ra > 6) & BIT(framecnt, 3))
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gfx ^= 0xff;
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/* Display a scanline of a character */
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*p++ = BIT(gfx, 7);
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*p++ = BIT(gfx, 6);
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*p++ = BIT(gfx, 5);
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*p++ = BIT(gfx, 4);
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*p++ = BIT(gfx, 3);
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*p++ = BIT(gfx, 2);
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*p++ = BIT(gfx, 1);
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*p++ = BIT(gfx, 0);
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}
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}
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if (y)
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ma+=80;
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else
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videoram = m_p_vram;
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}
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return 0;
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}
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/* F4 Character Displayer */
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static const gfx_layout unior_charlayout =
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@ -315,12 +258,77 @@ static GFXDECODE_START( unior )
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GFXDECODE_ENTRY( "chargen", 0x0000, unior_charlayout, 0, 1 )
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GFXDECODE_END
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static I8275_DISPLAY_PIXELS(display_pixels)
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{
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unior_state *state = device->machine().driver_data<unior_state>();
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const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
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UINT8 gfx = state->m_p_chargen[(linecount & 7) | (charcode << 3)];
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if (vsp)
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gfx = 0;
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if (lten)
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gfx = 0xff;
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if (rvv)
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gfx ^= 0xff;
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for(UINT8 i=0;i<6;i++)
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bitmap.pix32(y, x + i) = palette[BIT(gfx, 5-i) ? (hlgt ? 2 : 1) : 0];
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}
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static const i8275_interface i8275_intf =
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{
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6,
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0,
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DEVCB_DEVICE_LINE_MEMBER("dma", i8257_device, i8257_drq2_w),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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display_pixels
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};
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static const rgb_t unior_palette[3] =
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{
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MAKE_RGB(0x00, 0x00, 0x00), // black
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MAKE_RGB(0xa0, 0xa0, 0xa0), // white
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MAKE_RGB(0xff, 0xff, 0xff) // highlight
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};
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PALETTE_INIT_MEMBER(unior_state,unior)
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{
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palette_set_colors(machine(), 0, unior_palette, ARRAY_LENGTH(unior_palette));
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}
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READ8_MEMBER(unior_state::dma_r)
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{
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if (offset < 0xf800)
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return m_maincpu->space(AS_PROGRAM).read_byte(offset);
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else
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return m_p_vram[offset & 0x7ff];
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}
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static I8257_INTERFACE( i8257_intf )
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{
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DEVCB_CPU_INPUT_LINE("maincpu", I8085_HALT),
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_NULL,
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DEVCB_DEVICE_MEMBER("crtc", i8275_device, dack_w),
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(unior_state, dma_r), DEVCB_NULL },
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
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};
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WRITE8_MEMBER( unior_state::cpu_status_callback )
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{
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m_dma->i8257_hlda_w(BIT(data, 3));
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}
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static MACHINE_CONFIG_START( unior, unior_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu",I8080, 2222222)
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MCFG_CPU_ADD("maincpu",I8080, XTAL_20MHz / 9) // unknown clock
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MCFG_CPU_PROGRAM_MAP(unior_mem)
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MCFG_CPU_IO_MAP(unior_io)
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MCFG_I8085A_STATUS(WRITE8(unior_state, cpu_status_callback))
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -328,10 +336,13 @@ static MACHINE_CONFIG_START( unior, unior_state )
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
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MCFG_SCREEN_SIZE(640, 200)
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MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1)
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MCFG_SCREEN_UPDATE_DRIVER(unior_state, screen_update_unior)
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MCFG_SCREEN_UPDATE_DEVICE("crtc", i8275_device, screen_update)
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MCFG_GFXDECODE(unior)
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MCFG_PALETTE_LENGTH(2)
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MCFG_PALETTE_INIT_OVERRIDE(driver_device, black_and_white)
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MCFG_PALETTE_LENGTH(3)
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MCFG_PALETTE_INIT_OVERRIDE(unior_state,unior)
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MCFG_I8257_ADD("dma", XTAL_20MHz / 9, i8257_intf) // unknown clock
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MCFG_I8275_ADD("crtc", i8275_intf)
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MACHINE_CONFIG_END
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/* ROM definition */
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