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(nw) mbeepp: pushed the ram to the max 1024k

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This commit is contained in:
Robbbert 2020-06-19 04:14:13 +10:00
parent e96ed3b0eb
commit 13c7f85b4a
3 changed files with 38 additions and 37 deletions
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22
src/mame/drivers/mbee.cpp
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@ -22,8 +22,7 @@ from Brett Selwood and Andrew Davies.
The Premium Plus was a limited-edition kit from Microbee Systems, but we don't
have any technical info or schematic as yet. It starts up, keyboard works, disks
work much the same as a 128k or 256tc. It has 1024k of RAM but we do not know how
the extra RAM is selected. At this time it has 256k allocated and it seems happy enough.
work much the same as a 128k or 256tc. It has 1024k of RAM.
The kit itself has an extra custom FPGA CPU board with memory-card slot, but there's
no info on it yet. We just emulate the Z80 portion.
@ -93,14 +92,16 @@ from Brett Selwood and Andrew Davies.
TODO/not working:
Keyboard:
- 256tc: Paste ignores shift key
- All others: Paste drops most characters.
- Teleterm: keyboard has problems. The schematic shows it using the old-style keyboard,
however it actually uses the new keyboard with interrupts.
The keyboard has issues in the Offsider Macro Key Editor.
- various fdc issues:
- B drive doesn't work with most disks.
- some disks cause MESS to freeze.
- ENMF pin missing from wd_fdc.
- incorrect timing for track register causes 256tc failure to boot a disk.
FDC: (TODO: see if these bugs still exist)
- B drive doesn't work with most disks.
- some disks cause MESS to freeze.
- Simply Write has keyboard problems (in 128k, no keys work).
@ -112,9 +113,6 @@ from Brett Selwood and Andrew Davies.
- 256tc, Teleterm: Keyboard CPU inbuilt ROM needs to be dumped.
- 128k, 64k: PALs need to be dumped for the bankswitching.
- Teleterm: keyboard has problems. The schematic shows it using the old-style keyboard,
however it actually uses the new keyboard with interrupts.
- Mouse: a few programs support the use of a serial mouse which interfaced
directly to the Z80PIO. However there's little info to be found.
PIO B3 to ground activates the mouse pointer in Shell v3.01.
@ -315,7 +313,7 @@ void mbee_state::mbee128_io(address_map &map)
map(0x1c, 0x1f).rw(FUNC(mbee_state::port1c_r), FUNC(mbee_state::port1c_w));
map(0x44, 0x47).rw(m_fdc, FUNC(wd2793_device::read), FUNC(wd2793_device::write));
map(0x48, 0x4f).rw(FUNC(mbee_state::fdc_status_r), FUNC(mbee_state::fdc_motor_w));
map(0x50, 0x57).w(FUNC(mbee_state::mbee128_50_w));
map(0x50, 0x57).w(FUNC(mbee_state::port50_w));
}
void mbee_state::mbee256_io(address_map &map)
@ -337,7 +335,7 @@ void mbee_state::mbee256_io(address_map &map)
map(0x001c, 0x001f).mirror(0xff00).rw(FUNC(mbee_state::port1c_r), FUNC(mbee_state::port1c_w));
map(0x0044, 0x0047).mirror(0xff00).rw(m_fdc, FUNC(wd2793_device::read), FUNC(wd2793_device::write));
map(0x0048, 0x004f).mirror(0xff00).rw(FUNC(mbee_state::fdc_status_r), FUNC(mbee_state::fdc_motor_w));
map(0x0050, 0x0057).mirror(0xff00).w(FUNC(mbee_state::mbee256_50_w));
map(0x0050, 0x0057).mirror(0xff00).w(FUNC(mbee_state::port50_w));
// map(0x0058, 0x005f).mirror(0xff00); External options: floppy drive, hard drive and keyboard
// map(0x0060, 0x0067).mirror(0xff00); Reserved for file server selection (unused)
// map(0x0068, 0x006f).mirror(0xff00); Reserved for 8530 SCC (unused)

6
src/mame/includes/mbee.h
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@ -75,7 +75,7 @@ public:
void init_mbee() { m_features = 0x00; };
void init_mbeett() { m_features = 0x0d; };
void init_mbeeppc() { m_features = 0x09; };
void init_mbeepp() { m_features = 0x29; }; // TODO: give 1MB ram when we find out how it is switched (feature byte = 0x39)
void init_mbeepp() { m_features = 0x39; };
void init_mbeeic() { m_features = 0x01; };
void init_mbee56() { m_features = 0x03; };
void init_mbee128() { m_features = 0x11; };
@ -98,8 +98,7 @@ private:
uint8_t port18_r();
uint8_t port1c_r();
void port1c_w(uint8_t data);
void mbee128_50_w(uint8_t data);
void mbee256_50_w(uint8_t data);
void port50_w(uint8_t data);
uint8_t telcom_low_r();
uint8_t telcom_high_r();
uint8_t speed_low_r();
@ -149,6 +148,7 @@ private:
u8 m_features;
u16 m_size;
u32 m_ramsize;
bool m_b7_rtc;
bool m_b7_vs;
bool m_b2;

47
src/mame/machine/mbee.cpp
View File

@ -266,7 +266,7 @@ WRITE_LINE_MEMBER( mbee_state::rtc_irq_w )
and (output = 22,21,20,19,18,17,16,15). The prom is also used to control
the refresh required by the dynamic rams, however we ignore this function.
b_mask = total dynamic ram (1=64k; 3=128k; 7=256k)
b_mask = total dynamic ram (1=64k; 3=128k; 7=256k or more)
Certain software (such as the PJB system) constantly switch banks around,
causing slowness. Therefore this function only changes the banks that need
@ -276,6 +276,9 @@ WRITE_LINE_MEMBER( mbee_state::rtc_irq_w )
void mbee_state::setup_banks(uint8_t data, bool first_time, uint8_t b_mask)
{
b_mask &= 7;
u32 dbank = m_ramsize / 0x1000;
u8 extra_bits = data & 0xc0;
data &= 0x3f; // (bits 0-5 are referred to as S0-S5)
address_space &mem = m_maincpu->space(AS_PROGRAM);
uint8_t *prom = memregion("pals")->base();
@ -314,9 +317,9 @@ void mbee_state::setup_banks(uint8_t data, bool first_time, uint8_t b_mask)
mem.install_read_bank( b_vid, b_vid+0xfff, m_bankr[b_bank] );
if (!BIT(b_byte, 3))
m_bankr[b_bank]->set_entry(64 + (b_bank & 3)); // read from rom
m_bankr[b_bank]->set_entry(dbank + (b_bank & 3)); // read from rom
else
m_bankr[b_bank]->set_entry((b_bank & 7) | ((b_byte & b_mask) << 3)); // ram
m_bankr[b_bank]->set_entry(extra_bits + (b_bank & 7) + ((b_byte & b_mask) << 3)); // ram
}
}
p_bank++;
@ -342,10 +345,10 @@ void mbee_state::setup_banks(uint8_t data, bool first_time, uint8_t b_mask)
{
mem.install_write_bank( b_vid, b_vid+0xfff, m_bankw[b_bank] );
if (!BIT(b_byte, 3))
m_bankw[b_bank]->set_entry(64); // write to rom dummy area
else
m_bankw[b_bank]->set_entry((b_bank & 7) | ((b_byte & b_mask) << 3)); // ram
//if (!BIT(b_byte, 3))
//m_bankw[b_bank]->set_entry(dbank); // write to rom dummy area
//else
m_bankw[b_bank]->set_entry(extra_bits + (b_bank & 7) + ((b_byte & b_mask) << 3)); // ram
}
}
p_bank++;
@ -353,9 +356,10 @@ void mbee_state::setup_banks(uint8_t data, bool first_time, uint8_t b_mask)
}
}
void mbee_state::mbee256_50_w(uint8_t data)
void mbee_state::port50_w(u8 data)
{
setup_banks(data, 0, 7);
u8 mask = ((m_ramsize / 0x8000) - 1) & 7;
setup_banks(data, 0, mask);
}
/***********************************************************
@ -371,10 +375,6 @@ void mbee_state::mbee256_50_w(uint8_t data)
************************************************************/
void mbee_state::mbee128_50_w(uint8_t data)
{
setup_banks(data, 0, 3);
}
/***********************************************************
@ -432,6 +432,7 @@ uint8_t mbee_state::telcom_high_r()
void mbee_state::machine_start()
{
save_item(NAME(m_ramsize));
save_item(NAME(m_features));
save_item(NAME(m_size));
save_item(NAME(m_b7_rtc));
@ -510,27 +511,29 @@ void mbee_state::machine_start()
u8 b = BIT(m_features, 4, 2);
if (b)
{
u32 ramsize = 0x40000; // 128k
m_ramsize = 0x20000; // 128k
if (b == 2)
ramsize = 0x40000; // 256k
m_ramsize = 0x40000; // 256k
else
if (b == 3)
ramsize = 0x100000; // 1MB for PP
m_ramsize = 0x100000; // 1MB for PP
m_ram = make_unique_clear<u8[]>(ramsize);
save_pointer(NAME(m_ram), ramsize);
m_ram = make_unique_clear<u8[]>(m_ramsize);
save_pointer(NAME(m_ram), m_ramsize);
m_dummy = std::make_unique<u8[]>(0x1000); // don't save this
u8 *r = m_ram.get();
u8 *d = m_dummy.get();
u8 *m = memregion("maincpu")->base();
u32 banks = m_ramsize / 0x1000;
for (u8 b_bank = 0; b_bank < 16; b_bank++)
{
m_bankr[b_bank]->configure_entries(0, 64, r, 0x1000); // RAM banks
m_bankr[b_bank]->configure_entries(64, 4, m, 0x1000); // rom
m_bankw[b_bank]->configure_entries(0, 64, r, 0x1000); // RAM banks
m_bankw[b_bank]->configure_entry(64, d); // dummy rom
m_bankr[b_bank]->configure_entries(0, banks, r, 0x1000); // RAM banks
m_bankr[b_bank]->configure_entries(banks, 4, m, 0x1000); // rom
m_bankw[b_bank]->configure_entries(0, banks, r, 0x1000); // RAM banks
m_bankw[b_bank]->configure_entry(banks, d); // dummy rom
}
}
}