This commit is contained in:
angelosa 2015-07-02 22:56:05 +02:00
commit 13d62dd0eb
17 changed files with 1343 additions and 633 deletions

View File

@ -941,7 +941,6 @@ files {
MAME_DIR .. "src/mame/video/n64.c",
MAME_DIR .. "src/mame/video/rdpblend.c",
MAME_DIR .. "src/mame/video/rdptpipe.c",
MAME_DIR .. "src/mame/video/rdpspn16.c",
MAME_DIR .. "src/mame/machine/megadriv.c",
MAME_DIR .. "src/mame/drivers/naomi.c",
MAME_DIR .. "src/mame/machine/awboard.c",
@ -1898,6 +1897,7 @@ createMESSProjects(_target, _subtarget, "olivetti")
files {
MAME_DIR .. "src/mess/drivers/m20.c",
MAME_DIR .. "src/mess/machine/m20_kbd.c",
MAME_DIR .. "src/mess/machine/m20_8086.c",
MAME_DIR .. "src/mess/drivers/m24.c",
MAME_DIR .. "src/mess/machine/m24_kbd.c",
MAME_DIR .. "src/mess/machine/m24_z8000.c"

View File

@ -138,9 +138,6 @@ void sm510_base_device::device_reset()
//-------------------------------------------------
// execute
//-------------------------------------------------
@ -180,6 +177,77 @@ void sm510_base_device::execute_run()
get_opcode_param();
// handle opcode
switch (m_op & 0xf0)
{
case 0x20: op_lax(); break;
case 0x30: op_adx(); break;
case 0x40: op_lb(); break;
case 0x80: case 0x90: case 0xa0: case 0xb0:
op_t(); break;
case 0xc0: case 0xd0: case 0xe0: case 0xf0:
op_tm(); break;
default:
switch (m_op & 0xfc)
{
case 0x04: op_rm(); break;
case 0x0c: op_sm(); break;
case 0x10: op_exc(); break;
case 0x14: op_exci(); break;
case 0x18: op_lda(); break;
case 0x1c: op_excd(); break;
case 0x54: op_tmi(); break;
case 0x70: case 0x74: case 0x78: op_tl();
case 0x7c: op_tml(); break;
default:
switch (m_op)
{
case 0x00: op_skip(); break;
case 0x01: op_atbp(); break;
case 0x02: op_sbm(); break;
case 0x03: op_atpl(); break;
case 0x08: op_add(); break;
case 0x09: op_add11(); break;
case 0x0a: op_coma(); break;
case 0x0b: op_exbla(); break;
case 0x51: op_tb(); break;
case 0x52: op_tc(); break;
case 0x53: op_tam(); break;
case 0x58: op_tis(); break;
case 0x59: op_atl(); break;
case 0x5a: op_ta0(); break;
case 0x5b: op_tabl(); break;
case 0x5d: op_cend(); break;
case 0x5e: op_tal(); break;
case 0x5f: op_lbl(); break;
case 0x60: op_atfc(); break;
case 0x61: op_atr(); break;
case 0x62: op_wr(); break;
case 0x63: op_ws(); break;
case 0x64: op_incb(); break;
case 0x65: op_idiv(); break;
case 0x66: op_rc(); break;
case 0x67: op_sc(); break;
case 0x68: op_tf1(); break;
case 0x69: op_tf4(); break;
case 0x6a: op_kta(); break;
case 0x6b: op_rot(); break;
case 0x6c: op_decb(); break;
case 0x6d: op_bdc(); break;
case 0x6e: op_rtn0(); break;
case 0x6f: op_rtn1(); break;
default: op_illegal(); break;
}
break; // 0xff
}
break; // 0xfc
} // big switch
}
}

View File

@ -93,6 +93,61 @@ protected:
void push_stack();
// opcode handlers
void op_lb();
void op_lbl();
void op_sbm();
void op_exbla();
void op_incb();
void op_decb();
void op_atpl();
void op_rtn0();
void op_rtn1();
void op_tl();
void op_tml();
void op_tm();
void op_t();
void op_exc();
void op_bdc();
void op_exci();
void op_excd();
void op_lda();
void op_lax();
void op_wr();
void op_ws();
void op_kta();
void op_atbp();
void op_atl();
void op_atfc();
void op_atr();
void op_add();
void op_add11();
void op_adx();
void op_coma();
void op_rot();
void op_rc();
void op_sc();
void op_tb();
void op_tc();
void op_tam();
void op_tmi();
void op_ta0();
void op_tabl();
void op_tis();
void op_tal();
void op_tf1();
void op_tf4();
void op_rm();
void op_sm();
void op_skip();
void op_cend();
void op_idiv();
void op_illegal();
};

View File

@ -35,6 +35,269 @@ void sm510_base_device::push_stack()
// instruction set
// RAM address instructions
void sm510_base_device::op_lb()
{
// x
}
void sm510_base_device::op_lbl()
{
// x
}
void sm510_base_device::op_sbm()
{
// x
}
void sm510_base_device::op_exbla()
{
// x
}
void sm510_base_device::op_incb()
{
// x
}
void sm510_base_device::op_decb()
{
// x
}
// ROM address instructions
void sm510_base_device::op_atpl()
{
// x
}
void sm510_base_device::op_rtn0()
{
// x
}
void sm510_base_device::op_rtn1()
{
// x
}
void sm510_base_device::op_tl()
{
// x
}
void sm510_base_device::op_tml()
{
// x
}
void sm510_base_device::op_tm()
{
// x
}
void sm510_base_device::op_t()
{
// x
}
// Data transfer instructions
void sm510_base_device::op_exc()
{
// x
}
void sm510_base_device::op_bdc()
{
// x
}
void sm510_base_device::op_exci()
{
// x
}
void sm510_base_device::op_excd()
{
// x
}
void sm510_base_device::op_lda()
{
// x
}
void sm510_base_device::op_lax()
{
// x
}
void sm510_base_device::op_wr()
{
// x
}
void sm510_base_device::op_ws()
{
// x
}
// I/O instructions
void sm510_base_device::op_kta()
{
// x
}
void sm510_base_device::op_atbp()
{
// x
}
void sm510_base_device::op_atl()
{
// x
}
void sm510_base_device::op_atfc()
{
// x
}
void sm510_base_device::op_atr()
{
// x
}
// Arithmetic instructions
void sm510_base_device::op_add()
{
// x
}
void sm510_base_device::op_add11()
{
// x
}
void sm510_base_device::op_adx()
{
// x
}
void sm510_base_device::op_coma()
{
// x
}
void sm510_base_device::op_rot()
{
// x
}
void sm510_base_device::op_rc()
{
// x
}
void sm510_base_device::op_sc()
{
// x
}
// Test instructions
void sm510_base_device::op_tb()
{
// x
}
void sm510_base_device::op_tc()
{
// x
}
void sm510_base_device::op_tam()
{
// x
}
void sm510_base_device::op_tmi()
{
// x
}
void sm510_base_device::op_ta0()
{
// x
}
void sm510_base_device::op_tabl()
{
// x
}
void sm510_base_device::op_tis()
{
// x
}
void sm510_base_device::op_tal()
{
// x
}
void sm510_base_device::op_tf1()
{
// x
}
void sm510_base_device::op_tf4()
{
// x
}
// Bit manipulation instructions
void sm510_base_device::op_rm()
{
// x
}
void sm510_base_device::op_sm()
{
// x
}
// Special instructions
void sm510_base_device::op_skip()
{
// no operation
}
void sm510_base_device::op_cend()
{
// clock stop
}
void sm510_base_device::op_idiv()
{
// reset DIV
}
void sm510_base_device::op_illegal()
{
logerror("%s unknown opcode $%03X at $%04X\n", tag(), m_op, m_prev_pc);

View File

@ -4515,13 +4515,14 @@ void z8002_device::Z76_ssN0_dddd_addr()
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
GET_ADDR_RAW(OP1);
UINT16 temp = RW(src); // store src in case dst == src
if (segmented_mode()) {
RL(dst) = addr;
}
else {
RW(dst) = addr;
}
add_to_addr_reg(dst, RW(src));
add_to_addr_reg(dst, temp);
}
/******************************************

View File

@ -376,7 +376,7 @@ void parser_t::device(const pstring &dev_type)
tok = get_token();
}
if (cnt != termlist.size())
m_setup.netlist().error("netlist: input count mismatch for %s - expected %" SIZETFMT " found %" SIZETFMT "\n", devname.cstr(), termlist.size(), cnt);
m_setup.netlist().error("netlist: input count mismatch for %s - expected %" SIZETFMT " found %" SIZETFMT "\n", devname.cstr(), SIZET_PRINTF(termlist.size()), SIZET_PRINTF(cnt));
require_token(tok, m_tok_param_right);
}
}

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@ -48,6 +48,11 @@
#undef ATTR_COLD
#define ATTR_COLD
static inline std::size_t SIZET_PRINTF(const std::size_t &v)
{
return (unsigned) v;
}
/* use MAME */
#if (USE_DELEGATE_TYPE == DELEGATE_TYPE_INTERNAL)
#define PHAS_PMF_INTERNAL 1
@ -148,6 +153,11 @@ typedef int64_t INT64;
#endif
#endif
static inline std::size_t SIZET_PRINTF(const std::size_t &v)
{
return (unsigned) v;
}
#endif
/*

View File

@ -463,7 +463,7 @@ pstring ppreprocessor::process(const pstring &contents)
}
}
else
error(pstring::sprintf("unknown directive on line %" SIZETFMT ": %s\n", i, line.cstr()));
error(pstring::sprintf("unknown directive on line %" SIZETFMT ": %s\n", SIZET_PRINTF(i), line.cstr()));
}
else
{

View File

@ -147,7 +147,7 @@ template <unsigned m_N, unsigned _storage_N>
ATTR_COLD void matrix_solver_direct_t<m_N, _storage_N>::vsetup(analog_net_t::list_t &nets)
{
if (m_dim < nets.size())
netlist().error("Dimension %d less than %" SIZETFMT, m_dim, nets.size());
netlist().error("Dimension %d less than %" SIZETFMT, m_dim, SIZET_PRINTF(nets.size()));
for (unsigned k = 0; k < N(); k++)
{

View File

@ -162,7 +162,7 @@ ATTR_COLD void matrix_solver_t::setup(analog_net_t::list_t &nets)
if (net_proxy_output == NULL)
{
net_proxy_output = palloc(analog_output_t);
net_proxy_output->init_object(*this, this->name() + "." + pstring::sprintf("m%" SIZETFMT, m_inps.size()));
net_proxy_output->init_object(*this, this->name() + "." + pstring::sprintf("m%" SIZETFMT, SIZET_PRINTF(m_inps.size())));
m_inps.add(net_proxy_output);
net_proxy_output->m_proxied_net = &p->net().as_analog();
}
@ -511,7 +511,7 @@ ATTR_COLD void NETLIB_NAME(solver)::post_start()
}
// setup the solvers
netlist().log("Found %d net groups in %" SIZETFMT " nets\n", cur_group + 1, netlist().m_nets.size());
netlist().log("Found %d net groups in %" SIZETFMT " nets\n", cur_group + 1, SIZET_PRINTF(netlist().m_nets.size()));
for (int i = 0; i <= cur_group; i++)
{
matrix_solver_t *ms;
@ -576,19 +576,19 @@ ATTR_COLD void NETLIB_NAME(solver)::post_start()
break;
}
register_sub(pstring::sprintf("Solver_%" SIZETFMT,m_mat_solvers.size()), *ms);
register_sub(pstring::sprintf("Solver_%" SIZETFMT,SIZET_PRINTF(m_mat_solvers.size())), *ms);
ms->vsetup(groups[i]);
m_mat_solvers.add(ms);
netlist().log("Solver %s", ms->name().cstr());
netlist().log(" # %d ==> %" SIZETFMT " nets", i, groups[i].size()); //, (*(*groups[i].first())->m_core_terms.first())->name().cstr());
netlist().log(" # %d ==> %" SIZETFMT " nets", i, SIZET_PRINTF(groups[i].size())); //, (*(*groups[i].first())->m_core_terms.first())->name().cstr());
netlist().log(" has %s elements", ms->is_dynamic() ? "dynamic" : "no dynamic");
netlist().log(" has %s elements", ms->is_timestep() ? "timestep" : "no timestep");
for (std::size_t j=0; j<groups[i].size(); j++)
{
netlist().log("Net %" SIZETFMT ": %s", j, groups[i][j]->name().cstr());
netlist().log("Net %" SIZETFMT ": %s", SIZET_PRINTF(j), groups[i][j]->name().cstr());
net_t *n = groups[i][j];
for (std::size_t k = 0; k < n->m_core_terms.size(); k++)
{

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@ -337,7 +337,7 @@ void nl_convert_spice_t::process_line(const pstring &line)
add_device(tname, xname);
for (std::size_t i=1; i < tt.size() - 1; i++)
{
pstring term = pstring::sprintf("%s.%" SIZETFMT, xname.cstr(), i);
pstring term = pstring::sprintf("%s.%" SIZETFMT, xname.cstr(), SIZET_PRINTF(i));
add_term(tt[i], term);
}
break;

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@ -8755,8 +8755,8 @@ ROM_END
ROM_START( xmvsfur1 )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "xvsu.03h", 0x000000, 0x80000, CRC(5481155a) SHA1(799a2488684cbead33206498d13261b79624a46e) )
ROM_LOAD16_WORD_SWAP( "xvsu.04h", 0x080000, 0x80000, CRC(1e236388) SHA1(329c08103840fadbc4176785c4b24013a7a2b1bc) )
ROM_LOAD16_WORD_SWAP( "xvsu.03h", 0x000000, 0x80000, CRC(5481155a) SHA1(799a2488684cbead33206498d13261b79624a46e) ) /* also found as rev I */
ROM_LOAD16_WORD_SWAP( "xvsu.04h", 0x080000, 0x80000, CRC(1e236388) SHA1(329c08103840fadbc4176785c4b24013a7a2b1bc) ) /* also found as rev I */
ROM_LOAD16_WORD_SWAP( "xvs.05a", 0x100000, 0x80000, CRC(7db6025d) SHA1(2d74f48f83f45359bfaca28ab686625766af12ee) )
ROM_LOAD16_WORD_SWAP( "xvs.06a", 0x180000, 0x80000, CRC(e8e2c75c) SHA1(929408cb5d98e95cec75ea58e4701b0cbdbcd016) )
ROM_LOAD16_WORD_SWAP( "xvs.07", 0x200000, 0x80000, CRC(08f0abed) SHA1(ef16c376232dba63b0b9bc3aa0640f9001ccb68a) )
@ -8788,8 +8788,8 @@ ROM_END
ROM_START( xmvsfur2 )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "xvsu.03", 0x000000, 0x80000, CRC(bd8b152f) SHA1(6b029b7314ce2516c67e5a71508f86aa01d30ab8) )
ROM_LOAD16_WORD_SWAP( "xvsu.04", 0x080000, 0x80000, CRC(7c7d1da3) SHA1(96dd1f83c8f8053177b91ad31c4c051b28dd0208) )
ROM_LOAD16_WORD_SWAP( "xvsu.03d", 0x000000, 0x80000, CRC(bd8b152f) SHA1(6b029b7314ce2516c67e5a71508f86aa01d30ab8) )
ROM_LOAD16_WORD_SWAP( "xvsu.04d", 0x080000, 0x80000, CRC(7c7d1da3) SHA1(96dd1f83c8f8053177b91ad31c4c051b28dd0208) )
ROM_LOAD16_WORD_SWAP( "xvs.05a", 0x100000, 0x80000, CRC(7db6025d) SHA1(2d74f48f83f45359bfaca28ab686625766af12ee) )
ROM_LOAD16_WORD_SWAP( "xvs.06a", 0x180000, 0x80000, CRC(e8e2c75c) SHA1(929408cb5d98e95cec75ea58e4701b0cbdbcd016) )
ROM_LOAD16_WORD_SWAP( "xvs.07", 0x200000, 0x80000, CRC(08f0abed) SHA1(ef16c376232dba63b0b9bc3aa0640f9001ccb68a) )

File diff suppressed because it is too large Load Diff

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@ -52,7 +52,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, suprloco_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( decrypted_opcodes_map, AS_DECRYPTED_OPCODES, 8, suprloco_state )
AM_RANGE(0x0000, 0xbfff) AM_ROM AM_SHARE("decrypted_opcodes")
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_SHARE("decrypted_opcodes")
AM_RANGE(0x8000, 0xbfff) AM_ROM AM_REGION("maincpu", 0x8000)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, suprloco_state )
@ -319,7 +320,7 @@ DRIVER_INIT_MEMBER(suprloco_state,suprloco)
};
/* decrypt program ROMs */
sega_decode(memregion("maincpu")->base(), m_decrypted_opcodes, 0xc000, convtable);
sega_decode(memregion("maincpu")->base(), m_decrypted_opcodes, 0x8000, convtable);
}

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@ -47,8 +47,10 @@ E I1 Vectored interrupt error
#include "machine/pit8253.h"
#include "machine/pic8259.h"
#include "formats/m20_dsk.h"
#include "formats/pc_dsk.h"
#include "machine/m20_kbd.h"
#include "bus/rs232/rs232.h"
#include "machine/m20_8086.h"
class m20_state : public driver_device
{
@ -64,6 +66,7 @@ public:
m_fd1797(*this, "fd1797"),
m_floppy0(*this, "fd1797:0:5dd"),
m_floppy1(*this, "fd1797:1:5dd"),
m_apb(*this, "apb"),
m_p_videoram(*this, "p_videoram"),
m_palette(*this, "palette")
{
@ -78,6 +81,7 @@ public:
required_device<fd1797_t> m_fd1797;
required_device<floppy_image_device> m_floppy0;
required_device<floppy_image_device> m_floppy1;
optional_device<m20_8086_device> m_apb;
required_shared_ptr<UINT16> m_p_videoram;
required_device<palette_device> m_palette;
@ -92,6 +96,8 @@ public:
DECLARE_WRITE_LINE_MEMBER(tty_clock_tick_w);
DECLARE_WRITE_LINE_MEMBER(kbd_clock_tick_w);
DECLARE_WRITE_LINE_MEMBER(timer_tick_w);
DECLARE_WRITE_LINE_MEMBER(halt_apb_w);
DECLARE_WRITE_LINE_MEMBER(int_w);
private:
offs_t m_memsize;
@ -226,7 +232,9 @@ WRITE_LINE_MEMBER( m20_state::timer_tick_w )
* 8253 is programmed in square wave mode, not rate
* generator mode.
*/
m_maincpu->set_input_line(0, state ? HOLD_LINE /*ASSERT_LINE*/ : CLEAR_LINE);
if(m_apb)
m_apb->nvi_w(state);
m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? HOLD_LINE /*ASSERT_LINE*/ : CLEAR_LINE);
}
@ -714,24 +722,9 @@ static ADDRESS_MAP_START(m20_io, AS_IO, 16, m20_state)
AM_RANGE(0x140, 0x143) AM_READWRITE(m20_i8259_r, m20_i8259_w)
AM_RANGE(0x3ffa, 0x3ffd) AM_DEVWRITE("apb", m20_8086_device, handshake_w)
ADDRESS_MAP_END
#if 0
static ADDRESS_MAP_START(m20_apb_mem, AS_PROGRAM, 16, m20_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE( 0x00000, 0x007ff ) AM_RAM
AM_RANGE( 0xf0000, 0xf7fff ) AM_RAM //mirrored?
AM_RANGE( 0xfc000, 0xfffff ) AM_ROM AM_REGION("apb_bios",0)
ADDRESS_MAP_END
static ADDRESS_MAP_START(m20_apb_io, AS_IO, 16, m20_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff) // may not be needed
//0x4060 crtc address
//0x4062 crtc data
ADDRESS_MAP_END
#endif
IRQ_CALLBACK_MEMBER(m20_state::m20_irq_callback)
{
if (! irqline)
@ -740,6 +733,13 @@ IRQ_CALLBACK_MEMBER(m20_state::m20_irq_callback)
return m_i8259->acknowledge();
}
WRITE_LINE_MEMBER(m20_state::int_w)
{
if(m_apb && !m_apb->halted())
m_apb->vi_w(state);
m_maincpu->set_input_line(INPUT_LINE_IRQ1, state ? ASSERT_LINE : CLEAR_LINE);
}
void m20_state::machine_start()
{
install_memory();
@ -762,6 +762,8 @@ void m20_state::machine_reset()
memcpy(RAM, ROM, 8); // we need only the reset vector
m_maincpu->reset(); // reset the CPU to ensure it picks up the new vector
if(m_apb)
m_apb->m_8086->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
@ -770,7 +772,8 @@ static SLOT_INTERFACE_START( m20_floppies )
SLOT_INTERFACE_END
FLOPPY_FORMATS_MEMBER( m20_state::floppy_formats )
FLOPPY_M20_FORMAT
FLOPPY_M20_FORMAT,
FLOPPY_PC_FORMAT
FLOPPY_FORMATS_END
static SLOT_INTERFACE_START(keyboard)
@ -790,13 +793,6 @@ static MACHINE_CONFIG_START( m20, m20_state )
MCFG_RAM_DEFAULT_VALUE(0)
MCFG_RAM_EXTRA_OPTIONS("128K,192K,224K,256K,384K,512K")
#if 0
MCFG_CPU_ADD("apb", I8086, MAIN_CLOCK)
MCFG_CPU_PROGRAM_MAP(m20_apb_mem)
MCFG_CPU_IO_MAP(m20_apb_io)
MCFG_DEVICE_DISABLE()
#endif
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -832,11 +828,13 @@ static MACHINE_CONFIG_START( m20, m20_state )
MCFG_PIT8253_CLK2(1230782)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(m20_state, timer_tick_w))
MCFG_PIC8259_ADD("i8259", INPUTLINE("maincpu", 1), VCC, NULL)
MCFG_PIC8259_ADD("i8259", WRITELINE(m20_state, int_w), VCC, NULL)
MCFG_RS232_PORT_ADD("kbd", keyboard, "m20")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("i8251_1", i8251_device, write_rxd))
MCFG_DEVICE_ADD("apb", M20_8086, 0)
MCFG_SOFTWARE_LIST_ADD("flop_list","m20")
MACHINE_CONFIG_END

119
src/mess/machine/m20_8086.c Normal file
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@ -0,0 +1,119 @@
// license:BSD-3-Clause
// copyright-holders:Carl
#include "m20_8086.h"
#include "machine/ram.h"
const device_type M20_8086 = &device_creator<m20_8086_device>;
m20_8086_device::m20_8086_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, M20_8086, "Olivetti M20 8086 Adapter", tag, owner, clock, "m20_8086", __FILE__),
m_8086(*this, "8086"),
m_maincpu(*this, ":maincpu"),
m_pic(*this, ":i8259"),
m_8086_halt(true)
{
}
void m20_8086_device::device_start()
{
UINT8* ram = machine().device<ram_device>("ram")->pointer();
m_8086->space(AS_PROGRAM).install_readwrite_bank(0x00000, machine().device<ram_device>("ram")->size() - 0x4001, "mainram");
membank("highram")->set_base(ram);
membank("mainram")->set_base(&ram[0x4000]);
membank("vram")->set_base(memshare(":p_videoram")->ptr());
membank("vram2")->set_base(memshare(":p_videoram")->ptr());
}
void m20_8086_device::device_reset()
{
m_8086_halt = true;
m_nvi = m_vi = 0;
m_8086->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
ROM_START( m20_8086 )
ROM_REGION(0x4000, "8086", 0)
ROM_LOAD("apb-1086-2.0.bin", 0x0000, 0x4000, CRC(8c05be93) SHA1(2bb424afd874cc6562e9642780eaac2391308053))
ROM_END
const rom_entry *m20_8086_device::device_rom_region() const
{
return ROM_NAME( m20_8086 );
}
static ADDRESS_MAP_START(i86_prog, AS_PROGRAM, 16, m20_8086_device)
AM_RANGE(0xe0000, 0xe3fff) AM_RAMBANK("vram2")
AM_RANGE(0xf0000, 0xf3fff) AM_RAMBANK("highram")
AM_RANGE(0xf4000, 0xf7fff) AM_RAMBANK("vram")
AM_RANGE(0xfc000, 0xfffff) AM_ROM AM_REGION("8086",0)
ADDRESS_MAP_END
static ADDRESS_MAP_START(i86_io, AS_IO, 16, m20_8086_device)
AM_RANGE(0x4000, 0x4fff) AM_READWRITE(z8000_io_r, z8000_io_w)
AM_RANGE(0x7ffa, 0x7ffd) AM_WRITE(handshake_w)
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( m20_8086 )
MCFG_CPU_ADD("8086", I8086, XTAL_24MHz/3)
MCFG_CPU_PROGRAM_MAP(i86_prog)
MCFG_CPU_IO_MAP(i86_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(m20_8086_device, int_cb)
MACHINE_CONFIG_END
machine_config_constructor m20_8086_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( m20_8086 );
}
READ16_MEMBER(m20_8086_device::z8000_io_r)
{
return m_maincpu->space(AS_IO).read_word(offset << 1, mem_mask);
}
WRITE16_MEMBER(m20_8086_device::z8000_io_w)
{
m_maincpu->space(AS_IO).write_word(offset << 1, data, mem_mask);
}
IRQ_CALLBACK_MEMBER(m20_8086_device::int_cb)
{
if(m_nvi)
{
m_nvi = false;
m_8086->set_input_line(INPUT_LINE_IRQ0, m_vi ? ASSERT_LINE : CLEAR_LINE);
return 0xff;
}
else
return m_pic->acknowledge() << 1;
}
WRITE_LINE_MEMBER(m20_8086_device::nvi_w)
{
m_nvi = state;
m_8086->set_input_line(INPUT_LINE_IRQ0, (state || m_vi) ? ASSERT_LINE : CLEAR_LINE);
}
WRITE_LINE_MEMBER(m20_8086_device::vi_w)
{
m_vi = state;
m_8086->set_input_line(INPUT_LINE_IRQ0, (state || m_nvi) ? ASSERT_LINE : CLEAR_LINE);
}
WRITE16_MEMBER(m20_8086_device::handshake_w)
{
if(!offset)
{
m_8086->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
m_8086_halt = true;
}
else
{
m_8086->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_8086->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_8086_halt = false;
}
}

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// license:BSD-3-Clause
// copyright-holders:Carl
#ifndef M20_8086_H_
#define M20_8086_H_
#include "emu.h"
#include "cpu/i86/i86.h"
#include "machine/pic8259.h"
class m20_8086_device : public device_t
{
public:
m20_8086_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual const rom_entry *device_rom_region() const;
virtual machine_config_constructor device_mconfig_additions() const;
DECLARE_READ16_MEMBER(z8000_io_r);
DECLARE_WRITE16_MEMBER(z8000_io_w);
DECLARE_WRITE_LINE_MEMBER(vi_w);
DECLARE_WRITE_LINE_MEMBER(nvi_w);
DECLARE_WRITE16_MEMBER(handshake_w);
IRQ_CALLBACK_MEMBER(int_cb);
bool halted() { return m_8086_halt; }
required_device<cpu_device> m_8086;
protected:
void device_start();
void device_reset();
private:
required_device<cpu_device> m_maincpu;
required_device<pic8259_device> m_pic;
bool m_8086_halt;
int m_nvi, m_vi;
};
extern const device_type M20_8086;
#endif /* M20_8086_H_ */