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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2013-07-23 07:18:56 +00:00
parent d3f32a1ba7
commit 14629cbcb4
392 changed files with 4488 additions and 4636 deletions
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97
src/build/makemak.c
View File

@ -182,7 +182,7 @@ int include_mapping(const char *srcfile)
filename[pos] = *srcptr++;
filename[pos+1] = 0;
}
srcptr++; // skip comma
srcptr++; // skip comma
char mapping[256];
mapping[0] = 0;
for (int pos = 0; srcptr < endptr && pos < ARRAY_LENGTH(mapping) - 1 && (*srcptr!=10) && (*srcptr!=13); pos++)
@ -296,23 +296,23 @@ int parse_file(const char *srcfile)
drivname[pos] = *srcptr++;
drivname[pos+1] = 0;
}
librarylist_entry *lentry = new librarylist_entry;
lentry->name.cpy(drivname);
lentry->next = NULL;
lentry->sourcefiles = NULL;
if (last_libraryitem!=NULL)
{
last_libraryitem->next = lentry;
}
last_libraryitem = lentry;
last_libraryitem->next = lentry;
}
last_libraryitem = lentry;
last_sourceitem = NULL;
if (librarylist==NULL)
{
librarylist = lentry;
}
continue;
}
@ -331,9 +331,9 @@ int parse_file(const char *srcfile)
lentry->next = NULL;
if (last_sourceitem!=NULL)
{
last_sourceitem->next = lentry;
}
last_sourceitem = lentry;
last_sourceitem->next = lentry;
}
last_sourceitem = lentry;
if (last_libraryitem->sourcefiles==NULL)
{
last_libraryitem->sourcefiles = lentry;
@ -361,7 +361,7 @@ int parse_for_drivers(const char *srcfile)
while (core_fgets(buffer, ARRAY_LENGTH(buffer), file) != NULL)
{
astring line;
// rip through it to find all drivers
char *srcptr = (char *)buffer;
char *endptr = srcptr + strlen(buffer);
@ -408,7 +408,7 @@ int parse_for_drivers(const char *srcfile)
line.cat(*srcptr++);
}
}
if ((line.find(0,"GAME(")==0) || (line.find(0,"GAMEL(")==0) ||
(line.find(0,"COMP(")==0) || (line.find(0,"CONS(")==0) ||
(line.find(0,"SYST(")==0))
@ -417,7 +417,7 @@ int parse_for_drivers(const char *srcfile)
if (p1<0) continue;
int p2 = line.find(p1+1,",");
if (p2<0) continue;
printf("%s\n",line.substr(p1+1,p2-p1-1).cstr());
}
}
@ -445,14 +445,14 @@ int main(int argc, char *argv[])
exclude_path **excpathhead = &excpaths;
astring srcdir;
int unadorned = 0;
librarylist = NULL;
last_libraryitem = NULL;
last_sourceitem = NULL;
// extract arguments
const char *srcfile = argv[1];
const char *srcfile = argv[1];
if (parse_file(srcfile))
return 1;
@ -500,16 +500,16 @@ int main(int argc, char *argv[])
// generate list of drivers
if (srcdir.len() == 0)
{
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
{
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
{
printf("// Drivers from %s.c\n",src->name.cstr());
astring srcfile;
// build the source filename
srcfile.printf("%s%c%s.c", "src", PATH_SEPARATOR[0], src->name.cstr());
parse_for_drivers(srcfile);
astring srcfile_inc;
// build the source filename
srcfile_inc.printf("%s%c%s.inc", "src", PATH_SEPARATOR[0], src->name.cstr());
@ -518,15 +518,15 @@ int main(int argc, char *argv[])
}
}
return 0;
}
else
}
else
{
include_mapping("src/emu/cpu/cpu.mak");
include_mapping("src/emu/video/video.mak");
include_mapping("src/emu/sound/sound.mak");
include_mapping("src/emu/machine/machine.mak");
if (librarylist!=NULL)
{
if (librarylist!=NULL)
{
printf("OBJDIRS += \\\n");
printf("\t$(OBJ)/target \\\n");
printf("\t$(OBJ)/mame/audio \\\n");
@ -541,13 +541,13 @@ int main(int argc, char *argv[])
printf("\t$(OBJ)/mess/video \\\n");
printf("\n\n");
printf("DRVLIBS += \\\n");
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
{
printf("\t$(OBJ)/target/%s.a \\\n",lib->name.cstr());
}
printf("\n");
}
}
// recurse over subdirectories
return recurse_dir(srcdir);
@ -593,24 +593,23 @@ static int recurse_dir(astring &srcdir)
{
int result = 0;
// iterate through each file
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
// iterate through each file
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
{
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
{
astring srcfile;
// build the source filename
srcfile.printf("%s%s.c", srcdir.cstr(), src->name.cstr());
dependency_map depend_map;
// find dependencies
file_entry &file = compute_dependencies(srcfile);
recurse_dependencies(file, depend_map);
for (dependency_map::entry_t *entry = depend_map.first(); entry != NULL; entry = depend_map.next(entry))
for (dependency_map::entry_t *entry = depend_map.first(); entry != NULL; entry = depend_map.next(entry))
{
astring t(entry->tag());
if (core_filename_ends_with(t, ".h"))
@ -623,19 +622,19 @@ static int recurse_dir(astring &srcdir)
}
}
}
}
}
}
// iterate through each file
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
for (librarylist_entry *lib = librarylist; lib != NULL; lib = lib->next)
{
// convert the target from source to object (makes assumptions about rules)
astring target("$(OBJ)/target/",lib->name.cstr());
target.cat(".a");
printf("\n%s : \\\n", target.cstr());
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
{
astring srcfile;
@ -648,7 +647,7 @@ static int recurse_dir(astring &srcdir)
recurse_dependencies(file, depend_map);
// iterate over the hashed dependencies and output them as well
for (dependency_map::entry_t *entry = depend_map.first(); entry != NULL; entry = depend_map.next(entry))
for (dependency_map::entry_t *entry = depend_map.first(); entry != NULL; entry = depend_map.next(entry))
{
astring t(entry->tag());
t.replace(0, "src/", "$(OBJ)/");
@ -659,8 +658,8 @@ static int recurse_dir(astring &srcdir)
}
}
}
printf("\n");
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
printf("\n");
for (list_entry *src = lib->sourcefiles; src != NULL; src = src->next)
{
astring srcfile;
@ -670,8 +669,8 @@ static int recurse_dir(astring &srcdir)
// find dependencies
file_entry &file = compute_dependencies(srcfile);
recurse_dependencies(file, depend_map);
for (dependency_map::entry_t *entry = depend_map.first(); entry != NULL; entry = depend_map.next(entry))
recurse_dependencies(file, depend_map);
for (dependency_map::entry_t *entry = depend_map.first(); entry != NULL; entry = depend_map.next(entry))
{
astring t(entry->tag());
if (core_filename_ends_with(t, ".lay"))
@ -682,8 +681,8 @@ static int recurse_dir(astring &srcdir)
t.replace(0, "src/", "$(OBJ)/");
t.replace(0, ".lay", ".lh");
printf("%s: %s\n", target2.cstr(), t.cstr());
printf("%s: %s\n", target2.cstr(), t.cstr());
}
if (core_filename_ends_with(t, ".inc"))
{
@ -691,7 +690,7 @@ static int recurse_dir(astring &srcdir)
target2.replace(0, "src/", "$(OBJ)/");
target2.replace(0, ".c", ".o");
printf("%s: %s\n", target2.cstr(), t.cstr());
printf("%s: %s\n", target2.cstr(), t.cstr());
}
}
}
@ -747,7 +746,7 @@ static file_entry &compute_dependencies(astring &srcfile)
file.deplist = dep;
dep->file = &compute_dependencies(machinefile);
}
astring videofile = astring(srcfile);
videofile.replace("drivers","video");
if (check_file(videofile))
@ -757,7 +756,7 @@ static file_entry &compute_dependencies(astring &srcfile)
file.deplist = dep;
dep->file = &compute_dependencies(videofile);
}
// find the #include directives in this file
for (int index = 0; index < filelength; index++)
@ -795,7 +794,7 @@ static file_entry &compute_dependencies(astring &srcfile)
astring target;
filename.replace(".lh",".lay");
// create a new dependency
if (find_include_file(target, srcfile, filename))
{

2
src/emu/addrmap.h
View File

@ -441,7 +441,7 @@ void _class :: _name(::address_map &map, device_t &device) \
#define AM_WRITE_LEGACY(_handler) \
curentry->set_handler(_handler, #_handler);
// legacy space reads/writes
#define AM_READWRITE_LEGACY(_rhandler, _whandler) \
curentry->set_handler(_rhandler, #_rhandler, _whandler, #_whandler);

1
src/emu/cpu/alph8201/alph8201.c
View File

@ -645,4 +645,3 @@ offs_t alpha8201_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const U
extern CPU_DISASSEMBLE( alpha8201 );
return CPU_DISASSEMBLE_NAME(alpha8201)(this, buffer, pc, oprom, opram, options);
}

25
src/emu/cpu/am29000/am29000.c
View File

@ -196,9 +196,9 @@ void am29000_cpu_device::device_start()
state_add( AM29000_IPB, "IPB", m_ipb ).formatstr("%08X");
state_add( AM29000_Q, "Q", m_q ).formatstr("%08X");
state_add( AM29000_ALU, "ALU", m_alu ).formatstr("%08X");
// state_add( AM29000_BP, "BP", GET_ALU_BP).formatstr("%08X");
// state_add( AM29000_FC, "FC", GET_ALU_FC).formatstr("%08X");
// state_add( AM29000_CR, "CR", GET_CHC_CR).formatstr("%08X");
// state_add( AM29000_BP, "BP", GET_ALU_BP).formatstr("%08X");
// state_add( AM29000_FC, "FC", GET_ALU_FC).formatstr("%08X");
// state_add( AM29000_CR, "CR", GET_CHC_CR).formatstr("%08X");
state_add( AM29000_FPE, "FPE", m_fpe ).formatstr("%08X");
state_add( AM29000_INTE, "INTE", m_inte ).formatstr("%08X");
state_add( AM29000_FPS, "FPS", m_fps ).formatstr("%08X");
@ -409,15 +409,15 @@ void am29000_cpu_device::state_string_export(const device_state_entry &entry, as
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c%c%c%c|%3d", m_alu & ALU_V ? 'V' : '.',
m_alu & ALU_Z ? 'Z' : '.',
m_alu & ALU_N ? 'N' : '.',
m_alu & ALU_C ? 'C' : '.',
m_cps & CPS_IP ? 'I' : '.',
m_cps & CPS_FZ ? 'F' : '.',
m_cps & CPS_SM ? 'S' : 'U',
m_cps & CPS_DI ? 'I' : '.',
m_cps & CPS_DA ? 'D' : '.',
(m_r[1] >> 2) & 0x7f);
m_alu & ALU_Z ? 'Z' : '.',
m_alu & ALU_N ? 'N' : '.',
m_alu & ALU_C ? 'C' : '.',
m_cps & CPS_IP ? 'I' : '.',
m_cps & CPS_FZ ? 'F' : '.',
m_cps & CPS_SM ? 'S' : 'U',
m_cps & CPS_DI ? 'I' : '.',
m_cps & CPS_DA ? 'D' : '.',
(m_r[1] >> 2) & 0x7f);
break;
}
}
@ -675,4 +675,3 @@ offs_t am29000_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UIN
extern CPU_DISASSEMBLE( am29000 );
return CPU_DISASSEMBLE_NAME(am29000)(this, buffer, pc, oprom, opram, options);
}

3
src/emu/cpu/apexc/apexc.c
View File

@ -825,7 +825,7 @@ void apexc_cpu_device::device_reset()
/* next two lines are just the product of my bold fantasy */
m_cr = 0; /* first instruction executed will be a stop */
m_running = TRUE; /* this causes the CPU to load the instruction at 0/0,
which enables easy booting (just press run on the panel) */
which enables easy booting (just press run on the panel) */
m_a = 0;
m_r = 0;
m_pc = 0;
@ -854,4 +854,3 @@ offs_t apexc_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
extern CPU_DISASSEMBLE( apexc );
return CPU_DISASSEMBLE_NAME(apexc)(this, buffer, pc, oprom, opram, options);
}

2
src/emu/cpu/apexc/apexc.h
View File

@ -73,7 +73,7 @@ protected:
int m_current_word; /* current word position within track (0-31) */
int m_running; /* 1 flag: */
/* running: flag implied by the existence of the stop instruction */
/* running: flag implied by the existence of the stop instruction */
UINT32 m_pc; /* address of next instruction for the disassembler */
address_space *m_program;

17
src/emu/cpu/arm/arm.c
View File

@ -320,7 +320,7 @@ void arm_cpu_device::device_reset()
m_coproRegister[i] = 0;
}
m_pendingIrq = 0;
m_pendingFiq = 0;
m_pendingFiq = 0;
/* start up in SVC mode with interrupts disabled. */
R15 = eARM_MODE_SVC|I_MASK|F_MASK;
@ -549,13 +549,13 @@ void arm_cpu_device::state_string_export(const device_state_entry &entry, astrin
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c %s",
(m_sArmRegister[15] & N_MASK) ? 'N' : '-',
(m_sArmRegister[15] & Z_MASK) ? 'Z' : '-',
(m_sArmRegister[15] & C_MASK) ? 'C' : '-',
(m_sArmRegister[15] & V_MASK) ? 'V' : '-',
(m_sArmRegister[15] & I_MASK) ? 'I' : '-',
(m_sArmRegister[15] & F_MASK) ? 'F' : '-',
s[m_sArmRegister[15] & 3] );
(m_sArmRegister[15] & N_MASK) ? 'N' : '-',
(m_sArmRegister[15] & Z_MASK) ? 'Z' : '-',
(m_sArmRegister[15] & C_MASK) ? 'C' : '-',
(m_sArmRegister[15] & V_MASK) ? 'V' : '-',
(m_sArmRegister[15] & I_MASK) ? 'I' : '-',
(m_sArmRegister[15] & F_MASK) ? 'F' : '-',
s[m_sArmRegister[15] & 3] );
break;
}
}
@ -1470,4 +1470,3 @@ offs_t arm_be_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
extern CPU_DISASSEMBLE( arm_be );
return CPU_DISASSEMBLE_NAME(arm_be)(this, buffer, pc, oprom, opram, options);
}

4
src/emu/cpu/arm/arm.h
View File

@ -95,8 +95,8 @@ protected:
class arm_be_cpu_device : public arm_cpu_device
{
public:
// construction/destruction
arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// construction/destruction
arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);

23
src/emu/cpu/arm7/arm7.c
View File

@ -132,7 +132,7 @@ sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *
}
void arm7_cpu_device::set_cpsr(UINT32 val)
void arm7_cpu_device::set_cpsr(UINT32 val)
{
if (m_archFlags & eARM_ARCHFLAGS_MODE26)
{
@ -558,7 +558,7 @@ void arm7_cpu_device::device_start()
state_add( ARM7_UR14, "UR14", m_r[eR14_UND] ).formatstr("%08X");
state_add( ARM7_USPSR, "UR16", m_r[eSPSR_UND]).formatstr("%08X");
state_add(STATE_GENFLAGS, "GENFLAGS", m_r[eCPSR]).formatstr("%13s").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_r[eCPSR]).formatstr("%13s").noshow();
}
@ -579,15 +579,15 @@ void arm7_cpu_device::state_string_export(const device_state_entry &entry, astri
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c%c%c %s",
(ARM7REG(eCPSR) & N_MASK) ? 'N' : '-',
(ARM7REG(eCPSR) & Z_MASK) ? 'Z' : '-',
(ARM7REG(eCPSR) & C_MASK) ? 'C' : '-',
(ARM7REG(eCPSR) & V_MASK) ? 'V' : '-',
(ARM7REG(eCPSR) & Q_MASK) ? 'Q' : '-',
(ARM7REG(eCPSR) & I_MASK) ? 'I' : '-',
(ARM7REG(eCPSR) & F_MASK) ? 'F' : '-',
(ARM7REG(eCPSR) & T_MASK) ? 'T' : '-',
GetModeText(ARM7REG(eCPSR)) );
(ARM7REG(eCPSR) & N_MASK) ? 'N' : '-',
(ARM7REG(eCPSR) & Z_MASK) ? 'Z' : '-',
(ARM7REG(eCPSR) & C_MASK) ? 'C' : '-',
(ARM7REG(eCPSR) & V_MASK) ? 'V' : '-',
(ARM7REG(eCPSR) & Q_MASK) ? 'Q' : '-',
(ARM7REG(eCPSR) & I_MASK) ? 'I' : '-',
(ARM7REG(eCPSR) & F_MASK) ? 'F' : '-',
(ARM7REG(eCPSR) & T_MASK) ? 'T' : '-',
GetModeText(ARM7REG(eCPSR)) );
break;
}
}
@ -1219,4 +1219,3 @@ UINT8 arm7_cpu_device::arm7_cpu_read8(UINT32 addr)
}
#include "arm7drc.c"

2
src/emu/cpu/arm7/arm7.h
View File

@ -131,7 +131,7 @@ protected:
UINT8 m_archFlags; // architecture flags
//#if ARM7_MMU_ENABLE_HACK
// UINT32 mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
// UINT32 mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
//#endif
UINT32 m_copro_id;

1
src/emu/cpu/arm7/arm7core.c
View File

@ -228,4 +228,3 @@ void arm7_cpu_device::arm7_check_irq_state()
return;
}
}

8
src/emu/cpu/arm7/arm7drc.c
View File

@ -358,8 +358,8 @@ void arm7_cpu_device::code_compile_block(UINT8 mode, offs_t pc)
/* get a description of this sequence */
// TODO FIXME
const opcode_desc *desclist = NULL; //m_impstate.drcfe->describe_code(pc); // TODO
// if (LOG_UML || LOG_NATIVE)
// log_opcode_desc(drcuml, desclist, 0);
// if (LOG_UML || LOG_NATIVE)
// log_opcode_desc(drcuml, desclist, 0);
/* if we get an error back, flush the cache and try again */
bool succeeded = false;
@ -1281,8 +1281,8 @@ void arm7_cpu_device::generate_sequence_instruction(drcuml_block *block, compile
/* add an entry for the log */
// TODO FIXME
// if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
// log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]);
// if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
// log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]);
/* set the PC map variable */
//expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc;

4
src/emu/cpu/arm7/arm7ops.c
View File

@ -22,8 +22,8 @@ INT64 arm7_cpu_device::saturate_qbit_overflow(INT64 res)
void arm7_cpu_device::SwitchMode(UINT32 cpsr_mode_val)
{
UINT32 cspr = m_r[eCPSR] & ~MODE_FLAG;
set_cpsr(cspr | cpsr_mode_val);
UINT32 cspr = m_r[eCPSR] & ~MODE_FLAG;
set_cpsr(cspr | cpsr_mode_val);
}

1
src/emu/cpu/arm7/arm7tdrc.c
View File

@ -1589,4 +1589,3 @@ void arm7_cpu_device::drctg0f_1(drcuml_block *block, compiler_state *compiler, c
UML_OR(block, DRC_REG(14), DRC_REG(14), 1);
UML_MOV(block, DRC_PC, uml::I0);
}

4
src/emu/cpu/ccpu/ccpu.c
View File

@ -142,7 +142,7 @@ void ccpu_cpu_device::state_string_export(const device_state_entry &entry, astri
switch (entry.index())
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c",
string.printf("%c%c%c%c%c%c",
TEST_A0 ? '0' : 'o',
TEST_NC ? 'N' : 'n',
TEST_LT ? 'L' : 'l',
@ -685,5 +685,3 @@ offs_t ccpu_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
extern CPU_DISASSEMBLE( ccpu );
return CPU_DISASSEMBLE_NAME(ccpu)(this, buffer, pc, oprom, opram, options);
}

1
src/emu/cpu/cop400/cop400.c
View File

@ -1270,4 +1270,3 @@ offs_t cop400_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
return CPU_DISASSEMBLE_NAME(cop410)(this, buffer, pc, oprom, opram, options);
}

2
src/emu/cpu/cop400/cop400.h
View File

@ -131,7 +131,7 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config :
( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
}
// device_state_interface overrides

2
src/emu/cpu/cp1610/cp1610.c
View File

@ -3442,5 +3442,3 @@ offs_t cp1610_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
extern CPU_DISASSEMBLE( cp1610 );
return CPU_DISASSEMBLE_NAME(cp1610)(this, buffer, pc, oprom, opram, options);
}

2
src/emu/cpu/cpu.mak
View File

@ -566,7 +566,7 @@ $(CPUOBJ)/sh2/sh2fe.o: $(CPUSRC)/sh2/sh2fe.c \
#-------------------------------------------------
# Hitachi SH4
#@src/emu/cpu/sh4/sh4.h,CPUS += SH4
#@src/emu/cpu/sh4/sh4.h,CPUS += SH4
#-------------------------------------------------
ifneq ($(filter SH4,$(CPUS)),)

200
src/emu/cpu/dsp16/dsp16.c
View File

@ -18,7 +18,7 @@
// * Handle virtual shift addressing using RB & RE (when RE is enabled) (page 2-6)
// * The ALU sign-extends 32-bit operands from y or p to 36 bits and produces a 36-bit output
// * Interrupt lines (page 2-15)
//
//
//**************************************************************************
// DEVICE INTERFACE
@ -176,13 +176,13 @@ void dsp16_device::device_reset()
m_pc = 0x0000;
m_pi = 0x0000;
m_sioc = 0x0000; // (page 5-4)
// SRTA is unaltered by reset
m_pioc = 0x0008;
m_rb = 0x0000;
m_re = 0x0000;
// AUC is not affected by reset
// AUC is not affected by reset
m_ppc = m_pc;
// Hacky cache emulation.
@ -202,8 +202,8 @@ void dsp16_device::device_reset()
const address_space_config *dsp16_device::memory_space_config(address_spacenum spacenum) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config :
(spacenum == AS_DATA) ? &m_data_config :
NULL;
(spacenum == AS_DATA) ? &m_data_config :
NULL;
}
@ -220,101 +220,101 @@ void dsp16_device::state_string_export(const device_state_entry &entry, astring
string.printf("(below)");
break;
case DSP16_AUC:
{
astring alignString;
const UINT8 align = m_auc & 0x03;
switch (align)
{
case 0x00: alignString.printf("xy"); break;
case 0x01: alignString.printf("/4"); break;
case 0x02: alignString.printf("x4"); break;
case 0x03: alignString.printf(",,"); break;
}
string.printf("%c%c%c%c%c%s",
m_auc & 0x40 ? 'Y':'.',
m_auc & 0x20 ? '1':'.',
m_auc & 0x10 ? '0':'.',
m_auc & 0x08 ? '1':'.',
m_auc & 0x04 ? '0':'.',
alignString.cstr());
break;
}
case DSP16_AUC:
{
astring alignString;
const UINT8 align = m_auc & 0x03;
switch (align)
{
case 0x00: alignString.printf("xy"); break;
case 0x01: alignString.printf("/4"); break;
case 0x02: alignString.printf("x4"); break;
case 0x03: alignString.printf(",,"); break;
}
string.printf("%c%c%c%c%c%s",
m_auc & 0x40 ? 'Y':'.',
m_auc & 0x20 ? '1':'.',
m_auc & 0x10 ? '0':'.',
m_auc & 0x08 ? '1':'.',
m_auc & 0x04 ? '0':'.',
alignString.cstr());
break;
}
case DSP16_PSW:
string.printf("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
m_psw & 0x8000 ? 'M':'.',
m_psw & 0x4000 ? 'E':'.',
m_psw & 0x2000 ? 'L':'.',
m_psw & 0x1000 ? 'V':'.',
m_psw & 0x0800 ? ',':',',
m_psw & 0x0400 ? ',':',',
m_psw & 0x0200 ? 'O':'.',
m_psw & 0x0100 ? '1':'.',
m_psw & 0x0080 ? '1':'.',
m_psw & 0x0040 ? '1':'.',
m_psw & 0x0020 ? '1':'.',
m_psw & 0x0010 ? 'O':'.',
m_psw & 0x0008 ? '1':'.',
m_psw & 0x0004 ? '1':'.',
m_psw & 0x0002 ? '1':'.',
m_psw & 0x0001 ? '1':'.');
break;
case DSP16_PSW:
string.printf("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
m_psw & 0x8000 ? 'M':'.',
m_psw & 0x4000 ? 'E':'.',
m_psw & 0x2000 ? 'L':'.',
m_psw & 0x1000 ? 'V':'.',
m_psw & 0x0800 ? ',':',',
m_psw & 0x0400 ? ',':',',
m_psw & 0x0200 ? 'O':'.',
m_psw & 0x0100 ? '1':'.',
m_psw & 0x0080 ? '1':'.',
m_psw & 0x0040 ? '1':'.',
m_psw & 0x0020 ? '1':'.',
m_psw & 0x0010 ? 'O':'.',
m_psw & 0x0008 ? '1':'.',
m_psw & 0x0004 ? '1':'.',
m_psw & 0x0002 ? '1':'.',
m_psw & 0x0001 ? '1':'.');
break;
case DSP16_PIOC:
{
astring strobeString;
const UINT8 strobe = (m_pioc & 0x6000) >> 13;
switch (strobe)
{
case 0x00: strobeString.printf("1T"); break;
case 0x01: strobeString.printf("2T"); break;
case 0x02: strobeString.printf("3T"); break;
case 0x03: strobeString.printf("4T"); break;
}
string.printf("%c%s%c%c%c%c%c%c%c%c%c%c%c%c%c",
m_pioc & 0x8000 ? 'I':'.',
strobeString.cstr(),
m_pioc & 0x1000 ? 'O':'I',
m_pioc & 0x0800 ? 'O':'I',
m_pioc & 0x0400 ? 'S':'.',
m_pioc & 0x0200 ? 'I':'.',
m_pioc & 0x0100 ? 'O':'.',
m_pioc & 0x0080 ? 'P':'.',
m_pioc & 0x0040 ? 'P':'.',
m_pioc & 0x0020 ? 'I':'.',
m_pioc & 0x0010 ? 'I':'.',
m_pioc & 0x0008 ? 'O':'.',
m_pioc & 0x0004 ? 'P':'.',
m_pioc & 0x0002 ? 'P':'.',
m_pioc & 0x0001 ? 'I':'.');
break;
}
case DSP16_PIOC:
{
astring strobeString;
const UINT8 strobe = (m_pioc & 0x6000) >> 13;
switch (strobe)
{
case 0x00: strobeString.printf("1T"); break;
case 0x01: strobeString.printf("2T"); break;
case 0x02: strobeString.printf("3T"); break;
case 0x03: strobeString.printf("4T"); break;
}
string.printf("%c%s%c%c%c%c%c%c%c%c%c%c%c%c%c",
m_pioc & 0x8000 ? 'I':'.',
strobeString.cstr(),
m_pioc & 0x1000 ? 'O':'I',
m_pioc & 0x0800 ? 'O':'I',
m_pioc & 0x0400 ? 'S':'.',
m_pioc & 0x0200 ? 'I':'.',
m_pioc & 0x0100 ? 'O':'.',
m_pioc & 0x0080 ? 'P':'.',
m_pioc & 0x0040 ? 'P':'.',
m_pioc & 0x0020 ? 'I':'.',
m_pioc & 0x0010 ? 'I':'.',
m_pioc & 0x0008 ? 'O':'.',
m_pioc & 0x0004 ? 'P':'.',
m_pioc & 0x0002 ? 'P':'.',
m_pioc & 0x0001 ? 'I':'.');
break;
}
// Placeholder for a better view later (TODO)
case DSP16_SIOC:
{
astring clkString;
const UINT8 clk = (m_sioc & 0x0180) >> 7;
switch (clk)
{
case 0x00: clkString.printf("/4"); break;
case 0x01: clkString.printf("12"); break;
case 0x02: clkString.printf("16"); break;
case 0x03: clkString.printf("20"); break;
}
string.printf("%c%s%c%c%c%c%c%c%c",
m_sioc & 0x0200 ? 'I':'O',
clkString.cstr(),
m_sioc & 0x0040 ? 'L':'M',
m_sioc & 0x0020 ? 'I':'O',
m_sioc & 0x0010 ? 'I':'O',
m_sioc & 0x0008 ? 'I':'O',
m_sioc & 0x0004 ? 'I':'O',
m_sioc & 0x0002 ? '2':'1',
m_sioc & 0x0001 ? '2':'1');
break;
}
{
astring clkString;
const UINT8 clk = (m_sioc & 0x0180) >> 7;
switch (clk)
{
case 0x00: clkString.printf("/4"); break;
case 0x01: clkString.printf("12"); break;
case 0x02: clkString.printf("16"); break;
case 0x03: clkString.printf("20"); break;
}
string.printf("%c%s%c%c%c%c%c%c%c",
m_sioc & 0x0200 ? 'I':'O',
clkString.cstr(),
m_sioc & 0x0040 ? 'L':'M',
m_sioc & 0x0020 ? 'I':'O',
m_sioc & 0x0010 ? 'I':'O',
m_sioc & 0x0008 ? 'I':'O',
m_sioc & 0x0004 ? 'I':'O',
m_sioc & 0x0002 ? '2':'1',
m_sioc & 0x0001 ? '2':'1');
break;
}
}
}
@ -441,9 +441,9 @@ void dsp16_device::execute_run()
m_pc += pcAdvance;
m_icount -= cycles;
// The 16 bit PI "shadow" register gets set to PC on each instruction except
// when an interrupt service routine is active (TODO: Interrupt check) (page 2-4)
m_pi = m_pc;
// The 16 bit PI "shadow" register gets set to PC on each instruction except
// when an interrupt service routine is active (TODO: Interrupt check) (page 2-4)
m_pi = m_pc;
} while (m_icount > 0);
}

16
src/emu/cpu/dsp16/dsp16.h
View File

@ -60,7 +60,7 @@ protected:
UINT16 m_pt;
UINT16 m_pr;
UINT16 m_pi;
// RAM Address Arithmetic Unit (YAAU) (page 2-6)
UINT16 m_j; // Signed
UINT16 m_k; // Signed
@ -70,8 +70,8 @@ protected:
UINT16 m_r1;
UINT16 m_r2;
UINT16 m_r3;
// Data Arithmetic Unit (DAU) (page 2-6)
// Data Arithmetic Unit (DAU) (page 2-6)
UINT16 m_x;
UINT32 m_y;
UINT32 m_p;
@ -82,8 +82,8 @@ protected:
UINT8 m_c0;
UINT8 m_c1;
UINT8 m_c2;
// Serial and parallel interfaces (TODO: More here (page 2-13))
// Serial and parallel interfaces (TODO: More here (page 2-13))
UINT16 m_sioc;
UINT16 m_srta;
UINT16 m_sdx;
@ -133,12 +133,12 @@ protected:
void* addressYL();
void writeRegister(void* reg, const UINT16& value);
bool conditionTest(const UINT8& CON);
// flags
bool lmi();
bool leq();
bool llv();
bool lmv();
bool llv();
bool lmv();
};

78
src/emu/cpu/dsp16/dsp16ops.c
View File

@ -4,19 +4,19 @@
// TODO:
// * AUC has a CLR field for writing to A0 & A1 + sign extension + psw + zero lower bits
// implement as a clean function (page 2-7)
// implement as a clean function (page 2-7)
// * Implement saturation overflow (SAT on AUC) (page 2-8)
// * Implement p alignment (ALIGN on AUC) (page 2-9)
// * When a register is used as a memory pointer. its value is compared with re. If its value is
// equal to the contents of re and the postincrement is +1, then the value in rb is copied into
// * When a register is used as a memory pointer. its value is compared with re. If its value is
// equal to the contents of re and the postincrement is +1, then the value in rb is copied into
// the register after the memory access is complete. See Section 4.2.3.
// * CPU flags go to the PSW & conditionTest() works on that (Page 3-4)
// * Some instructions are not interruptible.
//
//
// NOTES:
// When y is used in an assembly-language instruction, the DSPI6/DSPI6A device will read
// When y is used in an assembly-language instruction, the DSPI6/DSPI6A device will read
// or write the high half (bits 16-31) of the y register (page 2-7)
// The YL register is the lower half of the 32 bit Y register
@ -34,17 +34,17 @@ bool dsp16_device::lmi()
bool dsp16_device::leq()
{
return m_psw & 0x4000;
return m_psw & 0x4000;
}
bool dsp16_device::llv()
{
return m_psw & 0x2000;
return m_psw & 0x2000;
}
bool dsp16_device::lmv()
{
return m_psw & 0x1000;
return m_psw & 0x1000;
}
@ -78,7 +78,7 @@ void dsp16_device::writeRegister(void* reg, const UINT16 &value)
}
else if (reg == &m_y)
{
// Y register
// Y register
// TODO - Automatic clearing of yl may be selected (according to the CLR field of the auc register) (page 2-7)
m_y = (value << 16) | (m_y & 0x0000ffff);
}
@ -119,9 +119,9 @@ bool dsp16_device::conditionTest(const UINT8& CON)
case 0x11: return (lmi() || leq()); // le (result <= 0)
default: logerror("Unrecognized condition at PC=0x%04x\n", m_pc); break;
}
// Testing each of these conditions (*) increments the respective counter being tested (page 3-5)
return false;
}
@ -187,7 +187,7 @@ void* dsp16_device::registerFromRTable(const UINT8 &R)
void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S)
{
// TODO: I'm pretty sure we need to feed X into these as well - Double check
// Note these instructions read right-to-left, so act accordingly (page 3-6)
// y & p are sign extended (page 3-9)
// implementation details (page 3-9)
@ -223,7 +223,7 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x01:
case 0x01:
{
// Ad = aS+p p = x*y
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
@ -238,112 +238,112 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
justATest = true;
break;
}
case 0x03:
case 0x03:
{
// Ad = aS-p p = x*y
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x04:
case 0x04:
{
// Ad = p
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x05:
case 0x05:
{
// Ad = aS+p
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x06:
case 0x06:
{
// nop
justATest = true;
break;
}
case 0x07:
case 0x07:
{
// Ad = aS-p
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x08:
case 0x08:
{
// Ad = aS|y
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x09:
case 0x09:
{
// Ad = aS^y
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x0a:
case 0x0a:
{
// aS&y
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
justATest = true;
break;
}
case 0x0b:
case 0x0b:
{
// aS-y
INT64 aS = *sourceReg;
if (aS & U64(0x800000000))
aS |= U64(0xfffffff000000000);
INT64 y = (m_y & 0xffff0000) >> 16;
if (y & 0x8000)
y |= U64(0xffffffffffff0000);
result = aS-y;
justATest = true;
break;
}
case 0x0c:
case 0x0c:
{
// Ad = y
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x0d:
case 0x0d:
{
// Ad = aS+y
INT64 aS = *sourceReg;
if (aS & U64(0x800000000))
if (aS & U64(0x800000000))
aS |= U64(0xfffffff000000000);
INT64 y = (m_y & 0xffff0000) >> 16;
if (y & 0x8000)
if (y & 0x8000)
y |= U64(0xffffffffffff0000);
result = aS+y;
break;
}
case 0x0e:
case 0x0e:
{
// Ad = aS&y
printf("UNIMPLEMENTED F1 operation @ PC 0x%04x (%d)\n", m_pc, __LINE__);
break;
}
case 0x0f:
case 0x0f:
{
// Ad = aS-y
INT64 aS = *sourceReg;
if (aS & U64(0x800000000))
aS |= U64(0xfffffff000000000);
INT64 y = (m_y & 0xffff0000) >> 16;
if (y & 0x8000)
if (y & 0x8000)
y |= U64(0xffffffffffff0000);
result = aS-y;
break;
}
}
// CPU Flags (page 3-4)
// LMI (logical minus)
if (result & U64(0x800000000))
@ -359,7 +359,7 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
// LLV (logical overflow)
// TODO
// LMV (mathematical overflow)
if ((result | U64(0xf00000000)) != U64(0xf00000000) &&
(result | U64(0xf00000000)) != U64(0x000000000))
@ -369,7 +369,7 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
// If it was a real operation, make sure the data goes where it should
if (!justATest)
*destinationReg = (UINT64)result & U64(0x0000000fffffffff);
*destinationReg = (UINT64)result & U64(0x0000000fffffffff);
}
@ -570,7 +570,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
case 0x14:
{
DSP_LINE("3-53")
// F1, Y = y[l] : (page 3-53)
// F1, Y = y[l] : (page 3-53)
const UINT8 Y = (op & 0x000f);
const UINT8 X = (op & 0x0010) >> 4;
const UINT8 S = (op & 0x0200) >> 9;

14
src/emu/cpu/es5510/es5510.c
View File

@ -559,7 +559,7 @@ void es5510_device::execute_set_input(int linenum, int state) {
void es5510_device::list_program(void(p)(const char *, ...)) {
LOG(("ES5501: Starting!\n"));
UINT8 addr;
char buf[1024];
for (addr = 0; addr < 0xa0; addr++) {
@ -802,14 +802,14 @@ void es5510_device::run_once()
{
// turn HALT off
set_HALT(false);
// run for one instruction
// run for one instruction
icount = 1;
execute_run();
// turn HALT on again
// turn HALT on again
set_HALT(true);
// run ESP to the end of its program, a few instructions at a time
while (state != STATE_HALTED) {
icount = 1;
@ -898,7 +898,7 @@ void es5510_device::write_to_dol(INT32 value) {
}
void es5510_device::alu_operation_end() {
// Handle the END instruction separately
// Handle the END instruction separately
LOG(("ES5510: END\n"));
// sample the HALT line
if (halt_asserted) {

2
src/emu/cpu/es5510/es5510.h
View File

@ -104,7 +104,7 @@ public:
ram_cycle_t cycle; // cycle type
};
// direct access to the 'HALT' pin - not just through the
// direct access to the 'HALT' pin - not just through the
void set_HALT(bool halt) { halt_asserted = halt; }
bool get_HALT() { return halt_asserted; }

3
src/emu/cpu/hcd62121/hcd62121.c
View File

@ -287,7 +287,7 @@ int hcd62121_cpu_device::check_cond( UINT8 op )
void hcd62121_cpu_device::device_start()
{
// m_irq_callback = irqcallback;
// m_irq_callback = irqcallback;
m_program = &space(AS_PROGRAM);
m_io = &space(AS_IO);
@ -519,4 +519,3 @@ offs_t hcd62121_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UI
extern CPU_DISASSEMBLE( hcd62121 );
return CPU_DISASSEMBLE_NAME(hcd62121)(this, buffer, pc, oprom, opram, options);
}

78
src/emu/cpu/i386/i386ops.h
View File

@ -321,26 +321,26 @@ static const X86_OPCODE x86_opcode_table[] =
{ 0x2c, OP_2BYTE|OP_SSE, SSEOP(cvttps2pi_r64_r128m64), SSEOP(cvttps2pi_r64_r128m64),},
{ 0x2d, OP_2BYTE|OP_SSE, SSEOP(cvtps2pi_r64_r128m64), SSEOP(cvtps2pi_r64_r128m64),},
{ 0x2e, OP_2BYTE|OP_SSE, SSEOP(ucomiss_r128_r128m32), SSEOP(ucomiss_r128_r128m32),},
{ 0x2f, OP_2BYTE|OP_SSE, SSEOP(comiss_r128_r128m32), SSEOP(comiss_r128_r128m32), },
{ 0x2f, OP_2BYTE|OP_SSE, SSEOP(comiss_r128_r128m32), SSEOP(comiss_r128_r128m32), },
{ 0x30, OP_2BYTE|OP_PENTIUM, PENTIUMOP(wrmsr), PENTIUMOP(wrmsr), },
{ 0x31, OP_2BYTE|OP_PENTIUM, PENTIUMOP(rdtsc), PENTIUMOP(rdtsc), },
{ 0x32, OP_2BYTE|OP_PENTIUM, PENTIUMOP(rdmsr), PENTIUMOP(rdmsr), },
{ 0x40, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovo_r16_rm16), PENTIUMOP(cmovo_r32_rm32), },
{ 0x41, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovno_r16_rm16), PENTIUMOP(cmovno_r32_rm32), },
{ 0x42, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovb_r16_rm16), PENTIUMOP(cmovb_r32_rm32), },
{ 0x43, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovae_r16_rm16), PENTIUMOP(cmovae_r32_rm32), },
{ 0x44, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmove_r16_rm16), PENTIUMOP(cmove_r32_rm32), },
{ 0x45, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovne_r16_rm16), PENTIUMOP(cmovne_r32_rm32), },
{ 0x46, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovbe_r16_rm16), PENTIUMOP(cmovbe_r32_rm32), },
{ 0x47, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmova_r16_rm16), PENTIUMOP(cmova_r32_rm32), },
{ 0x48, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovs_r16_rm16), PENTIUMOP(cmovs_r32_rm32), },
{ 0x49, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovns_r16_rm16), PENTIUMOP(cmovns_r32_rm32), },
{ 0x4a, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovp_r16_rm16), PENTIUMOP(cmovp_r32_rm32), },
{ 0x4b, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovnp_r16_rm16), PENTIUMOP(cmovnp_r32_rm32), },
{ 0x4c, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovl_r16_rm16), PENTIUMOP(cmovl_r32_rm32), },
{ 0x4d, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovge_r16_rm16), PENTIUMOP(cmovge_r32_rm32), },
{ 0x4e, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovle_r16_rm16), PENTIUMOP(cmovle_r32_rm32), },
{ 0x4f, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovg_r16_rm16), PENTIUMOP(cmovg_r32_rm32), },
{ 0x40, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovo_r16_rm16), PENTIUMOP(cmovo_r32_rm32), },
{ 0x41, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovno_r16_rm16), PENTIUMOP(cmovno_r32_rm32), },
{ 0x42, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovb_r16_rm16), PENTIUMOP(cmovb_r32_rm32), },
{ 0x43, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovae_r16_rm16), PENTIUMOP(cmovae_r32_rm32), },
{ 0x44, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmove_r16_rm16), PENTIUMOP(cmove_r32_rm32), },
{ 0x45, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovne_r16_rm16), PENTIUMOP(cmovne_r32_rm32), },
{ 0x46, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovbe_r16_rm16), PENTIUMOP(cmovbe_r32_rm32), },
{ 0x47, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmova_r16_rm16), PENTIUMOP(cmova_r32_rm32), },
{ 0x48, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovs_r16_rm16), PENTIUMOP(cmovs_r32_rm32), },
{ 0x49, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovns_r16_rm16), PENTIUMOP(cmovns_r32_rm32), },
{ 0x4a, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovp_r16_rm16), PENTIUMOP(cmovp_r32_rm32), },
{ 0x4b, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovnp_r16_rm16), PENTIUMOP(cmovnp_r32_rm32), },
{ 0x4c, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovl_r16_rm16), PENTIUMOP(cmovl_r32_rm32), },
{ 0x4d, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovge_r16_rm16), PENTIUMOP(cmovge_r32_rm32), },
{ 0x4e, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovle_r16_rm16), PENTIUMOP(cmovle_r32_rm32), },
{ 0x4f, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmovg_r16_rm16), PENTIUMOP(cmovg_r32_rm32), },
{ 0x50, OP_2BYTE|OP_SSE, SSEOP(movmskps_r16_r128), SSEOP(movmskps_r32_r128), },
{ 0x51, OP_2BYTE|OP_SSE, SSEOP(sqrtps_r128_rm128), SSEOP(sqrtps_r128_rm128), },
{ 0x52, OP_2BYTE|OP_SSE, SSEOP(rsqrtps_r128_rm128), SSEOP(rsqrtps_r128_rm128), },
@ -363,8 +363,8 @@ static const X86_OPCODE x86_opcode_table[] =
{ 0x63, OP_2BYTE|OP_MMX, MMXOP(packsswb_r64_rm64), MMXOP(packsswb_r64_rm64), },
{ 0x64, OP_2BYTE|OP_MMX, MMXOP(pcmpgtb_r64_rm64), MMXOP(pcmpgtb_r64_rm64), },
{ 0x65, OP_2BYTE|OP_MMX, MMXOP(pcmpgtw_r64_rm64), MMXOP(pcmpgtw_r64_rm64), },
{ 0x66, OP_2BYTE|OP_MMX, MMXOP(pcmpgtd_r64_rm64), MMXOP(pcmpgtd_r64_rm64), },
{ 0x67, OP_2BYTE|OP_MMX, MMXOP(packuswb_r64_rm64), MMXOP(packuswb_r64_rm64), },
{ 0x66, OP_2BYTE|OP_MMX, MMXOP(pcmpgtd_r64_rm64), MMXOP(pcmpgtd_r64_rm64), },
{ 0x67, OP_2BYTE|OP_MMX, MMXOP(packuswb_r64_rm64), MMXOP(packuswb_r64_rm64), },
{ 0x68, OP_2BYTE|OP_MMX, MMXOP(punpckhbw_r64_rm64), MMXOP(punpckhbw_r64_rm64), },
{ 0x69, OP_2BYTE|OP_MMX, MMXOP(punpckhwd_r64_rm64), MMXOP(punpckhwd_r64_rm64), },
{ 0x6a, OP_2BYTE|OP_MMX, MMXOP(punpckhdq_r64_rm64), MMXOP(punpckhdq_r64_rm64), },
@ -444,8 +444,8 @@ static const X86_OPCODE x86_opcode_table[] =
{ 0xBF, OP_2BYTE|OP_I386, I386OP(invalid), I386OP(movsx_r32_rm16), },
{ 0xC0, OP_2BYTE|OP_I486, I486OP(xadd_rm8_r8), I486OP(xadd_rm8_r8), },
{ 0xC1, OP_2BYTE|OP_I486, I486OP(xadd_rm16_r16), I486OP(xadd_rm32_r32), },
{ 0xC2, OP_2BYTE|OP_SSE, SSEOP(cmpps_r128_rm128_i8), SSEOP(cmpps_r128_rm128_i8), },
{ 0xC3, OP_2BYTE|OP_PENTIUM, PENTIUMOP(movnti_m16_r16), PENTIUMOP(movnti_m32_r32), },
{ 0xC2, OP_2BYTE|OP_SSE, SSEOP(cmpps_r128_rm128_i8), SSEOP(cmpps_r128_rm128_i8), },
{ 0xC3, OP_2BYTE|OP_PENTIUM, PENTIUMOP(movnti_m16_r16), PENTIUMOP(movnti_m32_r32), },
{ 0xC4, OP_2BYTE|OP_SSE, SSEOP(pinsrw_r64_r16m16_i8), SSEOP(pinsrw_r64_r32m16_i8),},
{ 0xC5, OP_2BYTE|OP_SSE, SSEOP(pextrw_r16_r64_i8), SSEOP(pextrw_r32_r64_i8), },
{ 0xC6, OP_2BYTE|OP_SSE, SSEOP(shufps), SSEOP(shufps), },
@ -502,30 +502,30 @@ static const X86_OPCODE x86_opcode_table[] =
{ 0xFD, OP_2BYTE|OP_MMX, MMXOP(paddw_r64_rm64), MMXOP(paddw_r64_rm64), },
{ 0xFE, OP_2BYTE|OP_MMX, MMXOP(paddd_r64_rm64), MMXOP(paddd_r64_rm64), },
/* F3 0F ?? */
{ 0x10, OP_3BYTEF3|OP_SSE, SSEOP(movss_r128_rm128), SSEOP(movss_r128_rm128), },
{ 0x11, OP_3BYTEF3|OP_SSE, SSEOP(movss_rm128_r128), SSEOP(movss_rm128_r128), },
{ 0x12, OP_3BYTEF3|OP_SSE, SSEOP(movsldup_r128_rm128), SSEOP(movsldup_r128_rm128), },
{ 0x16, OP_3BYTEF3|OP_SSE, SSEOP(movshdup_r128_rm128), SSEOP(movshdup_r128_rm128), },
{ 0x10, OP_3BYTEF3|OP_SSE, SSEOP(movss_r128_rm128), SSEOP(movss_r128_rm128), },
{ 0x11, OP_3BYTEF3|OP_SSE, SSEOP(movss_rm128_r128), SSEOP(movss_rm128_r128), },
{ 0x12, OP_3BYTEF3|OP_SSE, SSEOP(movsldup_r128_rm128), SSEOP(movsldup_r128_rm128), },
{ 0x16, OP_3BYTEF3|OP_SSE, SSEOP(movshdup_r128_rm128), SSEOP(movshdup_r128_rm128), },
{ 0x2A, OP_3BYTEF3|OP_SSE, SSEOP(cvtsi2ss_r128_rm32), SSEOP(cvtsi2ss_r128_rm32), },
{ 0x2C, OP_3BYTEF3|OP_SSE, SSEOP(cvttss2si_r32_r128m32), SSEOP(cvttss2si_r32_r128m32),},
{ 0x2D, OP_3BYTEF3|OP_SSE, SSEOP(cvtss2si_r32_r128m32), SSEOP(cvtss2si_r32_r128m32),},
{ 0x51, OP_3BYTEF3|OP_SSE, SSEOP(sqrtss_r128_r128m32), SSEOP(sqrtss_r128_r128m32), },
{ 0x52, OP_3BYTEF3|OP_SSE, SSEOP(rsqrtss_r128_r128m32), SSEOP(rsqrtss_r128_r128m32),},
{ 0x2D, OP_3BYTEF3|OP_SSE, SSEOP(cvtss2si_r32_r128m32), SSEOP(cvtss2si_r32_r128m32),},
{ 0x51, OP_3BYTEF3|OP_SSE, SSEOP(sqrtss_r128_r128m32), SSEOP(sqrtss_r128_r128m32), },
{ 0x52, OP_3BYTEF3|OP_SSE, SSEOP(rsqrtss_r128_r128m32), SSEOP(rsqrtss_r128_r128m32),},
{ 0x53, OP_3BYTEF3|OP_SSE, SSEOP(rcpss_r128_r128m32), SSEOP(rcpss_r128_r128m32), },
{ 0x58, OP_3BYTEF3|OP_SSE, SSEOP(addss), SSEOP(addss), },
{ 0x59, OP_3BYTEF3|OP_SSE, SSEOP(mulss), SSEOP(mulss), },
{ 0x5A, OP_3BYTEF3|OP_SSE, SSEOP(cvtss2sd_r128_r128m32), SSEOP(cvtss2sd_r128_r128m32),},
{ 0x5B, OP_3BYTEF3|OP_SSE, SSEOP(cvttps2dq_r128_rm128), SSEOP(cvttps2dq_r128_rm128),},
{ 0x5A, OP_3BYTEF3|OP_SSE, SSEOP(cvtss2sd_r128_r128m32), SSEOP(cvtss2sd_r128_r128m32),},
{ 0x5B, OP_3BYTEF3|OP_SSE, SSEOP(cvttps2dq_r128_rm128), SSEOP(cvttps2dq_r128_rm128),},
{ 0x5C, OP_3BYTEF3|OP_SSE, SSEOP(subss), SSEOP(subss), },
{ 0x5D, OP_3BYTEF3|OP_SSE, SSEOP(minss_r128_r128m32), SSEOP(minss_r128_r128m32), },
{ 0x5E, OP_3BYTEF3|OP_SSE, SSEOP(divss), SSEOP(divss), },
{ 0x5F, OP_3BYTEF3|OP_SSE, SSEOP(maxss_r128_r128m32), SSEOP(maxss_r128_r128m32), },
{ 0x6F, OP_3BYTEF3|OP_SSE, SSEOP(movdqu_r128_rm128), SSEOP(movdqu_r128_rm128), },
{ 0x70, OP_3BYTEF3|OP_SSE, SSEOP(pshufhw_r128_rm128_i8), SSEOP(pshufhw_r128_rm128_i8),},
{ 0x7E, OP_3BYTEF3|OP_SSE, SSEOP(movq_r128_r128m64), SSEOP(movq_r128_r128m64), },
{ 0x7F, OP_3BYTEF3|OP_SSE, SSEOP(movdqu_rm128_r128), SSEOP(movdqu_rm128_r128), },
{ 0xB8, OP_3BYTEF3|OP_PENTIUM, PENTIUMOP(popcnt_r16_rm16), PENTIUMOP(popcnt_r32_rm32), },
{ 0xC2, OP_3BYTEF3|OP_SSE, SSEOP(cmpss_r128_r128m32_i8), SSEOP(cmpss_r128_r128m32_i8),},
{ 0xD6, OP_3BYTEF3|OP_SSE, SSEOP(movq2dq_r128_r64), SSEOP(movq2dq_r128_r64), },
{ 0xE6, OP_3BYTEF3|OP_SSE, SSEOP(cvtdq2pd_r128_r128m64), SSEOP(cvtdq2pd_r128_r128m64)}
{ 0x5F, OP_3BYTEF3|OP_SSE, SSEOP(maxss_r128_r128m32), SSEOP(maxss_r128_r128m32), },
{ 0x6F, OP_3BYTEF3|OP_SSE, SSEOP(movdqu_r128_rm128), SSEOP(movdqu_r128_rm128), },
{ 0x70, OP_3BYTEF3|OP_SSE, SSEOP(pshufhw_r128_rm128_i8), SSEOP(pshufhw_r128_rm128_i8),},
{ 0x7E, OP_3BYTEF3|OP_SSE, SSEOP(movq_r128_r128m64), SSEOP(movq_r128_r128m64), },
{ 0x7F, OP_3BYTEF3|OP_SSE, SSEOP(movdqu_rm128_r128), SSEOP(movdqu_rm128_r128), },
{ 0xB8, OP_3BYTEF3|OP_PENTIUM, PENTIUMOP(popcnt_r16_rm16), PENTIUMOP(popcnt_r32_rm32), },
{ 0xC2, OP_3BYTEF3|OP_SSE, SSEOP(cmpss_r128_r128m32_i8), SSEOP(cmpss_r128_r128m32_i8),},
{ 0xD6, OP_3BYTEF3|OP_SSE, SSEOP(movq2dq_r128_r64), SSEOP(movq2dq_r128_r64), },
{ 0xE6, OP_3BYTEF3|OP_SSE, SSEOP(cvtdq2pd_r128_r128m64), SSEOP(cvtdq2pd_r128_r128m64)}
};

20
src/emu/cpu/i386/pentops.c
View File

@ -1467,17 +1467,17 @@ static void MMXOP(pmaddwd_r64_rm64)(i386_state *cpustate) // Opcode 0f f5
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0]=(INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)MMX(modrm & 7).s[0]+
(INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)MMX(modrm & 7).s[1];
(INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)MMX(modrm & 7).s[1];
MMX((modrm >> 3) & 0x7).i[1]=(INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)MMX(modrm & 7).s[2]+
(INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)MMX(modrm & 7).s[3];
(INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)MMX(modrm & 7).s[3];
} else {
MMX_REG s;
UINT32 ea = GetEA(cpustate, modrm, 0);
READMMX(cpustate, ea, s);
MMX((modrm >> 3) & 0x7).i[0]=(INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)s.s[0]+
(INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)s.s[1];
(INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)s.s[1];
MMX((modrm >> 3) & 0x7).i[1]=(INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)s.s[2]+
(INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)s.s[3];
(INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)s.s[3];
}
CYCLES(cpustate,1); // TODO: correct cycle count
}
@ -2772,11 +2772,11 @@ static void SSEOP(subps)(i386_state *cpustate) // Opcode 0f 5c
INLINE float sse_min_single(float src1, float src2)
{
/*if ((src1 == 0) && (src2 == 0))
return src2;
return src2;
if (src1 = SNaN)
return src2;
return src2;
if (src2 = SNaN)
return src2;*/
return src2;*/
if (src1 < src2)
return src1;
return src2;
@ -2825,11 +2825,11 @@ static void SSEOP(divps)(i386_state *cpustate) // Opcode 0f 5e
INLINE float sse_max_single(float src1, float src2)
{
/*if ((src1 == 0) && (src2 == 0))
return src2;
return src2;
if (src1 = SNaN)
return src2;
return src2;
if (src2 = SNaN)
return src2;*/
return src2;*/
if (src1 > src2)
return src1;
return src2;

6
src/emu/cpu/i4004/i4004.c
View File

@ -501,8 +501,8 @@ void i4004_cpu_device::state_export(const device_state_entry &entry)
{
case STATE_GENFLAGS:
m_flags = ((m_A == 0) ? 0x04 : 0x00) |
(m_C ? 0x02 : 0x00) |
(m_TEST ? 0x01 : 0x00);
(m_C ? 0x02 : 0x00) |
(m_TEST ? 0x01 : 0x00);
break;
}
}
@ -526,4 +526,4 @@ offs_t i4004_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
return CPU_DISASSEMBLE_NAME(i4004)(this, buffer, pc, oprom, opram, options);
}
// case CPUINFO_IS_OCTAL: info->i = true; break;
// case CPUINFO_IS_OCTAL: info->i = true; break;

4
src/emu/cpu/lr35902/lr35902.h
View File

@ -77,7 +77,7 @@ protected:
protected:
address_space_config m_program_config;
UINT8 m_A;
UINT8 m_F;
UINT8 m_B;
@ -110,7 +110,7 @@ protected:
UINT8 m_features;
const UINT16 *c_regs;
const struct lr35902_config *m_config;
/* Flag bit definitions */
static const UINT8 LR35902_FLAG_Z = 0x80;
static const UINT8 LR35902_FLAG_N = 0x40;

18
src/emu/cpu/m68000/m68000.h
View File

@ -182,7 +182,7 @@ public:
UINT32 cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
// UINT32 dasm_type; /* disassembly type */
// UINT32 dasm_type; /* disassembly type */
UINT32 dar[16]; /* Data and Address Registers */
UINT32 ppc; /* Previous program counter */
UINT32 pc; /* Program Counter */
@ -272,8 +272,8 @@ public:
typedef delegate<void (offs_t, UINT16)> m68k_write16_delegate;
typedef delegate<void (offs_t, UINT32)> m68k_write32_delegate;
// class m68k_memory_interface
// {
// class m68k_memory_interface
// {
public:
void init8(address_space &space);
void init16(address_space &space);
@ -312,15 +312,15 @@ public:
UINT32 readlong_d32_hmmu(offs_t address);
void writelong_d32_hmmu(offs_t address, UINT32 data);
// m68000_base_device *m_cpustate;
// };
// m68000_base_device *m_cpustate;
// };
public:
// m68k_memory_interface memory;
// m68k_memory_interface memory;
address_space *m_space;
direct_read_data *m_direct;
offs_t encrypted_start;
offs_t encrypted_end;
@ -390,7 +390,7 @@ public:
void reset_cpu(void);
inline void cpu_execute(void);
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry);
virtual void state_export(const device_state_entry &entry);
@ -720,7 +720,7 @@ class fscpu32_device : public m68000_base_device
public:
// construction/destruction
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);

149
src/emu/cpu/m68000/m68kcpu.c
View File

@ -774,7 +774,7 @@ inline void m68000_base_device::cpu_execute(void)
m_address_error = 0;
try {
m68ki_exception_address_error(this);
}
}
catch(int error)
{
if (error==10)
@ -1199,7 +1199,7 @@ void m68000_base_device::init8(address_space &space)
{
m_space = &space;
m_direct = &space.direct();
// m_cpustate = this;
// m_cpustate = this;
opcode_xor = 0;
readimm16 = m68k_readimm16_delegate(FUNC(m68000_base_device::m68008_read_immediate_16), this);
@ -1698,8 +1698,8 @@ void m68000_base_device::init_cpu_m68000(void)
init_cpu_common();
cpu_type = CPU_TYPE_000;
// dasm_type = M68K_CPU_TYPE_68000;
// dasm_type = M68K_CPU_TYPE_68000;
init16(*program);
sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[0];
@ -1725,12 +1725,11 @@ void m68000_base_device::init_cpu_m68000(void)
void m68000_base_device::init_cpu_m68008(void)
{
init_cpu_common();
cpu_type = CPU_TYPE_008;
// dasm_type = M68K_CPU_TYPE_68008;
// dasm_type = M68K_CPU_TYPE_68008;
init8(*program);
sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[0];
@ -1755,11 +1754,10 @@ void m68000_base_device::init_cpu_m68008(void)
void m68000_base_device::init_cpu_m68010(void)
{
init_cpu_common();
cpu_type = CPU_TYPE_010;
// dasm_type = M68K_CPU_TYPE_68010;
// dasm_type = M68K_CPU_TYPE_68010;
init16(*program);
sr_mask = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[1];
@ -1785,8 +1783,8 @@ void m68000_base_device::init_cpu_m68020(void)
{
init_cpu_common();
cpu_type = CPU_TYPE_020;
// dasm_type = M68K_CPU_TYPE_68020;
// dasm_type = M68K_CPU_TYPE_68020;
init32(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[2];
@ -1813,7 +1811,7 @@ void m68000_base_device::init_cpu_m68020pmmu(void)
has_pmmu = 1;
has_fpu = 1;
init32mmu(*program);
}
@ -1826,7 +1824,7 @@ void m68000_base_device::init_cpu_m68020hmmu(void)
has_hmmu = 1;
has_fpu = 1;
init32hmmu(*program);
}
@ -1835,9 +1833,9 @@ void m68000_base_device::init_cpu_m68ec020(void)
init_cpu_common();
cpu_type = CPU_TYPE_EC020;
// dasm_type = M68K_CPU_TYPE_68EC020;
// dasm_type = M68K_CPU_TYPE_68EC020;
init32(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[2];
@ -1864,9 +1862,9 @@ void m68000_base_device::init_cpu_m68030(void)
init_cpu_common();
cpu_type = CPU_TYPE_030;
// dasm_type = M68K_CPU_TYPE_68030;
// dasm_type = M68K_CPU_TYPE_68030;
init32mmu(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[3];
@ -1892,11 +1890,11 @@ void m68000_base_device::init_cpu_m68030(void)
void m68000_base_device::init_cpu_m68ec030(void)
{
init_cpu_common();
cpu_type = CPU_TYPE_EC030;
// dasm_type = M68K_CPU_TYPE_68EC030;
cpu_type = CPU_TYPE_EC030;
// dasm_type = M68K_CPU_TYPE_68EC030;
init32(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[3];
@ -1924,9 +1922,9 @@ void m68000_base_device::init_cpu_m68040(void)
init_cpu_common();
cpu_type = CPU_TYPE_040;
// dasm_type = M68K_CPU_TYPE_68040;
// dasm_type = M68K_CPU_TYPE_68040;
init32mmu(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[4];
@ -1953,9 +1951,9 @@ void m68000_base_device::init_cpu_m68ec040(void)
init_cpu_common();
cpu_type = CPU_TYPE_EC040;
// dasm_type = M68K_CPU_TYPE_68EC040;
// dasm_type = M68K_CPU_TYPE_68EC040;
init32(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[4];
@ -1982,9 +1980,9 @@ void m68000_base_device::init_cpu_m68lc040(void)
init_cpu_common();
cpu_type = CPU_TYPE_LC040;
// dasm_type = M68K_CPU_TYPE_68LC040;
// dasm_type = M68K_CPU_TYPE_68LC040;
init32mmu(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[4];
@ -2018,9 +2016,9 @@ void m68000_base_device::init_cpu_fscpu32(void)
init_cpu_common();
cpu_type = CPU_TYPE_FSCPU32;
// dasm_type = M68K_CPU_TYPE_FSCPU32;
// dasm_type = M68K_CPU_TYPE_FSCPU32;
init32(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[5];
@ -2044,11 +2042,11 @@ void m68000_base_device::init_cpu_fscpu32(void)
void m68000_base_device::init_cpu_coldfire(void)
{
init_cpu_common();
cpu_type = CPU_TYPE_COLDFIRE;
// dasm_type = M68K_CPU_TYPE_COLDFIRE;
cpu_type = CPU_TYPE_COLDFIRE;
// dasm_type = M68K_CPU_TYPE_COLDFIRE;
init32(*program);
sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
jump_table = m68ki_instruction_jump_table[6];
@ -2073,25 +2071,25 @@ void m68000_base_device::init_cpu_coldfire(void)
/*
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; // there is no level 0
case CPUINFO_INT_INPUT_STATE + 1: info->i = (m68k->virq_state >> 1) & 1; break;
case CPUINFO_INT_INPUT_STATE + 2: info->i = (m68k->virq_state >> 2) & 1; break;
case CPUINFO_INT_INPUT_STATE + 3: info->i = (m68k->virq_state >> 3) & 1; break;
case CPUINFO_INT_INPUT_STATE + 4: info->i = (m68k->virq_state >> 4) & 1; break;
case CPUINFO_INT_INPUT_STATE + 5: info->i = (m68k->virq_state >> 5) & 1; break;
case CPUINFO_INT_INPUT_STATE + 6: info->i = (m68k->virq_state >> 6) & 1; break;
case CPUINFO_INT_INPUT_STATE + 7: info->i = (m68k->virq_state >> 7) & 1; break;
case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; // there is no level 0
case CPUINFO_INT_INPUT_STATE + 1: info->i = (m68k->virq_state >> 1) & 1; break;
case CPUINFO_INT_INPUT_STATE + 2: info->i = (m68k->virq_state >> 2) & 1; break;
case CPUINFO_INT_INPUT_STATE + 3: info->i = (m68k->virq_state >> 3) & 1; break;
case CPUINFO_INT_INPUT_STATE + 4: info->i = (m68k->virq_state >> 4) & 1; break;
case CPUINFO_INT_INPUT_STATE + 5: info->i = (m68k->virq_state >> 5) & 1; break;
case CPUINFO_INT_INPUT_STATE + 6: info->i = (m68k->virq_state >> 6) & 1; break;
case CPUINFO_INT_INPUT_STATE + 7: info->i = (m68k->virq_state >> 7) & 1; break;
case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola 68K"); break;
case CPUINFO_STR_VERSION: strcpy(info->s, "4.95"); break;
case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Karl Stenerud. All rights reserved. (2.1 fixes HJB, FPU+MMU by RB+HO+OG)"); break;
case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola 68K"); break;
case CPUINFO_STR_VERSION: strcpy(info->s, "4.95"); break;
case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Karl Stenerud. All rights reserved. (2.1 fixes HJB, FPU+MMU by RB+HO+OG)"); break;
*/
@ -2196,7 +2194,7 @@ void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, UIN
/* Acknowledge the interrupt */
vector = (*int_ack_callback)(this, int_level);
/* Get the interrupt vector */
if(vector == M68K_INT_ACK_AUTOVECTOR)
/* Use the autovectors. This is the most commonly used implementation */
@ -2273,7 +2271,7 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
void m68000_base_device::clear_all()
{
cpu_type= 0;
// dasm_type= 0;
// dasm_type= 0;
for (int i=0;i<16;i++)
dar[i]= 0;
ppc= 0;
@ -2286,8 +2284,8 @@ void m68000_base_device::clear_all()
cacr= 0;
caar= 0;
ir= 0;
// for (int i=0;i<8;i++)
// fpr[i]= 0;
// for (int i=0;i<8;i++)
// fpr[i]= 0;
fpiar= 0;
fpsr= 0;
fpcr= 0;
@ -2352,13 +2350,13 @@ void m68000_base_device::clear_all()
program = 0;
opcode_xor = 0;
// readimm16 = 0;
// read8 = 0;
// read16 = 0;
// read32 = 0;
// write8 = 0;
// write16 = 0;
// write32 = 0;
// readimm16 = 0;
// read8 = 0;
// read16 = 0;
// read32 = 0;
// write8 = 0;
// write16 = 0;
// write32 = 0;
m_space = 0;
m_direct = 0;
@ -2383,7 +2381,7 @@ void m68000_base_device::clear_all()
for (int i=0; i<MMU_ATC_ENTRIES;i++)
mmu_atc_tag[i] = mmu_atc_data[i] = 0;
mmu_atc_rr = 0;
mmu_tt0 = mmu_tt1 = 0;
mmu_itt0 = mmu_itt1 = mmu_dtt0 = mmu_dtt1 = 0;
@ -2398,7 +2396,7 @@ void m68000_base_device::clear_all()
for (int i=0;i<M68K_IC_SIZE;i++)
ic_address[i] = 0;
for (int i=0;i<M68K_IC_SIZE;i++)
ic_data[i] = 0;
@ -2415,7 +2413,6 @@ void m68000_base_device::execute_run()
void m68000_base_device::device_start()
{
}
void m68000_base_device::device_reset()
@ -2425,7 +2422,6 @@ void m68000_base_device::device_reset()
void m68000_base_device::device_stop()
{
}
@ -2491,7 +2487,6 @@ const device_type MCF5206E = &device_creator<mcf5206e_device>;
m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68000", tag, owner, clock, M68000, 16,24, "m68000", __FILE__)
{
}
void m68000_device::device_start()
@ -2503,7 +2498,6 @@ m68000_device::m68000_device(const machine_config &mconfig, const char *name, co
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: m68000_base_device(mconfig, name, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map, shortname, source)
{
}
@ -2513,7 +2507,6 @@ m68000_device::m68000_device(const machine_config &mconfig, const char *name, co
m68301_device::m68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68301", tag, owner, clock, M68301, 16,24, "m68301", __FILE__)
{
}
@ -2532,7 +2525,6 @@ void m68301_device::device_start()
m68008_device::m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68008", tag, owner, clock, M68008, 8,20, "m68008", __FILE__)
{
}
void m68008_device::device_start()
@ -2544,7 +2536,6 @@ void m68008_device::device_start()
m68008plcc_device::m68008plcc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68008PLCC", tag, owner, clock, M68008, 8,22, "m68008plcc", __FILE__)
{
}
void m68008plcc_device::device_start()
@ -2557,7 +2548,6 @@ void m68008plcc_device::device_start()
m68010_device::m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68010", tag, owner, clock, M68010, 16,24, "m68010", __FILE__)
{
}
void m68010_device::device_start()
@ -2570,7 +2560,6 @@ void m68010_device::device_start()
m68020_device::m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68020", tag, owner, clock, M68020, 32,32, "m68020", __FILE__)
{
}
void m68020_device::device_start()
@ -2582,7 +2571,6 @@ void m68020_device::device_start()
m68020pmmu_device::m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68020PMMU", tag, owner, clock, M68020PMMU, 32,32, "m68020pmmu", __FILE__)
{
}
void m68020pmmu_device::device_start()
@ -2605,11 +2593,10 @@ bool m68020hmmu_device::memory_translate(address_spacenum space, int intention,
// 68020 with Apple HMMU & 68881 FPU
// case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68khmmu); break;
// case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68khmmu); break;
m68020hmmu_device::m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68020HMMU", tag, owner, clock, M68020HMMU, 32,32, "m68020hmmu", __FILE__)
{
}
void m68020hmmu_device::device_start()
@ -2621,7 +2608,6 @@ void m68020hmmu_device::device_start()
m68ec020_device::m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68EC020", tag, owner, clock, M68EC020, 32,24, "m68ec020", __FILE__)
{
}
void m68ec020_device::device_start()
@ -2632,7 +2618,6 @@ void m68ec020_device::device_start()
m68030_device::m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68030", tag, owner, clock, M68030, 32,32, "m68030", __FILE__)
{
}
void m68030_device::device_start()
@ -2643,7 +2628,6 @@ void m68030_device::device_start()
m68ec030_device::m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68EC030", tag, owner, clock, M68EC030, 32,32, "m68ec030", __FILE__)
{
}
void m68ec030_device::device_start()
@ -2654,7 +2638,6 @@ void m68ec030_device::device_start()
m68040_device::m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68040", tag, owner, clock, M68040, 32,32, "m68040", __FILE__)
{
}
@ -2668,7 +2651,6 @@ void m68040_device::device_start()
m68ec040_device::m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68EC040", tag, owner, clock, M68EC040, 32,32, "m68ec040", __FILE__)
{
}
void m68ec040_device::device_start()
@ -2681,7 +2663,6 @@ void m68ec040_device::device_start()
m68lc040_device::m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "M68LC040", tag, owner, clock, M68LC040, 32,32, "m68lc040", __FILE__)
{
}
void m68lc040_device::device_start()
@ -2693,7 +2674,6 @@ void m68lc040_device::device_start()
scc68070_device::scc68070_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "SCC68070", tag, owner, clock, SCC68070, 16,32, "scc68070", __FILE__)
{
}
void scc68070_device::device_start()
@ -2705,14 +2685,12 @@ void scc68070_device::device_start()
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "Freescale CPU32 Core", tag, owner, clock, FSCPU32, 32,32, "fscpu32", __FILE__)
{
}
fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: m68000_base_device(mconfig, name, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map, shortname, source)
{
}
@ -2726,10 +2704,9 @@ void fscpu32_device::device_start()
mcf5206e_device::mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: m68000_base_device(mconfig, "MCF5206E", tag, owner, clock, MCF5206E, 32,32, "mcf5206e", __FILE__)
{
}
void mcf5206e_device::device_start()
{
init_cpu_coldfire();
}
}

2
src/emu/cpu/mcs48/mcs48.h
View File

@ -88,7 +88,7 @@ enum
***************************************************************************/
#define MCS48_LC_CLOCK(_L, _C) \
(1 / (2 * 3.14159265358979323846 * sqrt(_L * _C)))
(1 / (2 * 3.14159265358979323846 * sqrt(_L * _C)))
#define MCS48_ALE_CLOCK(_clock) \
attotime::from_hz(_clock/(3*5))

136
src/emu/cpu/rsp/rspdrc.c
View File

@ -238,9 +238,9 @@ static void log_add_disasm_comment(rsp_state *rsp, drcuml_block *block, UINT32 p
}
#define VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
#define W_VREG_S(reg, offset) rsp->v[(reg)].s[(offset)]
#define VREG_S(reg, offset) (INT16)rsp->v[(reg)].s[(offset)]
#define VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
#define W_VREG_S(reg, offset) rsp->v[(reg)].s[(offset)]
#define VREG_S(reg, offset) (INT16)rsp->v[(reg)].s[(offset)]
#define VEC_EL_2(x,z) (vector_elements_2[(x)][(z)])
@ -1192,7 +1192,7 @@ static void cfunc_rsp_lwv(void *param)
#if USE_SIMD
rsp->xv[dest] = _mm_set_epi8(val[15], val[14], val[13], val[12], val[11], val[10], val[ 9], val[ 8],
val[ 7], val[ 6], val[ 5], val[ 4], val[ 3], val[ 2], val[ 1], val[ 0]);
val[ 7], val[ 6], val[ 5], val[ 4], val[ 3], val[ 2], val[ 1], val[ 0]);
#endif
}
@ -2850,67 +2850,67 @@ INLINE void cfunc_rsp_vmadh(void *param)
vres[i] = C_SATURATE_ACCUM1(caccumh, caccumm, i, 0x8000, 0x7fff);*/
}
/* printf("%08x\n", rsp->pc);
for (int i = 0; i < 8; i++)
{
if ((UINT16)vres[i] != vresult[i])
{
printf("Result mismatch:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vres[0], vres[1], vres[2], vres[3], vres[4], vres[5], vres[6], vres[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", vresult[0], vresult[1], vresult[2], vresult[3], vresult[4], vresult[5], vresult[6], vresult[7]);
printf("High accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumh[0], caccumh[1], caccumh[2], caccumh[3], caccumh[4], caccumh[5], caccumh[6], caccumh[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
printf("Mid accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumm[0], caccumm[1], caccumm[2], caccumm[3], caccumm[4], caccumm[5], caccumm[6], caccumm[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
printf("VS1:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs1[0], vs1[1], vs1[2], vs1[3], vs1[4], vs1[5], vs1[6], vs1[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs1[0], svs1[1], svs1[2], svs1[3], svs1[4], svs1[5], svs1[6], svs1[7]);
printf("VS2:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs2[0], vs2[1], vs2[2], vs2[3], vs2[4], vs2[5], vs2[6], vs2[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs2[0], svs2[1], svs2[2], svs2[3], svs2[4], svs2[5], svs2[6], svs2[7]);
fatalerror("asdf");
}
if (caccumh[i] != (UINT16)ACCUM_H(i))
{
printf("Result:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vres[0], vres[1], vres[2], vres[3], vres[4], vres[5], vres[6], vres[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", vresult[0], vresult[1], vresult[2], vresult[3], vresult[4], vresult[5], vresult[6], vresult[7]);
printf("High accumulator mismatch:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumh[0], caccumh[1], caccumh[2], caccumh[3], caccumh[4], caccumh[5], caccumh[6], caccumh[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
printf("Mid accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumm[0], caccumm[1], caccumm[2], caccumm[3], caccumm[4], caccumm[5], caccumm[6], caccumm[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
printf("VS1:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs1[0], vs1[1], vs1[2], vs1[3], vs1[4], vs1[5], vs1[6], vs1[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs1[0], svs1[1], svs1[2], svs1[3], svs1[4], svs1[5], svs1[6], svs1[7]);
printf("VS2:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs2[0], vs2[1], vs2[2], vs2[3], vs2[4], vs2[5], vs2[6], vs2[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs2[0], svs2[1], svs2[2], svs2[3], svs2[4], svs2[5], svs2[6], svs2[7]);
fatalerror("asdf");
}
if (caccumm[i] != (UINT16)ACCUM_M(i))
{
printf("Result:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vres[0], vres[1], vres[2], vres[3], vres[4], vres[5], vres[6], vres[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", vresult[0], vresult[1], vresult[2], vresult[3], vresult[4], vresult[5], vresult[6], vresult[7]);
printf("High accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumh[0], caccumh[1], caccumh[2], caccumh[3], caccumh[4], caccumh[5], caccumh[6], caccumh[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
printf("Mid accumulator mismatch:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumm[0], caccumm[1], caccumm[2], caccumm[3], caccumm[4], caccumm[5], caccumm[6], caccumm[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
printf("VS1:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs1[0], vs1[1], vs1[2], vs1[3], vs1[4], vs1[5], vs1[6], vs1[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs1[0], svs1[1], svs1[2], svs1[3], svs1[4], svs1[5], svs1[6], svs1[7]);
printf("VS2:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs2[0], vs2[1], vs2[2], vs2[3], vs2[4], vs2[5], vs2[6], vs2[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs2[0], svs2[1], svs2[2], svs2[3], svs2[4], svs2[5], svs2[6], svs2[7]);
fatalerror("asdf");
}
}*/
/* printf("%08x\n", rsp->pc);
for (int i = 0; i < 8; i++)
{
if ((UINT16)vres[i] != vresult[i])
{
printf("Result mismatch:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vres[0], vres[1], vres[2], vres[3], vres[4], vres[5], vres[6], vres[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", vresult[0], vresult[1], vresult[2], vresult[3], vresult[4], vresult[5], vresult[6], vresult[7]);
printf("High accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumh[0], caccumh[1], caccumh[2], caccumh[3], caccumh[4], caccumh[5], caccumh[6], caccumh[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
printf("Mid accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumm[0], caccumm[1], caccumm[2], caccumm[3], caccumm[4], caccumm[5], caccumm[6], caccumm[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
printf("VS1:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs1[0], vs1[1], vs1[2], vs1[3], vs1[4], vs1[5], vs1[6], vs1[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs1[0], svs1[1], svs1[2], svs1[3], svs1[4], svs1[5], svs1[6], svs1[7]);
printf("VS2:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs2[0], vs2[1], vs2[2], vs2[3], vs2[4], vs2[5], vs2[6], vs2[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs2[0], svs2[1], svs2[2], svs2[3], svs2[4], svs2[5], svs2[6], svs2[7]);
fatalerror("asdf");
}
if (caccumh[i] != (UINT16)ACCUM_H(i))
{
printf("Result:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vres[0], vres[1], vres[2], vres[3], vres[4], vres[5], vres[6], vres[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", vresult[0], vresult[1], vresult[2], vresult[3], vresult[4], vresult[5], vresult[6], vresult[7]);
printf("High accumulator mismatch:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumh[0], caccumh[1], caccumh[2], caccumh[3], caccumh[4], caccumh[5], caccumh[6], caccumh[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
printf("Mid accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumm[0], caccumm[1], caccumm[2], caccumm[3], caccumm[4], caccumm[5], caccumm[6], caccumm[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
printf("VS1:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs1[0], vs1[1], vs1[2], vs1[3], vs1[4], vs1[5], vs1[6], vs1[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs1[0], svs1[1], svs1[2], svs1[3], svs1[4], svs1[5], svs1[6], svs1[7]);
printf("VS2:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs2[0], vs2[1], vs2[2], vs2[3], vs2[4], vs2[5], vs2[6], vs2[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs2[0], svs2[1], svs2[2], svs2[3], svs2[4], svs2[5], svs2[6], svs2[7]);
fatalerror("asdf");
}
if (caccumm[i] != (UINT16)ACCUM_M(i))
{
printf("Result:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vres[0], vres[1], vres[2], vres[3], vres[4], vres[5], vres[6], vres[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", vresult[0], vresult[1], vresult[2], vresult[3], vresult[4], vresult[5], vresult[6], vresult[7]);
printf("High accumulator:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumh[0], caccumh[1], caccumh[2], caccumh[3], caccumh[4], caccumh[5], caccumh[6], caccumh[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_H(0), ACCUM_H(1), ACCUM_H(2), ACCUM_H(3), ACCUM_H(4), ACCUM_H(5), ACCUM_H(6), ACCUM_H(7));
printf("Mid accumulator mismatch:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", caccumm[0], caccumm[1], caccumm[2], caccumm[3], caccumm[4], caccumm[5], caccumm[6], caccumm[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", ACCUM_M(0), ACCUM_M(1), ACCUM_M(2), ACCUM_M(3), ACCUM_M(4), ACCUM_M(5), ACCUM_M(6), ACCUM_M(7));
printf("VS1:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs1[0], vs1[1], vs1[2], vs1[3], vs1[4], vs1[5], vs1[6], vs1[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs1[0], svs1[1], svs1[2], svs1[3], svs1[4], svs1[5], svs1[6], svs1[7]);
printf("VS2:\n");
printf(" C: %04x %04x %04x %04x %04x %04x %04x %04x\n", vs2[0], vs2[1], vs2[2], vs2[3], vs2[4], vs2[5], vs2[6], vs2[7]);
printf("SIMD: %04x %04x %04x %04x %04x %04x %04x %04x\n", svs2[0], svs2[1], svs2[2], svs2[3], svs2[4], svs2[5], svs2[6], svs2[7]);
fatalerror("asdf");
}
}*/
WRITEBACK_RESULT();
#endif
}
@ -2930,7 +2930,7 @@ INLINE void cfunc_rsp_vadd(void *param)
__m128i shuffled = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i unsat = rsp->xv[VS1REG];
__m128i carry = _mm_set_epi16(CARRY_FLAG(7), CARRY_FLAG(6), CARRY_FLAG(5), CARRY_FLAG(4),
CARRY_FLAG(3), CARRY_FLAG(2), CARRY_FLAG(1), CARRY_FLAG(0));
CARRY_FLAG(3), CARRY_FLAG(2), CARRY_FLAG(1), CARRY_FLAG(0));
unsat = _mm_add_epi16(unsat, shuffled);
unsat = _mm_add_epi16(unsat, carry);
@ -3011,7 +3011,7 @@ INLINE void cfunc_rsp_vsub(void *param)
__m128i shuffled = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i unsat = rsp->xv[VS1REG];
__m128i carry = _mm_set_epi16(CARRY_FLAG(7), CARRY_FLAG(6), CARRY_FLAG(5), CARRY_FLAG(4),
CARRY_FLAG(3), CARRY_FLAG(2), CARRY_FLAG(1), CARRY_FLAG(0));
CARRY_FLAG(3), CARRY_FLAG(2), CARRY_FLAG(1), CARRY_FLAG(0));
unsat = _mm_sub_epi16(unsat, shuffled);
unsat = _mm_sub_epi16(unsat, carry);
@ -3142,7 +3142,7 @@ INLINE void cfunc_rsp_vaddc(void *param)
#if USE_SIMD
__m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
__m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
__m128i vec6420 = _mm_srli_epi32(rsp->xv[VS1REG], 16);
__m128i shuf7531 = _mm_and_si128(shuf2, vec_lomask);
__m128i shuf6420 = _mm_srli_epi32(shuf2, 16);

11
src/emu/cpu/tms0980/tms0980.c
View File

@ -1042,7 +1042,7 @@ void tms1100_cpu_device::state_string_export(const device_state_entry &entry, as
tms0980_cpu_device::tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: tms1xxx_cpu_device( mconfig, TMS0980, "TMS0980", tag, owner, clock, tms0980_decode, 0x00ff, 0x07ff, 7, 9, 4
, 12, ADDRESS_MAP_NAME( tms0980_internal_rom ), 7, ADDRESS_MAP_NAME( tms0980_internal_ram ), "tms0980", __FILE__)
, 12, ADDRESS_MAP_NAME( tms0980_internal_rom ), 7, ADDRESS_MAP_NAME( tms0980_internal_ram ), "tms0980", __FILE__)
{
}
@ -1056,14 +1056,14 @@ offs_t tms0980_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UIN
tms1000_cpu_device::tms1000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: tms1xxx_cpu_device( mconfig, TMS1000, "TMS1000", tag, owner, clock, tms1000_default_decode, 0x00ff, 0x07ff, 6, 8, 2
, 11, ADDRESS_MAP_NAME( program_11bit_8 ), 7, ADDRESS_MAP_NAME( data_7bit ), "tms1000", __FILE__)
, 11, ADDRESS_MAP_NAME( program_11bit_8 ), 7, ADDRESS_MAP_NAME( data_7bit ), "tms1000", __FILE__)
{
}
tms1000_cpu_device::tms1000_cpu_device(const machine_config &mconfig, device_type type, const char*name, const char *tag, device_t *owner, UINT32 clock, UINT16 o_mask, UINT16 r_mask, const char *shortname, const char *source)
: tms1xxx_cpu_device( mconfig, type, name, tag, owner, clock, tms1000_default_decode, o_mask, r_mask, 6, 8, 2
, 10, ADDRESS_MAP_NAME( program_10bit_8 ), 6, ADDRESS_MAP_NAME( data_6bit ), shortname, source )
, 10, ADDRESS_MAP_NAME( program_10bit_8 ), 6, ADDRESS_MAP_NAME( data_6bit ), shortname, source )
{
}
@ -1095,14 +1095,14 @@ tms1270_cpu_device::tms1270_cpu_device(const machine_config &mconfig, const char
tms1100_cpu_device::tms1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: tms1xxx_cpu_device( mconfig, TMS1100, "TMS1100", tag, owner, clock, tms1100_default_decode, 0x00ff, 0x07ff, 6, 8, 3
, 11, ADDRESS_MAP_NAME( program_11bit_8 ), 7, ADDRESS_MAP_NAME( data_7bit ), "tms1100", __FILE__ )
, 11, ADDRESS_MAP_NAME( program_11bit_8 ), 7, ADDRESS_MAP_NAME( data_7bit ), "tms1100", __FILE__ )
{
}
tms1100_cpu_device::tms1100_cpu_device(const machine_config &mconfig, device_type type, const char*name, const char *tag, device_t *owner, UINT32 clock, UINT16 o_mask, UINT16 r_mask, const char *shortname, const char *source)
: tms1xxx_cpu_device( mconfig, type, name, tag, owner, clock, tms1100_default_decode, o_mask, r_mask, 6, 8, 3
, 11, ADDRESS_MAP_NAME( program_11bit_8 ), 7, ADDRESS_MAP_NAME( data_7bit ), shortname, source )
, 11, ADDRESS_MAP_NAME( program_11bit_8 ), 7, ADDRESS_MAP_NAME( data_7bit ), shortname, source )
{
}
@ -1118,4 +1118,3 @@ tms1300_cpu_device::tms1300_cpu_device(const machine_config &mconfig, const char
: tms1100_cpu_device( mconfig, TMS1300, "TMS1300", tag, owner, clock, 0x00ff, 0xffff, "tms1300", __FILE__ )
{
}

6
src/emu/cpu/tms0980/tms0980.h
View File

@ -27,8 +27,8 @@ class tms1xxx_cpu_device : public cpu_device
public:
// construction/destruction
tms1xxx_cpu_device( const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock
, const UINT32* decode_table, UINT16 o_mask, UINT16 r_mask, UINT8 pc_size, UINT8 byte_size, UINT8 x_bits
, int program_addrbus_width, address_map_constructor program, int data_addrbus_width, address_map_constructor data, const char *shortname, const char *source)
, const UINT32* decode_table, UINT16 o_mask, UINT16 r_mask, UINT8 pc_size, UINT8 byte_size, UINT8 x_bits
, int program_addrbus_width, address_map_constructor program, int data_addrbus_width, address_map_constructor data, const char *shortname, const char *source)
: cpu_device( mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, byte_size > 8 ? 16 : 8, program_addrbus_width, 0, program )
, m_data_config("data", ENDIANNESS_BIG, 8, data_addrbus_width, 0, data )
@ -72,7 +72,7 @@ protected:
void set_cki_bus();
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_data_config;
UINT8 m_prev_pc; /* previous program counter */
UINT8 m_prev_pa; /* previous page address register */

370
src/emu/cpu/tms32082/dis32082.c
View File

@ -7,10 +7,10 @@
static const char *BCND_CONDITION[32] =
{
"nev.b", "gt0.b", "eq0.b", "ge0.b", "lt0.b", "ne0.b", "le0.b", "alw.b",
"nev.h", "gt0.h", "eq0.h", "ge0.h", "lt0.h", "ne0.h", "le0.h", "alw.h",
"nev.w", "gt0.w", "eq0.w", "ge0.w", "lt0.w", "ne0.w", "le0.w", "alw.w",
"nev.d", "gt0.d", "eq0.d", "ge0.d", "lt0.d", "ne0.d", "le0.d", "alw.d",
"nev.b", "gt0.b", "eq0.b", "ge0.b", "lt0.b", "ne0.b", "le0.b", "alw.b",
"nev.h", "gt0.h", "eq0.h", "ge0.h", "lt0.h", "ne0.h", "le0.h", "alw.h",
"nev.w", "gt0.w", "eq0.w", "ge0.w", "lt0.w", "ne0.w", "le0.w", "alw.w",
"nev.d", "gt0.d", "eq0.d", "ge0.d", "lt0.d", "ne0.d", "le0.d", "alw.d",
};
static char *output;
@ -40,33 +40,33 @@ static char* get_creg_name(UINT32 reg)
switch (reg)
{
case 0x0000: sprintf(buffer, "EPC"); break;
case 0x0001: sprintf(buffer, "EIP"); break;
case 0x0002: sprintf(buffer, "CONFIG"); break;
case 0x0004: sprintf(buffer, "INTPEN"); break;
case 0x0006: sprintf(buffer, "IE"); break;
case 0x0008: sprintf(buffer, "FPST"); break;
case 0x000a: sprintf(buffer, "PPERROR"); break;
case 0x000d: sprintf(buffer, "PKTREQ"); break;
case 0x000e: sprintf(buffer, "TCOUNT"); break;
case 0x000f: sprintf(buffer, "TSCALE"); break;
case 0x0010: sprintf(buffer, "FLTOP"); break;
case 0x0011: sprintf(buffer, "FLTADR"); break;
case 0x0012: sprintf(buffer, "FLTTAG"); break;
case 0x0013: sprintf(buffer, "FLTDTL"); break;
case 0x0014: sprintf(buffer, "FLTDTH"); break;
case 0x0020: sprintf(buffer, "SYSSTK"); break;
case 0x0021: sprintf(buffer, "SYSTMP"); break;
case 0x0030: sprintf(buffer, "MPC"); break;
case 0x0031: sprintf(buffer, "MIP"); break;
case 0x0033: sprintf(buffer, "ECOMCNTL"); break;
case 0x0034: sprintf(buffer, "ANASTAT"); break;
case 0x0039: sprintf(buffer, "BRK1"); break;
case 0x003a: sprintf(buffer, "BRK2"); break;
case 0x4000: sprintf(buffer, "IN0P"); break;
case 0x4001: sprintf(buffer, "IN1P"); break;
case 0x4002: sprintf(buffer, "OUTP"); break;
default: sprintf(buffer, "CR %04X\n", reg);
case 0x0000: sprintf(buffer, "EPC"); break;
case 0x0001: sprintf(buffer, "EIP"); break;
case 0x0002: sprintf(buffer, "CONFIG"); break;
case 0x0004: sprintf(buffer, "INTPEN"); break;
case 0x0006: sprintf(buffer, "IE"); break;
case 0x0008: sprintf(buffer, "FPST"); break;
case 0x000a: sprintf(buffer, "PPERROR"); break;
case 0x000d: sprintf(buffer, "PKTREQ"); break;
case 0x000e: sprintf(buffer, "TCOUNT"); break;
case 0x000f: sprintf(buffer, "TSCALE"); break;
case 0x0010: sprintf(buffer, "FLTOP"); break;
case 0x0011: sprintf(buffer, "FLTADR"); break;
case 0x0012: sprintf(buffer, "FLTTAG"); break;
case 0x0013: sprintf(buffer, "FLTDTL"); break;
case 0x0014: sprintf(buffer, "FLTDTH"); break;
case 0x0020: sprintf(buffer, "SYSSTK"); break;
case 0x0021: sprintf(buffer, "SYSTMP"); break;
case 0x0030: sprintf(buffer, "MPC"); break;
case 0x0031: sprintf(buffer, "MIP"); break;
case 0x0033: sprintf(buffer, "ECOMCNTL"); break;
case 0x0034: sprintf(buffer, "ANASTAT"); break;
case 0x0039: sprintf(buffer, "BRK1"); break;
case 0x003a: sprintf(buffer, "BRK2"); break;
case 0x4000: sprintf(buffer, "IN0P"); break;
case 0x4001: sprintf(buffer, "IN1P"); break;
case 0x4002: sprintf(buffer, "OUTP"); break;
default: sprintf(buffer, "CR %04X\n", reg);
}
return buffer;
@ -92,36 +92,36 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
switch ((op >> 20) & 3)
{
case 0: case 1: case 2: // Short immediate
case 0: case 1: case 2: // Short immediate
{
int subop = (op >> 15) & 0x7f;
switch (subop)
{
case 0x00: print("illop0 "); break;
case 0x01: print("trap %d", UIMM15(uimm15)); break;
case 0x02: print("cmnd 0x%04X", UIMM15(uimm15)); break;
case 0x04: print("rdcr R%d, %s", rd, get_creg_name(UIMM15(uimm15))); break;
case 0x05: print("swcr %s, R%d, R%d", get_creg_name(UIMM15(uimm15)), rs, rd); break;
case 0x06: print("brcr 0x%04X", UIMM15(uimm15)); break;
case 0x08: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x09: print("shift%s.dm %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0a: print("shift%s.ds %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0b: print("shift%s.ez %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0c: print("shift%s.em %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0d: print("shift%s.es %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0e: print("shift%s.iz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0f: print("shift%s.im %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x11: print("and 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x12: print("and.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x14: print("and.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x16: print("xor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x17: print("or 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x18: print("and.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x19: print("xnor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x1b: print("or.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x1d: print("or.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x1e: print("or.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x00: print("illop0 "); break;
case 0x01: print("trap %d", UIMM15(uimm15)); break;
case 0x02: print("cmnd 0x%04X", UIMM15(uimm15)); break;
case 0x04: print("rdcr R%d, %s", rd, get_creg_name(UIMM15(uimm15))); break;
case 0x05: print("swcr %s, R%d, R%d", get_creg_name(UIMM15(uimm15)), rs, rd); break;
case 0x06: print("brcr 0x%04X", UIMM15(uimm15)); break;
case 0x08: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x09: print("shift%s.dm %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0a: print("shift%s.ds %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0b: print("shift%s.ez %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0c: print("shift%s.em %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0d: print("shift%s.es %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0e: print("shift%s.iz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x0f: print("shift%s.im %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x11: print("and 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x12: print("and.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x14: print("and.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x16: print("xor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x17: print("or 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x18: print("and.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x19: print("xnor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x1b: print("or.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x1d: print("or.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x1e: print("or.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break;
case 0x24: case 0x20:
print("ld.b 0x%04X(R%d), R%d", UIMM15(uimm15), rs, rd);
@ -155,76 +155,76 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
print("st.d R%d, 0x%04X(R%d)", rd, UIMM15(uimm15), rs);
break;
case 0x40: print("bsr 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break;
case 0x41: print("bsr.a 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break;
case 0x44: print("jsr 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break;
case 0x45: print("jsr.a 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break;
case 0x48: print("bbz 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x49: print("bbz.a 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x4a: print("bbo 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x4b: print("bbo.a 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x4c: print("bcnd 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break;
case 0x4d: print("bcnd.a 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break;
case 0x50: print("cmp 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x58: print("add 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x59: print("addu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x5a: print("sub 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x5b: print("subu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x40: print("bsr 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break;
case 0x41: print("bsr.a 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break;
case 0x44: print("jsr 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break;
case 0x45: print("jsr.a 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break;
case 0x48: print("bbz 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x49: print("bbz.a 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x4a: print("bbo 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x4b: print("bbo.a 0x%08X, R%d, #%d", pc + (SIMM15(uimm15) * 4), rs, bitnum); break;
case 0x4c: print("bcnd 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break;
case 0x4d: print("bcnd.a 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break;
case 0x50: print("cmp 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x58: print("add 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x59: print("addu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x5a: print("sub 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
case 0x5b: print("subu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break;
}
break;
}
case 3: // Register / Long immediate
case 3: // Register / Long immediate
{
int subop = (op >> 12) & 0xff;
UINT32 imm32 = 0;
if (op & (1 << 12)) // fetch 32-bit immediate if needed
if (op & (1 << 12)) // fetch 32-bit immediate if needed
imm32 = fetch();
switch (subop)
{
case 0x02: print("trap %d", src1); break;
case 0x03: print("trap %d", imm32); break;
case 0x04: print("cmnd R%d", src1); break;
case 0x05: print("cmnd 0x%08X", imm32); break;
case 0x08: print("rdcr R%d, R%d", rd, src1); break;
case 0x09: print("rdcr R%d, %s", rd, get_creg_name(imm32)); break;
case 0x0a: print("swcr R%d, R%d, R%d", src1, rs, rd); break;
case 0x0b: print("swcr %s, R%d, R%d", get_creg_name(imm32), rs, rd); break;
case 0x0c: print("brcr R%d", src1); break;
case 0x0d: print("brcr 0x%08X", imm32); break;
case 0x02: print("trap %d", src1); break;
case 0x03: print("trap %d", imm32); break;
case 0x04: print("cmnd R%d", src1); break;
case 0x05: print("cmnd 0x%08X", imm32); break;
case 0x08: print("rdcr R%d, R%d", rd, src1); break;
case 0x09: print("rdcr R%d, %s", rd, get_creg_name(imm32)); break;
case 0x0a: print("swcr R%d, R%d, R%d", src1, rs, rd); break;
case 0x0b: print("swcr %s, R%d, R%d", get_creg_name(imm32), rs, rd); break;
case 0x0c: print("brcr R%d", src1); break;
case 0x0d: print("brcr 0x%08X", imm32); break;
case 0x10: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x12: print("shift%s.dm %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x14: print("shift%s.ds %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x16: print("shift%s.ez %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x18: print("shift%s.em %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x1a: print("shift%s.es %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x1c: print("shift%s.iz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x1e: print("shift%s.im %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x10: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x12: print("shift%s.dm %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x14: print("shift%s.ds %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x16: print("shift%s.ez %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x18: print("shift%s.em %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x1a: print("shift%s.es %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x1c: print("shift%s.iz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x1e: print("shift%s.im %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break;
case 0x22: print("and R%d, R%d, R%d", src1, rs, rd); break;
case 0x23: print("and 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x24: print("and.tf R%d, R%d, R%d", src1, rs, rd); break;
case 0x25: print("and.tf 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x28: print("and.ft R%d, R%d, R%d", src1, rs, rd); break;
case 0x29: print("and.ft 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x2c: print("xor R%d, R%d, R%d", src1, rs, rd); break;
case 0x2d: print("xor 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x2e: print("or R%d, R%d, R%d", src1, rs, rd); break;
case 0x2f: print("or 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x30: print("and.ff R%d, R%d, R%d", src1, rs, rd); break;
case 0x31: print("and.ff 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x32: print("xnor R%d, R%d, R%d", src1, rs, rd); break;
case 0x33: print("xnor 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x36: print("or.tf R%d, R%d, R%d", src1, rs, rd); break;
case 0x37: print("or.tf 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x3a: print("or.ft R%d, R%d, R%d", src1, rs, rd); break;
case 0x3b: print("or.ft 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x3c: print("or.ff R%d, R%d, R%d", src1, rs, rd); break;
case 0x3d: print("or.ff 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x22: print("and R%d, R%d, R%d", src1, rs, rd); break;
case 0x23: print("and 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x24: print("and.tf R%d, R%d, R%d", src1, rs, rd); break;
case 0x25: print("and.tf 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x28: print("and.ft R%d, R%d, R%d", src1, rs, rd); break;
case 0x29: print("and.ft 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x2c: print("xor R%d, R%d, R%d", src1, rs, rd); break;
case 0x2d: print("xor 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x2e: print("or R%d, R%d, R%d", src1, rs, rd); break;
case 0x2f: print("or 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x30: print("and.ff R%d, R%d, R%d", src1, rs, rd); break;
case 0x31: print("and.ff 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x32: print("xnor R%d, R%d, R%d", src1, rs, rd); break;
case 0x33: print("xnor 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x36: print("or.tf R%d, R%d, R%d", src1, rs, rd); break;
case 0x37: print("or.tf 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x3a: print("or.ft R%d, R%d, R%d", src1, rs, rd); break;
case 0x3b: print("or.ft 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x3c: print("or.ff R%d, R%d, R%d", src1, rs, rd); break;
case 0x3d: print("or.ff 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x48: case 0x40:
print("ld.b R%d(R%d), R%d", src1, rs, rd);
@ -232,22 +232,22 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
case 0x49: case 0x41:
print("ld.b 0x%08X(R%d), R%d", imm32, rs, rd);
break;
case 0x4a: case 0x42:
case 0x4a: case 0x42:
print("ld.h R%d(R%d), R%d", src1, rs, rd);
break;
case 0x4b: case 0x43:
case 0x4b: case 0x43:
print("ld.h 0x%08X(R%d), R%d", imm32, rs, rd);
break;
case 0x4c: case 0x44:
case 0x4c: case 0x44:
print("ld R%d(R%d), R%d", src1, rs, rd);
break;
case 0x4d: case 0x45:
case 0x4d: case 0x45:
print("ld 0x%08X(R%d), R%d", imm32, rs, rd);
break;
case 0x4e: case 0x46:
case 0x4e: case 0x46:
print("ld.d R%d(R%d), R%d", src1, rs, rd);
break;
case 0x4f: case 0x47:
case 0x4f: case 0x47:
print("ld.d 0x%08X(R%d), R%d", imm32, rs, rd);
break;
case 0x58: case 0x50:
@ -256,7 +256,7 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
case 0x59: case 0x51:
print("ld.ub 0x%08X(R%d), R%d", imm32, rs, rd);
break;
case 0x5a: case 0x52:
case 0x5a: case 0x52:
print("ld.uh R%d(R%d), R%d", src1, rs, rd);
break;
case 0x5b: case 0x53:
@ -272,66 +272,66 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
case 0x6a: case 0x62:
print("st.h R%d, R%d(R%d)", rd, src1, rs);
break;
case 0x6b: case 0x63:
case 0x6b: case 0x63:
print("st.h R%d, 0x%08X(R%d)", rd, imm32, rs);
break;
case 0x6c: case 0x64:
case 0x6c: case 0x64:
print("st R%d, R%d(R%d)", rd, src1, rs);
break;
case 0x6d: case 0x65:
case 0x6d: case 0x65:
print("st R%d, 0x%08X(R%d)", rd, imm32, rs);
break;
case 0x6e: case 0x66:
print("st.d R%d, R%d(R%d)", rd, src1, rs);
break;
case 0x6f: case 0x67:
case 0x6f: case 0x67:
print("st.d R%d, 0x%08X(R%d)", rd, imm32, rs);
break;
case 0x78: case 0x70:
print("dcache R%d(R%d)", src1, rs);
break;
case 0x79: case 0x71:
case 0x79: case 0x71:
print("dcache 0x%08X(R%d)", imm32, rs);
break;
case 0x80: print("bsr R%d, R%d", src1, link); break;
case 0x81: print("bsr 0x%08X, R%d", imm32, link); break;
case 0x82: print("bsr.a R%d, R%d", src1, rd); break;
case 0x83: print("bsr.a 0x%08X, R%d", imm32, link); break;
case 0x88: print("jsr R%d, R%d", src1, link); break;
case 0x89: print("jsr 0x%08X, R%d", imm32, link); break;
case 0x8a: print("jsr.a R%d, R%d", src1, link); break;
case 0x8b: print("jsr.a 0x%08X, R%d", imm32, link); break;
case 0x90: print("bbz R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x91: print("bbz 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x92: print("bbz.a R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x93: print("bbz.a 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x94: print("bbo R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x95: print("bbo 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x96: print("bbo.a R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x97: print("bbo.a 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x98: print("bcnd R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break;
case 0x99: print("bcnd 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break;
case 0x9a: print("bcnd.a R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break;
case 0x9b: print("bcnd.a 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break;
case 0xa0: print("cmp R%d, R%d, R%d", src1, rs, rd); break;
case 0xa1: print("cmp 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb0: print("add R%d, R%d, R%d", src1, rs, rd); break;
case 0xb1: print("add 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb2: print("addu R%d, R%d, R%d", src1, rs, rd); break;
case 0xb3: print("addu 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb4: print("sub R%d, R%d, R%d", src1, rs, rd); break;
case 0xb5: print("sub 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb6: print("subu R%d, R%d, R%d", src1, rs, rd); break;
case 0xb7: print("subu 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0x80: print("bsr R%d, R%d", src1, link); break;
case 0x81: print("bsr 0x%08X, R%d", imm32, link); break;
case 0x82: print("bsr.a R%d, R%d", src1, rd); break;
case 0x83: print("bsr.a 0x%08X, R%d", imm32, link); break;
case 0x88: print("jsr R%d, R%d", src1, link); break;
case 0x89: print("jsr 0x%08X, R%d", imm32, link); break;
case 0x8a: print("jsr.a R%d, R%d", src1, link); break;
case 0x8b: print("jsr.a 0x%08X, R%d", imm32, link); break;
case 0x90: print("bbz R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x91: print("bbz 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x92: print("bbz.a R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x93: print("bbz.a 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x94: print("bbo R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x95: print("bbo 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x96: print("bbo.a R%d, R%d, #%d", src1, rs, bitnum); break;
case 0x97: print("bbo.a 0x%08X, R%d, #%d", imm32, rs, bitnum); break;
case 0x98: print("bcnd R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break;
case 0x99: print("bcnd 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break;
case 0x9a: print("bcnd.a R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break;
case 0x9b: print("bcnd.a 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break;
case 0xa0: print("cmp R%d, R%d, R%d", src1, rs, rd); break;
case 0xa1: print("cmp 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb0: print("add R%d, R%d, R%d", src1, rs, rd); break;
case 0xb1: print("add 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb2: print("addu R%d, R%d, R%d", src1, rs, rd); break;
case 0xb3: print("addu 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb4: print("sub R%d, R%d, R%d", src1, rs, rd); break;
case 0xb5: print("sub 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xb6: print("subu R%d, R%d, R%d", src1, rs, rd); break;
case 0xb7: print("subu 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xc0: print("vadd R%d, R%d, R%d", src1, rs, rd); break;
case 0xc1: print("vadd 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xc2: print("vsub R%d, R%d, R%d", src1, rs, rd); break;
case 0xc3: print("vsub 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xc4: print("vmpy R%d, R%d, R%d", src1, rs, rd); break;
case 0xc5: print("vmpy 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xc0: print("vadd R%d, R%d, R%d", src1, rs, rd); break;
case 0xc1: print("vadd 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xc2: print("vsub R%d, R%d, R%d", src1, rs, rd); break;
case 0xc3: print("vsub 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xc4: print("vmpy R%d, R%d, R%d", src1, rs, rd); break;
case 0xc5: print("vmpy 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xd6: case 0xc6:
print("vmsub R%d, R%d, R%d", src1, rs, rd);
@ -342,34 +342,34 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
case 0xd8: case 0xc8:
print("vrnd R%d, R%d, R%d", src1, rs, rd);
break;
case 0xd9: case 0xc9:
case 0xd9: case 0xc9:
print("vrnd 0x%08X, R%d, R%d", imm32, rs, rd);
break;
case 0xca: print("vrnd R%d, R%d, R%d", src1, rs, rd); break;
case 0xcb: print("vrnd 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xcc: print("vmac R%d, R%d, R%d", src1, rs, rd); break;
case 0xcd: print("vmac 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xce: print("vmsc R%d, R%d, R%d", src1, rs, rd); break;
case 0xcf: print("vmsc 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe0: print("fadd R%d, R%d, R%d", src1, rs, rd); break;
case 0xe1: print("fadd 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe2: print("fsub R%d, R%d, R%d", src1, rs, rd); break;
case 0xe3: print("fsub 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe4: print("fmpy R%d, R%d, R%d", src1, rs, rd); break;
case 0xe5: print("fmpy 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe6: print("fdiv R%d, R%d, R%d", src1, rs, rd); break;
case 0xe7: print("fdiv 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe8: print("frndx R%d, R%d", src1, rd); break;
case 0xe9: print("frndx 0x%08X, R%d", imm32, rd); break;
case 0xea: print("fcmp R%d, R%d, R%d", src1, rs, rd); break;
case 0xeb: print("fcmp 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xee: print("fsqrt R%d, R%d", src1, rd); break;
case 0xef: print("fsqrt 0x%08X, R%d", imm32, rd); break;
case 0xf0: print("lmo R%d, R%d", rs, rd); break;
case 0xf2: print("rmo R%d, R%d", rs, rd); break;
case 0xfc: print("estop "); break;
case 0xca: print("vrnd R%d, R%d, R%d", src1, rs, rd); break;
case 0xcb: print("vrnd 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xcc: print("vmac R%d, R%d, R%d", src1, rs, rd); break;
case 0xcd: print("vmac 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xce: print("vmsc R%d, R%d, R%d", src1, rs, rd); break;
case 0xcf: print("vmsc 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe0: print("fadd R%d, R%d, R%d", src1, rs, rd); break;
case 0xe1: print("fadd 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe2: print("fsub R%d, R%d, R%d", src1, rs, rd); break;
case 0xe3: print("fsub 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe4: print("fmpy R%d, R%d, R%d", src1, rs, rd); break;
case 0xe5: print("fmpy 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe6: print("fdiv R%d, R%d, R%d", src1, rs, rd); break;
case 0xe7: print("fdiv 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xe8: print("frndx R%d, R%d", src1, rd); break;
case 0xe9: print("frndx 0x%08X, R%d", imm32, rd); break;
case 0xea: print("fcmp R%d, R%d, R%d", src1, rs, rd); break;
case 0xeb: print("fcmp 0x%08X, R%d, R%d", imm32, rs, rd); break;
case 0xee: print("fsqrt R%d, R%d", src1, rd); break;
case 0xef: print("fsqrt 0x%08X, R%d", imm32, rd); break;
case 0xf0: print("lmo R%d, R%d", rs, rd); break;
case 0xf2: print("rmo R%d, R%d", rs, rd); break;
case 0xfc: print("estop "); break;
case 0xfe: case 0xff:
print("illopF ");
break;
@ -384,4 +384,4 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
CPU_DISASSEMBLE(tms32082_mp)
{
return tms32082_disasm_mp(buffer, pc, oprom);
}
}

186
src/emu/cpu/tms32082/mp_ops.c
View File

@ -18,15 +18,15 @@
#define ROTATE_L(x, r) ((x << r) | (x >> (32-r)))
#define ROTATE_R(x, r) ((x >> r) | (x << (32-r)))
#define CMP_OVERFLOW32(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x80000000) ? 1 : 0)
#define CMP_OVERFLOW16(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x8000) ? 1 : 0)
#define CMP_OVERFLOW8(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x80) ? 1 : 0)
#define CARRY32(x) (((x) & (((UINT64)1) << 32)) ? 1 : 0)
#define CARRY16(x) (((x) & 0x10000) ? 1 : 0)
#define CARRY8(x) (((x) & 0x100) ? 1 : 0)
#define SIGN32(x) (((x) & 0x80000000) ? 1 : 0)
#define SIGN16(x) (((x) & 0x8000) ? 1 : 0)
#define SIGN8(x) (((x) & 0x80) ? 1 : 0)
#define CMP_OVERFLOW32(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x80000000) ? 1 : 0)
#define CMP_OVERFLOW16(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x8000) ? 1 : 0)
#define CMP_OVERFLOW8(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x80) ? 1 : 0)
#define CARRY32(x) (((x) & (((UINT64)1) << 32)) ? 1 : 0)
#define CARRY16(x) (((x) & 0x10000) ? 1 : 0)
#define CARRY8(x) (((x) & 0x100) ? 1 : 0)
#define SIGN32(x) (((x) & 0x80000000) ? 1 : 0)
#define SIGN16(x) (((x) & 0x8000) ? 1 : 0)
#define SIGN8(x) (((x) & 0x80) ? 1 : 0)
@ -34,31 +34,31 @@ bool tms32082_mp_device::test_condition(int condition, UINT32 value)
{
switch (condition)
{
case 0x00: return false; // never, byte
case 0x01: return (INT8)(value) > 0; // greater than zero, byte
case 0x02: return (INT8)(value) == 0; // equals zero, byte
case 0x03: return (INT8)(value) >= 0; // greater than or equal to zero, byte
case 0x04: return (INT8)(value) < 0; // less than zero, byte
case 0x05: return (INT8)(value) != 0; // not equal to zero, byte
case 0x06: return (INT8)(value) <= 0; // less than or equal to zero, byte
case 0x07: return true; // always, byte
case 0x08: return false; // never, word
case 0x09: return (INT16)(value) > 0; // greater than zero, word
case 0x0a: return (INT16)(value) == 0; // equals zero, word
case 0x0b: return (INT16)(value) >= 0; // greater than or equal to zero, word
case 0x0c: return (INT16)(value) < 0; // less than zero, word
case 0x0d: return (INT16)(value) != 0; // not equal to zero, word
case 0x0e: return (INT16)(value) <= 0; // less than or equal to zero, word
case 0x0f: return true; // always, word
case 0x10: return false; // never, dword
case 0x11: return (INT32)(value) > 0; // greater than zero, dword
case 0x12: return (INT32)(value) == 0; // equals zero, dword
case 0x13: return (INT32)(value) >= 0; // greater than or equal to zero, dword
case 0x14: return (INT32)(value) < 0; // less than zero, dword
case 0x15: return (INT32)(value) != 0; // not equal to zero, dword
case 0x16: return (INT32)(value) <= 0; // less than or equal to zero, dword
case 0x17: return true; // always, dword
default: return false; // reserved
case 0x00: return false; // never, byte
case 0x01: return (INT8)(value) > 0; // greater than zero, byte
case 0x02: return (INT8)(value) == 0; // equals zero, byte
case 0x03: return (INT8)(value) >= 0; // greater than or equal to zero, byte
case 0x04: return (INT8)(value) < 0; // less than zero, byte
case 0x05: return (INT8)(value) != 0; // not equal to zero, byte
case 0x06: return (INT8)(value) <= 0; // less than or equal to zero, byte
case 0x07: return true; // always, byte
case 0x08: return false; // never, word
case 0x09: return (INT16)(value) > 0; // greater than zero, word
case 0x0a: return (INT16)(value) == 0; // equals zero, word
case 0x0b: return (INT16)(value) >= 0; // greater than or equal to zero, word
case 0x0c: return (INT16)(value) < 0; // less than zero, word
case 0x0d: return (INT16)(value) != 0; // not equal to zero, word
case 0x0e: return (INT16)(value) <= 0; // less than or equal to zero, word
case 0x0f: return true; // always, word
case 0x10: return false; // never, dword
case 0x11: return (INT32)(value) > 0; // greater than zero, dword
case 0x12: return (INT32)(value) == 0; // equals zero, dword
case 0x13: return (INT32)(value) >= 0; // greater than or equal to zero, dword
case 0x14: return (INT32)(value) < 0; // less than zero, dword
case 0x15: return (INT32)(value) != 0; // not equal to zero, dword
case 0x16: return (INT32)(value) <= 0; // less than or equal to zero, dword
case 0x17: return true; // always, dword
default: return false; // reserved
}
}
@ -66,7 +66,7 @@ void tms32082_mp_device::execute_short_imm()
{
switch ((m_ir >> 15) & 0x7f)
{
case 0x04: // rdcr
case 0x04: // rdcr
{
int rd = OP_RD();
INT32 imm = OP_SIMM15();
@ -78,7 +78,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x05: // swcr
case 0x05: // swcr
{
int rd = OP_RD();
int rs = OP_RS();
@ -92,7 +92,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x0b: // shift.ez
case 0x0b: // shift.ez
{
int r = (m_ir & (1 << 10));
int inv = (m_ir & (1 << 11));
@ -109,11 +109,11 @@ void tms32082_mp_device::execute_short_imm()
UINT32 compmask = endmask & shiftmask;
UINT32 res = 0;
if (r) // right
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
}
else // left
else // left
{
res = ROTATE_L(source, rot) & compmask;
}
@ -123,7 +123,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x0e: // shift.iz
case 0x0e: // shift.iz
{
int r = (m_ir & (1 << 10));
int inv = (m_ir & (1 << 11));
@ -139,11 +139,11 @@ void tms32082_mp_device::execute_short_imm()
UINT32 compmask = endmask & ~shiftmask;
UINT32 res = 0;
if (r) // right
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
}
else // left
else // left
{
res = ROTATE_L(source, rot) & compmask;
}
@ -153,7 +153,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x11: // and
case 0x11: // and
{
int rd = OP_RD();
int rs = OP_RS();
@ -164,7 +164,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x17: // or
case 0x17: // or
{
int rd = OP_RD();
int rs = OP_RS();
@ -176,7 +176,7 @@ void tms32082_mp_device::execute_short_imm()
}
case 0x36:
case 0x32: // st
case 0x32: // st
{
int rd = OP_RD();
int base = OP_BASE();
@ -192,7 +192,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x49: // bbz.a
case 0x49: // bbz.a
{
int bitnum = OP_BITNUM();
INT32 offset = OP_SIMM15();
@ -205,7 +205,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x4b: // bbo.a
case 0x4b: // bbo.a
{
int bitnum = OP_BITNUM();
INT32 offset = OP_SIMM15();
@ -218,7 +218,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x4d: // bcnd.a
case 0x4d: // bcnd.a
{
INT32 offset = OP_SIMM15();
int code = OP_RD();
@ -231,7 +231,7 @@ void tms32082_mp_device::execute_short_imm()
break;
}
case 0x50: // cmp
case 0x50: // cmp
{
UINT32 src1 = OP_SIMM15();
UINT32 src2 = m_reg[OP_RS()];
@ -262,45 +262,45 @@ void tms32082_mp_device::execute_short_imm()
UINT32 flags = 0;
// 32-bits (bits 20-29)
flags |= ((c32) & 1) << 29; // higher than or same (C)
flags |= ((~c32) & 1) << 28; // lower than (~C)
flags |= ((~c32|z32) & 1) << 27; // lower than or same (~C|Z)
flags |= ((c32&~z32) & 1) << 26; // higher than (C&~Z)
flags |= (((n32&v32)|(~n32&~v32)) & 1) << 25; // greater than or equal (N&V)|(~N&~V)
flags |= (((n32&~v32)|(~n32&v32)) & 1) << 24; // less than (N&~V)|(~N&V)
flags |= (((n32&~v32)|(~n32&v32)|(z32)) & 1) << 23; // less than or equal (N&~V)|(~N&V)|Z
flags |= (((n32&v32&~z32)|(~n32&~v32&~z32)) & 1) << 22; // greater than (N&V&~Z)|(~N&~V&~Z)
flags |= ((~z32) & 1) << 21; // not equal (~Z)
flags |= ((z32) & 1) << 20; // equal (Z)
flags |= ((c32) & 1) << 29; // higher than or same (C)
flags |= ((~c32) & 1) << 28; // lower than (~C)
flags |= ((~c32|z32) & 1) << 27; // lower than or same (~C|Z)
flags |= ((c32&~z32) & 1) << 26; // higher than (C&~Z)
flags |= (((n32&v32)|(~n32&~v32)) & 1) << 25; // greater than or equal (N&V)|(~N&~V)
flags |= (((n32&~v32)|(~n32&v32)) & 1) << 24; // less than (N&~V)|(~N&V)
flags |= (((n32&~v32)|(~n32&v32)|(z32)) & 1) << 23; // less than or equal (N&~V)|(~N&V)|Z
flags |= (((n32&v32&~z32)|(~n32&~v32&~z32)) & 1) << 22; // greater than (N&V&~Z)|(~N&~V&~Z)
flags |= ((~z32) & 1) << 21; // not equal (~Z)
flags |= ((z32) & 1) << 20; // equal (Z)
// 16-bits (bits 10-19)
flags |= ((c16) & 1) << 19; // higher than or same (C)
flags |= ((~c16) & 1) << 18; // lower than (~C)
flags |= ((~c16|z16) & 1) << 17; // lower than or same (~C|Z)
flags |= ((c16&~z16) & 1) << 16; // higher than (C&~Z)
flags |= (((n16&v16)|(~n16&~v16)) & 1) << 15; // greater than or equal (N&V)|(~N&~V)
flags |= (((n16&~v16)|(~n16&v16)) & 1) << 14; // less than (N&~V)|(~N&V)
flags |= (((n16&~v16)|(~n16&v16)|(z16)) & 1) << 13; // less than or equal (N&~V)|(~N&V)|Z
flags |= (((n16&v16&~z16)|(~n16&~v16&~z16)) & 1) << 12; // greater than (N&V&~Z)|(~N&~V&~Z)
flags |= ((~z16) & 1) << 11; // not equal (~Z)
flags |= ((z16) & 1) << 10; // equal (Z)
flags |= ((c16) & 1) << 19; // higher than or same (C)
flags |= ((~c16) & 1) << 18; // lower than (~C)
flags |= ((~c16|z16) & 1) << 17; // lower than or same (~C|Z)
flags |= ((c16&~z16) & 1) << 16; // higher than (C&~Z)
flags |= (((n16&v16)|(~n16&~v16)) & 1) << 15; // greater than or equal (N&V)|(~N&~V)
flags |= (((n16&~v16)|(~n16&v16)) & 1) << 14; // less than (N&~V)|(~N&V)
flags |= (((n16&~v16)|(~n16&v16)|(z16)) & 1) << 13; // less than or equal (N&~V)|(~N&V)|Z
flags |= (((n16&v16&~z16)|(~n16&~v16&~z16)) & 1) << 12; // greater than (N&V&~Z)|(~N&~V&~Z)
flags |= ((~z16) & 1) << 11; // not equal (~Z)
flags |= ((z16) & 1) << 10; // equal (Z)
// 8-bits (bits 0-9)
flags |= ((c8) & 1) << 9; // higher than or same (C)
flags |= ((~c8) & 1) << 8; // lower than (~C)
flags |= ((~c8|z8) & 1) << 7; // lower than or same (~C|Z)
flags |= ((c8&~z8) & 1) << 6; // higher than (C&~Z)
flags |= (((n8&v8)|(~n8&~v8)) & 1) << 5; // greater than or equal (N&V)|(~N&~V)
flags |= (((n8&~v8)|(~n8&v8)) & 1) << 4; // less than (N&~V)|(~N&V)
flags |= (((n8&~v8)|(~n8&v8)|(z8)) & 1) << 3; // less than or equal (N&~V)|(~N&V)|Z
flags |= (((n8&v8&~z8)|(~n8&~v8&~z8)) & 1) << 2; // greater than (N&V&~Z)|(~N&~V&~Z)
flags |= ((~z8) & 1) << 1; // not equal (~Z)
flags |= ((z8) & 1) << 0; // equal (Z)
flags |= ((c8) & 1) << 9; // higher than or same (C)
flags |= ((~c8) & 1) << 8; // lower than (~C)
flags |= ((~c8|z8) & 1) << 7; // lower than or same (~C|Z)
flags |= ((c8&~z8) & 1) << 6; // higher than (C&~Z)
flags |= (((n8&v8)|(~n8&~v8)) & 1) << 5; // greater than or equal (N&V)|(~N&~V)
flags |= (((n8&~v8)|(~n8&v8)) & 1) << 4; // less than (N&~V)|(~N&V)
flags |= (((n8&~v8)|(~n8&v8)|(z8)) & 1) << 3; // less than or equal (N&~V)|(~N&V)|Z
flags |= (((n8&v8&~z8)|(~n8&~v8&~z8)) & 1) << 2; // greater than (N&V&~Z)|(~N&~V&~Z)
flags |= ((~z8) & 1) << 1; // not equal (~Z)
flags |= ((z8) & 1) << 0; // equal (Z)
if (rd)
m_reg[rd] = flags;
break;
}
case 0x59: // addu
case 0x59: // addu
{
INT32 imm = OP_SIMM15();
int rd = OP_RD();
@ -327,7 +327,7 @@ void tms32082_mp_device::execute_reg_long_imm()
switch ((m_ir >> 12) & 0xff)
{
case 0x04: // cmnd
case 0x04: // cmnd
{
UINT32 data = has_imm ? imm32 : m_reg[OP_SRC1()];
@ -335,7 +335,7 @@ void tms32082_mp_device::execute_reg_long_imm()
break;
}
case 0x16: // shift.ez
case 0x16: // shift.ez
{
int r = (m_ir & (1 << 10));
int inv = (m_ir & (1 << 11));
@ -352,11 +352,11 @@ void tms32082_mp_device::execute_reg_long_imm()
UINT32 compmask = endmask & shiftmask;
UINT32 res = 0;
if (r) // right
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
}
else // left
else // left
{
res = ROTATE_L(source, rot) & compmask;
}
@ -367,7 +367,7 @@ void tms32082_mp_device::execute_reg_long_imm()
}
case 0x24:
case 0x25: // and.tf
case 0x25: // and.tf
{
int rd = OP_RD();
int rs = OP_RS();
@ -379,7 +379,7 @@ void tms32082_mp_device::execute_reg_long_imm()
}
case 0x2e:
case 0x2f: // or
case 0x2f: // or
{
int rd = OP_RD();
int rs = OP_RS();
@ -389,7 +389,7 @@ void tms32082_mp_device::execute_reg_long_imm()
break;
}
case 0x43: // ld.h
case 0x43: // ld.h
case 0x4b:
{
int shift = (m_ir & (1 << 11)) ? 1 : 0;
@ -401,7 +401,7 @@ void tms32082_mp_device::execute_reg_long_imm()
UINT32 address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
UINT32 r = m_program->read_word(address);
if (r & 0x8000) r |= 0xffff0000;
if (rd)
m_reg[rd] = r;
@ -411,7 +411,7 @@ void tms32082_mp_device::execute_reg_long_imm()
}
case 0x6d:
case 0x65: // st
case 0x65: // st
{
int shift = (m_ir & (1 << 11)) ? 2 : 0;
int m = m_ir & (1 << 15);
@ -427,7 +427,7 @@ void tms32082_mp_device::execute_reg_long_imm()
}
case 0x88:
case 0x89: // jsr
case 0x89: // jsr
{
int link = OP_LINK();
int base = OP_BASE();
@ -445,7 +445,7 @@ void tms32082_mp_device::execute_reg_long_imm()
}
case 0x8a:
case 0x8b: // jsr.a
case 0x8b: // jsr.a
{
int link = OP_LINK();
int base = OP_BASE();
@ -458,7 +458,7 @@ void tms32082_mp_device::execute_reg_long_imm()
}
case 0xb2:
case 0xb3: // addu
case 0xb3: // addu
{
int rd = OP_RD();
int rs = OP_RS();
@ -488,4 +488,4 @@ void tms32082_mp_device::execute()
execute_reg_long_imm();
break;
}
}
}

8
src/emu/cpu/tms32082/tms32082.c
View File

@ -1,7 +1,7 @@
/*
Texas Instruments TMS320C82 DSP Emulator
Texas Instruments TMS320C82 DSP Emulator
Written by Ville Linde
Written by Ville Linde
*/
@ -213,7 +213,7 @@ UINT32 tms32082_mp_device::read_creg(int reg)
{
switch (reg)
{
case 0xa: // PPERROR
case 0xa: // PPERROR
return 0;
default:
@ -258,4 +258,4 @@ void tms32082_mp_device::execute_run()
};
return;
}
}

4
src/emu/cpu/tms32082/tms32082.h
View File

@ -64,7 +64,7 @@ protected:
virtual UINT32 execute_max_cycles() const { return 1; }
virtual UINT32 execute_input_lines() const { return 0; }
virtual void execute_run();
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
{
@ -114,4 +114,4 @@ protected:
extern const device_type TMS32082_MP;
#endif /* __TMS32082_H__ */
#endif /* __TMS32082_H__ */

24
src/emu/debug/debugcpu.c
View File

@ -3278,19 +3278,19 @@ void device_debug::set_state(symbol_table &table, void *ref, UINT64 value)
// breakpoint - constructor
//-------------------------------------------------
device_debug::breakpoint::breakpoint(device_debug* debugInterface,
symbol_table &symbols,
int index,
offs_t address,
const char *condition,
const char *action)
device_debug::breakpoint::breakpoint(device_debug* debugInterface,
symbol_table &symbols,
int index,
offs_t address,
const char *condition,
const char *action)
: m_debugInterface(debugInterface),
m_next(NULL),
m_index(index),
m_enabled(true),
m_address(address),
m_condition(&symbols, (condition != NULL) ? condition : "1"),
m_action((action != NULL) ? action : "")
m_next(NULL),
m_index(index),
m_enabled(true),
m_address(address),
m_condition(&symbols, (condition != NULL) ? condition : "1"),
m_action((action != NULL) ? action : "")
{
}

28
src/emu/debug/debugcpu.h
View File

@ -80,11 +80,11 @@ public:
public:
// construction/destruction
breakpoint(device_debug* debugInterface,
symbol_table &symbols,
int index,
offs_t address,
const char *condition = NULL,
const char *action = NULL);
symbol_table &symbols,
int index,
offs_t address,
const char *condition = NULL,
const char *action = NULL);
// getters
const device_debug *debugInterface() const { return m_debugInterface; }
@ -118,14 +118,14 @@ public:
public:
// construction/destruction
watchpoint(symbol_table &symbols,
int index,
address_space &space,
int type,
offs_t address,
offs_t length,
const char *condition = NULL,
const char *action = NULL);
watchpoint(symbol_table &symbols,
int index,
address_space &space,
int type,
offs_t address,
offs_t length,
const char *condition = NULL,
const char *action = NULL);
// getters
watchpoint *next() const { return m_next; }
@ -193,7 +193,7 @@ public:
int logaddrchars(address_spacenum spacenum = AS_0) const { return (m_memory != NULL && m_memory->has_space(spacenum)) ? m_memory->space(spacenum).logaddrchars() : 8; }
int min_opcode_bytes() const { return (m_disasm != NULL) ? m_disasm->max_opcode_bytes() : 1; }
int max_opcode_bytes() const { return (m_disasm != NULL) ? m_disasm->max_opcode_bytes() : 1; }
device_t& device() const { return m_device; }
device_t& device() const { return m_device; }
// hooks used by the rest of the system

36
src/emu/debug/dvbpoints.c
View File

@ -2,7 +2,7 @@
dvpoints.c
Breakpoint debugger view.
Breakpoint debugger view.
****************************************************************************
@ -52,7 +52,7 @@
debug_view_breakpoints::debug_view_breakpoints(running_machine &machine, debug_view_osd_update_func osdupdate, void *osdprivate)
: debug_view(machine, DVT_BREAK_POINTS, osdupdate, osdprivate),
m_sortType(SORT_INDEX_ASCENDING)
m_sortType(SORT_INDEX_ASCENDING)
{
// fail if no available sources
enumerate_sources();
@ -126,7 +126,7 @@ void debug_view_breakpoints::view_char(int chval)
void debug_view_breakpoints::view_click(const int button, const debug_view_xy& pos)
{
bool clickedTopRow = (m_topleft.y == pos.y);
if (clickedTopRow)
{
if (pos.x < 5 && m_sortType == SORT_INDEX_ASCENDING)
@ -163,13 +163,13 @@ void debug_view_breakpoints::view_click(const int button, const debug_view_xy& p
const int bpIndex = pos.y-1;
if (bpIndex > numBPs || bpIndex < 0)
return;
// Enable / disable
if (bpList[bpIndex]->enabled())
bpList[bpIndex]->setEnabled(false);
else
bpList[bpIndex]->setEnabled(true);
delete[] bpList;
}
@ -295,7 +295,7 @@ int debug_view_breakpoints::breakpoints(SortMode sort, device_debug::breakpoint*
numBPs++;
bpList = new device_debug::breakpoint*[numBPs];
}
int bpAddIndex = 1;
for (const debug_view_source *source = m_source_list.head(); source != NULL; source = source->next())
{
@ -310,7 +310,7 @@ int debug_view_breakpoints::breakpoints(SortMode sort, device_debug::breakpoint*
}
}
}
// And now for the sort
switch (m_sortType)
{
@ -353,7 +353,7 @@ int debug_view_breakpoints::breakpoints(SortMode sort, device_debug::breakpoint*
qsort(bpList, numBPs, sizeof(device_debug::breakpoint*), cActionDescending);
break;
}
return numBPs;
}
@ -368,7 +368,7 @@ void debug_view_breakpoints::view_update()
// Gather a list of all the breakpoints for all the CPUs
device_debug::breakpoint** bpList = NULL;
const int numBPs = breakpoints(SORT_NONE, bpList);
// Set the view region so the scroll bars update
m_total.y = numBPs+1;
@ -377,7 +377,7 @@ void debug_view_breakpoints::view_update()
for (int row = 0; row < m_visible.y; row++)
{
UINT32 effrow = m_topleft.y + row;
// Header
if (row == 0)
{
@ -406,7 +406,7 @@ void debug_view_breakpoints::view_update()
if (m_sortType == SORT_ACTION_ASCENDING) header.catprintf("\\");
else if (m_sortType == SORT_ACTION_DESCENDING) header.catprintf("/");
pad_astring_to_length(header, 80);
for (int i = 0; i < m_visible.x; i++)
{
dest->byte = (i < header.len()) ? header[i] : ' ';
@ -421,8 +421,8 @@ void debug_view_breakpoints::view_update()
if (bpi < numBPs && bpi >= 0)
{
device_debug::breakpoint* bp = bpList[bpi];
astring buffer;
astring buffer;
buffer.printf("%x", bp->index());
pad_astring_to_length(buffer, 5);
buffer.catprintf("%c", bp->enabled() ? 'X' : 'O');
@ -441,21 +441,21 @@ void debug_view_breakpoints::view_update()
buffer.catprintf("%s", bp->action());
pad_astring_to_length(buffer, 80);
}
for (int i = 0; i < m_visible.x; i++)
{
dest->byte = (i < buffer.len()) ? buffer[i] : ' ';
dest->attrib = DCA_NORMAL;
// Color disabled breakpoints red
if (i == 5 && dest->byte == 'O')
dest->attrib = DCA_CHANGED;
dest++;
}
continue;
}
// Fill the remaining vertical space
for (int i = 0; i < m_visible.x; i++)
{
@ -464,6 +464,6 @@ void debug_view_breakpoints::view_update()
dest++;
}
}
delete[] bpList;
}

38
src/emu/debug/dvbpoints.h
View File

@ -2,7 +2,7 @@
dvpoints.h
Breakpoint debugger view.
Breakpoint debugger view.
****************************************************************************
@ -64,23 +64,23 @@ class debug_view_breakpoints : public debug_view
virtual ~debug_view_breakpoints();
public:
enum SortMode
{
SORT_NONE,
SORT_INDEX_ASCENDING,
SORT_INDEX_DESCENDING,
SORT_ENABLED_ASCENDING,
SORT_ENABLED_DESCENDING,
SORT_CPU_ASCENDING,
SORT_CPU_DESCENDING,
SORT_ADDRESS_ASCENDING,
SORT_ADDRESS_DESCENDING,
SORT_CONDITION_ASCENDING,
SORT_CONDITION_DESCENDING,
SORT_ACTION_ASCENDING,
SORT_ACTION_DESCENDING
};
enum SortMode
{
SORT_NONE,
SORT_INDEX_ASCENDING,
SORT_INDEX_DESCENDING,
SORT_ENABLED_ASCENDING,
SORT_ENABLED_DESCENDING,
SORT_CPU_ASCENDING,
SORT_CPU_DESCENDING,
SORT_ADDRESS_ASCENDING,
SORT_ADDRESS_DESCENDING,
SORT_CONDITION_ASCENDING,
SORT_CONDITION_DESCENDING,
SORT_ACTION_ASCENDING,
SORT_ACTION_DESCENDING
};
// getters
// setters
@ -100,7 +100,7 @@ private:
// internal state
SortMode m_sortType;
SortMode m_sortType;
};

2
src/emu/driver.c
View File

@ -919,4 +919,4 @@ PALETTE_INIT_MEMBER(driver_device, RRRRR_GGGGGG_BBBBB)
for (i = 0; i < 0x10000; i++)
palette_set_color(machine(), i, MAKE_RGB(pal5bit(i >> 11), pal6bit(i >> 5), pal5bit(i >> 0)));
}
}

2
src/emu/driver.h
View File

@ -381,7 +381,7 @@ public:
// general fatal error handlers
DECLARE_READ8_MEMBER( fatal_generic_read );
DECLARE_WRITE8_MEMBER( fatal_generic_write );
// generic palette init routines
DECLARE_PALETTE_INIT( all_black );
DECLARE_PALETTE_INIT( black_and_white );

12
src/emu/drivlgcy.h
View File

@ -51,23 +51,23 @@
#define MCFG_MACHINE_RESET(_func) \
driver_device::static_set_callback(*owner, driver_device::CB_MACHINE_RESET, MACHINE_RESET_NAME(_func));
#define MCFG_SOUND_START(_func) \
driver_device::static_set_callback(*owner, driver_device::CB_SOUND_START, SOUND_START_NAME(_func));
#define MCFG_SOUND_RESET(_func) \
driver_device::static_set_callback(*owner, driver_device::CB_SOUND_RESET, SOUND_RESET_NAME(_func));
#define MCFG_PALETTE_INIT(_func) \
driver_device::static_set_callback(*owner, driver_device::CB_PALETTE_INIT, PALETTE_INIT_NAME(_func));
#define MCFG_VIDEO_START(_func) \
driver_device::static_set_callback(*owner, driver_device::CB_VIDEO_START, VIDEO_START_NAME(_func));
#define MCFG_VIDEO_RESET(_func) \
driver_device::static_set_callback(*owner, driver_device::CB_VIDEO_RESET, VIDEO_RESET_NAME(_func));
#define MACHINE_START_CALL(name) MACHINE_START_NAME(name)(machine)
#define MACHINE_RESET_CALL(name) MACHINE_RESET_NAME(name)(machine)

2
src/emu/machine/68307.c
View File

@ -205,7 +205,7 @@ void m68307cpu_device::device_start()
/* basic CS logic, timers, mbus, serial logic
set via remappable register
*/
init16_m68307(*program);
m68307SIM = new m68307_sim();

2
src/emu/machine/68307.h
View File

@ -96,4 +96,4 @@ extern void m68307_serial_interrupt(m68307cpu_device *cpudev, int vector);
extern void m68307_mbus_interrupt(m68307cpu_device *cpudev);
extern void m68307_licr2_interrupt(m68307cpu_device *cpudev);
#endif
#endif

2
src/emu/machine/68340.c
View File

@ -146,5 +146,3 @@ void m68340cpu_device::device_start()
internal = &this->space(AS_PROGRAM);
}

2
src/emu/machine/68340.h
View File

@ -65,4 +65,4 @@ extern UINT16 m68340_get_cs(m68340cpu_device *device, offs_t address);
#endif
#endif

4
src/emu/machine/ds2404.c
View File

@ -96,7 +96,7 @@ void ds2404_device::device_start()
m_rtc[2] = (current_time >> 8) & 0xff;
m_rtc[3] = (current_time >> 16) & 0xff;
m_rtc[4] = (current_time >> 24) & 0xff;
for (int i = 0; i < 8; i++)
m_state[i] = DS2404_STATE_IDLE;
@ -361,7 +361,7 @@ void ds2404_device::device_timer(emu_timer &timer, device_timer_id id, int param
break;
}
}
break;
}

2
src/emu/machine/jvsdev.c
View File

@ -8,7 +8,7 @@ void jvs_device::static_set_jvs_host_tag(device_t &device, const char *jvs_host_
}
jvs_device::jvs_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
{
jvs_host_tag = 0;
next_device = 0;

4
src/emu/machine/jvshost.c
View File

@ -26,8 +26,8 @@ void jvs_host::device_reset()
memset(recv_buffer, 0, sizeof(recv_buffer));
}
jvs_host::jvs_host(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
jvs_host::jvs_host(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
{
first_device = 0;
}

2
src/emu/machine/k053252.h
View File

@ -19,7 +19,7 @@ struct k053252_interface
};
class k053252_device : public device_t,
public k053252_interface
public k053252_interface
{
public:
k053252_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);

4
src/emu/machine/tmp68301.c
View File

@ -14,7 +14,7 @@
const device_type TMP68301 = &device_creator<tmp68301_device>;
tmp68301_device::tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__)
: device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__)
{
}
@ -50,7 +50,7 @@ void tmp68301_device::device_reset()
for (i = 0; i < 3; i++)
m_IE[i] = 0;
machine().firstcpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(tmp68301_device::irq_callback),this));
machine().firstcpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(tmp68301_device::irq_callback),this));
}

4
src/emu/machine/tmp68301.h
View File

@ -21,7 +21,7 @@ protected:
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
private:
// internal state
UINT16 m_regs[0x400];
@ -30,7 +30,7 @@ private:
emu_timer *m_tmp68301_timer[3]; // 3 Timers
int m_irq_vector[8];
TIMER_CALLBACK_MEMBER( timer_callback );
void update_timer( int i );
IRQ_CALLBACK_MEMBER(irq_callback);

2
src/emu/memory.h
View File

@ -753,7 +753,7 @@ private:
void * m_ptr; // pointer to the memory backing the region
size_t m_bytes; // size of the shared region in bytes
UINT8 m_width; // width of the shared region
endianness_t m_endianness; // endianness of the memory
endianness_t m_endianness; // endianness of the memory
};

4
src/emu/scrlegcy.h
View File

@ -55,8 +55,8 @@
screen_device::static_set_screen_update(*device, screen_update_delegate_smart(&screen_update_##_func, "screen_update_" #_func));
#define MCFG_SCREEN_VBLANK_STATIC(_func) \
screen_device::static_set_screen_vblank(*device, screen_vblank_delegate(&screen_vblank_##_func, "screen_vblank_" #_func));
//**************************************************************************
// INLINE HELPERS
//**************************************************************************

2
src/emu/sound/es5506.c
View File

@ -194,7 +194,7 @@ struct es5506_state
UINT16 * volume_lookup;
device_t *device;
int channels; /* the number of output stereo channels: 1..4 for 5505, 1..6 for 5506 */
int channels; /* the number of output stereo channels: 1..4 for 5505, 1..6 for 5506 */
#if MAKE_WAVS
void * wavraw; /* raw waveform */

10
src/emu/sound/hc55516.h
View File

@ -19,7 +19,7 @@ public:
/* returns whether the clock is currently LO or HI */
int clock_state_r();
protected:
// device-level overrides
virtual void device_config_complete();
@ -28,9 +28,9 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
void start_common(UINT8 _shiftreg_mask, int _active_clock_hi);
// internal state
sound_stream *m_channel;
int m_active_clock_hi;
@ -48,11 +48,11 @@ protected:
double m_filter;
double m_integrator;
double m_charge;
double m_decay;
double m_leak;
inline int is_external_oscillator();
inline int is_active_clock_transition(int clock_state);
inline int current_clock_state();

3
src/emu/sound/k007232.c
View File

@ -149,7 +149,6 @@ k007232_device::k007232_device(const machine_config &mconfig, const char *tag, d
: device_t(mconfig, K007232, "K007232", tag, owner, clock, "k007232", __FILE__),
device_sound_interface(mconfig, *this)
{
}
//-------------------------------------------------
@ -198,7 +197,7 @@ void k007232_device::device_start()
m_vol[1][0] = 0;
m_vol[1][1] = 255; /* channel B output to output B */
for (int i = 0; i < 0x10; i++)
for (int i = 0; i < 0x10; i++)
m_wreg[i] = 0;
m_stream = machine().sound().stream_alloc(*this, 0 , 2, clock()/128, this);

20
src/emu/sound/k007232.h
View File

@ -24,19 +24,19 @@ public:
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( read );
/*
The 007232 has two channels and produces two outputs. The volume control
is external, however to make it easier to use we handle that inside the
emulation. You can control volume and panning: for each of the two channels
you can set the volume of the two outputs. If panning is not required,
then volumeB will be 0 for channel 0, and volumeA will be 0 for channel 1.
Volume is in the range 0-255.
The 007232 has two channels and produces two outputs. The volume control
is external, however to make it easier to use we handle that inside the
emulation. You can control volume and panning: for each of the two channels
you can set the volume of the two outputs. If panning is not required,
then volumeB will be 0 for channel 0, and volumeA will be 0 for channel 1.
Volume is in the range 0-255.
*/
void set_volume(int channel,int volumeA,int volumeB);
void set_bank( int chABank, int chBBank );
protected:
// device-level overrides
virtual void device_config_complete();
@ -44,7 +44,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
void KDAC_A_make_fncode();
private:

4
src/emu/sound/k056800.c
View File

@ -106,12 +106,12 @@ void k056800_device::sound_reg_w( int reg, UINT8 data )
void k056800_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
{
case TIMER_TICK_SOUND_CPU:
if (m_sound_cpu_irq1_enable)
m_irq_cb_func(machine(), 0);
break;
default:
assert_always(FALSE, "Unknown id in k056800_device::device_timer");
}

10
src/emu/sound/k056800.h
View File

@ -31,7 +31,7 @@ public:
{
TIMER_TICK_SOUND_CPU
};
DECLARE_READ32_MEMBER( host_r );
DECLARE_WRITE32_MEMBER( host_w );
DECLARE_READ16_MEMBER( sound_r );
@ -42,7 +42,7 @@ protected:
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@ -51,13 +51,13 @@ private:
UINT8 m_sound_reg[8];
emu_timer *m_sound_cpu_timer;
UINT8 m_sound_cpu_irq1_enable;
k056800_irq_cb m_irq_cb_func;
k056800_irq_cb m_irq_cb_func;
UINT8 host_reg_r( int reg );
void host_reg_w( int reg, UINT8 data );
UINT8 sound_reg_r( int reg );
void sound_reg_w( int reg, UINT8 data );
};
extern const device_type K056800;

2
src/emu/sound/msm5232.c
View File

@ -29,7 +29,7 @@ void msm5232_device::device_config_complete()
const msm5232_interface *intf = reinterpret_cast<const msm5232_interface *>(static_config());
if (intf != NULL)
*static_cast<msm5232_interface *>(this) = *intf;
// or initialize to defaults if none provided
else
{

4
src/emu/sound/msm5232.h
View File

@ -49,7 +49,7 @@ public:
~msm5232_device() {}
DECLARE_WRITE8_MEMBER( write );
void set_clock(int clock);
void set_clock(int clock);
protected:
// device-level overrides
@ -93,7 +93,7 @@ protected:
double m_external_capacity[8]; /* in Farads, eg 0.39e-6 = 0.36 uF (microFarads) */
devcb_resolved_write_line m_gate_handler_func;/* callback called when the GATE output pin changes state */
void init_tables();
void init_voice(int i);
void gate_update();

44
src/emu/sound/namco.c
View File

@ -72,7 +72,7 @@ namco_cus30_device::namco_cus30_device(const machine_config &mconfig, const char
void namco_audio_device::device_config_complete()
{
// inherit a copy of the static data
// inherit a copy of the static data
const namco_interface *intf = reinterpret_cast<const namco_interface *>(static_config());
if (intf != NULL)
*static_cast<namco_interface *>(this) = *intf;
@ -96,7 +96,7 @@ void namco_audio_device::device_start()
/* extract globals from the interface */
m_last_channel = m_channel_list + m_voices;
m_soundregs = auto_alloc_array_clear(machine(), UINT8, 0x400);
/* adjust internal clock */
@ -559,7 +559,7 @@ WRITE8_MEMBER(namco_15xx_device::namco_15xx_w)
0x3c ch 0 noise sw
*/
WRITE8_MEMBER(namco_cus30_device::namcos1_sound_w)
WRITE8_MEMBER(namco_cus30_device::namcos1_sound_w)
{
sound_channel *voice;
int ch;
@ -664,7 +664,7 @@ WRITE8_MEMBER( namco_15xx_device::sharedram_w )
void namco_audio_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
if (m_stereo)
if (m_stereo)
{
sound_channel *voice;
@ -774,16 +774,16 @@ void namco_audio_device::sound_stream_update(sound_stream &stream, stream_sample
else
{
sound_channel *voice;
stream_sample_t *buffer = outputs[0];
/* zap the contents of the buffer */
memset(buffer, 0, samples * sizeof(*buffer));
/* if no sound, we're done */
if (m_sound_enable == 0)
return;
/* loop over each voice and add its contribution */
for (voice = m_channel_list; voice < m_last_channel; voice++)
{
@ -801,25 +801,25 @@ void namco_audio_device::sound_stream_update(sound_stream &stream, stream_sample
UINT32 c = voice->noise_counter;
INT16 noise_data = OUTPUT_LEVEL(0x07 * (v >> 1));
int i;
/* add our contribution */
for (i = 0; i < samples; i++)
{
int cnt;
if (voice->noise_state)
*mix++ += noise_data;
else
*mix++ -= noise_data;
if (hold)
{
hold--;
continue;
}
hold = hold_time;
c += delta;
cnt = (c >> 12);
c &= (1 << 12) - 1;
@ -830,7 +830,7 @@ void namco_audio_device::sound_stream_update(sound_stream &stream, stream_sample
voice->noise_seed >>= 1;
}
}
/* update the counter and hold time for this voice */
voice->noise_counter = c;
voice->noise_hold = hold;
@ -842,26 +842,26 @@ void namco_audio_device::sound_stream_update(sound_stream &stream, stream_sample
if (v && voice->frequency)
{
const INT16 *w = &m_waveform[v][voice->waveform_select * 32];
/* generate sound into buffer and update the counter for this voice */
voice->counter = namco_update_one(mix, samples, w, voice->counter, voice->frequency);
}
}
}
}
}
}
void namco_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
namco_audio_device::sound_stream_update(stream, inputs, outputs, samples);
namco_audio_device::sound_stream_update(stream, inputs, outputs, samples);
}
void namco_15xx_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
namco_audio_device::sound_stream_update(stream, inputs, outputs, samples);
namco_audio_device::sound_stream_update(stream, inputs, outputs, samples);
}
void namco_cus30_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
namco_audio_device::sound_stream_update(stream, inputs, outputs, samples);
}
namco_audio_device::sound_stream_update(stream, inputs, outputs, samples);
}

160
src/emu/sound/namco.h
View File

@ -2,122 +2,122 @@
#ifndef __NAMCO_H__
#define __NAMCO_H__
/* 8 voices max */
#define MAX_VOICES 8
#define MAX_VOLUME 16
struct namco_interface
{
int m_voices; /* number of voices */
int m_voices; /* number of voices */
int m_stereo; /* set to 1 to indicate stereo (e.g., System 1) */
};
/* this structure defines the parameters for a channel */
struct sound_channel
{
UINT32 frequency;
UINT32 counter;
INT32 volume[2];
INT32 noise_sw;
INT32 noise_state;
INT32 noise_seed;
UINT32 noise_counter;
INT32 noise_hold;
INT32 waveform_select;
UINT32 frequency;
UINT32 counter;
INT32 volume[2];
INT32 noise_sw;
INT32 noise_state;
INT32 noise_seed;
UINT32 noise_counter;
INT32 noise_hold;
INT32 waveform_select;
};
class namco_audio_device : public device_t,
public device_sound_interface,
public namco_interface
public device_sound_interface,
public namco_interface
{
public:
namco_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
~namco_audio_device() {}
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
// internal state
void build_decoded_waveform( UINT8 *rgnbase );
void update_namco_waveform(int offset, UINT8 data);
UINT32 namco_update_one(stream_sample_t *buffer, int length, const INT16 *wave, UINT32 counter, UINT32 freq);
/* data about the sound system */
sound_channel m_channel_list[MAX_VOICES];
sound_channel *m_last_channel;
UINT8 *m_soundregs;
UINT8 *m_wavedata;
/* global sound parameters */
int m_wave_size;
INT32 m_sound_enable;
sound_stream *m_stream;
int m_namco_clock;
int m_sample_rate;
int m_f_fracbits;
namco_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
~namco_audio_device() {}
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
// internal state
void build_decoded_waveform( UINT8 *rgnbase );
void update_namco_waveform(int offset, UINT8 data);
UINT32 namco_update_one(stream_sample_t *buffer, int length, const INT16 *wave, UINT32 counter, UINT32 freq);
/* data about the sound system */
sound_channel m_channel_list[MAX_VOICES];
sound_channel *m_last_channel;
UINT8 *m_soundregs;
UINT8 *m_wavedata;
/* global sound parameters */
int m_wave_size;
INT32 m_sound_enable;
sound_stream *m_stream;
int m_namco_clock;
int m_sample_rate;
int m_f_fracbits;
/* decoded waveform table */
INT16 *m_waveform[MAX_VOLUME];
INT16 *m_waveform[MAX_VOLUME];
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
};
class namco_device : public namco_audio_device
{
public:
namco_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( pacman_sound_enable_w );
DECLARE_WRITE8_MEMBER( pacman_sound_w );
void polepos_sound_enable(int enable);
DECLARE_READ8_MEMBER( polepos_sound_r );
DECLARE_WRITE8_MEMBER( polepos_sound_w );
namco_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( pacman_sound_enable_w );
DECLARE_WRITE8_MEMBER( pacman_sound_w );
void polepos_sound_enable(int enable);
DECLARE_READ8_MEMBER( polepos_sound_r );
DECLARE_WRITE8_MEMBER( polepos_sound_w );
protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
};
extern const device_type NAMCO;
class namco_15xx_device : public namco_audio_device
{
public:
namco_15xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( namco_15xx_w );
DECLARE_READ8_MEMBER( sharedram_r );
DECLARE_WRITE8_MEMBER( sharedram_w );
void mappy_sound_enable(int enable);
namco_15xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( namco_15xx_w );
DECLARE_READ8_MEMBER( sharedram_r );
DECLARE_WRITE8_MEMBER( sharedram_w );
void mappy_sound_enable(int enable);
protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
};
extern const device_type NAMCO_15XX;
class namco_cus30_device : public namco_audio_device
{
public:
namco_cus30_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( namcos1_cus30_w ); /* wavedata + sound registers + RAM */
DECLARE_READ8_MEMBER( namcos1_cus30_r );
DECLARE_WRITE8_MEMBER( namcos1_sound_w );
namco_cus30_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( namcos1_cus30_w ); /* wavedata + sound registers + RAM */
DECLARE_READ8_MEMBER( namcos1_cus30_r );
DECLARE_WRITE8_MEMBER( namcos1_sound_w );
DECLARE_WRITE8_MEMBER( pacman_sound_w );
protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
};
extern const device_type NAMCO_CUS30;
#endif /* __NAMCO_H__ */

2
src/emu/sound/sound.mak
View File

@ -157,7 +157,7 @@ endif
#-------------------------------------------------
# Excellent Systems ADPCM sound chip
#@src/emu/sound/es8712.h,SOUNDS += ES8712
#@src/emu/sound/es8712.h,SOUNDS += ES8712
#-------------------------------------------------
ifneq ($(filter ES8712,$(SOUNDS)),)

10
src/emu/sound/upd7759.c
View File

@ -189,7 +189,7 @@ upd775x_device::upd775x_device(const machine_config &mconfig, device_type type,
m_rom(NULL),
m_rombase(NULL),
m_romoffset(0),
m_rommask(0)
m_rommask(0)
{
}
@ -260,7 +260,7 @@ void upd7759_device::device_start()
{
assert(type() == UPD7759); // other chips do not support slave mode
m_timer = timer_alloc(TIMER_SLAVE_UPDATE);
m_rommask = 0;
m_rommask = 0;
}
else
{
@ -331,7 +331,7 @@ void upd7756_device::device_start()
m_rom = m_rombase = *region();
if (m_rombase == NULL)
{
m_rommask = 0;
m_rommask = 0;
}
else
{
@ -707,11 +707,11 @@ void upd775x_device::advance_state()
void upd7759_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
UINT8 olddrq = m_drq;
switch (id)
{
case TIMER_SLAVE_UPDATE:
/* update the stream */
m_channel->update();

20
src/emu/sound/upd7759.h
View File

@ -33,7 +33,7 @@ public:
int busy_r();
DECLARE_WRITE8_MEMBER( port_w );
void postload();
protected:
// device-level overrides
virtual void device_config_complete();
@ -42,7 +42,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
// internal state
sound_stream *m_channel; /* stream channel for playback */
@ -53,13 +53,13 @@ protected:
UINT32 m_pos; /* current output sample position */
UINT32 m_step; /* step value per output sample */
attotime m_clock_period; /* clock period */
/* I/O lines */
UINT8 m_fifo_in; /* last data written to the sound chip */
UINT8 m_reset; /* current state of the RESET line */
UINT8 m_start; /* current state of the START line */
UINT8 m_drq; /* current state of the DRQ line */
/* internal state machine */
INT8 m_state; /* current overall chip state */
INT32 m_clocks_left; /* number of clocks left in this state */
@ -85,7 +85,7 @@ protected:
UINT8 * m_rombase; /* pointer to ROM data or NULL for slave mode */
UINT32 m_romoffset; /* ROM offset to make save/restore easier */
UINT32 m_rommask; /* maximum address offset */
void update_adpcm(int data);
void advance_state();
};
@ -94,19 +94,19 @@ class upd7759_device : public upd775x_device
{
public:
upd7759_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
enum
{
TIMER_SLAVE_UPDATE
};
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
emu_timer *m_timer; /* timer */
void start_w(UINT8 data);
};
@ -118,7 +118,7 @@ public:
virtual void device_start();
virtual void device_reset();
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
void start_w(UINT8 data);
};

2
src/emu/sound/vlm5030.c
View File

@ -225,7 +225,7 @@ void vlm5030_device::device_config_complete()
void vlm5030_device::device_start()
{
m_coeff = &vlm5030_coeff;
/* reset input pins */
m_pin_RST = m_pin_ST = m_pin_VCU= 0;
m_latch_data = 0;

60
src/emu/sound/vlm5030.h
View File

@ -4,35 +4,35 @@
#define __VLM5030_H__
struct vlm5030_interface
{
int m_memory_size; /* memory size of speech rom (0=memory region length) */
};
class vlm5030_device : public device_t,
public device_sound_interface,
public vlm5030_interface
{
public:
vlm5030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~vlm5030_device() {}
/* set speech rom address */
void set_rom(void *speech_rom);
/* get BSY pin level */
int bsy();
/* latch contoll data */
DECLARE_WRITE8_MEMBER( data_w );
/* set RST pin level : reset / set table address A8-A15 */
void rst (int pin );
/* set VCU pin level : ?? unknown */
void vcu( int pin );
/* set ST pin level : set table address A0-A7 / start speech */
struct vlm5030_interface
{
int m_memory_size; /* memory size of speech rom (0=memory region length) */
};
class vlm5030_device : public device_t,
public device_sound_interface,
public vlm5030_interface
{
public:
vlm5030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~vlm5030_device() {}
/* set speech rom address */
void set_rom(void *speech_rom);
/* get BSY pin level */
int bsy();
/* latch contoll data */
DECLARE_WRITE8_MEMBER( data_w );
/* set RST pin level : reset / set table address A8-A15 */
void rst (int pin );
/* set VCU pin level : ?? unknown */
void vcu( int pin );
/* set ST pin level : set table address A0-A7 / start speech */
void st( int pin );
protected:
@ -92,7 +92,7 @@ private:
int m_current_k[10];
INT32 m_x[10];
int get_bits(int sbit,int bits);
int parse_frame();
void update();

6
src/emu/sound/x1_010.c
View File

@ -109,7 +109,7 @@ void x1_010_device::device_config_complete()
const x1_010_interface *intf = reinterpret_cast<const x1_010_interface *>(static_config());
if (intf != NULL)
*static_cast<x1_010_interface *>(this) = *intf;
// or initialize to defaults if none provided
else
{
@ -128,7 +128,7 @@ void x1_010_device::device_start()
m_region = *region();
m_base_clock = clock();
m_rate = clock() / 1024;
for( i = 0; i < SETA_NUM_CHANNELS; i++ ) {
m_smp_offset[i] = 0;
m_env_offset[i] = 0;
@ -138,7 +138,7 @@ void x1_010_device::device_start()
/* get stream channels */
m_stream = machine().sound().stream_alloc(*this, 0, 2, m_rate, this);
save_item(NAME(m_rate));
save_item(NAME(m_sound_enable));
save_item(NAME(m_reg));

2
src/emu/sound/x1_010.h
View File

@ -36,7 +36,7 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
// internal state
/* Variables only used here */
int m_rate; // Output sampling rate (Hz)
sound_stream * m_stream; // Stream handle

30
src/emu/sound/ymf271.c
View File

@ -497,7 +497,7 @@ void ymf271_device::update_pcm(int slotnum, INT32 *mixp, int length)
*mixp++ += (sample * ch0_vol) >> 16;
*mixp++ += (sample * ch1_vol) >> 16;
// go to next step
slot->stepptr += slot->step;
}
@ -508,11 +508,11 @@ INT64 ymf271_device::calculate_op(int slotnum, INT64 inp)
{
YMF271Slot *slot = &m_slots[slotnum];
INT64 env, slot_output, slot_input = 0;
update_envelope(slot);
update_lfo(slot);
env = calculate_slot_volume(slot);
if (inp == OP_INPUT_FEEDBACK)
{
// from own feedback
@ -524,11 +524,11 @@ INT64 ymf271_device::calculate_op(int slotnum, INT64 inp)
// from previous slot output
slot_input = ((inp << (SIN_BITS-2)) * modulation_level[slot->feedback]);
}
slot_output = m_lut_waves[slot->waveform][((slot->stepptr + slot_input) >> 16) & SIN_MASK];
slot_output = (slot_output * env) >> 16;
slot->stepptr += slot->step;
return slot_output;
}
@ -702,7 +702,7 @@ void ymf271_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// --[S4]--|
// --[S2]--|
// <--------| |
// +--[S1]--|--+--[S3]--+-->
// +--[S1]--|--+--[S3]--+-->
case 10:
phase_mod1 = calculate_op(slot1, OP_INPUT_FEEDBACK);
set_feedback(slot1, phase_mod1);
@ -714,7 +714,7 @@ void ymf271_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// --[S4]-----|
// --[S2]-----|
// <-----------------| |
// +--[S1]--+--[S3]--|--+-->
// +--[S1]--+--[S3]--|--+-->
case 11:
phase_mod1 = calculate_op(slot1, OP_INPUT_FEEDBACK);
phase_mod3 = calculate_op(slot3, phase_mod1);
@ -1298,7 +1298,7 @@ void ymf271_device::device_timer(emu_timer &timer, device_timer_id id, int param
// reload timer
m_timB->adjust(attotime::from_hz(m_clock) * (384 * 16 * (256 - m_timerB)), 0);
break;
default:
assert_always(FALSE, "Unknown id in ymf271_device::device_timer");
break;
@ -1416,7 +1416,7 @@ void ymf271_device::ymf271_write_timer(UINT8 address, UINT8 data)
if (!m_ext_rw && !m_ext_write_handler.isnull())
m_ext_write_handler(m_ext_address, data);
break;
case 0x20:
case 0x21:
case 0x22:
@ -1432,7 +1432,7 @@ void ymf271_device::ymf271_write_timer(UINT8 address, UINT8 data)
WRITE8_MEMBER( ymf271_device::write )
{
m_stream->update();
m_regs_main[offset & 0xf] = data;
switch (offset & 0xf)
@ -1481,7 +1481,7 @@ READ8_MEMBER( ymf271_device::read )
{
case 0x0:
return m_status;
case 0x1:
// statusreg 2
return 0;
@ -1496,7 +1496,7 @@ READ8_MEMBER( ymf271_device::read )
m_ext_readlatch = ymf271_read_memory(m_ext_address);
return ret;
}
default:
break;
}
@ -1507,10 +1507,10 @@ READ8_MEMBER( ymf271_device::read )
void ymf271_device::init_tables()
{
int i, j;
for (i = 0; i < 8; i++)
m_lut_waves[i] = auto_alloc_array(machine(), INT16, SIN_LEN);
for (i = 0; i < 4*8; i++)
m_lut_plfo[i>>3][i&7] = auto_alloc_array(machine(), double, LFO_LENGTH);
@ -1607,7 +1607,7 @@ void ymf271_device::init_tables()
double db = 0.75 * (double)i;
m_lut_total_level[i] = (int)(65536.0 / pow(10.0, db / 20.0));
}
// timing may use a non-standard XTAL
double clock_correction = (double)(STD_CLOCK) / (double)(m_clock);
for (i = 0; i < 256; i++)

8
src/emu/sound/ymf271.h
View File

@ -112,12 +112,12 @@ private:
void ymf271_write_pcm(UINT8 address, UINT8 data);
void ymf271_write_timer(UINT8 address, UINT8 data);
UINT8 ymf271_read_memory(UINT32 offset);
inline int get_keyscaled_rate(int rate, int keycode, int keyscale);
inline int get_internal_keycode(int block, int fns);
inline int get_external_keycode(int block, int fns);
inline bool check_envelope_end(YMF271Slot *slot);
// lookup tables
INT16 *m_lut_waves[8];
double *m_lut_plfo[4][8];
@ -128,11 +128,11 @@ private:
int m_lut_attenuation[16];
int m_lut_total_level[128];
int m_lut_env_volume[256];
// internal state
YMF271Slot m_slots[48];
YMF271Group m_groups[12];
UINT8 m_regs_main[0x10];
UINT32 m_timerA;

2
src/emu/sound/ymz280b.c
View File

@ -22,7 +22,7 @@
- Is memory handling 100% correct? At the moment, Konami firebeat.c is the only
hardware currently emulated that uses external handlers.
It also happens to be the only one using 16-bit PCM.
Some other drivers (eg. bishi.c, bfm_sc4/5.c) also use ROM readback.
*/

90
src/emu/tilemap.c
View File

@ -379,7 +379,7 @@ tilemap_t &tilemap_t::init(tilemap_manager &manager, tilemap_get_info_delegate t
m_device = dynamic_cast<tilemap_device *>(this);
m_next = NULL;
m_user_data = NULL;
// populate tilemap metrics
m_rows = rows;
m_cols = cols;
@ -387,14 +387,14 @@ tilemap_t &tilemap_t::init(tilemap_manager &manager, tilemap_get_info_delegate t
m_tileheight = tileheight;
m_width = cols * tilewidth;
m_height = rows * tileheight;
// populate logical <-> memory mappings
m_mapper = mapper;
m_memory_to_logical = NULL;
m_max_logical_index = 0;
m_logical_to_memory = NULL;
m_max_memory_index = 0;
// initialize tile information geters
m_tile_get_info = tile_get_info;
@ -422,7 +422,7 @@ tilemap_t &tilemap_t::init(tilemap_manager &manager, tilemap_get_info_delegate t
// allocate pixmap
m_pixmap.allocate(m_width, m_height);
// allocate transparency mapping
m_flagsmap.allocate(m_width, m_height);
m_tileflags = NULL;
@ -1498,9 +1498,9 @@ void tilemap_t::draw_debug(bitmap_rgb32 &dest, UINT32 scrollx, UINT32 scrolly)
tilemap_memory::tilemap_memory()
: m_base(NULL),
m_bytes(0),
m_membits(0),
m_bytes_per_entry(0)
m_bytes(0),
m_membits(0),
m_bytes_per_entry(0)
{
}
@ -1516,45 +1516,45 @@ void tilemap_memory::set(void *base, UINT32 bytes, int membits, endianness_t end
assert(bytes > 0);
assert(membits == 8 || membits == 16 || membits == 32 || membits == 64);
assert(bpe == 1 || bpe == 2 || bpe == 4);
// populate direct data
m_base = base;
m_bytes = bytes;
m_membits = membits;
m_endianness = endianness;
m_bytes_per_entry = bpe;
// derive data
switch (bpe*1000 + membits*10 + endianness)
{
case 1*1000 + 8*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_8; m_writer = &tilemap_memory::write8_to_8; break;
case 1*1000 + 8*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_8; m_writer = &tilemap_memory::write8_to_8; break;
case 1*1000 + 16*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_16le; m_writer = &tilemap_memory::write8_to_16le; break;
case 1*1000 + 16*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_16be; m_writer = &tilemap_memory::write8_to_16be; break;
case 1*1000 + 32*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_32le; m_writer = &tilemap_memory::write8_to_32le; break;
case 1*1000 + 32*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_32be; m_writer = &tilemap_memory::write8_to_32be; break;
case 1*1000 + 64*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_64le; m_writer = &tilemap_memory::write8_to_64le; break;
case 1*1000 + 64*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_64be; m_writer = &tilemap_memory::write8_to_64be; break;
case 1*1000 + 8*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_8; m_writer = &tilemap_memory::write8_to_8; break;
case 1*1000 + 8*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_8; m_writer = &tilemap_memory::write8_to_8; break;
case 1*1000 + 16*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_16le; m_writer = &tilemap_memory::write8_to_16le; break;
case 1*1000 + 16*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_16be; m_writer = &tilemap_memory::write8_to_16be; break;
case 1*1000 + 32*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_32le; m_writer = &tilemap_memory::write8_to_32le; break;
case 1*1000 + 32*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_32be; m_writer = &tilemap_memory::write8_to_32be; break;
case 1*1000 + 64*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read8_from_64le; m_writer = &tilemap_memory::write8_to_64le; break;
case 1*1000 + 64*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read8_from_64be; m_writer = &tilemap_memory::write8_to_64be; break;
case 2*1000 + 8*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_8le; m_writer = &tilemap_memory::write16_to_8le; break;
case 2*1000 + 8*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_8be; m_writer = &tilemap_memory::write16_to_8be; break;
case 2*1000 + 16*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_16; m_writer = &tilemap_memory::write16_to_16; break;
case 2*1000 + 16*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_16; m_writer = &tilemap_memory::write16_to_16; break;
case 2*1000 + 32*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_32le; m_writer = &tilemap_memory::write16_to_32le; break;
case 2*1000 + 32*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_32be; m_writer = &tilemap_memory::write16_to_32be; break;
case 2*1000 + 64*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_64le; m_writer = &tilemap_memory::write16_to_64le; break;
case 2*1000 + 64*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_64be; m_writer = &tilemap_memory::write16_to_64be; break;
case 2*1000 + 8*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_8le; m_writer = &tilemap_memory::write16_to_8le; break;
case 2*1000 + 8*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_8be; m_writer = &tilemap_memory::write16_to_8be; break;
case 2*1000 + 16*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_16; m_writer = &tilemap_memory::write16_to_16; break;
case 2*1000 + 16*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_16; m_writer = &tilemap_memory::write16_to_16; break;
case 2*1000 + 32*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_32le; m_writer = &tilemap_memory::write16_to_32le; break;
case 2*1000 + 32*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_32be; m_writer = &tilemap_memory::write16_to_32be; break;
case 2*1000 + 64*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read16_from_64le; m_writer = &tilemap_memory::write16_to_64le; break;
case 2*1000 + 64*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read16_from_64be; m_writer = &tilemap_memory::write16_to_64be; break;
case 4*1000 + 8*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_8le; m_writer = &tilemap_memory::write32_to_8le; break;
case 4*1000 + 8*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_8be; m_writer = &tilemap_memory::write32_to_8be; break;
case 4*1000 + 16*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_16le; m_writer = &tilemap_memory::write32_to_16le; break;
case 4*1000 + 16*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_16be; m_writer = &tilemap_memory::write32_to_16be; break;
case 4*1000 + 32*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_32; m_writer = &tilemap_memory::write32_to_32; break;
case 4*1000 + 32*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_32; m_writer = &tilemap_memory::write32_to_32; break;
case 4*1000 + 64*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_64le; m_writer = &tilemap_memory::write32_to_64le; break;
case 4*1000 + 64*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_64be; m_writer = &tilemap_memory::write32_to_64be; break;
case 4*1000 + 8*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_8le; m_writer = &tilemap_memory::write32_to_8le; break;
case 4*1000 + 8*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_8be; m_writer = &tilemap_memory::write32_to_8be; break;
case 4*1000 + 16*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_16le; m_writer = &tilemap_memory::write32_to_16le; break;
case 4*1000 + 16*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_16be; m_writer = &tilemap_memory::write32_to_16be; break;
case 4*1000 + 32*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_32; m_writer = &tilemap_memory::write32_to_32; break;
case 4*1000 + 32*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_32; m_writer = &tilemap_memory::write32_to_32; break;
case 4*1000 + 64*10 + ENDIANNESS_LITTLE: m_reader = &tilemap_memory::read32_from_64le; m_writer = &tilemap_memory::write32_to_64le; break;
case 4*1000 + 64*10 + ENDIANNESS_BIG: m_reader = &tilemap_memory::read32_from_64be; m_writer = &tilemap_memory::write32_to_64be; break;
default: throw emu_fatalerror("Illegal memory bits/bus width combo in tilemap_memory");
default: throw emu_fatalerror("Illegal memory bits/bus width combo in tilemap_memory");
}
}
@ -1581,7 +1581,7 @@ void tilemap_memory::set(const tilemap_memory &helper)
//-------------------------------------------------
// read8_from_*/write8_to_* - entry read/write
// heleprs for 1 byte-per-entry
// heleprs for 1 byte-per-entry
//-------------------------------------------------
UINT32 tilemap_memory::read8_from_8(int index) { return reinterpret_cast<UINT8 *>(m_base)[index]; }
@ -1605,7 +1605,7 @@ void tilemap_memory::write8_to_64be(int index, UINT32 data) { reinterpret_cast<U
//-------------------------------------------------
// read16_from_*/write16_to_* - entry read/write
// heleprs for 2 bytes-per-entry
// heleprs for 2 bytes-per-entry
//-------------------------------------------------
UINT32 tilemap_memory::read16_from_8le(int index) { return read8_from_8(index*2) | (read8_from_8(index*2+1) << 8); }
@ -1629,7 +1629,7 @@ void tilemap_memory::write16_to_64be(int index, UINT32 data) { reinterpret_cast<
//-------------------------------------------------
// read32_from_*/write32_to_* - entry read/write
// heleprs for 4 bytes-per-entry
// heleprs for 4 bytes-per-entry
//-------------------------------------------------
UINT32 tilemap_memory::read32_from_8le(int index) { return read16_from_8le(index*2) | (read16_from_8le(index*2+1) << 16); }
@ -1756,8 +1756,8 @@ tilemap_device::tilemap_device(const machine_config &mconfig, const char *tag, d
//-------------------------------------------------
// static_set_bytes_per_entry: Set the
// transparent pen
// static_set_bytes_per_entry: Set the
// transparent pen
//-------------------------------------------------
void tilemap_device::static_set_bytes_per_entry(device_t &device, int bpe)
@ -1768,7 +1768,7 @@ void tilemap_device::static_set_bytes_per_entry(device_t &device, int bpe)
//-------------------------------------------------
// static_set_info_callback: Set the get info
// callback delegate
// callback delegate
//-------------------------------------------------
void tilemap_device::static_set_info_callback(device_t &device, tilemap_get_info_delegate get_info)
@ -1779,7 +1779,7 @@ void tilemap_device::static_set_info_callback(device_t &device, tilemap_get_info
//-------------------------------------------------
// static_set_layout: Set the tilemap size and
// layout
// layout
//-------------------------------------------------
void tilemap_device::static_set_layout(device_t &device, tilemap_standard_mapper mapper, int columns, int rows)
@ -1813,8 +1813,8 @@ void tilemap_device::static_set_tile_size(device_t &device, int width, int heigh
//-------------------------------------------------
// static_set_transparent_pen: Set the
// transparent pen
// static_set_transparent_pen: Set the
// transparent pen
//-------------------------------------------------
void tilemap_device::static_set_transparent_pen(device_t &device, pen_t pen)
@ -1914,7 +1914,7 @@ void tilemap_device::device_start()
// bind our callbacks
m_get_info.bind_relative_to(*owner());
m_mapper.bind_relative_to(*owner());
// allocate the tilemap
if (m_standard_mapper == TILEMAP_STANDARD_COUNT)
machine().tilemap().create(m_get_info, m_mapper, m_tile_width, m_tile_height, m_num_columns, m_num_rows, this);
@ -1933,7 +1933,7 @@ void tilemap_device::device_start()
if (share != NULL)
m_extmem.set(*share, m_bytes_per_entry);
}
// configure the device and set the pen
if (m_transparent_pen_set)
set_transparent_pen(m_transparent_pen);

100
src/emu/tilemap.h
View File

@ -411,31 +411,27 @@ enum tilemap_standard_mapper
MCFG_TILEMAP_BYTES_PER_ENTRY(_bytes_per_entry) \
MCFG_TILEMAP_INFO_CB_DRIVER(_class, _method) \
MCFG_TILEMAP_LAYOUT_STANDARD(_mapper, _columns, _rows) \
MCFG_TILEMAP_TILE_SIZE(_tilewidth, _tileheight) \
MCFG_TILEMAP_TILE_SIZE(_tilewidth, _tileheight)
#define MCFG_TILEMAP_ADD_CUSTOM(_tag, _bytes_per_entry, _class, _method, _tilewidth, _tileheight, _mapper, _columns, _rows) \
MCFG_TILEMAP_ADD(_tag) \
MCFG_TILEMAP_BYTES_PER_ENTRY(_bytes_per_entry) \
MCFG_TILEMAP_INFO_CB_DRIVER(_class, _method) \
MCFG_TILEMAP_LAYOUT_CB_DRIVER(_class, _mapper, _columns, _rows) \
MCFG_TILEMAP_TILE_SIZE(_tilewidth, _tileheight) \
MCFG_TILEMAP_TILE_SIZE(_tilewidth, _tileheight)
#define MCFG_TILEMAP_ADD_STANDARD_TRANSPEN(_tag, _bytes_per_entry, _class, _method, _tilewidth, _tileheight, _mapper, _columns, _rows, _transpen) \
MCFG_TILEMAP_ADD(_tag) \
MCFG_TILEMAP_BYTES_PER_ENTRY(_bytes_per_entry) \
MCFG_TILEMAP_INFO_CB_DRIVER(_class, _method) \
MCFG_TILEMAP_LAYOUT_STANDARD(_mapper, _columns, _rows) \
MCFG_TILEMAP_TILE_SIZE(_tilewidth, _tileheight) \
MCFG_TILEMAP_TRANSPARENT_PEN(_transpen) \
MCFG_TILEMAP_TRANSPARENT_PEN(_transpen)
#define MCFG_TILEMAP_ADD_CUSTOM_TRANSPEN(_tag, _bytes_per_entry, _class, _method, _tilewidth, _tileheight, _mapper, _columns, _rows, _transpen) \
MCFG_TILEMAP_ADD(_tag) \
MCFG_TILEMAP_BYTES_PER_ENTRY(_bytes_per_entry) \
MCFG_TILEMAP_INFO_CB_DRIVER(_class, _method) \
MCFG_TILEMAP_LAYOUT_CB_DRIVER(_columns, _mapper, _rows, _class) \
MCFG_TILEMAP_TILE_SIZE(_tilewidth, _tileheight) \
MCFG_TILEMAP_TRANSPARENT_PEN(_transpen) \
MCFG_TILEMAP_TRANSPARENT_PEN(_transpen)
//**************************************************************************
@ -498,59 +494,59 @@ class tilemap_memory
// construction/destruction
tilemap_memory();
public:
// configuration
void set(void *base, UINT32 bytes, int membits, endianness_t endianness, int bpe);
void set(const address_space &space, void *base, UINT32 bytes, int bpe);
void set(const memory_share &share, int bpe);
void set(const tilemap_memory &helper);
// getters
void *base() const { return m_base; }
UINT32 bytes() const { return m_bytes; }
int membits() const { return m_membits; }
endianness_t endianness() const { return m_endianness; }
int bytes_per_entry() const { return m_bytes_per_entry; }
private:
// readers and writers
UINT32 read(int index) { return (this->*m_reader)(index); }
void write(int index, UINT32 data) { (this->*m_writer)(index, data); }
// internal read/write helpers for 1 byte entries
UINT32 read8_from_8(int index); void write8_to_8(int index, UINT32 data);
UINT32 read8_from_16le(int index); void write8_to_16le(int index, UINT32 data);
UINT32 read8_from_16be(int index); void write8_to_16be(int index, UINT32 data);
UINT32 read8_from_32le(int index); void write8_to_32le(int index, UINT32 data);
UINT32 read8_from_32be(int index); void write8_to_32be(int index, UINT32 data);
UINT32 read8_from_64le(int index); void write8_to_64le(int index, UINT32 data);
UINT32 read8_from_64be(int index); void write8_to_64be(int index, UINT32 data);
UINT32 read8_from_8(int index); void write8_to_8(int index, UINT32 data);
UINT32 read8_from_16le(int index); void write8_to_16le(int index, UINT32 data);
UINT32 read8_from_16be(int index); void write8_to_16be(int index, UINT32 data);
UINT32 read8_from_32le(int index); void write8_to_32le(int index, UINT32 data);
UINT32 read8_from_32be(int index); void write8_to_32be(int index, UINT32 data);
UINT32 read8_from_64le(int index); void write8_to_64le(int index, UINT32 data);
UINT32 read8_from_64be(int index); void write8_to_64be(int index, UINT32 data);
// internal read/write helpers for 2 byte entries
UINT32 read16_from_8le(int index); void write16_to_8le(int index, UINT32 data);
UINT32 read16_from_8be(int index); void write16_to_8be(int index, UINT32 data);
UINT32 read16_from_16(int index); void write16_to_16(int index, UINT32 data);
UINT32 read16_from_32le(int index); void write16_to_32le(int index, UINT32 data);
UINT32 read16_from_32be(int index); void write16_to_32be(int index, UINT32 data);
UINT32 read16_from_64le(int index); void write16_to_64le(int index, UINT32 data);
UINT32 read16_from_64be(int index); void write16_to_64be(int index, UINT32 data);
UINT32 read16_from_8le(int index); void write16_to_8le(int index, UINT32 data);
UINT32 read16_from_8be(int index); void write16_to_8be(int index, UINT32 data);
UINT32 read16_from_16(int index); void write16_to_16(int index, UINT32 data);
UINT32 read16_from_32le(int index); void write16_to_32le(int index, UINT32 data);
UINT32 read16_from_32be(int index); void write16_to_32be(int index, UINT32 data);
UINT32 read16_from_64le(int index); void write16_to_64le(int index, UINT32 data);
UINT32 read16_from_64be(int index); void write16_to_64be(int index, UINT32 data);
// internal read/write helpers for 4 byte entries
UINT32 read32_from_8le(int index); void write32_to_8le(int index, UINT32 data);
UINT32 read32_from_8be(int index); void write32_to_8be(int index, UINT32 data);
UINT32 read32_from_16le(int index); void write32_to_16le(int index, UINT32 data);
UINT32 read32_from_16be(int index); void write32_to_16be(int index, UINT32 data);
UINT32 read32_from_32(int index); void write32_to_32(int index, UINT32 data);
UINT32 read32_from_64le(int index); void write32_to_64le(int index, UINT32 data);
UINT32 read32_from_64be(int index); void write32_to_64be(int index, UINT32 data);
UINT32 read32_from_8le(int index); void write32_to_8le(int index, UINT32 data);
UINT32 read32_from_8be(int index); void write32_to_8be(int index, UINT32 data);
UINT32 read32_from_16le(int index); void write32_to_16le(int index, UINT32 data);
UINT32 read32_from_16be(int index); void write32_to_16be(int index, UINT32 data);
UINT32 read32_from_32(int index); void write32_to_32(int index, UINT32 data);
UINT32 read32_from_64le(int index); void write32_to_64le(int index, UINT32 data);
UINT32 read32_from_64be(int index); void write32_to_64be(int index, UINT32 data);
// internal state
void * m_base;
UINT32 m_bytes;
int m_membits;
endianness_t m_endianness;
int m_bytes_per_entry;
void * m_base;
UINT32 m_bytes;
int m_membits;
endianness_t m_endianness;
int m_bytes_per_entry;
UINT32 (tilemap_memory::*m_reader)(int);
void (tilemap_memory::*m_writer)(int, UINT32);
};
@ -675,7 +671,7 @@ private:
UINT8 value;
UINT8 alpha;
};
// inline helpers
INT32 effective_rowscroll(int index, UINT32 screen_width);
INT32 effective_colscroll(int index, UINT32 screen_height);
@ -710,13 +706,13 @@ private:
// managers and devices
tilemap_manager * m_manager; // reference to the owning manager
tilemap_device * m_device; // pointer to our owning device
tilemap_device * m_device; // pointer to our owning device
tilemap_t * m_next; // pointer to next tilemap
void * m_user_data; // user data value
// optional memory info
tilemap_memory m_basemem; // info about base memory
tilemap_memory m_extmem; // info about extension memory
tilemap_memory m_basemem; // info about base memory
tilemap_memory m_extmem; // info about extension memory
// basic tilemap metrics
UINT32 m_rows; // number of tile rows
@ -815,7 +811,7 @@ class tilemap_device : public device_t,
public:
// construction/destruction
tilemap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration
static void static_set_bytes_per_entry(device_t &device, int bpe);
static void static_set_info_callback(device_t &device, tilemap_get_info_delegate tile_get_info);
@ -823,7 +819,7 @@ public:
static void static_set_layout(device_t &device, tilemap_mapper_delegate mapper, int columns, int rows);
static void static_set_tile_size(device_t &device, int width, int height);
static void static_set_transparent_pen(device_t &device, pen_t pen);
// write handlers
DECLARE_WRITE8_HANDLER(write);
DECLARE_WRITE16_HANDLER(write);
@ -831,10 +827,10 @@ public:
DECLARE_WRITE8_HANDLER(write_ext);
DECLARE_WRITE16_HANDLER(write_ext);
DECLARE_WRITE32_HANDLER(write_ext);
// pick one to use to avoid ambiguity errors
using device_t::machine;
protected:
// device-level overrides
virtual void device_start();
@ -844,13 +840,13 @@ private:
tilemap_get_info_delegate m_get_info;
tilemap_standard_mapper m_standard_mapper;
tilemap_mapper_delegate m_mapper;
int m_bytes_per_entry;
int m_tile_width;
int m_tile_height;
int m_num_columns;
int m_num_rows;
bool m_transparent_pen_set;
pen_t m_transparent_pen;
int m_bytes_per_entry;
int m_tile_width;
int m_tile_height;
int m_num_columns;
int m_num_rows;
bool m_transparent_pen_set;
pen_t m_transparent_pen;
};

2
src/emu/video/generic.c
View File

@ -154,4 +154,4 @@ const rgb_t RGB_MONOCHROME_YELLOW[] =
{
RGB_BLACK,
MAKE_RGB(0xff, 0xff, 0x00)
};
};

6
src/emu/video/tms34061.h
View File

@ -76,7 +76,7 @@ public:
/* video update handling */
void get_display_state();
struct tms34061_display m_display;
protected:
@ -84,7 +84,7 @@ protected:
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
private:
UINT16 m_regs[TMS34061_REGCOUNT];
UINT16 m_xmask;
@ -96,7 +96,7 @@ private:
UINT8 * m_shiftreg;
emu_timer * m_timer;
screen_device *m_screen;
void update_interrupts(void);
TIMER_CALLBACK_MEMBER( interrupt );
void register_w(address_space &space, offs_t offset, UINT8 data);

162
src/mame/audio/atarijsa.c
View File

@ -1,7 +1,7 @@
/***************************************************************************
audio/atarijsa.c
audio/atarijsa.c
Functions to emulate the Atari "JSA" audio boards
****************************************************************************
@ -37,31 +37,31 @@
****************************************************************************
JSA I (stereo): used by:
* Blasteroids (YM2151 only)
* Toobin' (YM2151 + POKEY)
* Vindicators (YM2151 + POKEY)
* Escape from the Planets of the Robot Monsters (YM2151 + TMS5220)
JSA I (stereo): used by:
* Blasteroids (YM2151 only)
* Toobin' (YM2151 + POKEY)
* Vindicators (YM2151 + POKEY)
* Escape from the Planets of the Robot Monsters (YM2151 + TMS5220)
JSA II (mono), used by:
* Cyberball 2072
* STUN Runner
* Skull & Crossbones
* ThunderJaws
* Hydra
* Pit Fighter
JSA II (mono), used by:
* Cyberball 2072
* STUN Runner
* Skull & Crossbones
* ThunderJaws
* Hydra
* Pit Fighter
JSA III (mono), used by:
* Off the Wall (YM2151 only)
* Batman
* Guardians of the 'Hood
* Road Riot 4WD
* Steel Talons
JSA III (mono), used by:
* Off the Wall (YM2151 only)
* Batman
* Guardians of the 'Hood
* Road Riot 4WD
* Steel Talons
JSA IIIs (stereo), used by:
* Space Lords
* Moto Frenzy
* Road Riot's Revenge Rally
JSA IIIs (stereo), used by:
* Space Lords
* Moto Frenzy
* Road Riot's Revenge Rally
****************************************************************************
@ -127,14 +127,14 @@ extern const device_type ATARI_JSA_IIIS = &device_creator<atari_jsa_iiis_device>
static ADDRESS_MAP_START( atarijsa1_map, AS_PROGRAM, 8, atari_jsa_i_device )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2001) AM_DEVREADWRITE("ym2151", ym2151_device, read, write)
AM_RANGE(0x2800, 0x2800) AM_MIRROR(0x01f9) // N/C
AM_RANGE(0x2802, 0x2802) AM_MIRROR(0x01f9) AM_DEVREAD("soundcomm", atari_sound_comm_device, sound_command_r) // /RDP
AM_RANGE(0x2804, 0x2804) AM_MIRROR(0x01f9) AM_READ(rdio_r) // /RDIO
AM_RANGE(0x2806, 0x2806) AM_MIRROR(0x01f9) AM_DEVREADWRITE("soundcomm", atari_sound_comm_device, sound_irq_ack_r, sound_irq_ack_w) // R/W=/IRQACK
AM_RANGE(0x2a00, 0x2a00) AM_MIRROR(0x01f9) AM_WRITE(tms5220_voice) // /VOICE
AM_RANGE(0x2a02, 0x2a02) AM_MIRROR(0x01f9) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_response_w) // /WRP
AM_RANGE(0x2a04, 0x2a04) AM_MIRROR(0x01f9) AM_WRITE(wrio_w) // /WRIO
AM_RANGE(0x2a06, 0x2a06) AM_MIRROR(0x01f9) AM_WRITE(mix_w) // /MIX
AM_RANGE(0x2800, 0x2800) AM_MIRROR(0x01f9) // N/C
AM_RANGE(0x2802, 0x2802) AM_MIRROR(0x01f9) AM_DEVREAD("soundcomm", atari_sound_comm_device, sound_command_r) // /RDP
AM_RANGE(0x2804, 0x2804) AM_MIRROR(0x01f9) AM_READ(rdio_r) // /RDIO
AM_RANGE(0x2806, 0x2806) AM_MIRROR(0x01f9) AM_DEVREADWRITE("soundcomm", atari_sound_comm_device, sound_irq_ack_r, sound_irq_ack_w) // R/W=/IRQACK
AM_RANGE(0x2a00, 0x2a00) AM_MIRROR(0x01f9) AM_WRITE(tms5220_voice) // /VOICE
AM_RANGE(0x2a02, 0x2a02) AM_MIRROR(0x01f9) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_response_w) // /WRP
AM_RANGE(0x2a04, 0x2a04) AM_MIRROR(0x01f9) AM_WRITE(wrio_w) // /WRIO
AM_RANGE(0x2a06, 0x2a06) AM_MIRROR(0x01f9) AM_WRITE(mix_w) // /MIX
AM_RANGE(0x2c00, 0x2c0f) AM_MIRROR(0x03f0) AM_READWRITE(pokey_r, pokey_w)
AM_RANGE(0x3000, 0x3fff) AM_ROMBANK("cpubank")
AM_RANGE(0x4000, 0xffff) AM_ROM
@ -144,14 +144,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( atarijsa2_map, AS_PROGRAM, 8, atari_jsa_ii_device )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2001) AM_DEVREADWRITE("ym2151", ym2151_device, read, write)
AM_RANGE(0x2800, 0x2800) AM_MIRROR(0x01f9) AM_READ(oki_r) // /RDV
AM_RANGE(0x2802, 0x2802) AM_MIRROR(0x01f9) AM_DEVREAD("soundcomm", atari_sound_comm_device, sound_command_r) // /RDP
AM_RANGE(0x2804, 0x2804) AM_MIRROR(0x01f9) AM_READ(rdio_r) // /RDIO
AM_RANGE(0x2806, 0x2806) AM_MIRROR(0x01f9) AM_DEVREADWRITE("soundcomm", atari_sound_comm_device, sound_irq_ack_r, sound_irq_ack_w) // R/W=/IRQACK
AM_RANGE(0x2a00, 0x2a00) AM_MIRROR(0x01f9) AM_WRITE(oki_w) // /WRV
AM_RANGE(0x2a02, 0x2a02) AM_MIRROR(0x01f9) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_response_w) // /WRP
AM_RANGE(0x2a04, 0x2a04) AM_MIRROR(0x01f9) AM_WRITE(wrio_w) // /WRIO
AM_RANGE(0x2a06, 0x2a06) AM_MIRROR(0x01f9) AM_WRITE(mix_w) // /MIX
AM_RANGE(0x2800, 0x2800) AM_MIRROR(0x01f9) AM_READ(oki_r) // /RDV
AM_RANGE(0x2802, 0x2802) AM_MIRROR(0x01f9) AM_DEVREAD("soundcomm", atari_sound_comm_device, sound_command_r) // /RDP
AM_RANGE(0x2804, 0x2804) AM_MIRROR(0x01f9) AM_READ(rdio_r) // /RDIO
AM_RANGE(0x2806, 0x2806) AM_MIRROR(0x01f9) AM_DEVREADWRITE("soundcomm", atari_sound_comm_device, sound_irq_ack_r, sound_irq_ack_w) // R/W=/IRQACK
AM_RANGE(0x2a00, 0x2a00) AM_MIRROR(0x01f9) AM_WRITE(oki_w) // /WRV
AM_RANGE(0x2a02, 0x2a02) AM_MIRROR(0x01f9) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_response_w) // /WRP
AM_RANGE(0x2a04, 0x2a04) AM_MIRROR(0x01f9) AM_WRITE(wrio_w) // /WRIO
AM_RANGE(0x2a06, 0x2a06) AM_MIRROR(0x01f9) AM_WRITE(mix_w) // /MIX
AM_RANGE(0x3000, 0x3fff) AM_ROMBANK("cpubank")
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -161,14 +161,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( atarijsa3_map, AS_PROGRAM, 8, atari_jsa_iii_device )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x07fe) AM_DEVREADWRITE("ym2151", ym2151_device, read, write)
AM_RANGE(0x2800, 0x2801) AM_MIRROR(0x05f8) AM_READWRITE(oki_r, overall_volume_w) // /RDV
AM_RANGE(0x2802, 0x2802) AM_MIRROR(0x05f9) AM_DEVREAD("soundcomm", atari_sound_comm_device, sound_command_r) // /RDP
AM_RANGE(0x2804, 0x2804) AM_MIRROR(0x05f9) AM_READ(rdio_r) // /RDIO
AM_RANGE(0x2806, 0x2806) AM_MIRROR(0x05f9) AM_DEVREADWRITE("soundcomm", atari_sound_comm_device, sound_irq_ack_r, sound_irq_ack_w) // R/W=/IRQACK
AM_RANGE(0x2a00, 0x2a01) AM_MIRROR(0x05f8) AM_WRITE(oki_w) // /WRV
AM_RANGE(0x2a02, 0x2a02) AM_MIRROR(0x05f9) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_response_w) // /WRP
AM_RANGE(0x2a04, 0x2a04) AM_MIRROR(0x05f9) AM_WRITE(wrio_w) // /WRIO
AM_RANGE(0x2a06, 0x2a06) AM_MIRROR(0x05f9) AM_WRITE(mix_w) // /MIX
AM_RANGE(0x2800, 0x2801) AM_MIRROR(0x05f8) AM_READWRITE(oki_r, overall_volume_w) // /RDV
AM_RANGE(0x2802, 0x2802) AM_MIRROR(0x05f9) AM_DEVREAD("soundcomm", atari_sound_comm_device, sound_command_r) // /RDP
AM_RANGE(0x2804, 0x2804) AM_MIRROR(0x05f9) AM_READ(rdio_r) // /RDIO
AM_RANGE(0x2806, 0x2806) AM_MIRROR(0x05f9) AM_DEVREADWRITE("soundcomm", atari_sound_comm_device, sound_irq_ack_r, sound_irq_ack_w) // R/W=/IRQACK
AM_RANGE(0x2a00, 0x2a01) AM_MIRROR(0x05f8) AM_WRITE(oki_w) // /WRV
AM_RANGE(0x2a02, 0x2a02) AM_MIRROR(0x05f9) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_response_w) // /WRP
AM_RANGE(0x2a04, 0x2a04) AM_MIRROR(0x05f9) AM_WRITE(wrio_w) // /WRIO
AM_RANGE(0x2a06, 0x2a06) AM_MIRROR(0x05f9) AM_WRITE(mix_w) // /MIX
AM_RANGE(0x3000, 0x3fff) AM_ROMBANK("cpubank")
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -342,7 +342,7 @@ void atari_jsa_base_device::device_start()
// resolve devices
m_test_read_cb.resolve_safe(0);
m_main_int_cb.resolve_safe();
// save states
save_item(NAME(m_ym2151_volume));
save_item(NAME(m_ym2151_ct1));
@ -398,7 +398,7 @@ WRITE16_MEMBER( atari_jsa_base_device::sound_reset_w )
//-------------------------------------------------
// ym2151_port_w: Handle writes from the YM2151
// output port
// output port
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_base_device::ym2151_port_w )
@ -411,7 +411,7 @@ WRITE8_MEMBER( atari_jsa_base_device::ym2151_port_w )
//-------------------------------------------------
// main_test_read_line: Return the state of the
// main's test line, provided by a callback
// main's test line, provided by a callback
//-------------------------------------------------
READ_LINE_MEMBER(atari_jsa_base_device::main_test_read_line)
@ -422,7 +422,7 @@ READ_LINE_MEMBER(atari_jsa_base_device::main_test_read_line)
//-------------------------------------------------
// main_int_write_line: Forward interrupt signals
// from the comm device to the owning callback
// from the comm device to the owning callback
//-------------------------------------------------
WRITE_LINE_MEMBER( atari_jsa_base_device::main_int_write_line )
@ -456,7 +456,7 @@ atari_jsa_oki_base_device::atari_jsa_oki_base_device(const machine_config &mconf
//-------------------------------------------------
// oki_r: Handle reads from the OKI chip(s)
// on the JSA II, III, and IIIs boards
// on the JSA II, III, and IIIs boards
//-------------------------------------------------
READ8_MEMBER( atari_jsa_oki_base_device::oki_r )
@ -465,7 +465,7 @@ READ8_MEMBER( atari_jsa_oki_base_device::oki_r )
if (m_oki2 != NULL && offset == 1)
return m_oki2->read(space, offset);
// OKI may not be populated at all
// OKI may not be populated at all
else if (m_oki1 != NULL)
return m_oki1->read(space, offset);
@ -476,7 +476,7 @@ READ8_MEMBER( atari_jsa_oki_base_device::oki_r )
//-------------------------------------------------
// oki_w: Handle writes to the OKI chip(s)
// on the JSA II, III, and IIIs boards
// on the JSA II, III, and IIIs boards
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_oki_base_device::oki_w )
@ -485,7 +485,7 @@ WRITE8_MEMBER( atari_jsa_oki_base_device::oki_w )
if (m_oki2 != NULL && offset == 1)
m_oki2->write(space, offset, data);
// OKI may not be populated at all
// OKI may not be populated at all
else if (m_oki1 != NULL)
m_oki1->write(space, offset, data);
}
@ -493,7 +493,7 @@ WRITE8_MEMBER( atari_jsa_oki_base_device::oki_w )
//-------------------------------------------------
// wrio_w: Handle writes to the general
// I/O port on JSA II, III, and IIIs boards
// I/O port on JSA II, III, and IIIs boards
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_oki_base_device::wrio_w )
@ -522,7 +522,7 @@ WRITE8_MEMBER( atari_jsa_oki_base_device::wrio_w )
if ((data & 4) == 0)
m_oki1->reset();
}
// same for the 2nd OKI (JSA IIIs only)
if (m_oki2 != NULL)
{
@ -530,7 +530,7 @@ WRITE8_MEMBER( atari_jsa_oki_base_device::wrio_w )
if ((data & 4) == 0)
m_oki2->reset();
}
// update the (left) OKI bank (JSA III/IIIs only)
if (m_oki1_banklo != NULL)
m_oki1_banklo->set_entry((m_oki1_banklo->entry() & 2) | ((data >> 1) & 1));
@ -543,7 +543,7 @@ WRITE8_MEMBER( atari_jsa_oki_base_device::wrio_w )
//-------------------------------------------------
// mix_w: Handle writes to the mixing
// register on JSA II, III, and IIIs boards
// register on JSA II, III, and IIIs boards
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_oki_base_device::mix_w )
@ -572,8 +572,8 @@ WRITE8_MEMBER( atari_jsa_oki_base_device::mix_w )
//-------------------------------------------------
// overall_volume_w: Handle writes to control the
// total sound volume on JSA III/IIIs boards
// overall_volume_w: Handle writes to control the
// total sound volume on JSA III/IIIs boards
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_oki_base_device::overall_volume_w )
@ -591,7 +591,7 @@ void atari_jsa_oki_base_device::device_start()
{
// call the parent
atari_jsa_base_device::device_start();
// save states
save_item(NAME(m_oki6295_volume));
save_item(NAME(m_overall_volume));
@ -622,7 +622,7 @@ void atari_jsa_oki_base_device::device_reset()
{
// call the parent
atari_jsa_base_device::device_reset();
// reset the static states
m_oki6295_volume = 1.0;
m_overall_volume = 1.0;
@ -631,8 +631,8 @@ void atari_jsa_oki_base_device::device_reset()
//-------------------------------------------------
// update_all_volumes: Update volumes for all
// chips
// update_all_volumes: Update volumes for all
// chips
//-------------------------------------------------
void atari_jsa_oki_base_device::update_all_volumes()
@ -666,7 +666,7 @@ atari_jsa_i_device::atari_jsa_i_device(const machine_config &mconfig, const char
//-------------------------------------------------
// rdio_r: Handle reads from the general I/O
// port on a JSA I board
// port on a JSA I board
//-------------------------------------------------
READ8_MEMBER( atari_jsa_i_device::rdio_r )
@ -689,14 +689,14 @@ READ8_MEMBER( atari_jsa_i_device::rdio_r )
result |= 0x10;
else
result &= ~0x10;
return result;
}
//-------------------------------------------------
// wrio_w: Handle writes to the general I/O
// port on a JSA I board
// port on a JSA I board
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_i_device::wrio_w )
@ -734,8 +734,8 @@ WRITE8_MEMBER( atari_jsa_i_device::wrio_w )
//-------------------------------------------------
// mix_w: Handle writes to the mixing register
// on a JSA I board
// mix_w: Handle writes to the mixing register
// on a JSA I board
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_i_device::mix_w )
@ -756,7 +756,7 @@ WRITE8_MEMBER( atari_jsa_i_device::mix_w )
//-------------------------------------------------
// tms5220_voice: Handle writes to the TMS5220
// voice data register
// voice data register
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_i_device::tms5220_voice )
@ -768,7 +768,7 @@ WRITE8_MEMBER( atari_jsa_i_device::tms5220_voice )
//-------------------------------------------------
// pokey_r: Handle reads from the POKEY if
// present
// present
//-------------------------------------------------
READ8_MEMBER( atari_jsa_i_device::pokey_r )
@ -781,7 +781,7 @@ READ8_MEMBER( atari_jsa_i_device::pokey_r )
//-------------------------------------------------
// pokey_w: Handle writes to the POKEY if
// present
// present
//-------------------------------------------------
WRITE8_MEMBER( atari_jsa_i_device::pokey_w )
@ -821,7 +821,7 @@ void atari_jsa_i_device::device_start()
{
// call the parent
atari_jsa_base_device::device_start();
// save states
save_item(NAME(m_pokey_volume));
save_item(NAME(m_tms5220_volume));
@ -836,7 +836,7 @@ void atari_jsa_i_device::device_reset()
{
// call the parent
atari_jsa_base_device::device_reset();
// reset the static states
m_pokey_volume = 1.0;
m_tms5220_volume = 1.0;
@ -845,8 +845,8 @@ void atari_jsa_i_device::device_reset()
//-------------------------------------------------
// update_all_volumes: Update volumes for all
// chips
// update_all_volumes: Update volumes for all
// chips
//-------------------------------------------------
void atari_jsa_i_device::update_all_volumes()
@ -876,7 +876,7 @@ atari_jsa_ii_device::atari_jsa_ii_device(const machine_config &mconfig, const ch
//-------------------------------------------------
// rdio_r: Handle reads from the general I/O
// port on a JSA II board
// port on a JSA II board
//-------------------------------------------------
READ8_MEMBER( atari_jsa_ii_device::rdio_r )
@ -895,7 +895,7 @@ READ8_MEMBER( atari_jsa_ii_device::rdio_r )
UINT8 result = ioport("JSAII")->read();
if (!m_test_read_cb())
result ^= 0x80;
return result;
}
@ -944,7 +944,7 @@ atari_jsa_iii_device::atari_jsa_iii_device(const machine_config &mconfig, device
//-------------------------------------------------
// jsa_iii_rdio: Handle reads from the general I/O
// port on a JSA III/IIIs board
// port on a JSA III/IIIs board
//-------------------------------------------------
READ8_MEMBER( atari_jsa_iii_device::rdio_r )

47
src/mame/audio/atarijsa.h
View File

@ -1,7 +1,7 @@
/***************************************************************************
audio/atarijsa.h
audio/atarijsa.h
Functions to emulate the Atari "JSA" audio boards
****************************************************************************
@ -83,8 +83,7 @@ extern const device_type ATARI_JSA_IIIS;
#define MCFG_ATARI_JSA_TEST_PORT(_port, _bitnum) \
devcb = &atari_jsa_base_device::static_set_test_read_cb(*device, DEVCB2_IOPORT(_port)); \
MCFG_DEVCB_RSHIFT(_bitnum); \
MCFG_DEVCB_RSHIFT(_bitnum);
//**************************************************************************
@ -105,7 +104,7 @@ extern const device_type ATARI_JSA_IIIS;
// ======================> atari_jsa_base_device
class atari_jsa_base_device : public device_t,
class atari_jsa_base_device : public device_t,
public device_mixer_interface
{
protected:
@ -126,7 +125,7 @@ public:
DECLARE_WRITE8_MEMBER(main_command_w);
DECLARE_READ8_MEMBER(main_response_r);
DECLARE_WRITE16_MEMBER(sound_reset_w);
// read/write handlers
DECLARE_WRITE8_MEMBER(ym2151_port_w);
DECLARE_READ_LINE_MEMBER(main_test_read_line);
@ -138,7 +137,7 @@ protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// internal helpers
virtual void update_all_volumes() = 0;
@ -146,18 +145,18 @@ protected:
required_device<atari_sound_comm_device> m_soundcomm;
required_device<m6502_device> m_jsacpu;
required_device<ym2151_device> m_ym2151;
// memory banks
required_memory_bank m_cpu_bank;
// configuration state
devcb2_read_line m_test_read_cb;
devcb2_write_line m_main_int_cb;
devcb2_read_line m_test_read_cb;
devcb2_write_line m_main_int_cb;
// internal state
double m_ym2151_volume;
UINT8 m_ym2151_ct1;
UINT8 m_ym2151_ct2;
double m_ym2151_volume;
UINT8 m_ym2151_ct1;
UINT8 m_ym2151_ct2;
};
@ -187,17 +186,17 @@ protected:
// devices
optional_device<okim6295_device> m_oki1;
optional_device<okim6295_device> m_oki2; // JSA IIIs only
optional_device<okim6295_device> m_oki2; // JSA IIIs only
// memory banks
optional_memory_bank m_oki1_banklo; // JSA III(s) only
optional_memory_bank m_oki1_bankhi; // JSA III(s)
optional_memory_bank m_oki2_banklo; // JSA IIIs only
optional_memory_bank m_oki2_bankhi; // JSA IIIs only
optional_memory_bank m_oki1_banklo; // JSA III(s) only
optional_memory_bank m_oki1_bankhi; // JSA III(s)
optional_memory_bank m_oki2_banklo; // JSA IIIs only
optional_memory_bank m_oki2_bankhi; // JSA IIIs only
// internal state
double m_oki6295_volume;
double m_overall_volume; // JSA III(s) only
double m_oki6295_volume;
double m_overall_volume; // JSA III(s) only
};
@ -223,7 +222,7 @@ protected:
virtual ioport_constructor device_input_ports() const;
virtual void device_start();
virtual void device_reset();
// internal helpers
virtual void update_all_volumes();
@ -231,9 +230,9 @@ protected:
optional_device<pokey_device> m_pokey;
optional_device<tms5220_device> m_tms5220;
// internal state
double m_pokey_volume;
double m_tms5220_volume;
// internal state
double m_pokey_volume;
double m_tms5220_volume;
};

4
src/mame/audio/beezer.c
View File

@ -82,7 +82,7 @@ beezer_sound_device::beezer_sound_device(const machine_config &mconfig, const ch
m_sh6840_noiselatch1(0),
m_sh6840_noiselatch3(0),
m_stream(NULL)/*,
m_freq_to_step(0)*/
m_freq_to_step(0)*/
{
memset(m_sh6840_timer, 0, sizeof(m_sh6840_timer));
m_sh6840_volume[0] = 0;
@ -477,4 +477,4 @@ void beezer_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
sample += (((sample3*0x80)^(m_sh6840_volume[3]&0x80))?-1:1)*(m_sh6840_volume[3]&0x7F);
*buffer++ = sample*64; // adding 4 numbers ranging from -128 to 127 yields a range of -512 to 508; to scale that to '-32768 to 32767' we multiply by 64
}
}
}

8
src/mame/audio/exidy440.h
View File

@ -44,10 +44,10 @@ public:
DECLARE_READ8_MEMBER( m6844_r );
DECLARE_WRITE8_MEMBER( m6844_w );
DECLARE_WRITE8_MEMBER( sound_banks_w );
void exidy440_sound_command(UINT8 param);
UINT8 exidy440_sound_command_ack();
protected:
// device-level overrides
virtual void device_config_complete();
@ -86,7 +86,7 @@ private:
/* channel frequency is configurable */
int m_channel_frequency[4];
void m6844_update();
void m6844_finished(m6844_channel_data *channel);
void play_cvsd(int ch);
@ -98,7 +98,7 @@ private:
void decode_and_filter_cvsd(UINT8 *data, int bytes, int maskbits, int frequency, INT16 *dest);
void fir_filter(INT32 *input, INT16 *output, int count);
void add_and_scale_samples(int ch, INT32 *dest, int samples, int volume);
void mix_to_16(int length, stream_sample_t *dest_left, stream_sample_t *dest_right);
};

4
src/mame/audio/hyprolyb.h
View File

@ -9,12 +9,12 @@ public:
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( busy_r );
WRITE8_MEMBER( msm_data_w );
READ8_MEMBER( msm_vck_r );
READ8_MEMBER( ready_r );
READ8_MEMBER( data_r );
void vck_callback( int st );
protected:

6
src/mame/audio/irem.h
View File

@ -18,7 +18,7 @@ public:
DECLARE_WRITE8_MEMBER( sound_irq_ack_w );
DECLARE_WRITE8_MEMBER( m52_adpcm_w );
DECLARE_WRITE8_MEMBER( m62_adpcm_w );
void adpcm_int(int st);
protected:
@ -31,8 +31,8 @@ protected:
private:
// internal state
UINT8 m_port1;
UINT8 m_port2;
UINT8 m_port1;
UINT8 m_port2;
ay8910_device *m_ay1;
ay8910_device *m_ay2;

6
src/mame/audio/m72.h
View File

@ -21,7 +21,7 @@ public:
Z80_ASSERT,
Z80_CLEAR
};
WRITE_LINE_MEMBER( ym2151_irq_handler );
DECLARE_WRITE8_MEMBER( sound_command_byte_w );
DECLARE_WRITE16_MEMBER( sound_command_w );
@ -44,7 +44,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
// internal state
UINT8 m_irqvector;
@ -53,7 +53,7 @@ private:
UINT32 m_samples_size;
address_space *m_space;
dac_device *m_dac;
TIMER_CALLBACK_MEMBER( setvector_callback );
};

2
src/mame/audio/phoenix.c
View File

@ -206,7 +206,7 @@ int phoenix_sound_device::noise(int samplerate)
int vc24 = update_c24(samplerate);
int vc25 = update_c25(samplerate);
int sum = 0, level, frequency;
/*
* The voltage levels are added and control I(CE) of transistor TR1
* (NPN) which then controls the noise clock frequency (linearily?).

4
src/mame/audio/timeplt.h
View File

@ -12,7 +12,7 @@ public:
DECLARE_WRITE8_MEMBER( sh_irqtrigger_w );
DECLARE_WRITE8_MEMBER( filter_w );
DECLARE_READ8_MEMBER( portB_r );
protected:
// device-level overrides
virtual void device_config_complete();
@ -32,7 +32,7 @@ private:
device_t *m_filter_1_0;
device_t *m_filter_1_1;
device_t *m_filter_1_2;
void filter_w( device_t *device, int data );
};

2
src/mame/audio/trackfld.h
View File

@ -25,7 +25,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
// internal state
int m_last_addr;

4
src/mame/audio/tx1.c
View File

@ -496,7 +496,7 @@ WRITE8_MEMBER( buggyboy_sound_device::ym2_b_w )
void buggyboy_sound_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
/* This is admittedly a bit of a hack job... */
UINT32 step_0, step_1;
int n1_en, n2_en;
double gain0, gain1_l, gain1_r;
@ -572,4 +572,4 @@ void buggyboy_sound_device::sound_stream_update(sound_stream &stream, stream_sam
m_step0 += step_0;
m_step1 += step_1;
}
}
}

4
src/mame/audio/wiping.h
View File

@ -20,7 +20,7 @@ public:
~wiping_sound_device() {}
DECLARE_WRITE8_MEMBER( sound_w );
protected:
// device-level overrides
virtual void device_config_complete();
@ -49,7 +49,7 @@ private:
short *m_mixer_buffer_2;
UINT8 m_soundregs[0x4000];
void make_mixer_table(int voices, int gain);
};

2
src/mame/drivers/aristmk5.c
View File

@ -530,7 +530,7 @@ MACHINE_CONFIG_END
ROM_REGION( 0x600, "gals", 0 ) \
ROM_LOAD( "a562837.u36", 0x000000, 0x000157, CRC(1f269234) SHA1(29940dd50fb55c632935f62ff44ca724379c7a43) ) \
ROM_LOAD( "a562838.u65", 0x000200, 0x000157, CRC(f2f3c40a) SHA1(b795dfa5cc4e8127c3f3a0906664910d1325ec92) ) \
ROM_LOAD( "a562840.u22", 0x000400, 0x000157, CRC(941d4cdb) SHA1(1ca091fba69e92f262dbb3d40f515703c8981793) )
ROM_LOAD( "a562840.u22", 0x000400, 0x000157, CRC(941d4cdb) SHA1(1ca091fba69e92f262dbb3d40f515703c8981793) )
ROM_START( aristmk5 )
ARISTOCRAT_MK5_BIOS

36
src/mame/drivers/arkanoid.c
View File

@ -53,7 +53,7 @@ PCB Layout
Note an original Taito Arkanoid PCB is approximately 10" square and is
painted white. The copper traces are not visible. The part type and
location of each component is printed in green on the PCB on top of the
location of each component is printed in green on the PCB on top of the
white paint.
The following MCU images were tested on an original Arkanoid PCB using sets
@ -61,13 +61,13 @@ The following MCU images were tested on an original Arkanoid PCB using sets
(1) MCU image with CRC 0x389a8cfb
(2) MCU image with CRC 0x515d77b6
An MCU found on a Tournament Arkanoid PCB was an unprotected type MC68705P3
and when read the CRC matched (1). So we can assume the MCUs for Arkanoid and
An MCU found on a Tournament Arkanoid PCB was an unprotected type MC68705P3
and when read the CRC matched (1). So we can assume the MCUs for Arkanoid and
Tournament Arkanoid are the same.... or are at least interchangeable and work.
"Tetris (D.R. Korea)" in MAME is a hack on an original Arkanoid PCB.
The hack can be undone and returned to Arkanoid simply by removing the mod
wires on the YM2149, replacing the ROMs with Arkanoid ROMs and replacing
"Tetris (D.R. Korea)" in MAME is a hack on an original Arkanoid PCB.
The hack can be undone and returned to Arkanoid simply by removing the mod
wires on the YM2149, replacing the ROMs with Arkanoid ROMs and replacing
the PC030CM which was removed. A working Arkanoid 68705 MCU is also required.
The above 'tested' images can be used.
@ -110,7 +110,7 @@ K1100181A (ROMSTAR version added sticker)
Notes:
Z80 - Zilog Z0840006 CPU. Clock input 6.000MHz (12/2)
YM2149F - Yamaha YM2149F software-controlled sound generator (SSG). Clock input 1.5MHz (12/8)
A75_06.IC14 - Motorola MC68705P5 micro-controller. Clock input 3.000MHz (12/4). Labelled 'A75 06' for
A75_06.IC14 - Motorola MC68705P5 micro-controller. Clock input 3.000MHz (12/4). Labelled 'A75 06' for
ROMSTAR version. Note original Taito version 68705 and Tournament Arkanoid MCUs work fine.
A75_* - 27C256 EPROMs labelled 'A75 xx'. xx = 01, 03, 04, 05 etc. See ROM loading in the src for exact ROM usage.
A75-0* - MMI 63S241 bipolar PROMs. Compatible with MB7116, 7621, DM74S571N etc
@ -126,8 +126,8 @@ Notes:
Note the G connector is the 22-way edge connector.
The Japanese manual states (translated to English).....
********
The coin-SW of this Main PC Board does not work without wiring coin meter to
coin meter pins of the G-connector.
The coin-SW of this Main PC Board does not work without wiring coin meter to
coin meter pins of the G-connector.
You need to modify as follows in case coin meter is not connected to Main PC Board.
Coin System A ..... Wire jumper JP4 on Main PC Board. Coin meter not used.
Coin System B ..... Wire jumper JP3 on Main PC Board. Coin meter used.
@ -137,8 +137,8 @@ Notes:
--------------
HSync - 15.625kHz
VSync - 59.185Hz
POWER connector H
-----------------
1 Ground
@ -153,8 +153,8 @@ Notes:
10 Post
11 NC
12 NC
22-way edge connector G
-----------------------
@ -188,9 +188,9 @@ COIN LOCKOUT (A) |10 L | COIN LOCKOUT (B)
Note about spinner controller
-----------------------------
This game requires a geared spinner to operate correctly. A trackball or other optical
This game requires a geared spinner to operate correctly. A trackball or other optical
controller or home-made spinner built from a PC mouse will work but the player moves too
slowly and the game is unplayable. The Taito geared spinner moves the optical wheel *very*
slowly and the game is unplayable. The Taito geared spinner moves the optical wheel *very*
fast to ensure the player moves fast enough to follow and return the ball easily. The ratio of
the control knob rotation to the optical wheel rotation is 1:20 so for one rotation of the
control knob the optical wheel rotates 20 times.
@ -202,14 +202,14 @@ Pin 2 - +5V
Pin 3 - Ground
Pin 4 - Right
These pins are listed from the Japanese Taito manual and have been tested to be correct with
These pins are listed from the Japanese Taito manual and have been tested to be correct with
the real Taito Arkanoid spinner.
The US ROMSTAR manual lists pin 4 as left and pin 1 as right. This information is probably
incorrect. Pins 2 and 3 are the same.
Spinner PCB Layout
------------------
J9000024A
J9000024A
K9000060A
|-----------|
| OPTO |
@ -224,7 +224,7 @@ Notes:
POWER - Power input connector. Pin 1 is on the right.
S - Screw positions to show orientation of the PCB with reference to the power connector pin 1
DIP Switches
+-----------------------------+--------------------------------+
|FACTORY DEFAULT = * | 1 2 3 4 5 6 7 8 |

14
src/mame/drivers/atarig1.c
View File

@ -251,8 +251,8 @@ static INPUT_PORTS_START( hydra )
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
// todo:
// PORT_MODIFY( "jsa:JSAII" )
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
// PORT_MODIFY( "jsa:JSAII" )
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
INPUT_PORTS_END
@ -296,8 +296,8 @@ static INPUT_PORTS_START( pitfight )
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
// todo:
// PORT_MODIFY( "jsa:JSAII" )
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
// PORT_MODIFY( "jsa:JSAII" )
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
INPUT_PORTS_END
@ -334,8 +334,8 @@ static INPUT_PORTS_START( pitfightj )
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
// todo:
// PORT_MODIFY( "jsa:JSAII" )
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
// PORT_MODIFY( "jsa:JSAII" )
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
INPUT_PORTS_END
@ -466,7 +466,7 @@ static MACHINE_CONFIG_START( atarig1, atarig1_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_ATARI_JSA_II_ADD("jsa", WRITELINE(atarigen_state, sound_int_write_line))
MCFG_ATARI_JSA_TEST_PORT("IN0", 14)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)

2
src/mame/drivers/atarig42.c
View File

@ -571,7 +571,7 @@ static MACHINE_CONFIG_START( atarig42, atarig42_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_ATARI_JSA_III_ADD("jsa", WRITELINE(atarigen_state, sound_int_write_line))
MCFG_ATARI_JSA_TEST_PORT("IN2", 6)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)

2
src/mame/drivers/atarigx2.c
View File

@ -1435,7 +1435,7 @@ static MACHINE_CONFIG_START( atarigx2, atarigx2_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_ATARI_JSA_IIIS_ADD("jsa", WRITELINE(atarigen_state, sound_int_write_line))
MCFG_ATARI_JSA_TEST_PORT("SERVICE", 6)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)

2
src/mame/drivers/batman.c
View File

@ -222,7 +222,7 @@ static MACHINE_CONFIG_START( batman, batman_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_ATARI_JSA_III_ADD("jsa", WRITELINE(atarigen_state, sound_int_write_line))
MCFG_ATARI_JSA_TEST_PORT("260010", 6)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)

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