arm.c: Added big endian mode support to the LDRB and STRB instructions. [Wilbert Pol]

This commit is contained in:
Wilbert Pol 2010-07-22 20:18:25 +00:00
parent 184ee16762
commit 14b2eec6b7
2 changed files with 15 additions and 2 deletions

View File

@ -236,6 +236,7 @@ typedef struct
device_irq_callback irq_callback; device_irq_callback irq_callback;
legacy_cpu_device *device; legacy_cpu_device *device;
const address_space *program; const address_space *program;
endianness_t endian;
} ARM_REGS; } ARM_REGS;
/* Prototypes */ /* Prototypes */
@ -497,11 +498,13 @@ static CPU_INIT( arm )
cpustate->irq_callback = irqcallback; cpustate->irq_callback = irqcallback;
cpustate->device = device; cpustate->device = device;
cpustate->program = device->space(AS_PROGRAM); cpustate->program = device->space(AS_PROGRAM);
cpustate->endian = ENDIANNESS_LITTLE;
state_save_register_device_item_array(device, 0, cpustate->sArmRegister); state_save_register_device_item_array(device, 0, cpustate->sArmRegister);
state_save_register_device_item_array(device, 0, cpustate->coproRegister); state_save_register_device_item_array(device, 0, cpustate->coproRegister);
state_save_register_device_item(device, 0, cpustate->pendingIrq); state_save_register_device_item(device, 0, cpustate->pendingIrq);
state_save_register_device_item(device, 0, cpustate->pendingFiq); state_save_register_device_item(device, 0, cpustate->pendingFiq);
state_save_register_device_item(device, 0, cpustate->endian);
} }
/***************************************************************************/ /***************************************************************************/
@ -593,7 +596,7 @@ static void HandleMemSingle( ARM_REGS* cpustate, UINT32 insn )
{ {
if (ARM_DEBUG_CORE && rd == eR15) if (ARM_DEBUG_CORE && rd == eR15)
logerror("read byte R15 %08x\n", R15); logerror("read byte R15 %08x\n", R15);
SetRegister(cpustate, rd,(UINT32) READ8(rnv)); SetRegister(cpustate, rd,(UINT32) READ8( ( cpustate->endian == ENDIANNESS_LITTLE ? rnv : (rnv ^ 0x03) ) ) );
} }
else else
{ {
@ -629,7 +632,7 @@ static void HandleMemSingle( ARM_REGS* cpustate, UINT32 insn )
if (ARM_DEBUG_CORE && rd==eR15) if (ARM_DEBUG_CORE && rd==eR15)
logerror("Wrote R15 in byte mode\n"); logerror("Wrote R15 in byte mode\n");
WRITE8(rnv, (UINT8) GetRegister(cpustate, rd) & 0xffu); WRITE8( ( cpustate->endian == ENDIANNESS_LITTLE ? rnv : (rnv ^ 0x03) ), (UINT8) GetRegister(cpustate, rd) & 0xffu);
} }
else else
{ {
@ -1375,6 +1378,14 @@ static void HandleCoPro( ARM_REGS* cpustate, UINT32 insn )
} }
} }
void arm_set_endianness( legacy_cpu_device *device, endianness_t endianness )
{
ARM_REGS *cpustate = get_safe_token(device);
cpustate->endian = endianness;
}
/************************************************************************** /**************************************************************************
* Generic set_info * Generic set_info
**************************************************************************/ **************************************************************************/

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@ -25,4 +25,6 @@ enum
ARM32_IR13, ARM32_IR14, ARM32_SR13, ARM32_SR14 ARM32_IR13, ARM32_IR14, ARM32_SR13, ARM32_SR14
}; };
void arm_set_endianness( legacy_cpu_device *device, endianness_t endianness );
#endif /* __ARM_H__ */ #endif /* __ARM_H__ */