From 14c847d681c53f2cb48f6c35fa2eedc5aac53620 Mon Sep 17 00:00:00 2001 From: AJR Date: Tue, 13 Dec 2022 10:42:59 -0500 Subject: [PATCH] mc6843: Clear STRB bits when read (mostly reverts 05803c61309319e5a6dd86d074620a3b324be7ec) --- src/devices/machine/mc6843.cpp | 35 ++++++++++++++++++++-------------- 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/src/devices/machine/mc6843.cpp b/src/devices/machine/mc6843.cpp index 20cfccdb5bd..a961f83fcca 100644 --- a/src/devices/machine/mc6843.cpp +++ b/src/devices/machine/mc6843.cpp @@ -126,6 +126,10 @@ void mc6843_device::dor_w(u8 data) m_dor = data; m_dor_loaded = true; logerror("dor_w %02x\n", m_dor); + + m_strb &= ~SB_DTERR; + if(m_strb == 0) + m_isr &= 0x7; } u8 mc6843_device::ctar_r() @@ -238,18 +242,22 @@ void mc6843_device::sur_w(u8 data) u8 mc6843_device::strb_r() { + u8 strb = m_strb; if(!machine().side_effects_disabled()) { - logerror("strb_r %02x -%s%s%s%s%s%s%s%s\n", m_strb, - m_strb & SB_HERR ? " herr" : "", - m_strb & SB_WERR ? " werr" : "", - m_strb & SB_FI ? " fi" : "", - m_strb & SB_SERR ? " serr" : "", - m_strb & SB_SAERR ? " saerr" : "", - m_strb & SB_DMERR ? " dmerr" : "", - m_strb & SB_CRC ? " crc" : "", - m_strb & SB_DTERR ? " dterr" : ""); + logerror("strb_r %02x -%s%s%s%s%s%s%s%s\n", strb, + strb & SB_HERR ? " herr" : "", + strb & SB_WERR ? " werr" : "", + strb & SB_FI ? " fi" : "", + strb & SB_SERR ? " serr" : "", + strb & SB_SAERR ? " saerr" : "", + strb & SB_DMERR ? " dmerr" : "", + strb & SB_CRC ? " crc" : "", + strb & SB_DTERR ? " dterr" : ""); + m_strb &= ~(SB_HERR|SB_WERR|SB_SERR|SB_SAERR|SB_DMERR|SB_CRC|SB_DTERR); + if(m_strb == 0) + m_isr &= 0x7; } - return m_strb; + return strb; } void mc6843_device::sar_w(u8 data) @@ -308,10 +316,6 @@ TIMER_CALLBACK_MEMBER(mc6843_device::update_tick) void mc6843_device::command_start() { - // clear errors - m_strb = 0; - m_isr &= 0x7; - assert(m_state == S_IDLE); switch(m_cmr & 0xf) { @@ -346,6 +350,9 @@ void mc6843_device::command_start() case C_SSR: case C_RCR: case C_SSW: case C_SWD: case C_MSR: case C_MSW: m_stra |= SA_BUSY; m_stra &= ~(SA_DDM|SA_TNEQ); + m_strb &= ~SB_DMERR; + if(m_strb == 0) + m_isr &= 0x7; m_state = S_SRW_WAIT_READY; break;