diff --git a/src/mame/drivers/galaga.c b/src/mame/drivers/galaga.c index 28362fb3754..e52f5e4402d 100644 --- a/src/mame/drivers/galaga.c +++ b/src/mame/drivers/galaga.c @@ -2144,6 +2144,169 @@ ROM_END /********************************************************************************************** Galaga & clones **********************************************************************************************/ +/* + +Galaga +Namco/Midway, 1982 + +PCB Layout +---------- + +Top board + +23149611 (23149631 +|------------------------------------------| +| LM324 | +| 04M_G01.3N | +| Z80 5400 | +| 04K_G02.3M | +| | +| 0600 04J_G03.3L |-| +| DSW1 | +| 04H_G04.3K DSW2 |-| +| | +| 0801 04E_G05.3J Z80 4| +| 4| +| W| +| * 5100 A| +| 0801 Y| +| TD62064 | +| 04D_G06.3E Z80 | +| |-| +| 0801 | +| * |-| +| 0702 VOL | +| MB3730| +|GG1-1.1D | +| GG1-2.5C | +| 3101 | +| 3101 4066 18.432MHz| +|------------------------------------------| +Notes: + GG1-1.1D & GG1-2.5C are PROMs, type MB7052 (equivalent to TBP24S10 and 82S129). + All other ROMs are 2732 EPROMs (i.e. 04*.*). + *: Unpopulated sockets + + VSync : 60.606060Hz + Z80 clocks (all): 1.536MHz + 5400 clock : 1.536MHz + 5100 clock : 1.536MHz + + 3101 : 16bytes x4 bit Bipolar SRAM, compatible with 7489, MB461 & AM31L01 (trivia - This was Intel's first product, released in 1969!) + MB3730 : Sound AMP + TD62064: Darlington transistor for driving coin counters. + 4066 : Quad Bilateral Switch logic IC, used to mix several sound sources to one output. + + NAMCO customs: + 0600 (DIP28): Bus Interface IC + 0801 (DIP28): Multi CPU Bus Controller IC + 5100 (DIP42): Controls player input, coins, DSW's (custom 4 bit I/O Microcontroller) + 0702 (DIP28): Sync Generator/Clock Divider IC + 5400 (DIP28): MUX 4-channel Audio Generator IC. Generates 'death bang'. + This is not a Z80 with swapped pins as many sites have reported. + + Pinouts: + Galaga PCB edge connector pinouts + + Parts Side Pin Pin Solder Side + ---------------------------------- + Logic Ground A 1 Logic Ground + Speaker + B 2 Speaker - + C 3 Coin Counter 1 + P1 Start Lamp D 4 P2 Start Lamp + +12 E 5 +12 + +5 F 6 +5 + Ground H 7 Ground + Service Credit J 8 Test + Coin 1 K 9 Coin 2 + Player 1 Start L 10 Player 2 Start + P1 Fire M 11 P2 Fire + P1 Left N 12 P2 Left + P 13 + P1 Right R 14 P2 Right + S 15 + T 16 + U 17 + V 18 + W 19 + X 20 + Coin Counter 2 Y 21 Cocktail Mode + Ground Z 22 Ground + + Pin21: Ground this pin for cocktail mode + + +Bottom board + +23149612 (23149632 +|------------------------------------------| +| 0700 GG1-4.2N GG1-5.5N | +| * RGBS| +| 0015 | +| | +| 2114 | +| 6116 8147 | +| 2114 07M_G08.4L | +| 8147 | +| 2114 | +| 0400 8147 | +| 2114 | +| 8147 | +| 2114 0200 | +| | +| 2114 | +| 07H_G09.4F 8147 | +| | +| 8147 | +| | +| 07E_G10.4D 8147 | +| | +| 8147 | +| GG1-3.1C | +| | +| | +|------------------------------------------| +Notes: + RGBS: Video output socket (Red, Green Blue, Sync to monitor) + GG1* are PROMs, type MB7052 (equivalent to TBP24S10 and 82S129). + All other ROMs are 2732 EPROMs. + *: Unpopulated socket + + 2114 : 1K x4 SRAM + 6116 : 2K x8 SRAM + 8147 : 4K x1 SRAM (Note - you can remove the eight 8147 RAMs and install two 2148s (1K x 4) in their place at positions 6H and 6B. + + Bootup RAM Errors + Error Code Meaning + RAM OK All RAMs are good + RAM 0L RAM located on Video PC board at position 1K is bad + RAM 0H RAM located on Video PC board at position 1K is bad + RAM 1L RAM located on Video PC board at position 1K is bad + RAM 1H RAM located on Video PC board at position 1K is bad + RAM 2L RAM located on Video PC board at position 3E is bad + RAM 2H RAM located on Video PC board at position 3F is bad + RAM 3L RAM located on Video PC board at position 3K is bad + RAM 3H RAM located on Video PC board at position 3L is bad + RAM 4L RAM located on Video PC board at position 3H is bad + RAM 4H RAM located on Video PC board at position 3J is bad + + Bootup ROM Errors + Error Code Meaning + ROM OK All ROMs are good + ROM 01 ROM located on CPU PC board at position 3N is bad + ROM 02 ROM located on CPU PC board at position 3M is bad + ROM 03 ROM located on CPU PC board at position 3L is bad + ROM 04 ROM located on CPU PC board at position 3K is bad + ROM 11 ROM located on CPU PC board at position 3J is bad + ROM 21 ROM located on CPU PC board at position 3E is bad + + NAMCO customs: + 0015 (DIP28): Video RAM addresser IC + 0200 (DIP28): Graphics ROM Data Custom Shift Register IC + 0400 (DIP28): Motion Object and Scratch RAM to CPU Bus Interface IC + 0702 (DIP28): Sync Generator/Clock Divider IC + +*/ #define GALAGA_CUSTOMS \ ROM_REGION_NAMCO_54XX( CPUTAG_54XX ) \ diff --git a/src/mame/drivers/namconb1.c b/src/mame/drivers/namconb1.c index f99031af4cb..9aa8a268690 100644 --- a/src/mame/drivers/namconb1.c +++ b/src/mame/drivers/namconb1.c @@ -1062,6 +1062,164 @@ ROM_START( vshoot ) ROM_LOAD( "vsjsha-0.5m", 0, 0x80000, CRC(78335ea4) SHA1(d4b9f179b1b456a866354ea308664c036de6414d) ) ROM_END +/* + +The Outfoxies +Namco, 1994 + +This game runs on Namco NB-2 hardware. + + +Main Board +---------- + +NB-2 MAIN PCB 8639960102 (8639970102) +|------------------------------------------------------------------------| +||----------------------------------------------------------------------|| +|| J103 J104 J105 || +||VOL CY7C185 || +||458 CY7C185 156 123 C384 C384 C384 LH52250 C355 || +||JP5 CY7C185 JP11 LH52250 || +||LA4705 || +||LC78815 C116 LH52250 OU1SHAS.12S OU1SHAR.18S || +|| LH52250 JP8 JP10 || +|| JP4 || +|| || +||--------------------NB-2-MASK-ROM-PCB-(ON-TOP)------------------------|| +|J | +| JP3 | +|A JP2 145 PAL1 187 | +| OU1VOI0.6N VSYNC LH52250 | +|M HSYNC LH52250 | +| C352 169 LH52250 TC511632 (x4) | +|M 137 48.384MHz LH52250 | +| | +|A SW1 75 | +| JP7 TC511632 (x4) | +| PAL3 C383 | +| C382 | +| M5M1008 OU2MPRU.11D JP9 BR28C16 C390 | +| M5M1008 PAL2 OU2MPRL.11C 68EC020 C385 | +| OU1SPR0.5B JP6 OU1DAT1.20B | +| JP1 | +| OU1DAT0.20A | +|------------------------------------------------------------------------| + +ROM Board +--------- + +NB-2 MASK ROM PCB 8639969800 (8639979800) +-------------------------------------------------------------------------| +| J103 J104 J105 | +|OU1SCR0.1D OU1ROT0.3D | +| | +| OU1ROT1.3C OU1OBJ0L.4C OU1OBJ3L.6C OU1OBJ0U.8C OU1OBJ3U.9C | +| | +| OU1ROT2.3B OU1OBJ1L.4B OU1OBJ4L.6B OU1OBJ1U.8B OU1OBJ4U.9B | +| | +| OU1OBJ2L.4A OU1OBJ2U.8A | +|------------------------------------------------------------------------| + +Notes: + +CLOCKs +------ +MASTER clock 48.384 MHz +68020 clock: 24.192MHz (MASTER / 2) +HSYNC: 15.75kHz +VSYNC: 59.7Hz + +DIPs +---- +SW1: 2 position, both are OFF. Position 1 toggles TEST mode, position 2 is freeze. + +RAM +--- +TC511632FL x 8 (SOP40, 32k x16) +M5M51008AFP x 2 (SOP32, 128k x8) +LH52250AN x 8 (SOP28, 32k x8) +CY7C185 x 3 (SOP28, 8k x8) + +NAMCO CUSTOM CHIPS +------------------ +75 (QFP80) +123 (QFP80) +137 (NDIP28) +145 (QFP80) +156 (QFP64) +169 (QFP120) +187 (QFP120) +C116 (QFP64) +C352 (QFP100) +C355 (QFP160) +C382 (QFP120) +C383 (QFP100) +C384 x 3 (QFP48) +C385 (QFP144) +C390 (DIP32, KEYCUS) + +OTHER +----- +BR28C16 (DIP24, EEPROM) +2 gold pins labelled HSYNC & VSYNC, connected to Namco custom chip 145 +3 connectors for ROM PCB, labelled J103 (SCROLL), J104 (ROTATE), J105 (OBJECT) + +PALs +---- +PAL1 PALCE16V8 (NAMCO CODE = NB2-1, PCB says "MIXER") +PAL2 PAL16L8 (NAMCO CODE = NB1-2, PCB says "DEC75") (note! PAL is NB1-2) +PAL3 PAL16L8 (NAMCO CODE = NB2-2, PCB says "SIZE") + +JUMPERs +------- +JP1 4M O-O O 1M Config jumper for ROM size, 4M = 27C4002, 1M = 27C1024 +JP2 A20 O O-O GND Config jumper for ROM size, GND = 16M, A20 = 32M +JP3 A20 O O-O GND Config jumper for ROM size, GND = 16M, A20 = 32M +JP4 O-O (2 pins shorted, hardwired on PCB) +JP5 1 O O O L (hardwired on PCB, not shorted) +JP6 1M O O-O 4M Config jumper for ROM size, 1M = 27C1024, 4M = 27C240 +JP7 O O-O /WDR (hardwired on PCB) +JP8 GND O-O O A20 Config jumper for ROM size, GND = 16M, A20 = 32M +JP9 CON O-O O COFF (hardwired on PCB) +JP10 GND O-O O A20 Config jumper for ROM size, GND = 16M, A20 = 32M +JP11 355 O O-O F32 (hardwired on PCB) + +ROMs, Main PCB +-------------- +Filename / PCB ROM +ROM Label Label Type +------------------------------------------------------------------------------ +ou1dat0.20a DATA0 27C4002 Shared Data +ou1dat1.20b DATA1 27C4002 Shared Data +ou2mprl.11c PRGL 27C4002 \ Main program +ou2mpru.11d PRGU 27C4002 / +ou1spr0.5b SPRG 27C240 Sound program, linked to C352 and C382 +ou1voi0.6n VOICE0 MB8316200B Sound voices +ou1shas.12s SHAPE-S 16M MASK Shape +ou1shar.18s SHAPE-R 16M MASK Shape + +ROMs, MASK ROM PCB (All ROMs surface mounted) +------------------ +Filename / PCB ROM +ROM Label Label Type +------------------------------------------------ +ou1scr0.1d SCR0 MB8316200B (16M SOP44) +ou1rot0.3d ROT0 MB8316200B (16M SOP44) +ou1rot1.3c ROT1 MB8316200B (16M SOP44) +ou1rot2.3b ROT2 MB8316200B (16M SOP44) +ou1obj0l.4c OBJ0L MB8316200B (16M SOP44) +ou1obj1l.4b OBJ1L MB8316200B (16M SOP44) +ou1obj2l.4a OBJ2L MB8316200B (16M SOP44) +ou1obj3l.6c OBJ3L MB8316200B (16M SOP44) +ou1obj4l.6b OBJ4L MB8316200B (16M SOP44) +ou1obj0u.8c OBJ0U MB8316200B (16M SOP44) +ou1obj1u.8b OBJ1U MB8316200B (16M SOP44) +ou1obj2u.8a OBJ2U MB8316200B (16M SOP44) +ou1obj3u.9c OBJ3U MB8316200B (16M SOP44) +ou1obj4u.9b OBJ4U MB8316200B (16M SOP44) + +*/ + ROM_START( outfxies ) ROM_REGION( 0x100000, "main", 0 ) /* main program */ ROM_LOAD32_WORD( "ou2mprl.11c", 0x00002, 0x80000, CRC(f414a32e) SHA1(9733ab087cfde1b8fb5b676d8a2eb5325ebdbb56) ) diff --git a/src/mame/drivers/namcos1.c b/src/mame/drivers/namcos1.c index 8da57466cd5..637237604e0 100644 --- a/src/mame/drivers/namcos1.c +++ b/src/mame/drivers/namcos1.c @@ -1793,7 +1793,129 @@ ROM_START( wldcourt ) ROM_LOAD( "wc1_obj3.bin", 0x60000, 0x10000, CRC(1aa2dbc8) SHA1(dc100fd85aca8b4c29d2100dba43dd4093976633) ) ROM_END -/* Splatter House */ +/* +Splatter House +Namco, 198x + +This game runs on Namco System 1 hardware + +PCB Layout +---------- + +Top Board + + +(8617963201) +(8617961201) +|---------------------------------------------------------------------------| +| TRB LA4460 LA4460 | +| BAS | +| BAL CHR8.U8 | +| LA4520 JP4 JP3 | +| TS7630 | +| |-----| | +| VOL | 123 | JP2 PRG7.T10 | +| |-----| | +| TL084 TL084 PRG6.S10 | +| | +| PRG5.P10 | +|J MB3771 4066 YM3012 | +|A PRG4.N10 | +|M PAL1 | +|M 64A1.M4 CHR7.M8 OBJ7.M9 PRG3.M10 | +|A | +| CHR6.L8 OBJ6.L9 PRG2.L10 | +| | +| VOICE5.K4 CHR5.K8 OBJ5.K9 PRG1.K10 | +| | +| VOICE4.H4 CHR4.H8 OBJ4.H9 PRG0.H10 | +| | +| VOICE3.F4 CHR3.F8 OBJ3.F9 JP1 KEYCUS(181) | +| | +| VOICE2.E4 CHR2.E8 OBJ2.E9 | +| | +| VOICE1.B4 CHR1.B8 OBJ1.B9 SOUND1.B10 | +| LB1760 | +| VOICE0.A4 CHR0.A8 OBJ0.A9 SOUND0.A10 | +| DSW | +| | +|---------------------------------------------------------------------------| +Notes: + PAL1 - MMI Pal16L8, labelled 'SYS87A-R' (DIP20) + JP1 - Configures ROM types, setting: 1-2 + JP2 - Configures ROM types, setting: 1-2 + JP3 - Configures ROM types, setting: 2-3 + JP4 - Used to set speaker output to STEREO/MONO + TRB - Treble Adjustment Pot + BAS - Bass Adjustment Pot + BAL - Balance Adjustment Pot + VOL - Master Volume Pot + + Namco Custom ICs - + 123 (QFP80) + 181 (DIP28, KEYCUS, Splatter House) + 64A1 (DIP40, 63701 MCU) + + +Bottom Board + +8617961101 +(8617963101) +|-----------------------------------------------------------------| +|3.579545MHz YM2151 6809 6809 | +| | +| 2064 2064 6809 | +|2816 | +| | +| | +| |-----| 62256-10 | +| | 121 | | +| | | | +| |-----| |-----| | +| |117 | | +| | | | +| |-----| | +| | +| PAL2 2064 | +| | +| | +| 62256-8* | +| 6116 30 | +| | +| 2064 |-----| | +| |133 | | +| 2064 | | 2064 | +| |-----| | +| 2064 6116 | +| |-----| 2064 | +| |C116 | 6116 | +| | | |-----| 48 | +| |-----| |C120 | 39 49.152MHz | +| | | | +| |-----| 27 | +|-----------------------------------------------------------------| +Notes: + 6809 - Hitachi HD68B09EP CPUs, running at 8.000MHz (all 3) + YM2151- Running at 3.579545MHz + PAL2 - MMI Pal16L8, labelled 'SYS87A-C' (DIP20) + 2816 - 2K x8 EEPROM (DIP24) + 6116 - 2K x8 SRAM (DIP24) + 2064 - 8K x8 SRAM (DIP28) + 62256 - 32K x8 SRAM (DIP28) + * Note, a -8 part must be used at this location or the PCB will not boot + + Namco Custom ICs - + 30 (SDIP64) + 39 (DIP42) + 48 (SDIP64) + 27 (DIP42) + 121 (QFP64) + C116 (QFP80) + C120 (QFP64) + 117 (QFP64) + 133 (QFP64) + +*/ ROM_START( splatter ) ROM_REGION( 0x2c000, "audio", 0 ) /* 176k for the sound cpu */ ROM_LOAD( "sh1_snd0.bin", 0x0c000, 0x10000, CRC(90abd4ad) SHA1(caeba5befcf57d90671786c7ef1ce49d54821949) ) diff --git a/src/mame/drivers/polepos.c b/src/mame/drivers/polepos.c index 755a36280f8..713a2f87d95 100644 --- a/src/mame/drivers/polepos.c +++ b/src/mame/drivers/polepos.c @@ -1148,7 +1148,104 @@ ROM_START( polepos1 ) ROM_LOAD( "136014.117", 0x0000, 0x0100, CRC(2401c817) SHA1(8991b7994513a469e64392fa8f233af5e5f06d54) ) /* sync chain */ ROM_END +/* +Top Racer / Pole Position I/II (?) +PCB Layouts +=========== + +Upper Board +----------- +PP-1126 +|----------------------------------------------------------------------------------| +| LM324 8A 9A | +|1B DIP28 DIP28 DIP28 | +| 4066 | +| | +| LM324 | +| DSW2 4066 4066 | +| MB8841 MB8841 MB8841 82S129.14C | +| | +| | +| DSW1 | +| 4066 4066 82S153.16D | +| | +| | +| MB8842 | +| LM324 82S129.9E 2148 2148 Z80 Z8002 Z8002 | +| |-----daughterboard-------| | +| | | | +| | 82S153.18E 82S153.21E| | +| | 20E | | +| 6116| | | +| ADC0804 |16F 17F 20F 21F | 23F | +| |-------------------------| | +| 16F 17F | +| 4066 | +| | +| 4093 | +| 3.6V_BATT | +|---------|----18-way-----|-----------------J2-------|----50-pin cable---|---------| + |---------------| |-------------------| +Notes: + 82S153 - Field Programmable Logic Array (DIP20) + 2148 - 1K x4bit SRAM (DIP18) + 6116 - 2K x8bit SRAM (DIP24) + ADC0804 - 8bit Microprocessor Compatible A/D Convertor (DIP20) + J2 - 3 Pin Power Connector + DIP28 - Unpopulated Sockets + MB8841 - Fujitsu 4bit Microcontroller (DIP40) + MB8842 - Fujitsu 4bit Microcontroller (DIP28) + LM324 - Low Power Quad Operational Amplifier (DIP14) + + Note - All ROMs labelled PP2_U.* are located on the upper PCB. + All ROMs labelled PP2_D.* are located on the plug-in daughterboard. + + +Lower Board +----------- + +|----------------------------------------------------------------------------------| +| 1A 2A 3A 4A 5A 6A 7A 8A 9A 10A | +| | +| 9D 82S129.13D | +| | +| 82S129.13E | +| 2148 2148 | +| 82S129.13F | +| 6116 6116 82S137.7H | +| | +| | +| | +| 2J 6116 6116 | +| | +| | +| | +| 2M 8M 9M | +| | +| | +| 82S129.2N | +| 2114 2114 | +| 82S129.2P 82S137.5P 8P | +| 2114 2114 82S123.15R | +| 82S129.2S | +| 2114 2114 82S123.15S | +| 82S129.2T | +| MB3730 MB3730 MB3730 MB3730 24.576MHz 2114 2114 | +| 82S129.2U VOL VOL VOL VOL | +| | +|---------|----18-way-----|-----------------J2-------|----50-pin cable---|---------| + |---------------| |-------------------| +Notes: + 2114 - 1K x4bit SRAM (DIP18) + 2148 - 1K x4bit SRAM (DIP18) + 6116 - 2K x8bit SRAM (DIP24) + MB3730 - 12W Power Amp IC (SIP7) + J2 - 3 Pin Power Connector + VOL - Volume Potentiometer + + Note - All ROMs labelled PP2_L.* are located on the lower PCB. +*/ ROM_START( topracer ) /* Z80 memory/ROM data */ ROM_REGION( 0x10000, "main", 0 )