mirror of
https://github.com/holub/mame
synced 2025-04-20 15:32:45 +03:00
Add skeleton CPU device and disassembler for HPC architecture
This commit is contained in:
AJR
parent
542a331fd2
commit
156619b401
@ -2800,3 +2800,20 @@ if (CPUS["ALPHA"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/alpha/alphad.cpp")
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/alpha/alphad.h")
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end
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--------------------------------------------------
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-- National Semiconductor HPC
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--@src/devices/cpu/hpc/hpc.h,CPUS["HPC"] = true
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--------------------------------------------------
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if (CPUS["HPC"]~=null) then
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files {
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MAME_DIR .. "src/devices/cpu/hpc/hpc.cpp",
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MAME_DIR .. "src/devices/cpu/hpc/hpc.h",
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}
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end
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if (CPUS["HPC"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/hpc/hpcdasm.cpp")
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/hpc/hpcdasm.h")
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end
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@ -133,6 +133,7 @@ CPUS["HMCS40"] = true
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--CPUS["SM510"] = true
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CPUS["ST62XX"] = true
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CPUS["DSPP"] = true
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CPUS["HPC"] = true
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--------------------------------------------------
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-- specify available sound cores
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@ -138,6 +138,7 @@ CPUS["CLIPPER"] = true
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CPUS["CAPRICORN"] = true
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CPUS["ALPHA"] = true
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--CPUS["DSPP"] = true
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--CPUS["HPC"] = true
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--------------------------------------------------
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-- specify available sound cores; some of these are
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102
src/devices/cpu/hpc/hpc.cpp
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102
src/devices/cpu/hpc/hpc.cpp
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@ -0,0 +1,102 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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National Semiconductor High-Performance microController (HPC)
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Currently this device is just a stub with no actual execution core.
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***************************************************************************/
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#include "emu.h"
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#include "hpc.h"
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#include "hpcdasm.h"
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// device type definitions
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DEFINE_DEVICE_TYPE(HPC46104, hpc46104_device, "hpc46104", "HPC46104")
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void hpc46104_device::internal_map(address_map &map)
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{
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map(0x0000, 0x00bf).ram();
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map(0x00c0, 0x00c0).rw(FUNC(hpc46104_device::psw_r), FUNC(hpc46104_device::psw_w));
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map(0x00c4, 0x00cf).ram().share("core_regs");
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// TODO: many other internal registers
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map(0x01c0, 0x02ff).ram();
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}
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std::unique_ptr<util::disasm_interface> hpc46104_device::create_disassembler()
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{
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return std::make_unique<hpc16164_disassembler>();
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}
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hpc_device::hpc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map)
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: cpu_device(mconfig, type, tag, owner, clock)
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, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, 0, map)
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, m_program(nullptr)
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, m_core_regs(*this, "core_regs")
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, m_psw(0)
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, m_icount(0)
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{
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}
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hpc46104_device::hpc46104_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: hpc_device(mconfig, HPC46104, tag, owner, clock, address_map_constructor(FUNC(hpc46104_device::internal_map), this))
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{
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}
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device_memory_interface::space_config_vector hpc_device::memory_space_config() const
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{
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config),
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};
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}
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void hpc_device::device_start()
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{
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m_program = &space(AS_PROGRAM);
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set_icountptr(m_icount);
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state_add(HPC_PSW, "PSW", m_psw);
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state_add(HPC_SP, "SP", m_core_regs[0]);
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state_add(HPC_PC, "PC", m_core_regs[1]);
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state_add(STATE_GENPC, "GENPC", m_core_regs[1]).callimport().noshow();
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state_add(STATE_GENPCBASE, "CURPC", m_core_regs[1]).callimport().noshow();
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state_add(HPC_A, "A", m_core_regs[2]);
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state_add(HPC_K, "K", m_core_regs[3]);
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state_add(HPC_B, "B", m_core_regs[4]);
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state_add(HPC_X, "X", m_core_regs[5]);
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save_item(NAME(m_psw));
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}
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void hpc_device::device_reset()
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{
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m_psw = 0x00;
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std::fill_n(&m_core_regs[0], 6, 0x0000);
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}
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u8 hpc_device::psw_r()
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{
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return m_psw;
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}
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void hpc_device::psw_w(u8 data)
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{
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m_psw = data;
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}
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void hpc_device::execute_run()
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{
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m_icount = 0;
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}
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void hpc_device::execute_set_input(int inputnum, int state)
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{
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// TODO
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}
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73
src/devices/cpu/hpc/hpc.h
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73
src/devices/cpu/hpc/hpc.h
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@ -0,0 +1,73 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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#ifndef MAME_CPU_HPC_HPC_H
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#define MAME_CPU_HPC_HPC_H
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#pragma once
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class hpc_device : public cpu_device
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{
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public:
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enum {
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HPC_PSW,
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HPC_SP,
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HPC_PC,
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HPC_A,
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HPC_K,
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HPC_B,
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HPC_X
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};
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protected:
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// construction/destruction
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hpc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map);
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// device_execute_interface overrides
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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// device_memory_interface overrides
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virtual space_config_vector memory_space_config() const override;
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// internal register access
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u8 psw_r();
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void psw_w(u8 data);
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private:
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// address space
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address_space_config m_program_config;
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address_space *m_program;
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// internal state
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required_shared_ptr<u16> m_core_regs;
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u8 m_psw;
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// execution sequencing
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s32 m_icount;
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};
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class hpc46104_device : public hpc_device
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{
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public:
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// construction/destruction
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hpc46104_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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protected:
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// device_disasm_interface overrides
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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private:
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void internal_map(address_map &map);
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};
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// device type declarations
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DECLARE_DEVICE_TYPE(HPC46104, hpc46104_device)
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#endif // MAME_CPU_HPC_HPC_H
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739
src/devices/cpu/hpc/hpcdasm.cpp
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739
src/devices/cpu/hpc/hpcdasm.cpp
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@ -0,0 +1,739 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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National Semiconductor HPC disassembler
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Note that though all 16-bit fields in instructions have the MSB first,
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the HPC's memory organization is in fact little-endian. This is why r16
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is not used to read them.
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***************************************************************************/
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#include "util/disasmintf.h"
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#include "hpcdasm.h"
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#include "util/strformat.h"
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#include <ctype.h>
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const char *const hpc16164_disassembler::s_regs[128] =
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{
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"psw", nullptr, "SP", "PC", "A", "K", "B", "X",
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"enir", "irpd", "ircd", "sio", "porti", nullptr, "halten", "romdump",
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"porta", "portb", nullptr, "upic", nullptr, nullptr, nullptr, nullptr,
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"dira", "dirb", "bfun", nullptr, nullptr, nullptr, nullptr, nullptr,
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"adcr1", "adcr2", "portd", "adcr3", nullptr, nullptr, nullptr, nullptr,
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"ad0", "ad1", "ad2", "ad3", "ad4", "ad5", "ad6", "ad7",
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"enu", "enui", "rbuf", "tbuf", "enur", nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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"t4", "r4", "t5", "r5", "t6", "r6", "t7", "r7",
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"pwmode", "portp", nullptr, nullptr, nullptr, nullptr, "eicon", "eicr",
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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"i4cr", "i3cr", "i2cr", "r2", "t2", "r3", "t3", "divby",
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"tmmode", "t0con", "watchdog", nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr
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};
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hpc_disassembler::hpc_disassembler(const char *const regs[])
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: util::disasm_interface()
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, m_regs(regs)
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{
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}
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u32 hpc_disassembler::opcode_alignment() const
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{
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return 1;
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}
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void hpc_disassembler::format_register(std::ostream &stream, u16 reg) const
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{
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if (reg >= 0x00c0 && reg < 0x01c0)
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{
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const char *name = m_regs[(reg - 0x00c0) >> 1];
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if (name != nullptr)
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{
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stream << name;
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if (BIT(reg, 0))
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stream << "+1";
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return;
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}
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}
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util::stream_format(stream, "0%X", reg);
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}
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void hpc_disassembler::format_immediate_byte(std::ostream &stream, u8 data) const
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{
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stream << "#";
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if (data >= 0x10)
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stream << "0";
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util::stream_format(stream, "%02X", data);
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}
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void hpc_disassembler::format_immediate_word(std::ostream &stream, u16 data) const
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{
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stream << "#";
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if (data >= 0x1000)
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stream << "0";
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util::stream_format(stream, "%04X", data);
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}
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void hpc_disassembler::disassemble_op(std::ostream &stream, const char *op, u16 reg, u16 src, bool imm, bool indir, bool idx, bool w) const
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{
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util::stream_format(stream, "%-8s", op);
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if (idx)
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stream << "A";
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else
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format_register(stream, reg);
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stream << ",";
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if (imm)
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{
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if (w)
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format_immediate_word(stream, src);
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else
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format_immediate_byte(stream, src);
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}
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else
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{
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if (idx)
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util::stream_format(stream, "0%X", u16(reg));
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if (indir)
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stream << "[";
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format_register(stream, src);
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if (indir)
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stream << "]";
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if (w)
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stream << ".w";
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else
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stream << ".b";
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}
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}
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void hpc_disassembler::disassemble_unary_op(std::ostream &stream, const char *op, u16 offset, u16 src, bool indir, bool idx, bool w) const
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{
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util::stream_format(stream, "%-8s", op);
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if (idx)
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util::stream_format(stream, "0%X", offset);
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if (indir)
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stream << "[";
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format_register(stream, src);
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if (indir)
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stream << "]";
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if (w)
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{
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if (src < 0x00c4 || src >= 0x00d0 || indir)
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stream << ".w";
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}
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else
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stream << ".b";
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}
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void hpc_disassembler::disassemble_bit_op(std::ostream &stream, const char *op, u8 bit, u16 offset, u16 src, bool indir, bool idx) const
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{
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if (src >= 0x00c0 && src < 0x01c0 && BIT(src, 0) && !indir && m_regs[(src - 0x00c0) >> 1] != nullptr)
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{
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src &= 0xfffe;
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bit += 8;
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}
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util::stream_format(stream, "%-8s%d,", op, bit);
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if (idx)
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util::stream_format(stream, "0%X", offset);
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if (indir)
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stream << "[";
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format_register(stream, src);
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if (indir)
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stream << "]";
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}
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offs_t hpc_disassembler::disassemble(std::ostream &stream, offs_t pc, const hpc_disassembler::data_buffer &opcodes, const hpc_disassembler::data_buffer ¶ms)
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{
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u8 opcode = opcodes.r8(pc);
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u16 reg = REGISTER_A;
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u16 src = REGISTER_B;
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bool imm = false;
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bool dmode = false;
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bool indir = true;
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bool idx = false;
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bool jmp = false;
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offs_t bytes = 1;
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switch (opcode)
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{
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case 0x20: case 0x21: case 0x22: case 0x23:
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case 0x24: case 0x25: case 0x26: case 0x27:
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case 0x28: case 0x29: case 0x2a: case 0x2b:
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case 0x2c: case 0x2d: case 0x2e: case 0x2f:
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jmp = true;
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src = 0xffd0 + (opcode & 0x0f) * 2;
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bytes = 1;
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break;
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case 0x30: case 0x31: case 0x32: case 0x33:
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jmp = true;
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src = pc + 2 + ((opcode & 0x03) << 8 | opcodes.r8(pc + 1));
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bytes = 2;
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break;
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case 0x34: case 0x35: case 0x36: case 0x37:
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jmp = true;
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src = pc - ((opcode & 0x03) << 8 | opcodes.r8(pc + 1));
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bytes = 2;
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break;
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case 0x3f:
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case 0x89: case 0x8a:
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case 0xa9: case 0xaa: case 0xaf:
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indir = false;
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src = opcodes.r8(pc + 1);
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bytes = 2;
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break;
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case 0x40: case 0x41: case 0x42: case 0x43:
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case 0x44: case 0x45: case 0x46: case 0x47:
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case 0x48: case 0x49: case 0x4a: case 0x4b:
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case 0x4c: case 0x4d: case 0x4e: case 0x4f:
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case 0x50: case 0x51: case 0x52: case 0x53:
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case 0x54: case 0x55: case 0x56: case 0x57:
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case 0x58: case 0x59: case 0x5a: case 0x5b:
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case 0x5c: case 0x5d: case 0x5e: case 0x5f:
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jmp = true;
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src = pc + 1 + (opcode & 0x1f);
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break;
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case 0x60: case 0x61: case 0x62: case 0x63:
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case 0x64: case 0x65: case 0x66: case 0x67:
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case 0x68: case 0x69: case 0x6a: case 0x6b:
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case 0x6c: case 0x6d: case 0x6e: case 0x6f:
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case 0x70: case 0x71: case 0x72: case 0x73:
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case 0x74: case 0x75: case 0x76: case 0x77:
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case 0x78: case 0x79: case 0x7a: case 0x7b:
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case 0x7c: case 0x7d: case 0x7e: case 0x7f:
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jmp = true;
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src = pc - (opcode & 0x1f);
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break;
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case 0x80: case 0x82:
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case 0xa0:
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dmode = true;
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indir = false;
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if (BIT(opcode, 1))
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imm = true;
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src = opcodes.r8(pc + 1);
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reg = opcodes.r8(pc + 2);
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opcode = opcodes.r8(pc + 3);
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bytes = 4;
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break;
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case 0x84: case 0x86:
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case 0xa4:
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dmode = true;
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indir = false;
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if (BIT(opcode, 1))
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imm = true;
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||||
|
||||
src = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
reg = opcodes.r8(pc + 3);
|
||||
opcode = opcodes.r8(pc + 4);
|
||||
bytes = 5;
|
||||
break;
|
||||
|
||||
case 0x81: case 0x83:
|
||||
case 0xa1:
|
||||
dmode = true;
|
||||
indir = false;
|
||||
if (BIT(opcode, 1))
|
||||
imm = true;
|
||||
|
||||
src = opcodes.r8(pc + 1);
|
||||
reg = (opcodes.r8(pc + 2) << 8) | opcodes.r8(pc + 3);
|
||||
opcode = opcodes.r8(pc + 4);
|
||||
bytes = 5;
|
||||
break;
|
||||
|
||||
case 0xa2:
|
||||
idx = true;
|
||||
reg = opcodes.r8(pc + 1);
|
||||
src = opcodes.r8(pc + 2);
|
||||
opcode = opcodes.r8(pc + 3);
|
||||
bytes = 4;
|
||||
break;
|
||||
|
||||
case 0x85: case 0x87:
|
||||
case 0xa5:
|
||||
dmode = true;
|
||||
indir = false;
|
||||
if (BIT(opcode, 1))
|
||||
imm = true;
|
||||
|
||||
src = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
reg = (opcodes.r8(pc + 3) << 8) | opcodes.r8(pc + 4);
|
||||
opcode = opcodes.r8(pc + 5);
|
||||
bytes = 6;
|
||||
break;
|
||||
|
||||
case 0xa6:
|
||||
idx = true;
|
||||
reg = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
src = opcodes.r8(pc + 3);
|
||||
opcode = opcodes.r8(pc + 4);
|
||||
bytes = 5;
|
||||
break;
|
||||
|
||||
case 0x88: case 0x8b: case 0x8e:
|
||||
case 0xa8: case 0xab: case 0xae:
|
||||
indir = false;
|
||||
src = opcodes.r8(pc + 1);
|
||||
bytes = 2;
|
||||
break;
|
||||
|
||||
case 0x8c:
|
||||
case 0xac:
|
||||
indir = false;
|
||||
src = opcodes.r8(pc + 1);
|
||||
reg = opcodes.r8(pc + 2);
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0x8d:
|
||||
imm = true;
|
||||
src = opcodes.r8(pc + 1);
|
||||
reg = opcodes.r8(pc + 2);
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0x8f:
|
||||
src = REGISTER_X;
|
||||
opcode = opcodes.r8(pc + 1);
|
||||
bytes = 2;
|
||||
break;
|
||||
|
||||
case 0x90: case 0x91: case 0x92: case 0x93:
|
||||
imm = true;
|
||||
reg = 0x00c8 | ((opcode & 0x03) << 1);
|
||||
src = opcodes.r8(pc + 1);
|
||||
bytes = 2;
|
||||
break;
|
||||
|
||||
case 0x98: case 0x99: case 0x9a: case 0x9b:
|
||||
case 0x9c: case 0x9d: case 0x9e: case 0x9f:
|
||||
imm = true;
|
||||
src = opcodes.r8(pc + 1);
|
||||
bytes = 2;
|
||||
break;
|
||||
|
||||
case 0x94:
|
||||
jmp = true;
|
||||
src = pc + 2 + opcodes.r8(pc + 1);
|
||||
bytes = 2;
|
||||
break;
|
||||
|
||||
case 0x95:
|
||||
jmp = true;
|
||||
src = pc - opcodes.r8(pc + 1);
|
||||
bytes = 2;
|
||||
break;
|
||||
|
||||
case 0x96:
|
||||
indir = false;
|
||||
src = opcodes.r8(pc + 1);
|
||||
opcode = opcodes.r8(pc + 2);
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0x97:
|
||||
indir = false;
|
||||
imm = true;
|
||||
src = opcodes.r8(pc + 1);
|
||||
reg = opcodes.r8(pc + 2);
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0xa7:
|
||||
imm = true;
|
||||
src = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
reg = (opcodes.r8(pc + 3) << 8) | opcodes.r8(pc + 4);
|
||||
bytes = 5;
|
||||
break;
|
||||
|
||||
case 0xad:
|
||||
src = opcodes.r8(pc + 1);
|
||||
opcode = opcodes.r8(pc + 2);
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
|
||||
imm = true;
|
||||
reg = 0x00c8 | ((opcode & 0x03) << 1);
|
||||
src = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0xb8: case 0xb9: case 0xba: case 0xbb:
|
||||
case 0xbc: case 0xbd: case 0xbe: case 0xbf:
|
||||
imm = true;
|
||||
src = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0xb4: case 0xb5:
|
||||
jmp = true;
|
||||
src = pc + 3 + ((opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2));
|
||||
bytes = 3;
|
||||
break;
|
||||
|
||||
case 0xb6:
|
||||
indir = false;
|
||||
src = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
opcode = opcodes.r8(pc + 3);
|
||||
bytes = 4;
|
||||
break;
|
||||
|
||||
case 0xb7:
|
||||
imm = true;
|
||||
src = (opcodes.r8(pc + 1) << 8) | opcodes.r8(pc + 2);
|
||||
reg = opcodes.r8(pc + 3);
|
||||
bytes = 4;
|
||||
break;
|
||||
|
||||
case 0xd4: case 0xd5: case 0xd6:
|
||||
case 0xf4: case 0xf5: case 0xf6:
|
||||
src = REGISTER_X;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (opcode)
|
||||
{
|
||||
case 0x00:
|
||||
util::stream_format(stream, "%-8sA", "clr");
|
||||
break;
|
||||
|
||||
case 0x01:
|
||||
util::stream_format(stream, "%-8sA", "comp");
|
||||
break;
|
||||
|
||||
case 0x02:
|
||||
stream << "sc";
|
||||
break;
|
||||
|
||||
case 0x03:
|
||||
stream << "rc";
|
||||
break;
|
||||
|
||||
case 0x04:
|
||||
util::stream_format(stream, "%-8sA", "inc");
|
||||
break;
|
||||
|
||||
case 0x05:
|
||||
util::stream_format(stream, "%-8sA", "dec");
|
||||
break;
|
||||
|
||||
case 0x06:
|
||||
stream << "ifnc";
|
||||
break;
|
||||
|
||||
case 0x07:
|
||||
stream << "ifc";
|
||||
break;
|
||||
|
||||
case 0x08: case 0x09: case 0x0a: case 0x0b:
|
||||
case 0x0c: case 0x0d: case 0x0e: case 0x0f:
|
||||
disassemble_bit_op(stream, "sbit", opcode & 0x07, reg, src, indir, idx);
|
||||
break;
|
||||
|
||||
case 0x10: case 0x11: case 0x12: case 0x13:
|
||||
case 0x14: case 0x15: case 0x16: case 0x17:
|
||||
disassemble_bit_op(stream, "ifbit", opcode & 0x07, reg, src, indir, idx);
|
||||
break;
|
||||
|
||||
case 0x18: case 0x19: case 0x1a: case 0x1b:
|
||||
case 0x1c: case 0x1d: case 0x1e: case 0x1f:
|
||||
disassemble_bit_op(stream, "rbit", opcode & 0x07, reg, src, indir, idx);
|
||||
break;
|
||||
|
||||
case 0x20: case 0x21: case 0x22: case 0x23:
|
||||
case 0x24: case 0x25: case 0x26: case 0x27:
|
||||
case 0x28: case 0x29: case 0x2a: case 0x2b:
|
||||
case 0x2c: case 0x2d: case 0x2e: case 0x2f:
|
||||
util::stream_format(stream, "%-8s", "jsrp");
|
||||
if (jmp)
|
||||
util::stream_format(stream, "[0%X]", src);
|
||||
else
|
||||
stream << "???";
|
||||
bytes |= STEP_OVER;
|
||||
break;
|
||||
|
||||
case 0x30: case 0x31: case 0x32: case 0x33:
|
||||
case 0x34: case 0x35: case 0x36: case 0x37:
|
||||
util::stream_format(stream, "%-8s", "jsr");
|
||||
if (jmp)
|
||||
util::stream_format(stream, "0%X", src);
|
||||
else
|
||||
stream << "???";
|
||||
bytes |= STEP_OVER;
|
||||
break;
|
||||
|
||||
case 0x38:
|
||||
util::stream_format(stream, "%-8sX,", "rbit");
|
||||
format_register(stream, reg);
|
||||
break;
|
||||
|
||||
case 0x39:
|
||||
util::stream_format(stream, "%-8sX,", "sbit");
|
||||
format_register(stream, reg);
|
||||
break;
|
||||
|
||||
case 0x3a:
|
||||
util::stream_format(stream, "%-8sX,", "ifbit");
|
||||
format_register(stream, reg);
|
||||
break;
|
||||
|
||||
case 0x3b:
|
||||
util::stream_format(stream, "%-8sA", "swap");
|
||||
break;
|
||||
|
||||
case 0x3c:
|
||||
stream << "ret";
|
||||
bytes |= STEP_OUT;
|
||||
break;
|
||||
|
||||
case 0x3d:
|
||||
stream << "retsk";
|
||||
bytes |= STEP_OUT;
|
||||
break;
|
||||
|
||||
case 0x3e:
|
||||
stream << "reti";
|
||||
bytes |= STEP_OUT;
|
||||
break;
|
||||
|
||||
case 0x3f:
|
||||
util::stream_format(stream, "%-8s", "pop");
|
||||
format_register(stream, src);
|
||||
break;
|
||||
|
||||
case 0x40:
|
||||
stream << "nop";
|
||||
break;
|
||||
|
||||
case 0x41: case 0x42: case 0x43:
|
||||
case 0x44: case 0x45: case 0x46: case 0x47:
|
||||
case 0x48: case 0x49: case 0x4a: case 0x4b:
|
||||
case 0x4c: case 0x4d: case 0x4e: case 0x4f:
|
||||
case 0x50: case 0x51: case 0x52: case 0x53:
|
||||
case 0x54: case 0x55: case 0x56: case 0x57:
|
||||
case 0x58: case 0x59: case 0x5a: case 0x5b:
|
||||
case 0x5c: case 0x5d: case 0x5e: case 0x5f:
|
||||
case 0x60: case 0x61: case 0x62: case 0x63:
|
||||
case 0x64: case 0x65: case 0x66: case 0x67:
|
||||
case 0x68: case 0x69: case 0x6a: case 0x6b:
|
||||
case 0x6c: case 0x6d: case 0x6e: case 0x6f:
|
||||
case 0x70: case 0x71: case 0x72: case 0x73:
|
||||
case 0x74: case 0x75: case 0x76: case 0x77:
|
||||
case 0x78: case 0x79: case 0x7a: case 0x7b:
|
||||
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
|
||||
util::stream_format(stream, "%-8s", "jp");
|
||||
if (jmp)
|
||||
util::stream_format(stream, "0%X", src);
|
||||
else
|
||||
stream << "???";
|
||||
break;
|
||||
|
||||
case 0x88: case 0x8c:
|
||||
case 0x90: case 0x91: case 0x92: case 0x93:
|
||||
case 0x97:
|
||||
case 0xa8: case 0xac:
|
||||
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
|
||||
case 0xb7:
|
||||
case 0xc4:
|
||||
case 0xd4:
|
||||
case 0xe4:
|
||||
case 0xf4:
|
||||
disassemble_op(stream, "ld", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x89:
|
||||
case 0xa9:
|
||||
disassemble_unary_op(stream, "inc", reg, src, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x8a:
|
||||
case 0xaa:
|
||||
disassemble_unary_op(stream, "decsz", reg, src, indir, idx, BIT(opcode, 5));
|
||||
bytes |= STEP_OVER | (1 << OVERINSTSHIFT);
|
||||
break;
|
||||
|
||||
case 0x8b:
|
||||
case 0xab:
|
||||
case 0xc6:
|
||||
case 0xd6:
|
||||
case 0xe6:
|
||||
case 0xf6:
|
||||
disassemble_op(stream, dmode ? "ld" : "st", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x8d:
|
||||
util::stream_format(stream, "%-8sBK,", "ld");
|
||||
format_immediate_byte(stream, src);
|
||||
stream << ",";
|
||||
format_immediate_byte(stream, reg);
|
||||
break;
|
||||
|
||||
case 0x8e:
|
||||
case 0xae:
|
||||
case 0xc5:
|
||||
case 0xd5:
|
||||
case 0xe5:
|
||||
case 0xf5:
|
||||
disassemble_op(stream, "x", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x94: case 0x95:
|
||||
util::stream_format(stream, "%-8s", "jp");
|
||||
if (jmp)
|
||||
util::stream_format(stream, "0%X", src);
|
||||
else
|
||||
stream << "???";
|
||||
break;
|
||||
|
||||
case 0x98: case 0xb8: case 0xd8: case 0xf8:
|
||||
disassemble_op(stream, "add", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x99: case 0xb9: case 0xd9: case 0xf9:
|
||||
disassemble_op(stream, "and", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x9a: case 0xba: case 0xda: case 0xfa:
|
||||
disassemble_op(stream, "or", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x9b: case 0xbb: case 0xdb: case 0xfb:
|
||||
disassemble_op(stream, "xor", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x9c: case 0xbc: case 0xdc: case 0xfc:
|
||||
disassemble_op(stream, "ifeq", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x9d: case 0xbd: case 0xdd: case 0xfd:
|
||||
disassemble_op(stream, "ifgt", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x9e: case 0xbe: case 0xde: case 0xfe:
|
||||
disassemble_op(stream, "mult", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0x9f: case 0xbf: case 0xdf: case 0xff:
|
||||
disassemble_op(stream, "div", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0xa7:
|
||||
util::stream_format(stream, "%-8sBK,", "ld");
|
||||
format_immediate_word(stream, src);
|
||||
stream << ",";
|
||||
format_immediate_word(stream, reg);
|
||||
break;
|
||||
|
||||
case 0xaf:
|
||||
util::stream_format(stream, "%-8s", "push");
|
||||
format_register(stream, src);
|
||||
break;
|
||||
|
||||
case 0xb4:
|
||||
util::stream_format(stream, "%-8s", "jmpl");
|
||||
if (jmp)
|
||||
util::stream_format(stream, "0%X", src);
|
||||
else
|
||||
stream << "???";
|
||||
break;
|
||||
|
||||
case 0xb5:
|
||||
util::stream_format(stream, "%-8s", "jsrl");
|
||||
if (jmp)
|
||||
util::stream_format(stream, "0%X", src);
|
||||
else
|
||||
stream << "???";
|
||||
bytes |= STEP_OVER;
|
||||
break;
|
||||
|
||||
case 0xc0: case 0xc2:
|
||||
case 0xe0: case 0xe2:
|
||||
util::stream_format(stream, "%-8sA,[B%c].%c", "lds",
|
||||
BIT(opcode, 1) ? '-' : '+',
|
||||
BIT(opcode, 5) ? 'w' : 'b');
|
||||
bytes |= STEP_OVER | (1 << OVERINSTSHIFT);
|
||||
break;
|
||||
|
||||
case 0xd0: case 0xd2:
|
||||
case 0xf0: case 0xf2:
|
||||
util::stream_format(stream, "%-8sA,[X%c].%c", "ld",
|
||||
BIT(opcode, 1) ? '-' : '+',
|
||||
BIT(opcode, 5) ? 'w' : 'b');
|
||||
break;
|
||||
|
||||
case 0xc1: case 0xc3:
|
||||
case 0xe1: case 0xe3:
|
||||
util::stream_format(stream, "%-8sA,[B%c].%c", "xs",
|
||||
BIT(opcode, 1) ? '-' : '+',
|
||||
BIT(opcode, 5) ? 'w' : 'b');
|
||||
bytes |= STEP_OVER | (1 << OVERINSTSHIFT);
|
||||
break;
|
||||
|
||||
case 0xd1: case 0xd3:
|
||||
case 0xf1: case 0xf3:
|
||||
util::stream_format(stream, "%-8sA,[X%c].%c", "x",
|
||||
BIT(opcode, 1) ? '-' : '+',
|
||||
BIT(opcode, 5) ? 'w' : 'b');
|
||||
break;
|
||||
|
||||
case 0xc7: case 0xe7:
|
||||
util::stream_format(stream, "%-8sA", BIT(opcode, 5) ? "shl" : "shr");
|
||||
break;
|
||||
|
||||
case 0xd7: case 0xf7:
|
||||
util::stream_format(stream, "%-8sA", BIT(opcode, 5) ? "rlc" : "rrc");
|
||||
break;
|
||||
|
||||
case 0xc8: case 0xe8:
|
||||
disassemble_op(stream, "adc", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0xc9: case 0xe9:
|
||||
disassemble_op(stream, "dadc", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0xca: case 0xea:
|
||||
disassemble_op(stream, "dsubc", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0xcb: case 0xeb:
|
||||
disassemble_op(stream, "subc", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
case 0xcc: case 0xec:
|
||||
stream << "jid";
|
||||
if (BIT(opcode, 5))
|
||||
stream << "w";
|
||||
break;
|
||||
|
||||
case 0xcf: case 0xef:
|
||||
disassemble_op(stream, "divd", reg, src, imm, indir, idx, BIT(opcode, 5));
|
||||
break;
|
||||
|
||||
default:
|
||||
stream << "???";
|
||||
break;
|
||||
}
|
||||
|
||||
return bytes | SUPPORTED;
|
||||
}
|
||||
49
src/devices/cpu/hpc/hpcdasm.h
Normal file
49
src/devices/cpu/hpc/hpcdasm.h
Normal file
@ -0,0 +1,49 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:AJR
|
||||
|
||||
#ifndef MAME_CPU_HPC_HPCDASM_H
|
||||
#define MAME_CPU_HPC_HPCDASM_H
|
||||
|
||||
#pragma once
|
||||
|
||||
class hpc_disassembler : public util::disasm_interface
|
||||
{
|
||||
protected:
|
||||
enum : u16
|
||||
{
|
||||
REGISTER_A = 0x00c8,
|
||||
REGISTER_K = 0x00ca,
|
||||
REGISTER_B = 0x00cc,
|
||||
REGISTER_X = 0x00ce
|
||||
};
|
||||
|
||||
// construction/destruction
|
||||
hpc_disassembler(const char *const regs[]);
|
||||
|
||||
// disassembler overrides
|
||||
virtual u32 opcode_alignment() const override;
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
|
||||
private:
|
||||
// internal helpers
|
||||
void format_register(std::ostream &stream, u16 reg) const;
|
||||
void format_immediate_byte(std::ostream &stream, u8 data) const;
|
||||
void format_immediate_word(std::ostream &stream, u16 data) const;
|
||||
void disassemble_op(std::ostream &stream, const char *op, u16 reg, u16 src, bool imm, bool indir, bool idx, bool w) const;
|
||||
void disassemble_unary_op(std::ostream &stream, const char *op, u16 offset, u16 src, bool indir, bool idx, bool w) const;
|
||||
void disassemble_bit_op(std::ostream &stream, const char *op, u8 bit, u16 offset, u16 src, bool indir, bool idx) const;
|
||||
|
||||
// register names
|
||||
const char *const *m_regs;
|
||||
};
|
||||
|
||||
class hpc16164_disassembler : public hpc_disassembler
|
||||
{
|
||||
public:
|
||||
hpc16164_disassembler() : hpc_disassembler(s_regs) { }
|
||||
|
||||
private:
|
||||
static const char *const s_regs[128];
|
||||
};
|
||||
|
||||
#endif // MAME_CPU_HPC_HPCDASM_H
|
||||
@ -13,6 +13,7 @@ Device is a 27c256 location U3
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/hpc/hpc.h"
|
||||
#include "speaker.h"
|
||||
|
||||
|
||||
@ -21,7 +22,7 @@ class age_candy_state : public driver_device
|
||||
public:
|
||||
age_candy_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
// ,m_maincpu(*this, "maincpu")
|
||||
, m_maincpu(*this, "maincpu")
|
||||
{ }
|
||||
|
||||
void age_candy(machine_config &config);
|
||||
@ -31,7 +32,7 @@ private:
|
||||
virtual void machine_reset() override;
|
||||
|
||||
void age_candy_map(address_map &map);
|
||||
// required_device<mcs51_cpu_device> m_maincpu;
|
||||
required_device<hpc_device> m_maincpu;
|
||||
};
|
||||
|
||||
static INPUT_PORTS_START( age_candy )
|
||||
@ -48,24 +49,19 @@ void age_candy_state::machine_reset()
|
||||
}
|
||||
|
||||
|
||||
#ifdef UNUSED_DEFINITION
|
||||
void age_candy_state::age_candy_map(address_map &map)
|
||||
{
|
||||
map(0xc000, 0xffff).rom().region("maincpu", 0x4000);
|
||||
map(0x8000, 0xffff).rom().region("maincpu", 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
MACHINE_CONFIG_START(age_candy_state::age_candy)
|
||||
|
||||
/* basic machine hardware */
|
||||
// MCFG_DEVICE_ADD("maincpu", HPC46104, 8000000) // unknown clock; HPC emulation needed
|
||||
// MCFG_DEVICE_PROGRAM_MAP(age_candy_map)
|
||||
// MCFG_DEVICE_IO_MAP(age_candy_io)
|
||||
void age_candy_state::age_candy(machine_config &config)
|
||||
{
|
||||
HPC46104(config, m_maincpu, 8000000); // unknown clock; HPC still not actually emulated
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &age_candy_state::age_candy_map);
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
}
|
||||
|
||||
|
||||
ROM_START( age_cand )
|
||||
|
||||
@ -55,6 +55,7 @@ using util::BIT;
|
||||
#include "cpu/hcd62121/hcd62121d.h"
|
||||
#include "cpu/hd61700/hd61700d.h"
|
||||
#include "cpu/hmcs40/hmcs40d.h"
|
||||
#include "cpu/hpc/hpcdasm.h"
|
||||
#include "cpu/hphybrid/hphybrid_dasm.h"
|
||||
#include "cpu/i386/i386dasm.h"
|
||||
#include "cpu/i8008/8008dasm.h"
|
||||
@ -360,6 +361,7 @@ static const dasm_table_entry dasm_table[] =
|
||||
{ "hp_5061_3001", be, -1, []() -> util::disasm_interface * { return new hp_5061_3001_disassembler; } },
|
||||
{ "hp_5061_3011", be, -1, []() -> util::disasm_interface * { return new hp_5061_3011_disassembler; } },
|
||||
{ "hp_09825_67907", be, -1, []() -> util::disasm_interface * { return new hp_09825_67907_disassembler; } },
|
||||
{ "hpc16164", le, 0, []() -> util::disasm_interface * { return new hpc16164_disassembler; } },
|
||||
{ "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler(&hyperstone_unidasm); } },
|
||||
{ "i4004", le, 0, []() -> util::disasm_interface * { return new i4004_disassembler; } },
|
||||
{ "i4040", le, 0, []() -> util::disasm_interface * { return new i4040_disassembler; } },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user