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cpu/m68000: Stub out the Coprocesor Interface Registers found on '010-'030 so that Mac ROMs can detect if an FPU is present. [R. Belmont]
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@ -656,6 +656,16 @@ inline u32 m68ki_read_8_fc(u32 address, u32 fc)
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_rw = 1;
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m_mmu_tmp_rw = 1;
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m_mmu_tmp_sz = M68K_SZ_BYTE;
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m_mmu_tmp_sz = M68K_SZ_BYTE;
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// Check for reading the FPU's CIRs if this is an '020 or '030.
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// In CPU space (FC 7), addresses 0x0002xxxx are coprocessor interface registers.
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// Bits 15-13 are the coprocessor ID, and bits 0-4 are the register select.
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if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
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{
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if ((address & 0xffffeff0) == 0x00022000)
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{
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return m6888x_read_cir(address);
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}
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}
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return m_read8(address);
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return m_read8(address);
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}
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}
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inline u32 m68ki_read_16_fc(u32 address, u32 fc)
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inline u32 m68ki_read_16_fc(u32 address, u32 fc)
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@ -667,6 +677,13 @@ inline u32 m68ki_read_16_fc(u32 address, u32 fc)
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_rw = 1;
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m_mmu_tmp_rw = 1;
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m_mmu_tmp_sz = M68K_SZ_WORD;
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m_mmu_tmp_sz = M68K_SZ_WORD;
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if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
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{
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if ((address & 0xffffeff0) == 0x00022000)
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{
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return m6888x_read_cir(address);
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}
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}
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return m_read16(address);
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return m_read16(address);
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}
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}
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inline u32 m68ki_read_32_fc(u32 address, u32 fc)
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inline u32 m68ki_read_32_fc(u32 address, u32 fc)
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@ -678,6 +695,13 @@ inline u32 m68ki_read_32_fc(u32 address, u32 fc)
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_rw = 1;
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m_mmu_tmp_rw = 1;
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m_mmu_tmp_sz = M68K_SZ_LONG;
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m_mmu_tmp_sz = M68K_SZ_LONG;
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if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
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{
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if ((address & 0xffffeff0) == 0x00022000)
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{
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return m6888x_read_cir(address);
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}
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}
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return m_read32(address);
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return m_read32(address);
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}
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}
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@ -686,6 +710,14 @@ inline void m68ki_write_8_fc(u32 address, u32 fc, u32 value)
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_rw = 0;
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m_mmu_tmp_rw = 0;
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m_mmu_tmp_sz = M68K_SZ_BYTE;
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m_mmu_tmp_sz = M68K_SZ_BYTE;
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if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
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{
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if ((address & 0xffffeff0) == 0x00022000)
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{
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m6888x_write_cir(address, value);
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return;
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}
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}
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m_write8(address, value);
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m_write8(address, value);
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}
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}
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inline void m68ki_write_16_fc(u32 address, u32 fc, u32 value)
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inline void m68ki_write_16_fc(u32 address, u32 fc, u32 value)
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@ -697,6 +729,14 @@ inline void m68ki_write_16_fc(u32 address, u32 fc, u32 value)
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_rw = 0;
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m_mmu_tmp_rw = 0;
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m_mmu_tmp_sz = M68K_SZ_WORD;
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m_mmu_tmp_sz = M68K_SZ_WORD;
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if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
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{
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if ((address & 0xffffeff0) == 0x00022000)
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{
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m6888x_write_cir(address, value);
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return;
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}
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}
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m_write16(address, value);
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m_write16(address, value);
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}
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}
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inline void m68ki_write_32_fc(u32 address, u32 fc, u32 value)
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inline void m68ki_write_32_fc(u32 address, u32 fc, u32 value)
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@ -708,6 +748,14 @@ inline void m68ki_write_32_fc(u32 address, u32 fc, u32 value)
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_fc = fc;
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m_mmu_tmp_rw = 0;
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m_mmu_tmp_rw = 0;
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m_mmu_tmp_sz = M68K_SZ_LONG;
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m_mmu_tmp_sz = M68K_SZ_LONG;
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if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
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{
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if ((address & 0xffffeff0) == 0x00022000)
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{
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m6888x_write_cir(address, value);
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return;
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}
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}
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m_write32(address, value);
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m_write32(address, value);
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}
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}
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@ -2548,3 +2548,44 @@ void m68000_musashi_device::m68881_ftrap()
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}
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}
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}
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}
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}
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}
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// Read the FPU's Coprocessor Interface Registers (CIRs).
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// References: MC68881/68882 Coprocessor User's Manual 1st Edition,
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// pages 7-1 to 7-8 and M68030 User's Manual 3rd Edition page 7-69.
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u32 m68000_musashi_device::m6888x_read_cir(offs_t offset)
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{
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// If no FPU is present, reading any CIRs causes a bus error.
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// Pre-1992 Macintosh ROMs use this method to detect the presence
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// of an FPU. 1992 and later ROMs just execute FNOP and check for
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// an F-line trap, because this mechanism does not exist on the 68040.
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if (!m_has_fpu)
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{
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m68k_cause_bus_error();
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}
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// TODO: actually try to return meaningful values?
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// offset function
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// 0x00 Response read-only 16 bit (value in D31-D16)
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// 0x02 Control write-only 16
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// 0x04 Save read 16
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// 0x06 Restore read/write 16
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// 0x08 Operation Word read/write 16
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// 0x0a Command write-only 16
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// 0x0c (reserved) N/A 16
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// 0x0e Condition write-only 16
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// 0x10 Operand read/write 32 bit
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// 0x14 Register Select read-only 16
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// 0x18 Instruction Address write-only 32
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// 0x1c Operand Address read/write 32
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return 0;
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}
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void m68000_musashi_device::m6888x_write_cir(offs_t offset, u32 data)
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{
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if (!m_has_fpu)
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{
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m68k_cause_bus_error();
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}
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// TODO: actually do something with these values?
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}
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@ -378,6 +378,8 @@ protected:
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void m68040_do_frestore(u32 addr, int reg);
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void m68040_do_frestore(u32 addr, int reg);
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void m68040_fpu_op1();
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void m68040_fpu_op1();
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void m68881_ftrap();
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void m68881_ftrap();
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u32 m6888x_read_cir(offs_t offset);
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void m6888x_write_cir(offs_t offset, u32 data);
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};
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};
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#endif // MAME_CPU_M68000_M68KMUSASHI_H
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#endif // MAME_CPU_M68000_M68KMUSASHI_H
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