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mc146818: support direct-access bus hookup method. [R. Belmont]

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This chip has 8 address/data lines and an address/data strobe.  Most
users hooked it up so the low-order address bit is the address/data
strobe, allowing you to write an address and then read/write data
at an adjacent address.

But if you don't mind using a few more gates you can latch the
low-order address bits from the CPU into the chip then latch the
data in or out of it so it works just like a RAM.  The MIPS DECstations
did this in their I/O ASICs.
This commit is contained in:
arbee 2018-07-15 13:07:51 -04:00
parent 7eff013f87
commit 16336848af
2 changed files with 82 additions and 65 deletions
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143
src/devices/machine/mc146818.cpp
View File

@ -520,42 +520,50 @@ READ8_MEMBER( mc146818_device::read )
break; break;
case 1: case 1:
switch (m_index) data = read_direct(space, m_index);
{
case REG_A:
data = m_data[REG_A];
// Update In Progress (UIP) time for 32768 Hz is 244+1984usec
/// TODO: support other dividers
/// TODO: don't set this if update is stopped
if ((machine().time() - m_last_refresh) < attotime::from_usec(244+1984))
data |= REG_A_UIP;
break;
case REG_C:
// the unused bits b0 ... b3 are always read as 0
data = m_data[REG_C] & (REG_C_IRQF | REG_C_PF | REG_C_AF | REG_C_UF);
// read 0x0c will clear all IRQ flags in register 0x0c
m_data[REG_C] &= ~(REG_C_IRQF | REG_C_PF | REG_C_AF | REG_C_UF);
update_irq();
break;
case REG_D:
/* battery ok */
data = m_data[REG_D] | REG_D_VRT;
break;
default:
data = m_data[m_index];
break;
}
break; break;
} }
LOG("mc146818_port_r(): index=0x%02x data=0x%02x\n", m_index, data);
return data; return data;
} }
READ8_MEMBER( mc146818_device::read_direct )
{
uint8_t data = 0;
switch (offset)
{
case REG_A:
data = m_data[REG_A];
// Update In Progress (UIP) time for 32768 Hz is 244+1984usec
/// TODO: support other dividers
/// TODO: don't set this if update is stopped
if ((machine().time() - m_last_refresh) < attotime::from_usec(244+1984))
data |= REG_A_UIP;
break;
case REG_C:
// the unused bits b0 ... b3 are always read as 0
data = m_data[REG_C] & (REG_C_IRQF | REG_C_PF | REG_C_AF | REG_C_UF);
// read 0x0c will clear all IRQ flags in register 0x0c
m_data[REG_C] &= ~(REG_C_IRQF | REG_C_PF | REG_C_AF | REG_C_UF);
update_irq();
break;
case REG_D:
/* battery ok */
data = m_data[REG_D] | REG_D_VRT;
break;
default:
data = m_data[m_index];
break;
}
LOG("mc146818_port_r(): offset=0x%02x data=0x%02x\n", offset, data);
return data;
}
//------------------------------------------------- //-------------------------------------------------
// write - I/O handler for writing // write - I/O handler for writing
@ -563,8 +571,6 @@ READ8_MEMBER( mc146818_device::read )
WRITE8_MEMBER( mc146818_device::write ) WRITE8_MEMBER( mc146818_device::write )
{ {
LOG("mc146818_port_w(): index=0x%02x data=0x%02x\n", m_index, data);
switch (offset) switch (offset)
{ {
case 0: case 0:
@ -572,39 +578,46 @@ WRITE8_MEMBER( mc146818_device::write )
break; break;
case 1: case 1:
switch (m_index) write_direct(space, m_index, data);
{
case REG_SECONDS:
// top bit of SECONDS is read only
m_data[REG_SECONDS] = data & ~0x80;
break;
case REG_A:
// top bit of A is read only
if ((data ^ m_data[REG_A]) & ~REG_A_UIP)
{
m_data[REG_A] = data & ~REG_A_UIP;
update_timer();
}
break;
case REG_B:
if ((data & REG_B_SET) && !(m_data[REG_B] & REG_B_SET))
data &= ~REG_B_UIE;
m_data[REG_B] = data;
update_irq();
break;
case REG_C:
case REG_D:
// register C & D is readonly
break;
default:
m_data[m_index] = data;
break;
}
break; break;
} }
} }
WRITE8_MEMBER( mc146818_device::write_direct )
{
LOG("mc146818_port_w(): offset=0x%02x data=0x%02x\n", offset, data);
switch (offset)
{
case REG_SECONDS:
// top bit of SECONDS is read only
m_data[REG_SECONDS] = data & ~0x80;
break;
case REG_A:
// top bit of A is read only
if ((data ^ m_data[REG_A]) & ~REG_A_UIP)
{
m_data[REG_A] = data & ~REG_A_UIP;
update_timer();
}
break;
case REG_B:
if ((data & REG_B_SET) && !(m_data[REG_B] & REG_B_SET))
data &= ~REG_B_UIE;
m_data[REG_B] = data;
update_irq();
break;
case REG_C:
case REG_D:
// register C & D is readonly
break;
default:
m_data[m_index] = data;
break;
}
}

4
src/devices/machine/mc146818.h
View File

@ -72,6 +72,10 @@ public:
DECLARE_READ8_MEMBER( read ); DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write ); DECLARE_WRITE8_MEMBER( write );
// direct-mapped read/write access
DECLARE_READ8_MEMBER( read_direct );
DECLARE_WRITE8_MEMBER( write_direct );
protected: protected:
mc146818_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); mc146818_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);