mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
(MESS) mbee: various things (nw)
This commit is contained in:
Robbbert
parent
2e294961b4
commit
16c0373583
@ -88,6 +88,17 @@
|
||||
3. At the Basic prompt, type in EDASM press enter. At the memory size
|
||||
prompt press enter. Now, make sure the keyboard works properly.
|
||||
|
||||
How to use the config switch for PIO B7:
|
||||
- Teleterm: Must use RTC. Anything else makes teleterm go crazy.
|
||||
- 256TC, 128, 128p: Doesn't seem to matter, leave at the default.
|
||||
- Standard: Has no effect, best left at "Tied High"
|
||||
- Other rom-based models: "VS" to make the Telcom clock work, or "Tied high".
|
||||
- 56k: not sure yet, leave as "Tied high" until more is known.
|
||||
|
||||
How to use programs that need functions keys on models that use the old
|
||||
keyboard (for example, to run Simply Write on a 128k model).
|
||||
Press Ctrl+Shift+number, eg for F1 press hold down Ctrl Shift, press 1.
|
||||
|
||||
***************************************************************************
|
||||
|
||||
TODO/not working:
|
||||
@ -108,13 +119,10 @@
|
||||
crashes due to a bug in z80pio emulation.
|
||||
|
||||
- 256tc: Keyboard ROM U60 needs to be dumped.
|
||||
- 128k: GOLD PAL needs to be dumped for the bankswitching.
|
||||
- 64k: RED PAL needs to be dumped for the bankswitching.
|
||||
- 128k, 64k: PALs need to be dumped for the bankswitching.
|
||||
|
||||
- Teleterm: keyboard has multiple severe problems. Also, the schematic shows
|
||||
it using the old-style keyboard, however this must be wrong since
|
||||
the computer has function keys, which are only available on the
|
||||
new keyboard.
|
||||
- Teleterm: keyboard has problems. The schematic shows it using the old-style keyboard,
|
||||
however it actually uses the new keyboard with interrupts.
|
||||
|
||||
- Mouse: a few programs support the use of a serial mouse which interfaced
|
||||
directly to the Z80PIO. However there's little info to be found.
|
||||
@ -135,61 +143,45 @@
|
||||
|
||||
static ADDRESS_MAP_START(mbee_mem, AS_PROGRAM, 8, mbee_state)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
|
||||
AM_RANGE(0x1000, 0x3fff) AM_RAM
|
||||
AM_RANGE(0x4000, 0x7fff) AM_WRITENOP // Needed because quickload to here will crash MESS
|
||||
AM_RANGE(0x0000, 0x3fff) AM_RAM
|
||||
AM_RANGE(0x8000, 0xefff) AM_ROM
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(mbee_low_r, mbee_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbee_high_r, mbee_high_w)
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(video_low_r, video_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(video_high_r, video_high_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeeic_mem, AS_PROGRAM, 8, mbee_state)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
|
||||
AM_RANGE(0x1000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x0000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x8000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("pak")
|
||||
AM_RANGE(0xe000, 0xefff) AM_ROM
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(mbee_low_r, mbee_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbeeic_high_r, mbeeic_high_w)
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(video_low_r, video_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(video_high_r, video_high_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeepc_mem, AS_PROGRAM, 8, mbee_state)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
|
||||
AM_RANGE(0x1000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x0000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x8000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("pak")
|
||||
AM_RANGE(0xe000, 0xefff) AM_ROMBANK("telcom")
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(mbee_low_r, mbee_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbeeic_high_r, mbeeic_high_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeepc85_mem, AS_PROGRAM, 8, mbee_state)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
|
||||
AM_RANGE(0x1000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x8000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("pak")
|
||||
AM_RANGE(0xe000, 0xefff) AM_ROMBANK("telcom")
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(mbee_low_r, mbee_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbeeic_high_r, mbeeic_high_w)
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(video_low_r, video_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(video_high_r, video_high_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeeppc_mem, AS_PROGRAM, 8, mbee_state)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
|
||||
AM_RANGE(0x1000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x0000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("basic")
|
||||
AM_RANGE(0xa000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("pak")
|
||||
AM_RANGE(0xe000, 0xefff) AM_ROMBANK("telcom")
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(mbeeppc_low_r, mbeeppc_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbeeppc_high_r, mbeeppc_high_w)
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(video_low_r, video_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(video_high_r, video_high_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbee56_mem, AS_PROGRAM, 8, mbee_state)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
|
||||
AM_RANGE(0x1000, 0xdfff) AM_RAM
|
||||
AM_RANGE(0x0000, 0xdfff) AM_RAM
|
||||
AM_RANGE(0xe000, 0xefff) AM_ROM
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(mbee_low_r, mbee_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbeeic_high_r, mbeeic_high_w)
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(video_low_r, video_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(video_high_r, video_high_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbee256_mem, AS_PROGRAM, 8, mbee_state)
|
||||
@ -212,21 +204,20 @@ static ADDRESS_MAP_START(mbee256_mem, AS_PROGRAM, 8, mbee_state)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeett_mem, AS_PROGRAM, 8, mbee_state)
|
||||
AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
|
||||
AM_RANGE(0x1000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x0000, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x8000, 0x9fff) AM_ROM
|
||||
AM_RANGE(0xa000, 0xbfff) AM_RAM
|
||||
AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("pak")
|
||||
AM_RANGE(0xe000, 0xefff) AM_ROMBANK("telcom")
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(mbeeppc_low_r, mbeeppc_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(mbeeppc_high_r, mbeeppc_high_w)
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(video_low_r, video_low_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_READWRITE(video_high_r, video_high_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbee_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x0d, 0x0d) AM_MIRROR(0x10) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
ADDRESS_MAP_END
|
||||
@ -235,10 +226,10 @@ static ADDRESS_MAP_START(mbeeic_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x08, 0x08) AM_MIRROR(0x10) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x09, 0x09) AM_MIRROR(0x10) AM_NOP /* Listed as "Colour Wait Off" or "USART 2651" but doesn't appear in the schematics */
|
||||
AM_RANGE(0x0a, 0x0a) AM_MIRROR(0x10) AM_READWRITE(mbeeic_0a_r, mbeeic_0a_w)
|
||||
AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x08, 0x08) AM_MIRROR(0x10) AM_READWRITE(port08_r, port08_w)
|
||||
AM_RANGE(0x09, 0x09) AM_WRITENOP /* Listed as "Colour Wait Off" or "USART 2651" but doesn't appear in the schematics */
|
||||
AM_RANGE(0x0a, 0x0a) AM_MIRROR(0x10) AM_WRITE(port0a_w)
|
||||
AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x0d, 0x0d) AM_MIRROR(0x10) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
ADDRESS_MAP_END
|
||||
@ -246,45 +237,56 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START(mbeepc_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff10) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff10) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_low_r, mbeeic_0a_w)
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff10) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff10) AM_READWRITE(port08_r, port08_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xff00) AM_WRITENOP
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff10) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x000c, 0x000c) AM_MIRROR(0xff10) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x000d, 0x000d) AM_MIRROR(0xff10) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x010a, 0x010a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_high_r, mbeeic_0a_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeepc85_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff10) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff10) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_low_r, mbeeic_0a_w)
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff10) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x000c, 0x000c) AM_MIRROR(0xff10) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x000d, 0x000d) AM_MIRROR(0xff10) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x010a, 0x010a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_high_r, mbeeic_0a_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(telcom_low_r, port0a_w)
|
||||
AM_RANGE(0x010a, 0x010a) AM_MIRROR(0xfe10) AM_READWRITE(telcom_high_r, port0a_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeeppc_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff10) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff10) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_low_r, mbeeic_0a_w)
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff10) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff10) AM_READWRITE(port08_r, port08_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xff00) AM_WRITENOP
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff10) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x000c, 0x000c) AM_MIRROR(0xff00) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x000d, 0x000d) AM_MIRROR(0xff10) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x001c, 0x001c) AM_MIRROR(0xff00) AM_READWRITE(mbeeppc_1c_r, mbeeppc_1c_w)
|
||||
AM_RANGE(0x010a, 0x010a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_high_r, mbeeic_0a_w)
|
||||
AM_RANGE(0x001c, 0x001c) AM_MIRROR(0xff00) AM_READWRITE(port1c_r, port1c_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(telcom_low_r, port0a_w)
|
||||
AM_RANGE(0x010a, 0x010a) AM_MIRROR(0xfe10) AM_READWRITE(telcom_high_r, port0a_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeett_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff00) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x0004, 0x0004) AM_MIRROR(0xff00) AM_WRITE(port04_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_MIRROR(0xff00) AM_WRITE(port06_w)
|
||||
AM_RANGE(0x0007, 0x0007) AM_MIRROR(0xff00) AM_READ(port07_r)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_READWRITE(port08_r, port08_w)
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff00) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x000c, 0x000c) AM_MIRROR(0xff00) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x000d, 0x000d) AM_MIRROR(0xff00) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x0018, 0x001b) AM_MIRROR(0xff00) AM_READ(port18_r)
|
||||
AM_RANGE(0x001c, 0x001f) AM_MIRROR(0xff00) AM_READWRITE(port1c_r, port1c_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xfe00) AM_READ(speed_low_r)
|
||||
AM_RANGE(0x0109, 0x0109) AM_MIRROR(0xfe00) AM_READ(speed_high_r)
|
||||
AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe00) AM_READWRITE(telcom_low_r, port0a_w)
|
||||
AM_RANGE(0x010a, 0x010a) AM_MIRROR(0xfe00) AM_READWRITE(telcom_high_r, port0a_w)
|
||||
AM_RANGE(0x0068, 0x006f) AM_MIRROR(0xff00) AM_DEVREADWRITE("scc", scc8530_t, reg_r, reg_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbee56_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x00, 0x03) AM_MIRROR(0x10) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x08, 0x08) AM_MIRROR(0x10) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x0b, 0x0b) AM_MIRROR(0x10) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x10) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x0d, 0x0d) AM_MIRROR(0x10) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x08, 0x08) AM_READWRITE(port08_r, port08_w)
|
||||
AM_RANGE(0x09, 0x09) AM_WRITENOP
|
||||
AM_RANGE(0x0b, 0x0b) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x0c, 0x0c) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x0d, 0x0d) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x44, 0x47) AM_DEVREADWRITE("fdc", wd2793_t, read, write)
|
||||
AM_RANGE(0x48, 0x4f) AM_READWRITE(fdc_status_r, fdc_motor_w)
|
||||
ADDRESS_MAP_END
|
||||
@ -293,14 +295,15 @@ static ADDRESS_MAP_START(mbee128_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x04, 0x04) AM_WRITE(mbee_04_w)
|
||||
AM_RANGE(0x06, 0x06) AM_WRITE(mbee_06_w)
|
||||
AM_RANGE(0x07, 0x07) AM_READ(mbee_07_r)
|
||||
AM_RANGE(0x08, 0x08) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x0b, 0x0b) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x04, 0x04) AM_WRITE(port04_w)
|
||||
AM_RANGE(0x06, 0x06) AM_WRITE(port06_w)
|
||||
AM_RANGE(0x07, 0x07) AM_READ(port07_r)
|
||||
AM_RANGE(0x08, 0x08) AM_READWRITE(port08_r, port08_w)
|
||||
AM_RANGE(0x09, 0x09) AM_WRITENOP
|
||||
AM_RANGE(0x0b, 0x0b) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x0c, 0x0c) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x0d, 0x0d) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x1c, 0x1f) AM_READWRITE(mbeeppc_1c_r, mbee256_1c_w)
|
||||
AM_RANGE(0x1c, 0x1f) AM_READWRITE(port1c_r, port1c_w)
|
||||
AM_RANGE(0x44, 0x47) AM_DEVREADWRITE("fdc", wd2793_t, read, write)
|
||||
AM_RANGE(0x48, 0x4f) AM_READWRITE(fdc_status_r, fdc_motor_w)
|
||||
AM_RANGE(0x50, 0x57) AM_WRITE(mbee128_50_w)
|
||||
@ -309,18 +312,19 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START(mbee256_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff00) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x0004, 0x0004) AM_MIRROR(0xff00) AM_WRITE(mbee_04_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_MIRROR(0xff00) AM_WRITE(mbee_06_w)
|
||||
AM_RANGE(0x0007, 0x0007) AM_MIRROR(0xff00) AM_READ(mbee_07_r)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xfd00) AM_READ(mbee256_speed_low_r)
|
||||
AM_RANGE(0x0209, 0x0209) AM_MIRROR(0xfd00) AM_READ(mbee256_speed_high_r)
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff00) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x0004, 0x0004) AM_MIRROR(0xff00) AM_WRITE(port04_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_MIRROR(0xff00) AM_WRITE(port06_w)
|
||||
AM_RANGE(0x0007, 0x0007) AM_MIRROR(0xff00) AM_READ(port07_r)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_READWRITE(port08_r, port08_w)
|
||||
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xfd00) AM_READ(speed_low_r)
|
||||
AM_RANGE(0x0209, 0x0209) AM_MIRROR(0xfd00) AM_READ(speed_high_r)
|
||||
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xff00) AM_WRITENOP
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff00) AM_WRITE(port0b_w)
|
||||
AM_RANGE(0x000c, 0x000c) AM_MIRROR(0xff00) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x000d, 0x000d) AM_MIRROR(0xff00) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
// AM_RANGE(0x0010, 0x0013) AM_MIRROR(0xff00) Optional SN76489AN audio chip
|
||||
AM_RANGE(0x0018, 0x001b) AM_MIRROR(0xff00) AM_READ(mbee256_18_r)
|
||||
AM_RANGE(0x001c, 0x001f) AM_MIRROR(0xff00) AM_READWRITE(mbeeppc_1c_r, mbee256_1c_w)
|
||||
AM_RANGE(0x0018, 0x001b) AM_MIRROR(0xff00) AM_READ(port18_r)
|
||||
AM_RANGE(0x001c, 0x001f) AM_MIRROR(0xff00) AM_READWRITE(port1c_r, port1c_w)
|
||||
AM_RANGE(0x0044, 0x0047) AM_MIRROR(0xff00) AM_DEVREADWRITE("fdc", wd2793_t, read, write)
|
||||
AM_RANGE(0x0048, 0x004f) AM_MIRROR(0xff00) AM_READWRITE(fdc_status_r, fdc_motor_w)
|
||||
AM_RANGE(0x0050, 0x0057) AM_MIRROR(0xff00) AM_WRITE(mbee256_50_w)
|
||||
@ -329,23 +333,6 @@ static ADDRESS_MAP_START(mbee256_io, AS_IO, 8, mbee_state)
|
||||
// AM_RANGE(0x0068, 0x006f) AM_MIRROR(0xff00) Reserved for 8530 SCC (unused)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(mbeett_io, AS_IO, 8, mbee_state)
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x0003) AM_MIRROR(0xff00) AM_DEVREADWRITE("z80pio", z80pio_device, read_alt, write_alt)
|
||||
AM_RANGE(0x0004, 0x0004) AM_MIRROR(0xff00) AM_WRITE(mbee_04_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_MIRROR(0xff00) AM_WRITE(mbee_06_w)
|
||||
AM_RANGE(0x0007, 0x0007) AM_MIRROR(0xff00) AM_READ(mbee_07_r)
|
||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_READWRITE(mbeeic_08_r, mbeeic_08_w)
|
||||
AM_RANGE(0x000b, 0x000b) AM_MIRROR(0xff00) AM_READWRITE(mbee_0b_r, mbee_0b_w)
|
||||
AM_RANGE(0x000c, 0x000c) AM_MIRROR(0xff00) AM_READWRITE(m6545_status_r, m6545_index_w)
|
||||
AM_RANGE(0x000d, 0x000d) AM_MIRROR(0xff00) AM_READWRITE(m6545_data_r, m6545_data_w)
|
||||
AM_RANGE(0x0018, 0x001b) AM_MIRROR(0xff00) AM_READ(mbee256_18_r)
|
||||
AM_RANGE(0x001c, 0x001f) AM_MIRROR(0xff00) AM_READWRITE(mbeeppc_1c_r,mbee256_1c_w)
|
||||
AM_RANGE(0x000a, 0x000a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_low_r, mbeeic_0a_w)
|
||||
AM_RANGE(0x010a, 0x010a) AM_MIRROR(0xfe10) AM_READWRITE(mbeepc_telcom_high_r, mbeeic_0a_w)
|
||||
// AM_RANGE(0x0068, 0x006f) AM_MIRROR(0xff00) 8530 SCC
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( mbee )
|
||||
PORT_START("X.0") /* IN0 KEY ROW 0 [000] */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("@") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR('@') PORT_CHAR('`')
|
||||
@ -419,7 +406,7 @@ static INPUT_PORTS_START( mbee )
|
||||
|
||||
PORT_START("X.7") /* IN7 KEY ROW 7 [380] */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("(Up)") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL)
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_SHIFT_2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("(Down)") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("(Left)") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
|
||||
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
@ -444,8 +431,8 @@ static INPUT_PORTS_START( mbee )
|
||||
PORT_CONFNAME( 0xc0, 0x80, "PIO B7")
|
||||
PORT_CONFSETTING( 0x00, "VS") // sync pulse to enable telcom clock
|
||||
PORT_CONFSETTING( 0x40, "RTC") // optional board usually not fitted
|
||||
PORT_CONFSETTING( 0x80, "Not used") // default resistor to vcc
|
||||
PORT_CONFSETTING( 0xc0, "Centronics") // busy line
|
||||
PORT_CONFSETTING( 0x80, "Tied high") // default resistor to vcc
|
||||
PORT_CONFSETTING( 0xc0, "Reserved for net")
|
||||
INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( mbee256 )
|
||||
@ -576,11 +563,11 @@ static INPUT_PORTS_START( mbee256 )
|
||||
PORT_CONFSETTING( 0x00, DEF_STR(No))
|
||||
PORT_CONFSETTING( 0x01, DEF_STR(Yes))
|
||||
// Wire links on motherboard
|
||||
PORT_CONFNAME( 0xc0, 0x80, "PIO B7") // default - do nothing
|
||||
PORT_CONFNAME( 0xc0, 0x40, "PIO B7")
|
||||
PORT_CONFSETTING( 0x00, "VS") // sync pulse to enable telcom clock
|
||||
PORT_CONFSETTING( 0x40, "RTC") // optional board usually not fitted
|
||||
PORT_CONFSETTING( 0x80, "Not used") // default resistor to vcc
|
||||
PORT_CONFSETTING( 0xc0, "Centronics") // busy line
|
||||
PORT_CONFSETTING( 0x40, "RTC") // RTC IRQ must be used on teleterm
|
||||
PORT_CONFSETTING( 0x80, "Tied high") // default resistor to vcc
|
||||
PORT_CONFSETTING( 0xc0, "Reserved for net")
|
||||
INPUT_PORTS_END
|
||||
|
||||
static const z80_daisy_config mbee_daisy_chain[] =
|
||||
@ -744,13 +731,7 @@ static MACHINE_CONFIG_DERIVED( mbeepc, mbeeic )
|
||||
MCFG_CPU_IO_MAP(mbeepc_io)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( mbeepc85, mbeeic )
|
||||
MCFG_CPU_MODIFY( "maincpu" )
|
||||
MCFG_CPU_PROGRAM_MAP(mbeepc85_mem)
|
||||
MCFG_CPU_IO_MAP(mbeepc85_io)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( mbeepc85b, mbeepc85 )
|
||||
static MACHINE_CONFIG_DERIVED( mbeepc85b, mbeepc )
|
||||
MCFG_PALETTE_MODIFY("palette")
|
||||
MCFG_PALETTE_INIT_OWNER(mbee_state, mbeepc85b)
|
||||
MACHINE_CONFIG_END
|
||||
@ -764,6 +745,8 @@ static MACHINE_CONFIG_DERIVED( mbeeppc, mbeeic )
|
||||
MCFG_PALETTE_MODIFY("palette")
|
||||
MCFG_PALETTE_ENTRIES(16)
|
||||
MCFG_PALETTE_INIT_OWNER(mbee_state, premium)
|
||||
MCFG_MC146818_ADD( "rtc", XTAL_32_768kHz )
|
||||
MCFG_MC146818_IRQ_HANDLER(WRITELINE(mbee_state, rtc_irq_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( mbee56, mbeeic )
|
||||
@ -784,6 +767,7 @@ static MACHINE_CONFIG_DERIVED( mbee128, mbee56 )
|
||||
MCFG_CPU_IO_MAP(mbee128_io)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(mbee_state, mbee128)
|
||||
MCFG_MC146818_ADD( "rtc", XTAL_32_768kHz )
|
||||
MCFG_MC146818_IRQ_HANDLER(WRITELINE(mbee_state, rtc_irq_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( mbee128p, mbeeppc )
|
||||
@ -791,7 +775,6 @@ static MACHINE_CONFIG_DERIVED( mbee128p, mbeeppc )
|
||||
MCFG_CPU_PROGRAM_MAP(mbee256_mem)
|
||||
MCFG_CPU_IO_MAP(mbee128_io)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(mbee_state, mbee128)
|
||||
MCFG_MC146818_ADD( "rtc", XTAL_32_768kHz )
|
||||
MCFG_WD2793x_ADD("fdc", XTAL_4MHz / 4)
|
||||
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(mbee_state, fdc_intrq_w))
|
||||
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(mbee_state, fdc_drq_w))
|
||||
@ -816,7 +799,9 @@ static MACHINE_CONFIG_DERIVED( mbeett, mbeeppc )
|
||||
MCFG_CPU_PROGRAM_MAP(mbeett_mem)
|
||||
MCFG_CPU_IO_MAP(mbeett_io)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(mbee_state, mbeett)
|
||||
MCFG_MC146818_ADD( "rtc", XTAL_32_768kHz )
|
||||
MCFG_DEVICE_REMOVE("quickload")
|
||||
MCFG_DEVICE_REMOVE("quickload2")
|
||||
MCFG_DEVICE_ADD("scc", SCC8530, 4000000) // clock unknown
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/* Unused roms:
|
||||
@ -1152,9 +1137,9 @@ ROM_END
|
||||
COMP( 1982, mbee, 0, 0, mbee, mbee, mbee_state, mbee, "Applied Technology", "Microbee 16 Standard" , 0 )
|
||||
COMP( 1982, mbeeic, mbee, 0, mbeeic, mbee, mbee_state, mbeeic, "Applied Technology", "Microbee 32 IC" , 0 )
|
||||
COMP( 1982, mbeepc, mbee, 0, mbeepc, mbee, mbee_state, mbeepc, "Applied Technology", "Microbee Personal Communicator" , 0 )
|
||||
COMP( 1985, mbeepc85, mbee, 0, mbeepc85, mbee, mbee_state, mbeepc85, "Applied Technology", "Microbee PC85" , 0 )
|
||||
COMP( 1985, mbeepc85, mbee, 0, mbeepc, mbee, mbee_state, mbeepc85, "Applied Technology", "Microbee PC85" , 0 )
|
||||
COMP( 1985, mbeepc85b,mbee, 0, mbeepc85b,mbee, mbee_state, mbeepc85, "Applied Technology", "Microbee PC85 (New version)" , 0 )
|
||||
COMP( 1985, mbeepc85s,mbee, 0, mbeepc85, mbee, mbee_state, mbeepc85, "Applied Technology", "Microbee PC85 (Swedish)" , 0 )
|
||||
COMP( 1985, mbeepc85s,mbee, 0, mbeepc, mbee, mbee_state, mbeepc85, "Applied Technology", "Microbee PC85 (Swedish)" , 0 )
|
||||
COMP( 1986, mbeeppc, mbee, 0, mbeeppc, mbee, mbee_state, mbeeppc, "Applied Technology", "Microbee Premium PC85" , 0 )
|
||||
COMP( 1986, mbeett, mbee, 0, mbeett, mbee256, mbee_state, mbeett, "Applied Technology", "Microbee Teleterm" , GAME_NOT_WORKING )
|
||||
COMP( 1986, mbee56, mbee, 0, mbee56, mbee, mbee_state, mbee56, "Applied Technology", "Microbee 56k" , GAME_NOT_WORKING )
|
||||
|
||||
@ -10,6 +10,7 @@
|
||||
#include "emu.h"
|
||||
#include "imagedev/snapquik.h"
|
||||
#include "machine/z80pio.h"
|
||||
#include "machine/8530scc.h"
|
||||
#include "imagedev/cassette.h"
|
||||
#include "machine/buffer.h"
|
||||
#include "bus/centronics/ctronics.h"
|
||||
@ -27,9 +28,7 @@ class mbee_state : public driver_device
|
||||
public:
|
||||
enum
|
||||
{
|
||||
TIMER_MBEE_NEWKB,
|
||||
TIMER_MBEE_RTC_IRQ,
|
||||
TIMER_MBEE_BOOT
|
||||
TIMER_MBEE_NEWKB
|
||||
};
|
||||
|
||||
mbee_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
@ -47,7 +46,6 @@ public:
|
||||
, m_floppy0(*this, "fdc:0")
|
||||
, m_floppy1(*this, "fdc:1")
|
||||
, m_rtc(*this, "rtc")
|
||||
, m_boot(*this, "boot")
|
||||
, m_pak(*this, "pak")
|
||||
, m_telcom(*this, "telcom")
|
||||
, m_basic(*this, "basic")
|
||||
@ -58,39 +56,30 @@ public:
|
||||
, m_screen(*this, "screen")
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(mbee_04_w);
|
||||
DECLARE_WRITE8_MEMBER(mbee_06_w);
|
||||
DECLARE_READ8_MEMBER(mbee_07_r);
|
||||
DECLARE_READ8_MEMBER(mbeeic_0a_r);
|
||||
DECLARE_WRITE8_MEMBER(mbeeic_0a_w);
|
||||
DECLARE_READ8_MEMBER(mbeepc_telcom_low_r);
|
||||
DECLARE_READ8_MEMBER(mbeepc_telcom_high_r);
|
||||
DECLARE_READ8_MEMBER(mbee256_speed_low_r);
|
||||
DECLARE_READ8_MEMBER(mbee256_speed_high_r);
|
||||
DECLARE_READ8_MEMBER(mbee256_18_r);
|
||||
DECLARE_WRITE8_MEMBER(port04_w);
|
||||
DECLARE_WRITE8_MEMBER(port06_w);
|
||||
DECLARE_READ8_MEMBER(port07_r);
|
||||
DECLARE_READ8_MEMBER(port08_r);
|
||||
DECLARE_WRITE8_MEMBER(port08_w);
|
||||
DECLARE_WRITE8_MEMBER(port0a_w);
|
||||
DECLARE_WRITE8_MEMBER(port0b_w);
|
||||
DECLARE_READ8_MEMBER(port18_r);
|
||||
DECLARE_READ8_MEMBER(port1c_r);
|
||||
DECLARE_WRITE8_MEMBER(port1c_w);
|
||||
DECLARE_WRITE8_MEMBER(mbee128_50_w);
|
||||
DECLARE_WRITE8_MEMBER(mbee256_50_w);
|
||||
DECLARE_READ8_MEMBER(telcom_low_r);
|
||||
DECLARE_READ8_MEMBER(telcom_high_r);
|
||||
DECLARE_READ8_MEMBER(speed_low_r);
|
||||
DECLARE_READ8_MEMBER(speed_high_r);
|
||||
DECLARE_READ8_MEMBER(m6545_status_r);
|
||||
DECLARE_WRITE8_MEMBER(m6545_index_w);
|
||||
DECLARE_READ8_MEMBER(m6545_data_r);
|
||||
DECLARE_WRITE8_MEMBER(m6545_data_w);
|
||||
DECLARE_READ8_MEMBER(mbee_low_r);
|
||||
DECLARE_READ8_MEMBER(mbee_high_r);
|
||||
DECLARE_READ8_MEMBER(mbeeic_high_r);
|
||||
DECLARE_WRITE8_MEMBER(mbeeic_high_w);
|
||||
DECLARE_WRITE8_MEMBER(mbee_low_w);
|
||||
DECLARE_WRITE8_MEMBER(mbee_high_w);
|
||||
DECLARE_READ8_MEMBER(mbeeic_08_r);
|
||||
DECLARE_WRITE8_MEMBER(mbeeic_08_w);
|
||||
DECLARE_READ8_MEMBER(mbee_0b_r);
|
||||
DECLARE_WRITE8_MEMBER(mbee_0b_w);
|
||||
DECLARE_READ8_MEMBER(mbeeppc_1c_r);
|
||||
DECLARE_WRITE8_MEMBER(mbeeppc_1c_w);
|
||||
DECLARE_WRITE8_MEMBER(mbee256_1c_w);
|
||||
DECLARE_READ8_MEMBER(mbeeppc_low_r);
|
||||
DECLARE_READ8_MEMBER(mbeeppc_high_r);
|
||||
DECLARE_WRITE8_MEMBER(mbeeppc_high_w);
|
||||
DECLARE_WRITE8_MEMBER(mbeeppc_low_w);
|
||||
DECLARE_READ8_MEMBER(video_low_r);
|
||||
DECLARE_READ8_MEMBER(video_high_r);
|
||||
DECLARE_WRITE8_MEMBER(video_low_w);
|
||||
DECLARE_WRITE8_MEMBER(video_high_w);
|
||||
DECLARE_WRITE8_MEMBER(pio_port_b_w);
|
||||
DECLARE_READ8_MEMBER(pio_port_b_r);
|
||||
DECLARE_WRITE_LINE_MEMBER(pio_ardy);
|
||||
@ -119,28 +108,22 @@ public:
|
||||
DECLARE_MACHINE_RESET(mbeett);
|
||||
UINT32 screen_update_mbee(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
TIMER_CALLBACK_MEMBER(timer_newkb);
|
||||
TIMER_CALLBACK_MEMBER(timer_rtc_irq);
|
||||
TIMER_CALLBACK_MEMBER(timer_boot);
|
||||
DECLARE_QUICKLOAD_LOAD_MEMBER(mbee);
|
||||
DECLARE_QUICKLOAD_LOAD_MEMBER(mbee_z80bin);
|
||||
WRITE_LINE_MEMBER(rtc_irq_w);
|
||||
WRITE_LINE_MEMBER(fdc_intrq_w);
|
||||
WRITE_LINE_MEMBER(fdc_drq_w);
|
||||
UINT8 *m_p_videoram;
|
||||
UINT8 *m_p_gfxram;
|
||||
UINT8 *m_p_colorram;
|
||||
UINT8 *m_p_attribram;
|
||||
UINT8 m_framecnt;
|
||||
UINT8 m_08;
|
||||
UINT8 m_1c;
|
||||
void mbee_video_kbd_scan(int param);
|
||||
UINT8 m_sy6545_cursor[16];
|
||||
|
||||
MC6845_UPDATE_ROW(mono_update_row);
|
||||
MC6845_UPDATE_ROW(colour_update_row);
|
||||
MC6845_ON_UPDATE_ADDR_CHANGED(crtc_update_addr);
|
||||
|
||||
required_device<palette_device> m_palette;
|
||||
private:
|
||||
UINT8 *m_p_videoram;
|
||||
UINT8 *m_p_gfxram;
|
||||
UINT8 *m_p_colorram;
|
||||
UINT8 *m_p_attribram;
|
||||
bool m_is_premium;
|
||||
bool m_has_oldkb;
|
||||
size_t m_size;
|
||||
@ -148,11 +131,15 @@ private:
|
||||
bool m_b7_vs;
|
||||
bool m_b2;
|
||||
bool m_is_mbeett;
|
||||
UINT8 m_framecnt;
|
||||
UINT8 m_08;
|
||||
UINT8 m_0a;
|
||||
UINT8 m_0b;
|
||||
UINT8 m_1c;
|
||||
UINT8 m_sy6545_cursor[16];
|
||||
UINT8 m_mbee256_was_pressed[15];
|
||||
UINT8 m_mbee256_q[20];
|
||||
UINT8 m_mbee256_q_pos;
|
||||
UINT8 m_0a;
|
||||
UINT8 m_0b;
|
||||
UINT8 m_sy6545_status;
|
||||
UINT8 m_sy6545_reg[32];
|
||||
UINT8 m_sy6545_ind;
|
||||
@ -160,8 +147,9 @@ private:
|
||||
UINT8 m_bank_array[33];
|
||||
void setup_banks(UINT8 data, bool first_time, UINT8 b_mask);
|
||||
void sy6545_cursor_configure();
|
||||
void keyboard_matrix_r(int offs);
|
||||
void machine_reset_common_disk();
|
||||
void oldkb_scan(UINT16 param);
|
||||
void oldkb_matrix_r(UINT16 offs);
|
||||
void machine_reset_common();
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<z80pio_device> m_pio;
|
||||
@ -175,7 +163,6 @@ private:
|
||||
optional_device<floppy_connector> m_floppy0;
|
||||
optional_device<floppy_connector> m_floppy1;
|
||||
optional_device<mc146818_device> m_rtc;
|
||||
optional_memory_bank m_boot;
|
||||
optional_memory_bank m_pak;
|
||||
optional_memory_bank m_telcom;
|
||||
optional_memory_bank m_basic;
|
||||
|
||||
@ -20,12 +20,6 @@ void mbee_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
|
||||
case TIMER_MBEE_NEWKB:
|
||||
timer_newkb(ptr, param);
|
||||
break;
|
||||
case TIMER_MBEE_RTC_IRQ:
|
||||
timer_rtc_irq(ptr, param);
|
||||
break;
|
||||
case TIMER_MBEE_BOOT:
|
||||
timer_boot(ptr, param);
|
||||
break;
|
||||
default:
|
||||
assert_always(FALSE, "Unknown id in mbee_state::device_timer");
|
||||
}
|
||||
@ -46,17 +40,16 @@ WRITE_LINE_MEMBER( mbee_state::pio_ardy )
|
||||
WRITE8_MEMBER( mbee_state::pio_port_b_w )
|
||||
{
|
||||
/* PIO port B - d5..d2 not emulated
|
||||
d7 network interrupt (microbee network for classrooms)
|
||||
d7 interrupt from network or rtc or vsync or not used (see config switch)
|
||||
d6 speaker
|
||||
d5 rs232 output (1=mark)
|
||||
d4 rs232 input (0=mark)
|
||||
d3 rs232 CTS (0=clear to send)
|
||||
d2 rs232 clock or DTR
|
||||
d1 cass out and (on 256tc) keyboard irq
|
||||
d1 cass out and (on new keyboard) keyboard irq
|
||||
d0 cass in */
|
||||
|
||||
m_cassette->output((data & 0x02) ? -1.0 : +1.0);
|
||||
|
||||
m_cassette->output(BIT(data, 1) ? -1.0 : +1.0);
|
||||
m_speaker->level_w(BIT(data, 6));
|
||||
};
|
||||
|
||||
@ -64,36 +57,24 @@ READ8_MEMBER( mbee_state::pio_port_b_r )
|
||||
{
|
||||
UINT8 data = 0;
|
||||
|
||||
if (m_cassette->input() > 0.03) data |= 1;
|
||||
if (m_cassette->input() > 0.03)
|
||||
data |= 1;
|
||||
|
||||
data |= 8; // CTS held high via resistor. If low, the disk-based models think a mouse is plugged in.
|
||||
|
||||
if (m_is_mbeett)
|
||||
switch (m_io_config->read() & 0xc0)
|
||||
{
|
||||
if (m_b2)
|
||||
data |= 0x82;
|
||||
else
|
||||
case 0x00:
|
||||
data |= (UINT8)m_b7_vs << 7;
|
||||
break;
|
||||
case 0x40:
|
||||
data |= (UINT8)m_b7_rtc << 7;
|
||||
break;
|
||||
case 0x80:
|
||||
data |= 0x80;
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (m_io_config->read() & 0xc0)
|
||||
{
|
||||
case 0x00:
|
||||
data |= (UINT8)m_b7_vs << 7;
|
||||
break;
|
||||
case 0x40:
|
||||
data |= (UINT8)m_b7_rtc << 7;
|
||||
break;
|
||||
case 0x80:
|
||||
data |= 0x80;
|
||||
break;
|
||||
case 0xc0:
|
||||
data |= 0x80; // centronics busy line - FIXME
|
||||
break;
|
||||
}
|
||||
data |= (UINT8)m_b2 << 1; // key pressed on new keyboard
|
||||
}
|
||||
data |= (UINT8)m_b2 << 1; // key pressed on new keyboard
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -194,15 +175,15 @@ TIMER_CALLBACK_MEMBER( mbee_state::timer_newkb )
|
||||
|
||||
// if anything queued, cause an interrupt
|
||||
if (m_mbee256_q_pos)
|
||||
{
|
||||
m_b2 = 1; // set irq
|
||||
//breaks keyboard m_pio->port_b_write(pio_port_b_r(generic_space(),0,0xff));
|
||||
}
|
||||
|
||||
timer_set(attotime::from_hz(25), TIMER_MBEE_NEWKB);
|
||||
if (m_b2)
|
||||
m_pio->port_b_write(pio_port_b_r(generic_space(),0,0xff));
|
||||
|
||||
timer_set(attotime::from_hz(10), TIMER_MBEE_NEWKB);
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbee256_18_r )
|
||||
READ8_MEMBER( mbee_state::port18_r )
|
||||
{
|
||||
UINT8 i, data = m_mbee256_q[0]; // get oldest key
|
||||
|
||||
@ -223,13 +204,13 @@ READ8_MEMBER( mbee_state::mbee256_18_r )
|
||||
|
||||
************************************************************/
|
||||
|
||||
READ8_MEMBER( mbee_state::mbee256_speed_low_r )
|
||||
READ8_MEMBER( mbee_state::speed_low_r )
|
||||
{
|
||||
m_maincpu->set_unscaled_clock(3375000);
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbee256_speed_high_r )
|
||||
READ8_MEMBER( mbee_state::speed_high_r )
|
||||
{
|
||||
m_maincpu->set_unscaled_clock(6750000);
|
||||
return 0xff;
|
||||
@ -243,34 +224,28 @@ READ8_MEMBER( mbee_state::mbee256_speed_high_r )
|
||||
|
||||
************************************************************/
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbee_04_w ) // address
|
||||
WRITE8_MEMBER( mbee_state::port04_w ) // address
|
||||
{
|
||||
m_rtc->write(space, 0, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbee_06_w ) // write
|
||||
WRITE8_MEMBER( mbee_state::port06_w ) // write
|
||||
{
|
||||
m_rtc->write(space, 1, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbee_07_r ) // read
|
||||
READ8_MEMBER( mbee_state::port07_r ) // read
|
||||
{
|
||||
return m_rtc->read(space, 1);
|
||||
}
|
||||
|
||||
// This doesn't seem to do anything; the time works without it.
|
||||
TIMER_CALLBACK_MEMBER( mbee_state::timer_rtc_irq )
|
||||
// See it work: Run mbeett, choose RTC in the config switches, run the F3 test, press Esc.
|
||||
WRITE_LINE_MEMBER( mbee_state::rtc_irq_w )
|
||||
{
|
||||
if (!m_rtc)
|
||||
return;
|
||||
|
||||
UINT8 data = m_rtc->read(m_maincpu->space(AS_IO), 12);
|
||||
m_b7_rtc = (data) ? 1 : 0;
|
||||
m_b7_rtc = (state) ? 0 : 1; // inverted by IC15 (pins 8,9,10)
|
||||
|
||||
if ((m_io_config->read() & 0xc0) == 0x40) // RTC selected in config menu
|
||||
m_pio->port_b_write(pio_port_b_r(generic_space(),0,0xff));
|
||||
|
||||
timer_set(attotime::from_hz(10), TIMER_MBEE_RTC_IRQ);
|
||||
}
|
||||
|
||||
|
||||
@ -327,16 +302,8 @@ void mbee_state::setup_banks(UINT8 data, bool first_time, UINT8 b_mask)
|
||||
if (!BIT(b_byte, 4))
|
||||
{
|
||||
// select video
|
||||
if (m_is_premium)
|
||||
{
|
||||
mem.install_read_handler (b_vid, b_vid + 0x7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this));
|
||||
mem.install_read_handler (b_vid + 0x800, b_vid + 0xfff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this));
|
||||
}
|
||||
else
|
||||
{
|
||||
mem.install_read_handler (b_vid, b_vid + 0x7ff, read8_delegate(FUNC(mbee_state::mbee_low_r), this));
|
||||
mem.install_read_handler (b_vid + 0x800, b_vid + 0xfff, read8_delegate(FUNC(mbee_state::mbeeic_high_r), this));
|
||||
}
|
||||
mem.install_read_handler (b_vid, b_vid + 0x7ff, read8_delegate(FUNC(mbee_state::video_low_r), this));
|
||||
mem.install_read_handler (b_vid + 0x800, b_vid + 0xfff, read8_delegate(FUNC(mbee_state::video_high_r), this));
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -367,16 +334,8 @@ void mbee_state::setup_banks(UINT8 data, bool first_time, UINT8 b_mask)
|
||||
if (!BIT(b_byte, 4))
|
||||
{
|
||||
// select video
|
||||
if (m_is_premium)
|
||||
{
|
||||
mem.install_write_handler (b_vid, b_vid + 0x7ff, write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this));
|
||||
mem.install_write_handler (b_vid + 0x800, b_vid + 0xfff, write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
|
||||
}
|
||||
else
|
||||
{
|
||||
mem.install_write_handler (b_vid, b_vid + 0x7ff, write8_delegate(FUNC(mbee_state::mbee_low_w), this));
|
||||
mem.install_write_handler (b_vid + 0x800, b_vid + 0xfff, write8_delegate(FUNC(mbee_state::mbeeic_high_w), this));
|
||||
}
|
||||
mem.install_write_handler (b_vid, b_vid + 0x7ff, write8_delegate(FUNC(mbee_state::video_low_w), this));
|
||||
mem.install_write_handler (b_vid + 0x800, b_vid + 0xfff, write8_delegate(FUNC(mbee_state::video_high_w), this));
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -433,28 +392,29 @@ WRITE8_MEMBER( mbee_state::mbee128_50_w )
|
||||
|
||||
************************************************************/
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeeic_0a_r )
|
||||
{
|
||||
return m_0a;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbeeic_0a_w )
|
||||
WRITE8_MEMBER( mbee_state::port0a_w )
|
||||
{
|
||||
m_0a = data;
|
||||
m_pak->set_entry(data & 15);
|
||||
|
||||
if (m_pak)
|
||||
m_pak->set_entry(data & 15);
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeepc_telcom_low_r )
|
||||
READ8_MEMBER( mbee_state::telcom_low_r )
|
||||
{
|
||||
/* Read of port 0A - set Telcom rom to first half */
|
||||
m_telcom->set_entry(0);
|
||||
if (m_telcom)
|
||||
m_telcom->set_entry(0);
|
||||
|
||||
return m_0a;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeepc_telcom_high_r )
|
||||
READ8_MEMBER( mbee_state::telcom_high_r )
|
||||
{
|
||||
/* Read of port 10A - set Telcom rom to 2nd half */
|
||||
m_telcom->set_entry(1);
|
||||
if (m_telcom)
|
||||
m_telcom->set_entry(1);
|
||||
|
||||
return m_0a;
|
||||
}
|
||||
|
||||
@ -471,60 +431,57 @@ READ8_MEMBER( mbee_state::mbeepc_telcom_high_r )
|
||||
*/
|
||||
|
||||
|
||||
/* after the first 4 bytes have been read from ROM, switch the ram back in */
|
||||
TIMER_CALLBACK_MEMBER( mbee_state::timer_boot )
|
||||
{
|
||||
m_boot->set_entry(0);
|
||||
}
|
||||
|
||||
void mbee_state::machine_reset_common_disk()
|
||||
void mbee_state::machine_reset_common()
|
||||
{
|
||||
m_fdc_rq = 0;
|
||||
m_08 = 0;
|
||||
m_0a = 0;
|
||||
m_0b = 0;
|
||||
m_1c = 0;
|
||||
|
||||
if (m_basic)
|
||||
m_basic->set_entry(0);
|
||||
|
||||
if (m_telcom)
|
||||
m_telcom->set_entry(0);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER( mbee_state, mbee )
|
||||
{
|
||||
m_boot->set_entry(1);
|
||||
timer_set(attotime::from_usec(4), TIMER_MBEE_BOOT);
|
||||
machine_reset_common();
|
||||
m_maincpu->set_pc(0x8000);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER( mbee_state, mbee56 )
|
||||
{
|
||||
machine_reset_common_disk();
|
||||
m_boot->set_entry(1);
|
||||
timer_set(attotime::from_usec(4), TIMER_MBEE_BOOT);
|
||||
machine_reset_common();
|
||||
m_maincpu->set_pc(0xE000);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER( mbee_state, mbee128 )
|
||||
{
|
||||
machine_reset_common_disk();
|
||||
machine_reset_common();
|
||||
setup_banks(0, 1, 3); // set banks to default
|
||||
m_maincpu->set_pc(0x8000);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER( mbee_state, mbee256 )
|
||||
{
|
||||
UINT8 i;
|
||||
for (i = 0; i < 15; i++) m_mbee256_was_pressed[i] = 0;
|
||||
m_mbee256_q_pos = 0;
|
||||
machine_reset_common_disk();
|
||||
machine_reset_common();
|
||||
setup_banks(0, 1, 7); // set banks to default
|
||||
m_maincpu->set_pc(0x8000);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER( mbee_state, mbeett )
|
||||
{
|
||||
UINT8 i;
|
||||
for (i = 0; i < 15; i++) m_mbee256_was_pressed[i] = 0;
|
||||
m_mbee256_q_pos = 0;
|
||||
m_boot->set_entry(1);
|
||||
timer_set(attotime::from_usec(4), TIMER_MBEE_BOOT);
|
||||
machine_reset_common();
|
||||
m_maincpu->set_pc(0x8000);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER( mbee_state, mbee )
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
m_boot->configure_entries(0, 2, &RAM[0x0000], 0x8000);
|
||||
m_size = 0x4000;
|
||||
m_has_oldkb = 1;
|
||||
m_is_mbeett = 0;
|
||||
@ -532,13 +489,10 @@ DRIVER_INIT_MEMBER( mbee_state, mbee )
|
||||
|
||||
DRIVER_INIT_MEMBER( mbee_state, mbeeic )
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
m_boot->configure_entries(0, 2, &RAM[0x0000], 0x8000);
|
||||
|
||||
RAM = memregion("pakrom")->base();
|
||||
UINT8 *RAM = memregion("pakrom")->base();
|
||||
m_pak->configure_entries(0, 16, &RAM[0x0000], 0x2000);
|
||||
|
||||
m_pak->set_entry(0);
|
||||
|
||||
m_size = 0x8000;
|
||||
m_has_oldkb = 1;
|
||||
m_is_mbeett = 0;
|
||||
@ -546,17 +500,13 @@ DRIVER_INIT_MEMBER( mbee_state, mbeeic )
|
||||
|
||||
DRIVER_INIT_MEMBER( mbee_state, mbeepc )
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
m_boot->configure_entries(0, 2, &RAM[0x0000], 0x8000);
|
||||
|
||||
RAM = memregion("telcomrom")->base();
|
||||
UINT8 *RAM = memregion("telcomrom")->base();
|
||||
m_telcom->configure_entries(0, 2, &RAM[0x0000], 0x1000);
|
||||
|
||||
RAM = memregion("pakrom")->base();
|
||||
m_pak->configure_entries(0, 16, &RAM[0x0000], 0x2000);
|
||||
|
||||
m_pak->set_entry(0);
|
||||
m_telcom->set_entry(0);
|
||||
|
||||
m_size = 0x8000;
|
||||
m_has_oldkb = 1;
|
||||
m_is_mbeett = 0;
|
||||
@ -564,17 +514,13 @@ DRIVER_INIT_MEMBER( mbee_state, mbeepc )
|
||||
|
||||
DRIVER_INIT_MEMBER( mbee_state, mbeepc85 )
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
m_boot->configure_entries(0, 2, &RAM[0x0000], 0x8000);
|
||||
|
||||
RAM = memregion("telcomrom")->base();
|
||||
UINT8 *RAM = memregion("telcomrom")->base();
|
||||
m_telcom->configure_entries(0, 2, &RAM[0x0000], 0x1000);
|
||||
|
||||
RAM = memregion("pakrom")->base();
|
||||
m_pak->configure_entries(0, 16, &RAM[0x0000], 0x2000);
|
||||
|
||||
m_pak->set_entry(5);
|
||||
m_telcom->set_entry(0);
|
||||
|
||||
m_size = 0x8000;
|
||||
m_has_oldkb = 1;
|
||||
m_is_mbeett = 0;
|
||||
@ -582,22 +528,16 @@ DRIVER_INIT_MEMBER( mbee_state, mbeepc85 )
|
||||
|
||||
DRIVER_INIT_MEMBER( mbee_state, mbeeppc )
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
m_boot->configure_entry(0, &RAM[0x0000]);
|
||||
|
||||
RAM = memregion("basicrom")->base();
|
||||
UINT8 *RAM = memregion("basicrom")->base();
|
||||
m_basic->configure_entries(0, 2, &RAM[0x0000], 0x2000);
|
||||
m_boot->configure_entry(1, &RAM[0x0000]);
|
||||
|
||||
RAM = memregion("telcomrom")->base();
|
||||
m_telcom->configure_entries(0, 2, &RAM[0x0000], 0x1000);
|
||||
|
||||
RAM = memregion("pakrom")->base();
|
||||
m_pak->configure_entries(0, 16, &RAM[0x0000], 0x2000);
|
||||
|
||||
m_pak->set_entry(5);
|
||||
m_telcom->set_entry(0);
|
||||
m_basic->set_entry(0);
|
||||
|
||||
m_size = 0x8000;
|
||||
m_has_oldkb = 1;
|
||||
m_is_mbeett = 0;
|
||||
@ -605,8 +545,6 @@ DRIVER_INIT_MEMBER( mbee_state, mbeeppc )
|
||||
|
||||
DRIVER_INIT_MEMBER( mbee_state, mbee56 )
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
m_boot->configure_entries(0, 2, &RAM[0x0000], 0xe000);
|
||||
m_size = 0xe000;
|
||||
m_has_oldkb = 1;
|
||||
m_is_mbeett = 0;
|
||||
@ -629,8 +567,6 @@ DRIVER_INIT_MEMBER( mbee_state, mbee128 )
|
||||
membank(banktag)->configure_entries(64, 1, &ROM[0x4000], 0x1000); // dummy rom
|
||||
}
|
||||
|
||||
timer_set(attotime::from_hz(1), TIMER_MBEE_RTC_IRQ); /* timer for rtc */
|
||||
|
||||
m_size = 0x8000;
|
||||
m_has_oldkb = 1;
|
||||
m_is_mbeett = 0;
|
||||
@ -653,8 +589,7 @@ DRIVER_INIT_MEMBER( mbee_state, mbee256 )
|
||||
membank(banktag)->configure_entries(64, 1, &ROM[0x4000], 0x1000); // dummy rom
|
||||
}
|
||||
|
||||
timer_set(attotime::from_hz(1), TIMER_MBEE_RTC_IRQ); /* timer for rtc */
|
||||
timer_set(attotime::from_hz(25), TIMER_MBEE_NEWKB); /* timer for kbd */
|
||||
timer_set(attotime::from_hz(1), TIMER_MBEE_NEWKB); /* kick-start timer for kbd */
|
||||
|
||||
m_size = 0x8000;
|
||||
m_has_oldkb = 0;
|
||||
@ -663,20 +598,14 @@ DRIVER_INIT_MEMBER( mbee_state, mbee256 )
|
||||
|
||||
DRIVER_INIT_MEMBER( mbee_state, mbeett )
|
||||
{
|
||||
UINT8 *RAM = memregion("maincpu")->base();
|
||||
m_boot->configure_entries(0, 2, &RAM[0x0000], 0x8000);
|
||||
|
||||
RAM = memregion("telcomrom")->base();
|
||||
UINT8 *RAM = memregion("telcomrom")->base();
|
||||
m_telcom->configure_entries(0, 2, &RAM[0x0000], 0x1000);
|
||||
|
||||
RAM = memregion("pakrom")->base();
|
||||
m_pak->configure_entries(0, 16, &RAM[0x0000], 0x2000);
|
||||
|
||||
m_pak->set_entry(5);
|
||||
m_telcom->set_entry(0);
|
||||
|
||||
timer_set(attotime::from_hz(1), TIMER_MBEE_RTC_IRQ); /* timer for rtc */
|
||||
timer_set(attotime::from_hz(25), TIMER_MBEE_NEWKB); /* timer for kbd */
|
||||
timer_set(attotime::from_hz(1), TIMER_MBEE_NEWKB); /* kick-start timer for kbd */
|
||||
|
||||
m_size = 0x8000;
|
||||
m_has_oldkb = 0;
|
||||
|
||||
@ -69,126 +69,81 @@ void mbee_state::sy6545_cursor_configure()
|
||||
************************************************************/
|
||||
|
||||
|
||||
READ8_MEMBER( mbee_state::mbee_low_r )
|
||||
READ8_MEMBER( mbee_state::video_low_r )
|
||||
{
|
||||
if (m_0b & 1)
|
||||
return m_p_gfxram[offset];
|
||||
else
|
||||
return m_p_videoram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbee_low_w )
|
||||
{
|
||||
m_p_videoram[offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbee_high_r )
|
||||
{
|
||||
return m_p_gfxram[0x800 | offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbee_high_w )
|
||||
{
|
||||
m_p_gfxram[0x800 | offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbee_0b_r )
|
||||
{
|
||||
return m_0b;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbee_0b_w )
|
||||
{
|
||||
m_0b = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeeic_08_r )
|
||||
{
|
||||
return m_08;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbeeic_08_w )
|
||||
{
|
||||
m_08 = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeeic_high_r )
|
||||
{
|
||||
if (m_08 & 0x40)
|
||||
return m_p_colorram[offset];
|
||||
else
|
||||
return m_p_gfxram[0x800 | offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbeeic_high_w )
|
||||
{
|
||||
if ((m_08 & 0x40) && (~m_0b & 1))
|
||||
m_p_colorram[offset] = data;
|
||||
else
|
||||
m_p_gfxram[0x0800 | offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeeppc_1c_r )
|
||||
{
|
||||
return m_1c;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbeeppc_1c_w )
|
||||
{
|
||||
/* d7 extended graphics (1=allow attributes and pcg banks)
|
||||
d5 bankswitch basic rom
|
||||
d4 select attribute ram
|
||||
d3..d0 select m_videoram bank */
|
||||
|
||||
m_1c = data;
|
||||
membank("basic")->set_entry(BIT(data, 5));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbee256_1c_w )
|
||||
{
|
||||
/* d7 extended graphics (1=allow attributes and pcg banks)
|
||||
d5 bankswitch basic rom
|
||||
d4 select attribute ram
|
||||
d3..d0 select m_videoram bank */
|
||||
|
||||
m_1c = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeeppc_low_r )
|
||||
{
|
||||
if ((m_1c & 0x1f) == 0x10)
|
||||
if (m_is_premium && ((m_1c & 0x9f) == 0x90))
|
||||
return m_p_attribram[offset];
|
||||
else
|
||||
if (m_0b & 1)
|
||||
if BIT(m_0b, 0)
|
||||
return m_p_gfxram[offset];
|
||||
else
|
||||
return m_p_videoram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::mbeeppc_low_w )
|
||||
WRITE8_MEMBER( mbee_state::video_low_w )
|
||||
{
|
||||
if (m_1c & 16)
|
||||
m_p_attribram[offset] = data;
|
||||
if BIT(m_1c, 4)
|
||||
{
|
||||
// non-premium attribute writes are discarded
|
||||
if (m_is_premium && BIT(m_1c, 7))
|
||||
m_p_attribram[offset] = data;
|
||||
}
|
||||
else
|
||||
m_p_videoram[offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::mbeeppc_high_r )
|
||||
READ8_MEMBER( mbee_state::video_high_r )
|
||||
{
|
||||
if (m_08 & 0x40)
|
||||
if BIT(m_08, 6)
|
||||
return m_p_colorram[offset];
|
||||
else
|
||||
return m_p_gfxram[(((m_1c & 15) + 1) << 11) | offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER ( mbee_state::mbeeppc_high_w )
|
||||
WRITE8_MEMBER( mbee_state::video_high_w )
|
||||
{
|
||||
if ((m_08 & 0x40) && (~m_0b & 1))
|
||||
if (BIT(m_08, 6) && (~m_0b & 1))
|
||||
m_p_colorram[offset] = data;
|
||||
else
|
||||
m_p_gfxram[(((m_1c & 15) + 1) << 11) | offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::port0b_w )
|
||||
{
|
||||
m_0b = data & 1;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::port08_r )
|
||||
{
|
||||
return m_08;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::port08_w )
|
||||
{
|
||||
m_08 = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( mbee_state::port1c_r )
|
||||
{
|
||||
return m_1c;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mbee_state::port1c_w )
|
||||
{
|
||||
/* d7 extended graphics (1=allow attributes and pcg banks)
|
||||
d5 bankswitch basic rom
|
||||
d4 select attribute ram
|
||||
d3..d0 select m_videoram bank */
|
||||
|
||||
if (m_is_premium && BIT(data, 7))
|
||||
m_1c = data;
|
||||
else
|
||||
m_1c = data & 0x30;
|
||||
|
||||
if (m_basic)
|
||||
m_basic->set_entry(BIT(data, 5));
|
||||
}
|
||||
|
||||
|
||||
/***********************************************************
|
||||
|
||||
@ -197,49 +152,49 @@ WRITE8_MEMBER ( mbee_state::mbeeppc_high_w )
|
||||
************************************************************/
|
||||
|
||||
|
||||
void mbee_state::keyboard_matrix_r(int offs)
|
||||
void mbee_state::oldkb_matrix_r(UINT16 offs)
|
||||
{
|
||||
UINT8 port = (offs >> 7) & 7;
|
||||
UINT8 bit = (offs >> 4) & 7;
|
||||
UINT8 data = m_io_oldkb[port]->read();
|
||||
bool keydown = ( data >> bit ) & 1;
|
||||
|
||||
// This adds premium-style cursor keys to the old keyboard
|
||||
// They are used by the pc85 & ppc menu, and the 128k shell.
|
||||
if (!keydown)
|
||||
if (m_has_oldkb)
|
||||
{
|
||||
UINT8 extra = m_io_extra->read();
|
||||
UINT8 port = (offs >> 7) & 7;
|
||||
UINT8 bit = (offs >> 4) & 7;
|
||||
UINT8 data = m_io_oldkb[port]->read();
|
||||
bool keydown = ( data >> bit ) & 1;
|
||||
|
||||
if (extra && port == 7 && bit == 1) keydown = 1; /* Control */
|
||||
// This adds premium-style cursor keys to the old keyboard
|
||||
// They are used by the pc85 & ppc menu, and the 128k shell.
|
||||
if (!keydown)
|
||||
{
|
||||
UINT8 extra = m_io_extra->read();
|
||||
|
||||
if (BIT(extra, 0) && ( port == 0 && bit == 5 )) keydown = 1; // cursor up = ^E
|
||||
else
|
||||
if (BIT(extra, 1) && ( port == 3 && bit == 0 )) keydown = 1; // cursor down = ^X
|
||||
else
|
||||
if (BIT(extra, 2) && ( port == 2 && bit == 3 )) keydown = 1; // cursor left = ^S
|
||||
else
|
||||
if (BIT(extra, 3) && ( port == 0 && bit == 4 )) keydown = 1; // cursor right = ^D
|
||||
#if 0
|
||||
// this key doesn't appear on any keyboard afaik. It is a Wordbee function.
|
||||
else
|
||||
if (BIT(extra, 4) && ( port == 2 && bit == 6 )) keydown = 1; // insert = ^V
|
||||
#endif
|
||||
}
|
||||
if (extra && port == 7 && bit == 1) keydown = 1; /* Control */
|
||||
|
||||
if( keydown )
|
||||
{
|
||||
m_sy6545_reg[17] = offs;
|
||||
m_sy6545_reg[16] = (offs >> 8) & 0x3f;
|
||||
m_sy6545_status |= 0x40; //lpen_strobe
|
||||
if (BIT(extra, 0) && ( port == 0 && bit == 5 )) keydown = 1; // cursor up = ^E
|
||||
else
|
||||
if (BIT(extra, 1) && ( port == 3 && bit == 0 )) keydown = 1; // cursor down = ^X
|
||||
else
|
||||
if (BIT(extra, 2) && ( port == 2 && bit == 3 )) keydown = 1; // cursor left = ^S
|
||||
else
|
||||
if (BIT(extra, 3) && ( port == 0 && bit == 4 )) keydown = 1; // cursor right = ^D
|
||||
else
|
||||
if (BIT(extra, 4) && ( port == 2 && bit == 6 )) keydown = 1; // insert = ^V
|
||||
}
|
||||
|
||||
if( keydown )
|
||||
{
|
||||
m_sy6545_reg[17] = offs;
|
||||
m_sy6545_reg[16] = (offs >> 8) & 0x3f;
|
||||
m_sy6545_status |= 0x40; //lpen_strobe
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void mbee_state::mbee_video_kbd_scan( int param )
|
||||
void mbee_state::oldkb_scan( UINT16 param )
|
||||
{
|
||||
if (m_0b) return; // can't remember why this is here
|
||||
if (m_0b) return; // IC5 (pins 11,12,13)
|
||||
if (param & 15) return; // only scan once per row instead of 16 times
|
||||
keyboard_matrix_r(param);
|
||||
oldkb_matrix_r(param);
|
||||
}
|
||||
|
||||
|
||||
@ -277,7 +232,7 @@ READ8_MEMBER( mbee_state::m6545_data_r )
|
||||
// This firstly pushes the contents of the transparent registers onto the MA lines,
|
||||
// then increments the address, then sets update strobe on.
|
||||
addr = (m_sy6545_reg[18] << 8) | m_sy6545_reg[19];
|
||||
keyboard_matrix_r(addr);
|
||||
oldkb_matrix_r(addr);
|
||||
m_sy6545_reg[19]++;
|
||||
if (!m_sy6545_reg[19]) m_sy6545_reg[18]++;
|
||||
m_sy6545_status |= 0x80; // update_strobe
|
||||
@ -296,7 +251,7 @@ WRITE8_MEMBER ( mbee_state::m6545_index_w )
|
||||
WRITE8_MEMBER ( mbee_state::m6545_data_w )
|
||||
{
|
||||
static const UINT8 sy6545_mask[32]={0xff,0xff,0xff,0x0f,0x7f,0x1f,0x7f,0x7f,3,0x1f,0x7f,0x1f,0x3f,0xff,0x3f,0xff,0,0,0x3f,0xff};
|
||||
int addr = 0;
|
||||
UINT16 addr = 0;
|
||||
|
||||
switch( m_sy6545_ind )
|
||||
{
|
||||
@ -309,7 +264,7 @@ WRITE8_MEMBER ( mbee_state::m6545_data_w )
|
||||
// This firstly pushes the contents of the transparent registers onto the MA lines,
|
||||
// then increments the address, then sets update strobe on.
|
||||
addr = (m_sy6545_reg[18] << 8) | m_sy6545_reg[19];
|
||||
keyboard_matrix_r(addr);
|
||||
oldkb_matrix_r(addr);
|
||||
m_sy6545_reg[19]++;
|
||||
if (!m_sy6545_reg[19]) m_sy6545_reg[18]++;
|
||||
m_sy6545_status |= 0x80; // update_strobe
|
||||
@ -382,7 +337,7 @@ MC6845_UPDATE_ROW( mbee_state::mono_update_row )
|
||||
mem = (ma + x) & 0x7ff;
|
||||
chr = m_p_videoram[mem];
|
||||
|
||||
mbee_video_kbd_scan(x+ma);
|
||||
oldkb_scan(x+ma);
|
||||
|
||||
/* process cursor */
|
||||
if (x == cursor_x)
|
||||
@ -419,27 +374,23 @@ MC6845_UPDATE_ROW( mbee_state::colour_update_row )
|
||||
chr = m_p_videoram[mem];
|
||||
col = m_p_colorram[mem]; // read a byte of colour
|
||||
|
||||
if (m_is_premium)
|
||||
if BIT(m_1c, 7) // premium graphics enabled?
|
||||
{
|
||||
if (m_1c & 0x80) // are extended features enabled?
|
||||
{
|
||||
attr = m_p_attribram[mem];
|
||||
attr = m_p_attribram[mem];
|
||||
|
||||
if (chr & 0x80)
|
||||
chr += ((attr & 15) << 7); // bump chr to its particular pcg definition
|
||||
if BIT(chr, 7)
|
||||
chr += ((attr & 15) << 7); // bump chr to its particular pcg definition
|
||||
|
||||
if (attr & 0x40)
|
||||
inv ^= 0xff; // inverse attribute
|
||||
if BIT(attr, 6)
|
||||
inv ^= 0xff; // inverse attribute
|
||||
|
||||
if ((attr & 0x80) && (m_framecnt & 0x10)) // flashing attribute
|
||||
chr = 0x20;
|
||||
}
|
||||
if (BIT(attr, 7) & BIT(m_framecnt, 4)) // flashing attribute
|
||||
chr = 0x20;
|
||||
}
|
||||
else
|
||||
col |= colourm;
|
||||
|
||||
if (m_has_oldkb)
|
||||
mbee_video_kbd_scan(x+ma);
|
||||
oldkb_scan(x+ma);
|
||||
|
||||
/* process cursor */
|
||||
if (x == cursor_x)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user