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(MESS) sym1.c: cleanups (nw)

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This commit is contained in:
Wilbert Pol 2013-01-26 10:27:26 +00:00
parent aa1df42df0
commit 16c04e2b27
2 changed files with 53 additions and 33 deletions
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33
src/mess/includes/sym1.h
View File

@ -15,6 +15,7 @@
#include "machine/6532riot.h"
#include "machine/6522via.h"
#include "machine/74145.h"
#include "machine/ram.h"
/* SYM-1 main (and only) oscillator Y1 */
#define SYM1_CLOCK XTAL_1MHz
@ -24,12 +25,21 @@ class sym1_state : public driver_device
{
public:
sym1_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag) ,
m_ram_1k(*this, "ram_1k"),
m_ram_2k(*this, "ram_2k"),
m_ram_3k(*this, "ram_3k"),
m_monitor(*this, "monitor"),
m_riot_ram(*this, "riot_ram"){ }
: driver_device(mconfig, type, tag)
, m_ram_1k(*this, "ram_1k")
, m_ram_2k(*this, "ram_2k")
, m_ram_3k(*this, "ram_3k")
, m_monitor(*this, "monitor")
, m_riot_ram(*this, "riot_ram")
, m_maincpu(*this, "maincpu")
, m_ram(*this, RAM_TAG)
, m_ttl74145(*this, "ttl74145")
, m_row0(*this, "ROW-0")
, m_row1(*this, "ROW-1")
, m_row2(*this, "ROW-2")
, m_row3(*this, "ROW-3")
, m_wp(*this, "WP")
{ }
required_shared_ptr<UINT8> m_ram_1k;
required_shared_ptr<UINT8> m_ram_2k;
@ -55,6 +65,17 @@ public:
DECLARE_READ8_MEMBER(sym1_via0_b_r);
DECLARE_WRITE8_MEMBER(sym1_via0_b_w);
DECLARE_WRITE8_MEMBER(sym1_via2_a_w);
DECLARE_WRITE_LINE_MEMBER(sym1_irq);
protected:
required_device<cpu_device> m_maincpu;
required_device<ram_device> m_ram;
required_device<ttl74145_device> m_ttl74145;
required_ioport m_row0;
required_ioport m_row1;
required_ioport m_row2;
required_ioport m_row3;
required_ioport m_wp;
};
/*----------- defined in machine/sym1.c -----------*/

53
src/mess/machine/sym1.c
View File

@ -78,13 +78,13 @@ READ8_MEMBER(sym1_state::sym1_riot_a_r)
int data = 0x7f;
/* scan keypad rows */
if (!(m_riot_port_a & 0x80)) data &= machine().root_device().ioport("ROW-0")->read();
if (!(m_riot_port_b & 0x01)) data &= machine().root_device().ioport("ROW-1")->read();
if (!(m_riot_port_b & 0x02)) data &= machine().root_device().ioport("ROW-2")->read();
if (!(m_riot_port_b & 0x04)) data &= machine().root_device().ioport("ROW-3")->read();
if (!(m_riot_port_a & 0x80)) data &= m_row0->read();
if (!(m_riot_port_b & 0x01)) data &= m_row1->read();
if (!(m_riot_port_b & 0x02)) data &= m_row2->read();
if (!(m_riot_port_b & 0x04)) data &= m_row3->read();
/* determine column */
if ( ((m_riot_port_a ^ 0xff) & (ioport("ROW-0")->read() ^ 0xff)) & 0x7f )
if ( ((m_riot_port_a ^ 0xff) & (m_row0->read() ^ 0xff)) & 0x7f )
data &= ~0x80;
return data;
@ -96,13 +96,13 @@ READ8_MEMBER(sym1_state::sym1_riot_b_r)
int data = 0xff;
/* determine column */
if ( ((m_riot_port_a ^ 0xff) & (machine().root_device().ioport("ROW-1")->read() ^ 0xff)) & 0x7f )
if ( ((m_riot_port_a ^ 0xff) & (m_row1->read() ^ 0xff)) & 0x7f )
data &= ~0x01;
if ( ((m_riot_port_a ^ 0xff) & (machine().root_device().ioport("ROW-2")->read() ^ 0xff)) & 0x3f )
if ( ((m_riot_port_a ^ 0xff) & (m_row2->read() ^ 0xff)) & 0x3f )
data &= ~0x02;
if ( ((m_riot_port_a ^ 0xff) & (ioport("ROW-3")->read() ^ 0xff)) & 0x1f )
if ( ((m_riot_port_a ^ 0xff) & (m_row3->read() ^ 0xff)) & 0x1f )
data &= ~0x04;
data &= ~0x80; // else hangs 8b02
@ -113,7 +113,7 @@ READ8_MEMBER(sym1_state::sym1_riot_b_r)
WRITE8_MEMBER(sym1_state::sym1_riot_a_w)
{
logerror("%x: riot_a_w 0x%02x\n", machine().device("maincpu") ->safe_pc( ), data);
logerror("%x: riot_a_w 0x%02x\n", m_maincpu->pc(), data);
/* save for later use */
m_riot_port_a = data;
@ -122,13 +122,13 @@ WRITE8_MEMBER(sym1_state::sym1_riot_a_w)
WRITE8_MEMBER(sym1_state::sym1_riot_b_w)
{
logerror("%x: riot_b_w 0x%02x\n", machine().device("maincpu") ->safe_pc( ), data);
logerror("%x: riot_b_w 0x%02x\n", m_maincpu->pc(), data);
/* save for later use */
m_riot_port_b = data;
/* first 4 pins are connected to the 74145 */
machine().device<ttl74145_device>("ttl74145")->write(data & 0x0f);
m_ttl74145->write(data & 0x0f);
}
@ -161,9 +161,9 @@ const ttl74145_interface sym1_ttl74145_intf =
******************************************************************************/
static void sym1_irq(device_t *device, int level)
WRITE_LINE_MEMBER(sym1_state::sym1_irq)
{
device->machine().device("maincpu")->execute().set_input_line(M6502_IRQ_LINE, level);
m_maincpu->set_input_line(M6502_IRQ_LINE, state);
}
@ -186,26 +186,26 @@ WRITE8_MEMBER(sym1_state::sym1_via0_b_w)
*/
WRITE8_MEMBER(sym1_state::sym1_via2_a_w)
{
address_space &cpu0space = machine().device( "maincpu")->memory().space( AS_PROGRAM );
address_space &cpu0space = m_maincpu->space( AS_PROGRAM );
logerror("SYM1 VIA2 W 0x%02x\n", data);
if ((machine().root_device().ioport("WP")->read() & 0x01) && !(data & 0x01)) {
if ((m_wp->read() & 0x01) && !(data & 0x01)) {
cpu0space.nop_write(0xa600, 0xa67f);
} else {
cpu0space.install_write_bank(0xa600, 0xa67f, "bank5");
}
if ((machine().root_device().ioport("WP")->read() & 0x02) && !(data & 0x02)) {
if ((m_wp->read() & 0x02) && !(data & 0x02)) {
cpu0space.nop_write(0x0400, 0x07ff);
} else {
cpu0space.install_write_bank(0x0400, 0x07ff, "bank2");
}
if ((machine().root_device().ioport("WP")->read() & 0x04) && !(data & 0x04)) {
if ((m_wp->read() & 0x04) && !(data & 0x04)) {
cpu0space.nop_write(0x0800, 0x0bff);
} else {
cpu0space.install_write_bank(0x0800, 0x0bff, "bank3");
}
if ((machine().root_device().ioport("WP")->read() & 0x08) && !(data & 0x08)) {
if ((m_wp->read() & 0x08) && !(data & 0x08)) {
cpu0space.nop_write(0x0c00, 0x0fff);
} else {
cpu0space.install_write_bank(0x0c00, 0x0fff, "bank4");
@ -227,7 +227,7 @@ const via6522_interface sym1_via0 =
DEVCB_NULL, /* VIA Port CB1 Output */
DEVCB_NULL, /* VIA Port CA2 Output */
DEVCB_NULL, /* VIA Port CB2 Output */
DEVCB_LINE(sym1_irq) /* VIA IRQ Callback */
DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_irq) /* VIA IRQ Callback */
};
@ -245,7 +245,7 @@ const via6522_interface sym1_via1 =
DEVCB_NULL, /* VIA Port CB1 Output */
DEVCB_NULL, /* VIA Port CA2 Output */
DEVCB_NULL, /* VIA Port CB2 Output */
DEVCB_LINE(sym1_irq) /* VIA IRQ Callback */
DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_irq) /* VIA IRQ Callback */
};
@ -263,7 +263,7 @@ const via6522_interface sym1_via2 =
DEVCB_NULL, /* VIA Port CB1 Output */
DEVCB_NULL, /* VIA Port CA2 Output */
DEVCB_NULL, /* VIA Port CB2 Output */
DEVCB_LINE(sym1_irq) /* VIA IRQ Callback */
DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_irq) /* VIA IRQ Callback */
};
@ -276,10 +276,9 @@ const via6522_interface sym1_via2 =
DRIVER_INIT_MEMBER(sym1_state,sym1)
{
/* wipe expansion memory banks that are not installed */
if (machine().device<ram_device>(RAM_TAG)->size() < 4*1024)
if (m_ram->size() < 4*1024)
{
machine().device( "maincpu")->memory().space( AS_PROGRAM ).nop_readwrite(
machine().device<ram_device>(RAM_TAG)->size(), 0x0fff);
m_maincpu->space(AS_PROGRAM).nop_readwrite(m_ram->size(), 0x0fff);
}
/* allocate a timer to refresh the led display */
@ -291,8 +290,8 @@ void sym1_state::machine_reset()
{
/* make 0xf800 to 0xffff point to the last half of the monitor ROM
so that the CPU can find its reset vectors */
machine().device( "maincpu")->memory().space( AS_PROGRAM ).install_read_bank(0xf800, 0xffff, "bank1");
machine().device( "maincpu")->memory().space( AS_PROGRAM ).nop_write(0xf800, 0xffff);
m_maincpu->space( AS_PROGRAM ).install_read_bank(0xf800, 0xffff, "bank1");
m_maincpu->space( AS_PROGRAM ).nop_write(0xf800, 0xffff);
membank("bank1")->set_base(m_monitor + 0x800);
machine().device("maincpu")->reset();
m_maincpu->reset();
}