Notes for PC-88VA

This commit is contained in:
Angelo Salese 2012-11-22 02:53:09 +00:00
parent f196962b27
commit 172028c046

View File

@ -15,6 +15,9 @@
- What is exactly supposed to be a "bus slot"?
- fdc "intelligent mode" has 0x7f as irq vector ... 0x7f is ld a,a and it IS NOT correctly
hooked up by the current z80 core
- PC-88VA has two bogus opcodes. One is at 0xf0b15, another at 0xf0b31. Making a patch
for the latter makes the system to jump into a "DIP-Switch" display.
- DMA almost certainly ISN'T i8237. What is it?
********************************************************************************************/
@ -126,6 +129,8 @@ public:
DECLARE_WRITE8_MEMBER(r232_ctrl_portc_w);
DECLARE_WRITE_LINE_MEMBER(pc88va_pic_irq);
DECLARE_READ8_MEMBER(get_slave_ack);
DECLARE_READ8_MEMBER(pc88va_dma_r);
DECLARE_WRITE8_MEMBER(pc88va_dma_w);
DECLARE_WRITE_LINE_MEMBER(pc88va_pit_out0_changed);
DECLARE_WRITE_LINE_MEMBER(pc88va_upd765_interrupt);
UINT8 m_fdc_ctrl_2;
@ -1120,6 +1125,42 @@ READ8_MEMBER(pc88va_state::no_subfdc_r)
}
#endif
/* TODO: identify or emulate this DMAC */
READ8_MEMBER(pc88va_state::pc88va_dma_r)
{
/*
0: undefined
1: ---x ---- mode
---- xxxx select channel (bit-wise)
2/3: xxxx xxxx count
4/5: xxxx xxxx address
6: ---- xxxx address
8: ???? ???? Device control Register
A: ???? ???? Mode control Register
B: ???? ???? Status Register (r/o)
F: xxxx xxxx Mask Register
*/
return 0;
}
WRITE8_MEMBER(pc88va_state::pc88va_dma_w)
{
switch(offset)
{
case 0x00: printf("DMA reset %02x\n",data & 1); break;
case 0x01: printf("DMA select channel %02x mode channel %02x\n",data & 3,(data & 4) >> 2); break;
case 0x02: printf("DMA count 7-0 %02x\n",data); break;
case 0x03: printf("DMA count 15-8 %02x\n",data); break;
case 0x04: printf("DMA address 7-0 %02x\n",data); break;
case 0x05: printf("DMA address 15-8 %02x\n",data); break;
case 0x06: printf("DMA address 19-16 %02x\n",data); break;
case 0x08: printf("DMA Device control register %02x\n",data); break;
case 0x0a: printf("DMA Mode control register %02x\n",data); break;
case 0x0f: printf("DMA Mask register %02x\n",data); break;
}
}
static ADDRESS_MAP_START( pc88va_io_map, AS_IO, 16, pc88va_state )
AM_RANGE(0x0000, 0x000f) AM_READ8(key_r,0xffff) // Keyboard ROW reading
// AM_RANGE(0x0010, 0x0010) Printer / Calendar Clock Interface
@ -1170,7 +1211,7 @@ static ADDRESS_MAP_START( pc88va_io_map, AS_IO, 16, pc88va_state )
AM_RANGE(0x0156, 0x0157) AM_READ8(rom_bank_r,0x00ff) // ROM bank status
// AM_RANGE(0x0158, 0x0159) Interruption Mode Modification
// AM_RANGE(0x015c, 0x015f) NMI mask port (strobe port)
// AM_RANGE(0x0160, 0x016f) DMA Controller
AM_RANGE(0x0160, 0x016f) AM_READWRITE8(pc88va_dma_r,pc88va_dma_w,0xffff) // DMA Controller
AM_RANGE(0x0184, 0x0187) AM_DEVREADWRITE8_LEGACY("pic8259_slave", pic8259_r, pic8259_w, 0x00ff)
AM_RANGE(0x0188, 0x018b) AM_DEVREADWRITE8_LEGACY("pic8259_master", pic8259_r, pic8259_w, 0x00ff) // ICU, also controls 8214 emulation
// AM_RANGE(0x0190, 0x0191) System Port 5