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cpu/tms34010/tms34010.cpp: Suppress side effects for debugger reads. (#12287)

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cam900 2024-04-22 03:06:14 +09:00 committed by GitHub
parent 832be042e9
commit 174e7b89d6
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1 changed files with 15 additions and 9 deletions
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24
src/devices/cpu/tms34010/tms34010.cpp
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@ -1547,7 +1547,8 @@ u16 tms34010_device::io_register_r(offs_t offset)
{
int result, total;
LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg_name[offset]);
if (!machine().side_effects_disabled())
LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg_name[offset]);
switch (offset)
{
@ -1588,7 +1589,8 @@ u16 tms34020_device::io_register_r(offs_t offset)
{
int result, total;
LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg020_name[offset]);
if (!machine().side_effects_disabled())
LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg020_name[offset]);
switch (offset)
{
@ -1718,13 +1720,16 @@ u16 tms340x0_device::host_r(offs_t offset)
addr = (IOREG(REG_HSTADRH) << 16) | IOREG(REG_HSTADRL);
result = TMS34010_RDMEM_WORD(addr & 0xfffffff0);
/* optional postincrement (it says preincrement, but data is preloaded, so it
is effectively a postincrement */
if (IOREG(REG_HSTCTLH) & 0x1000)
if (!machine().side_effects_disabled())
{
addr += 0x10;
IOREG(REG_HSTADRH) = addr >> 16;
IOREG(REG_HSTADRL) = (uint16_t)addr;
/* optional postincrement (it says preincrement, but data is preloaded, so it
is effectively a postincrement */
if (IOREG(REG_HSTCTLH) & 0x1000)
{
addr += 0x10;
IOREG(REG_HSTADRH) = addr >> 16;
IOREG(REG_HSTADRL) = (uint16_t)addr;
}
}
break;
@ -1735,7 +1740,8 @@ u16 tms340x0_device::host_r(offs_t offset)
/* error case */
default:
logerror("tms34010_host_control_r called on invalid register %d\n", reg);
if (!machine().side_effects_disabled())
logerror("tms34010_host_control_r called on invalid register %d\n", reg);
break;
}