Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-07-02 00:29:37 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

(MESS) pentagon tags (nw)

Browse Source
This commit is contained in:
Robbbert 2013-01-28 00:45:55 +00:00
parent e6d0d09b88
commit 1778afc2e8
1 changed files with 55 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

97
src/mess/drivers/pentagon.c
View File

@ -15,6 +15,12 @@ public:
pentagon_state(const machine_config &mconfig, device_type type, const char *tag) pentagon_state(const machine_config &mconfig, device_type type, const char *tag)
: spectrum_state(mconfig, type, tag) : spectrum_state(mconfig, type, tag)
, m_maincpu(*this, "maincpu") , m_maincpu(*this, "maincpu")
, m_bank1(*this, "bank1")
, m_bank2(*this, "bank2")
, m_bank3(*this, "bank3")
, m_bank4(*this, "bank4")
, m_beta(*this, BETA_DISK_TAG)
, m_ram(*this, RAM_TAG)
{ } { }
DECLARE_DIRECT_UPDATE_MEMBER(pentagon_direct); DECLARE_DIRECT_UPDATE_MEMBER(pentagon_direct);
@ -23,70 +29,78 @@ public:
protected: protected:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
UINT8 *m_maincpu_rom; required_memory_bank m_bank1;
required_memory_bank m_bank2;
required_memory_bank m_bank3;
required_memory_bank m_bank4;
required_device<device_t> m_beta;
required_device<ram_device> m_ram;
private:
UINT8 *m_p_ram;
void pentagon_update_memory(); void pentagon_update_memory();
}; };
DIRECT_UPDATE_MEMBER(pentagon_state::pentagon_direct) DIRECT_UPDATE_MEMBER(pentagon_state::pentagon_direct)
{ {
device_t *beta = machine().device(BETA_DISK_TAG);
UINT16 pc = m_maincpu->pcbase(); UINT16 pc = m_maincpu->pcbase();
if (beta->started() && betadisk_is_active(beta)) if (m_beta->started() && betadisk_is_active(m_beta) && (pc >= 0x4000))
{ {
if (pc >= 0x4000) m_ROMSelection = BIT(m_port_7ffd_data, 4);
{ betadisk_disable(m_beta);
m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ? 1 : 0; m_bank1->set_base(&m_p_ram[0x10000 + (m_ROMSelection<<14)]);
betadisk_disable(beta); }
membank("bank1")->set_base(m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); else
} if (((pc & 0xff00) == 0x3d00) && (m_ROMSelection==1))
} else if (((pc & 0xff00) == 0x3d00) && (m_ROMSelection==1))
{ {
m_ROMSelection = 3; m_ROMSelection = 3;
if (beta->started()) if (m_beta->started())
betadisk_enable(beta); betadisk_enable(m_beta);
} }
if(address<=0x3fff)
if (address<=0x3fff)
{ {
if (m_ROMSelection == 3) { if (m_ROMSelection == 3)
if (beta->started()) { {
if (m_beta->started())
{
direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine().root_device().memregion("beta:beta")->base()); direct.explicit_configure(0x0000, 0x3fff, 0x3fff, machine().root_device().memregion("beta:beta")->base());
membank("bank1")->set_base(machine().root_device().memregion("beta:beta")->base()); m_bank1->set_base(machine().root_device().memregion("beta:beta")->base());
} }
} else { }
direct.explicit_configure(0x0000, 0x3fff, 0x3fff, m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); else
membank("bank1")->set_base(m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); {
direct.explicit_configure(0x0000, 0x3fff, 0x3fff, &m_p_ram[0x10000 + (m_ROMSelection<<14)]);
m_bank1->set_base(&m_p_ram[0x10000 + (m_ROMSelection<<14)]);
} }
return ~0; return ~0;
} }
return address; return address;
} }
void pentagon_state::pentagon_update_memory() void pentagon_state::pentagon_update_memory()
{ {
device_t *beta = machine().device(BETA_DISK_TAG); UINT8 *messram = m_ram->pointer();
UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
m_screen_location = messram + ((m_port_7ffd_data & 8) ? (7<<14) : (5<<14)); m_screen_location = messram + ((m_port_7ffd_data & 8) ? (7<<14) : (5<<14));
membank("bank4")->set_base(messram + ((m_port_7ffd_data & 0x07) * 0x4000)); m_bank4->set_base(messram + ((m_port_7ffd_data & 0x07) * 0x4000));
if (beta->started() && betadisk_is_active(beta) && !( m_port_7ffd_data & 0x10 ) ) if (m_beta->started() && betadisk_is_active(m_beta) && !( m_port_7ffd_data & 0x10 ) )
{ {
/* GLUK */ /* GLUK */
if (strcmp(machine().system().name, "pent1024")==0) { if (strcmp(machine().system().name, "pent1024")==0)
m_ROMSelection = 2; m_ROMSelection = 2;
} else { else
m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ; m_ROMSelection = BIT(m_port_7ffd_data, 4);
}
} }
else { else
/* ROM switching */ /* ROM switching */
m_ROMSelection = ((m_port_7ffd_data>>4) & 0x01) ; m_ROMSelection = BIT(m_port_7ffd_data, 4);
}
/* rom 0 is 128K rom, rom 1 is 48 BASIC */ /* rom 0 is 128K rom, rom 1 is 48 BASIC */
membank("bank1")->set_base(m_maincpu_rom + 0x010000 + (m_ROMSelection<<14)); m_bank1->set_base(&m_p_ram[0x10000 + (m_ROMSelection<<14)]);
} }
WRITE8_MEMBER(pentagon_state::pentagon_port_7ffd_w) WRITE8_MEMBER(pentagon_state::pentagon_port_7ffd_w)
@ -117,28 +131,27 @@ ADDRESS_MAP_END
MACHINE_RESET_MEMBER(pentagon_state,pentagon) MACHINE_RESET_MEMBER(pentagon_state,pentagon)
{ {
UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer(); UINT8 *messram = m_ram->pointer();
device_t *beta = machine().device(BETA_DISK_TAG);
address_space &space = m_maincpu->space(AS_PROGRAM); address_space &space = m_maincpu->space(AS_PROGRAM);
m_p_ram = memregion("maincpu")->base();
m_maincpu_rom = memregion("maincpu")->base();
space.install_read_bank(0x0000, 0x3fff, "bank1"); space.install_read_bank(0x0000, 0x3fff, "bank1");
space.unmap_write(0x0000, 0x3fff); space.unmap_write(0x0000, 0x3fff);
if (beta->started()) { if (m_beta->started())
betadisk_enable(beta); {
betadisk_clear_status(beta); betadisk_enable(m_beta);
betadisk_clear_status(m_beta);
} }
space.set_direct_update_handler(direct_update_delegate(FUNC(pentagon_state::pentagon_direct), this)); space.set_direct_update_handler(direct_update_delegate(FUNC(pentagon_state::pentagon_direct), this));
memset(messram,0,128*1024); memset(messram,0,128*1024);
/* Bank 5 is always in 0x4000 - 0x7fff */ /* Bank 5 is always in 0x4000 - 0x7fff */
membank("bank2")->set_base(messram + (5<<14)); m_bank2->set_base(messram + (5<<14));
/* Bank 2 is always in 0x8000 - 0xbfff */ /* Bank 2 is always in 0x8000 - 0xbfff */
membank("bank3")->set_base(messram + (2<<14)); m_bank3->set_base(messram + (2<<14));
m_port_7ffd_data = 0; m_port_7ffd_data = 0;
m_port_1ffd_data = -1; m_port_1ffd_data = -1;