mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
making logerror part of machine and device classes [Miodrag Milanovic]
display tag of device that logged message
This commit is contained in:
parent
b814617b65
commit
18188cb13b
@ -149,12 +149,12 @@ public:
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device_a2bus_card_interface(const machine_config &mconfig, device_t &device);
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virtual ~device_a2bus_card_interface();
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virtual UINT8 read_c0nx(address_space &space, UINT8 offset) { logerror("a2bus: unhandled read at C0n%x\n", offset); return 0; } // C0nX - /DEVSEL
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virtual void write_c0nx(address_space &space, UINT8 offset, UINT8 data) { logerror("a2bus: unhandled write %02x to C0n%x\n", data, offset); }
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virtual UINT8 read_c0nx(address_space &space, UINT8 offset) { m_device.logerror("a2bus: unhandled read at C0n%x\n", offset); return 0; } // C0nX - /DEVSEL
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virtual void write_c0nx(address_space &space, UINT8 offset, UINT8 data) { m_device.logerror("a2bus: unhandled write %02x to C0n%x\n", data, offset); }
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virtual UINT8 read_cnxx(address_space &space, UINT8 offset) { return 0; } // CnXX - /IOSEL
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virtual void write_cnxx(address_space &space, UINT8 offset, UINT8 data) { logerror("a2bus: unhandled write %02x to Cn%02x\n", data, offset); }
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virtual void write_cnxx(address_space &space, UINT8 offset, UINT8 data) { m_device.logerror("a2bus: unhandled write %02x to Cn%02x\n", data, offset); }
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virtual UINT8 read_c800(address_space &space, UINT16 offset) { return 0; } // C800 - /IOSTB
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virtual void write_c800(address_space &space, UINT16 offset, UINT8 data) { logerror("a2bus: unhandled write %02x to %04x\n", data, offset + 0xc800); }
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virtual void write_c800(address_space &space, UINT16 offset, UINT8 data) {m_device.logerror("a2bus: unhandled write %02x to %04x\n", data, offset + 0xc800); }
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virtual bool take_c800() { return true; } // override and return false if your card doesn't take over the c800 space
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virtual UINT8 read_inh_rom(address_space &space, UINT16 offset) { return 0; }
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virtual void write_inh_rom(address_space &space, UINT16 offset, UINT8 data) { }
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@ -22,9 +22,9 @@
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static int verbose = VERBOSE;
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#define LOG(x) { logerror ("%s: ", cpu_context()); logerror x; logerror ("\n"); }
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#define LOG1(x) { if (verbose > 0) LOG(x)}
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#define LOG2(x) { if (verbose > 1) LOG(x)}
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#define LOG(d,x) { d->logerror ("%s: ", cpu_context()); d->logerror x; d->logerror ("\n"); }
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#define LOG1(d,x) { if (verbose > 0) LOG(d,x)}
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#define LOG2(d,x) { if (verbose > 1) LOG(d,x)}
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#define MAINCPU "maincpu"
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@ -341,7 +341,7 @@ void threecom3c505_device::device_start()
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{
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set_isa_device();
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LOG1(("start 3COM 3C505"));
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LOG1(this,("start 3COM 3C505"));
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m_installed = false;
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@ -359,7 +359,7 @@ void threecom3c505_device::device_start()
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void threecom3c505_device::device_reset()
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{
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LOG1(("reset 3COM 3C505"));
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LOG1(this,("reset 3COM 3C505"));
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m_rx_fifo.reset();
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m_rx_data_buffer.reset();
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@ -454,13 +454,13 @@ threecom3c505_device::data_buffer::data_buffer() :
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void threecom3c505_device::data_buffer::start(threecom3c505_device *device, INT32 size)
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{
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m_device = device;
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LOG2(("start threecom3c505_device::data_buffer with size %0x", size));
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LOG2(device,("start threecom3c505_device::data_buffer with size %0x", size));
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m_data.resize(size);
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}
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void threecom3c505_device::data_buffer::reset()
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{
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LOG2(("reset threecom3c505_device::data_buffer"));
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LOG2(m_device,("reset threecom3c505_device::data_buffer"));
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m_length = 0;
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}
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@ -489,17 +489,17 @@ void threecom3c505_device::data_buffer::log(const char * title) const
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if (verbose > 0)
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{
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int i;
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logerror("%s: %s (length=%02x)", m_device->cpu_context(), title, m_length);
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m_device->logerror("%s: %s (length=%02x)", m_device->cpu_context(), title, m_length);
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for (i = 0; i < m_length; i++)
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{
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logerror(" %02x", m_data[i]);
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m_device->logerror(" %02x", m_data[i]);
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if (i >= 1023)
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{
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logerror(" ...");
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m_device->logerror(" ...");
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break;
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}
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}
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logerror("\n");
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m_device->logerror("\n");
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}
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}
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@ -517,7 +517,7 @@ void threecom3c505_device::data_buffer_fifo::start(
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threecom3c505_device *device, INT32 size, INT32 db_size)
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{
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m_device = device;
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LOG2(("start threecom3c505_device::data_buffer_fifo"));
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LOG2(m_device,("start threecom3c505_device::data_buffer_fifo"));
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int i;
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// FIXME: fifo size is hardcoded
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@ -531,7 +531,7 @@ void threecom3c505_device::data_buffer_fifo::start(
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void threecom3c505_device::data_buffer_fifo::reset()
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{
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LOG2(("reset threecom3c505_device::data_buffer_fifo"));
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LOG2(m_device,("reset threecom3c505_device::data_buffer_fifo"));
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m_get_index = m_put_index = 0;
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m_count = 0;
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}
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@ -548,7 +548,7 @@ int threecom3c505_device::data_buffer_fifo::put(const UINT8 data[], const int le
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{
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UINT16 next_index = (m_put_index + 1) % m_size;
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LOG2(("threecom3c505_device::data_buffer_fifo::put %d", m_count));
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LOG2(m_device,("threecom3c505_device::data_buffer_fifo::put %d", m_count));
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if (next_index == m_get_index)
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{
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@ -558,7 +558,7 @@ int threecom3c505_device::data_buffer_fifo::put(const UINT8 data[], const int le
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else if (length > ETH_BUFFER_SIZE)
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{
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// data size exceeds buffer size
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LOG(("threecom3c505_device::data_buffer_fifo::put %d: data size (%d) exceeds buffer size (%d)!!!", m_count, length,ETH_BUFFER_SIZE));
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LOG(m_device,("threecom3c505_device::data_buffer_fifo::put %d: data size (%d) exceeds buffer size (%d)!!!", m_count, length,ETH_BUFFER_SIZE));
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return 0;
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}
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else
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@ -573,7 +573,7 @@ int threecom3c505_device::data_buffer_fifo::put(const UINT8 data[], const int le
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int threecom3c505_device::data_buffer_fifo::get(data_buffer *db)
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{
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LOG2(("threecom3c505_device::data_buffer_fifo::get %d", m_count));
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LOG2(m_device,("threecom3c505_device::data_buffer_fifo::get %d", m_count));
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if (m_get_index == m_put_index)
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{
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@ -601,7 +601,7 @@ void threecom3c505_device::set_filter_list()
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memcpy(m_filter_list + ETHERNET_ADDR_SIZE * 2, m_multicast_list, sizeof(m_multicast_list));
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int node_id = (((m_station_address[3] << 8) + m_station_address[4]) << 8) + m_station_address[5];
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LOG2(("set_filter_list node_id=%x",node_id));
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LOG2(this,("set_filter_list node_id=%x",node_id));
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setfilter(this, node_id);
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}
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@ -614,7 +614,7 @@ void threecom3c505_device::set_interrupt(enum line_state state)
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{
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if (state != irq_state)
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{
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LOG2(("set_interrupt(%d)",state));
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LOG2(this,("set_interrupt(%d)",state));
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switch (m_irq)
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{
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case 3: m_isa->irq3_w(state); break;
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@ -802,7 +802,7 @@ void threecom3c505_device::do_receive_command()
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// receive data available ?
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if (m_rx_data_buffer.get_length() > 0)
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{
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LOG2(("do_receive_command - data_length=%x rx_pending=%d",
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LOG2(this,("do_receive_command - data_length=%x rx_pending=%d",
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m_rx_data_buffer.get_length(), m_rx_pending));
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m_rx_pending--;
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@ -827,7 +827,7 @@ void threecom3c505_device::do_receive_command()
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UINT16 buf_len = uint16_from_le(m_response.data.rcv_resp.buf_len) & ~1;
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if (m_rx_data_buffer.get_length() > buf_len)
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{
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LOG1(("do_receive_command !!! buffer size too small (%d < %d)", buf_len, m_rx_data_buffer.get_length()));
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LOG1(this,("do_receive_command !!! buffer size too small (%d < %d)", buf_len, m_rx_data_buffer.get_length()));
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m_response.data.rcv_resp.pkt_len = uint16_to_le(buf_len);
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m_response.data.rcv_resp.status = 0xffff;
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}
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@ -855,7 +855,7 @@ void threecom3c505_device::do_receive_command()
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void threecom3c505_device::set_command_pending(int state)
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{
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LOG2(("set_command_pending %d -> %d m_wait_for_ack=%d m_wait_for_nak=%d m_rx_pending=%d%s",
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LOG2(this,("set_command_pending %d -> %d m_wait_for_ack=%d m_wait_for_nak=%d m_rx_pending=%d%s",
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m_command_pending, state, m_wait_for_ack, m_wait_for_nak, m_rx_pending, state ? "" :"\n"));
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//- verbose = onoff ? 1 : 2;
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@ -890,7 +890,7 @@ void threecom3c505_device::set_command_pending(int state)
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}
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break;
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default:
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LOG(("set_command_pending %d unexpected" , state));
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LOG(this,("set_command_pending %d unexpected" , state));
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break;
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}
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@ -990,7 +990,7 @@ void threecom3c505_device::do_command()
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if (command_pcp.length > sizeof(m_multicast_list)
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|| (command_pcp.length % ETHERNET_ADDR_SIZE) != 0)
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{
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LOG(("CMD_LOAD_MULTICAST_LIST - unexpected data size %d", command_pcp.length));
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LOG(this,("CMD_LOAD_MULTICAST_LIST - unexpected data size %d", command_pcp.length));
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}
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else
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{
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@ -1003,7 +1003,7 @@ void threecom3c505_device::do_command()
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case CMD_SET_STATION_ADDRESS: // 0x10
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if (command_pcp.length != sizeof(m_station_address))
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{
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LOG(("CMD_SET_STATION_ADDRESS - unexpected data size %d", command_pcp.length));
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LOG(this,("CMD_SET_STATION_ADDRESS - unexpected data size %d", command_pcp.length));
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memset(m_station_address, 0, sizeof(m_station_address));
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}
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else
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@ -1028,7 +1028,7 @@ void threecom3c505_device::do_command()
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break;
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default:
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m_microcode_version = 0;
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LOG(("CMD_DOWNLOAD_PROGRAM - unexpected microcode version %04x", mc_version));
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LOG(this,("CMD_DOWNLOAD_PROGRAM - unexpected microcode version %04x", mc_version));
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break;
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}
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// return microcode version as program id
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@ -1111,13 +1111,13 @@ void threecom3c505_device::recv_cb(UINT8 *data, int length)
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m_netstat.tot_recv++;
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m_netstat.err_ovrrun++;
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// fifo overrun
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LOG1(("recv_cb: data_length=%x !!! RX FIFO OVERRUN !!!", length));
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LOG1(this,("recv_cb: data_length=%x !!! RX FIFO OVERRUN !!!", length));
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}
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else
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{
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m_netstat.tot_recv++;
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LOG2(("recv_cb: data_length=%x m_rx_pending=%d", length, m_rx_pending));
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LOG2(this,("recv_cb: data_length=%x m_rx_pending=%d", length, m_rx_pending));
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do_receive_command();
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}
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@ -1129,7 +1129,7 @@ void threecom3c505_device::recv_cb(UINT8 *data, int length)
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void threecom3c505_device::write_command_port(UINT8 data)
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{
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LOG2(("writing 3C505 command port %02x - m_status=%02x m_control=%02x m_command_index=%02x",
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LOG2(this,("writing 3C505 command port %02x - m_status=%02x m_control=%02x m_command_index=%02x",
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data, m_status, m_control, m_command_index));
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if (m_command_index == 0)
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@ -1137,7 +1137,7 @@ void threecom3c505_device::write_command_port(UINT8 data)
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switch (data)
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{
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case 0:
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LOG2(("!!! writing 3C505 Command Register = %02x", data));
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LOG2(this,("!!! writing 3C505 Command Register = %02x", data));
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// spurious data; reset?
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break;
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@ -1240,7 +1240,7 @@ UINT8 threecom3c505_device::read_command_port()
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m_status &= ~ACRF; /* the adapter command register is no longer full */
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LOG2(("read_command_port: !!! reading 3C505 Command Register = %02x - m_status=%02x m_control=%02x",
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LOG2(this,("read_command_port: !!! reading 3C505 Command Register = %02x - m_status=%02x m_control=%02x",
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data, m_status, m_control));
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// wait for nak in control register
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@ -1250,7 +1250,7 @@ UINT8 threecom3c505_device::read_command_port()
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{
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// should never happen
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data = 0; // 0xff;
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LOG(("read_command_port: unexpected reading Command Register at index %04x", m_response_index));
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LOG(this,("read_command_port: unexpected reading Command Register at index %04x", m_response_index));
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}
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if (m_response_index <= m_response_length + 1)
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@ -1283,13 +1283,13 @@ UINT8 threecom3c505_device::read_command_port()
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if (!send(m_tx_data_buffer.get_data(), m_tx_data_buffer.get_length()))
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{
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// FIXME: failed to send the Ethernet packet
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LOG(("read_command_port(): !!! failed to send Ethernet packet"));
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LOG(this,("read_command_port(): !!! failed to send Ethernet packet"));
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}
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if (!tx_data(this, m_tx_data_buffer.get_data(), m_tx_data_buffer.get_length()))
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{
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// FIXME: failed to transmit the Ethernet packet
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LOG(("read_command_port(): !!! failed to transmit Ethernet packet"));
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LOG(this,("read_command_port(): !!! failed to transmit Ethernet packet"));
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}
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m_tx_data_buffer.reset();
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@ -1326,7 +1326,7 @@ void threecom3c505_device::write_data_port(UINT8 data)
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else if ((m_status & HRDY) == 0)
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{
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// this happened in ether.dex Test 20/1
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LOG(("write_data_port: failed to write tx data (data register not ready), data length=%x status=%x",
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LOG(this,("write_data_port: failed to write tx data (data register not ready), data length=%x status=%x",
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m_tx_data_buffer.get_length(), m_status));
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}
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@ -1334,7 +1334,7 @@ void threecom3c505_device::write_data_port(UINT8 data)
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else if (m_command_buffer[0] == CMD_MC_F8)
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{
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// FIXME: what does it do?
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LOG(("write_data_port: !!! TODO: CMD_MC_F8 !!! command=%x data=%02x", m_command_buffer[0], data));
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LOG(this,("write_data_port: !!! TODO: CMD_MC_F8 !!! command=%x data=%02x", m_command_buffer[0], data));
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}
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#endif
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@ -1353,7 +1353,7 @@ void threecom3c505_device::write_data_port(UINT8 data)
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default:
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if (!m_tx_data_buffer.append(data))
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{
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LOG(("write_data_port: failed to write tx data (buffer size exceeded), data length=%x",
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LOG(this,("write_data_port: failed to write tx data (buffer size exceeded), data length=%x",
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m_tx_data_buffer.get_length()));
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}
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if (m_tx_data_buffer.get_length() == m_tx_data_length)
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@ -1370,7 +1370,7 @@ void threecom3c505_device::write_data_port(UINT8 data)
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{
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if (!m_tx_data_buffer.append(data))
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{
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LOG(("write_data_port: failed to write tx data (buffer size exceeded), data length=%x",
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LOG(this,("write_data_port: failed to write tx data (buffer size exceeded), data length=%x",
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m_tx_data_buffer.get_length()));
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}
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@ -1385,7 +1385,7 @@ void threecom3c505_device::write_data_port(UINT8 data)
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{
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if (!m_program_buffer.append(data))
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{
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LOG(("write_data_port: failed to write program data (buffer size exceeded), data length=%x",
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LOG(this,("write_data_port: failed to write program data (buffer size exceeded), data length=%x",
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m_program_buffer.get_length()));
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}
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@ -1400,13 +1400,13 @@ void threecom3c505_device::write_data_port(UINT8 data)
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// write to data fifo
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if (!m_tx_data_buffer.append(data))
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{
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LOG(("write_data_port: failed to write tx data (buffer size exceeded), data length=%x",
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LOG(this,("write_data_port: failed to write tx data (buffer size exceeded), data length=%x",
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m_tx_data_buffer.get_length()));
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}
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}
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else
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{
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LOG(("write_data_port: unexpected command %02x data=%02x", m_command_buffer[0], data));
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LOG(this,("write_data_port: unexpected command %02x data=%02x", m_command_buffer[0], data));
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}
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if (m_command_buffer[0] != CMD_DOWNLOAD_PROGRAM &&
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@ -1417,7 +1417,7 @@ void threecom3c505_device::write_data_port(UINT8 data)
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if (m_tx_data_buffer.get_length() > PORT_DATA_FIFO_SIZE
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&& m_tx_data_buffer.get_length() > m_tx_data_length)
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{
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LOG(("write_data_port: port_data tx fifo exhausted, data length=%x status=%x",
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LOG(this,("write_data_port: port_data tx fifo exhausted, data length=%x status=%x",
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m_tx_data_buffer.get_length(), m_status));
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}
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}
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@ -1455,7 +1455,7 @@ UINT8 threecom3c505_device::read_data_port()
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{
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// FIXME: should never happen
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data = 0xff;
|
||||
LOG(("read_data_port: unexpected reading data at index %04x)", m_rx_data_index));
|
||||
LOG(this,("read_data_port: unexpected reading data at index %04x)", m_rx_data_index));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -1469,12 +1469,12 @@ void threecom3c505_device::write_control_port(UINT8 data)
|
||||
switch (data & (ATTN | FLSH))
|
||||
{
|
||||
case ATTN:
|
||||
LOG2(("write_control_port %02x - Soft Reset", data));
|
||||
LOG2(this,("write_control_port %02x - Soft Reset", data));
|
||||
// TODO: soft reset
|
||||
break;
|
||||
|
||||
case FLSH:
|
||||
LOG2(("write_control_port %02x - Flush Data Register", data));
|
||||
LOG2(this,("write_control_port %02x - Flush Data Register", data));
|
||||
// flush data register
|
||||
if (data & DIR_)
|
||||
{
|
||||
@ -1492,12 +1492,12 @@ void threecom3c505_device::write_control_port(UINT8 data)
|
||||
break;
|
||||
|
||||
case ATTN | FLSH:
|
||||
LOG2(("write_control_port %02x - Reset Adapter", data));
|
||||
LOG2(this,("write_control_port %02x - Reset Adapter", data));
|
||||
device_reset();
|
||||
break;
|
||||
|
||||
case 0:
|
||||
LOG2(("write_control_port %02x", data));
|
||||
LOG2(this,("write_control_port %02x", data));
|
||||
|
||||
// end reset
|
||||
if ((m_control & (ATTN | FLSH)) == (ATTN | FLSH))
|
||||
@ -1579,7 +1579,7 @@ WRITE16_MEMBER(threecom3c505_device::write)
|
||||
offset *= 2;
|
||||
|
||||
m_reg[offset & 0x0f] = data;
|
||||
LOG2(("writing 3C505 Register at offset=%02x with mem_mask=%04x = %04x", offset, mem_mask, data));
|
||||
LOG2(this,("writing 3C505 Register at offset=%02x with mem_mask=%04x = %04x", offset, mem_mask, data));
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
@ -1645,7 +1645,7 @@ READ16_MEMBER(threecom3c505_device::read)
|
||||
break;
|
||||
}
|
||||
|
||||
LOG2(("reading 3C505 Register at offset=%02x with mem_mask=%04x = %04x", offset, mem_mask, data));
|
||||
LOG2(this,("reading 3C505 Register at offset=%02x with mem_mask=%04x = %04x", offset, mem_mask, data));
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -1657,7 +1657,7 @@ void threecom3c505_device::set_verbose(int on_off)
|
||||
|
||||
int threecom3c505_device::tx_data(device_t *device, const UINT8 data[], int length)
|
||||
{
|
||||
LOG1(("threecom3c505_device::tx_data length=%d", length));
|
||||
LOG1(device,("threecom3c505_device::tx_data length=%d", length));
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
@ -100,7 +100,7 @@ public:
|
||||
virtual int read_test() { return 0; } // used by Virtua Racing test
|
||||
|
||||
/* this probably should do more, like make Genesis V2 'die' if the SEGA string is not written promptly */
|
||||
virtual DECLARE_WRITE16_MEMBER(write_tmss_bank) { logerror("Write to TMSS bank: offset %x data %x\n", 0xa14000 + (offset << 1), data); };
|
||||
virtual DECLARE_WRITE16_MEMBER(write_tmss_bank) { m_device.logerror("Write to TMSS bank: offset %x data %x\n", 0xa14000 + (offset << 1), data); };
|
||||
|
||||
virtual void rom_alloc(size_t size, const char *tag);
|
||||
virtual void nvram_alloc(size_t size);
|
||||
|
@ -96,7 +96,7 @@ void stm95_eeprom_device::set_sck_line(int state)
|
||||
WEL = 1;
|
||||
break;
|
||||
default:
|
||||
logerror("STM95 EEPROM: unknown cmd %02X\n", stream_data&0xff);
|
||||
machine().logerror("STM95 EEPROM: unknown cmd %02X\n", stream_data&0xff);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
@ -466,7 +466,7 @@ static int snes_validate_infoblock( UINT8 *infoblock, UINT32 offset )
|
||||
/* This determines if a cart is in Mode 20, 21, 22 or 25; sets state->m_cart[0].mode and
|
||||
state->m_cart[0].sram accordingly; and returns the offset of the internal header (needed to
|
||||
detect BSX and ST carts) */
|
||||
static UINT32 snes_find_hilo_mode( UINT8 *buffer, UINT32 buf_len )
|
||||
static UINT32 snes_find_hilo_mode(device_t *device, UINT8 *buffer, UINT32 buf_len )
|
||||
{
|
||||
UINT8 valid_mode20 = 0;
|
||||
UINT8 valid_mode21 = 0;
|
||||
@ -492,7 +492,7 @@ static UINT32 snes_find_hilo_mode( UINT8 *buffer, UINT32 buf_len )
|
||||
else
|
||||
retvalue = 0x40ffc0;
|
||||
|
||||
logerror( "\t HiROM/LoROM id: %s (LoROM: %d , HiROM: %d, ExHiROM: %d)\n",
|
||||
device->logerror( "\t HiROM/LoROM id: %s (LoROM: %d , HiROM: %d, ExHiROM: %d)\n",
|
||||
(retvalue == 0x007fc0) ? "LoROM" :
|
||||
(retvalue == 0x00ffc0) ? "HiROM" :
|
||||
(retvalue == 0x40ffc0) ? "ExHiROM" : "Other",
|
||||
@ -847,7 +847,7 @@ void base_sns_cart_slot_device::setup_nvram()
|
||||
UINT32 size = 0;
|
||||
if (software_entry() == NULL)
|
||||
{
|
||||
int hilo_mode = snes_find_hilo_mode(ROM, m_cart->get_rom_size());
|
||||
int hilo_mode = snes_find_hilo_mode(this, ROM, m_cart->get_rom_size());
|
||||
UINT8 sram_size = (m_type == SNES_SFX) ? (ROM[0x00ffbd] & 0x07) : (ROM[hilo_mode + 0x18] & 0x07);
|
||||
if (sram_size)
|
||||
{
|
||||
@ -893,7 +893,7 @@ bool base_sns_cart_slot_device::call_softlist_load(software_list_device &swlist,
|
||||
void base_sns_cart_slot_device::get_cart_type_addon(UINT8 *ROM, UINT32 len, int &type, int &addon)
|
||||
{
|
||||
// First, look if the cart is HiROM or LoROM (and set snes_cart accordingly)
|
||||
int hilo_mode = snes_find_hilo_mode(ROM, len);
|
||||
int hilo_mode = snes_find_hilo_mode(this,ROM, len);
|
||||
|
||||
switch (hilo_mode)
|
||||
{
|
||||
@ -1244,7 +1244,7 @@ void base_sns_cart_slot_device::internal_header_logging(UINT8 *ROM, UINT32 len)
|
||||
/*f8*/ UNK, "Cybersoft", UNK, "Psygnosis", UNK, UNK, "Davidson", UNK,
|
||||
};
|
||||
|
||||
int hilo_mode = snes_find_hilo_mode(ROM, len);
|
||||
int hilo_mode = snes_find_hilo_mode(this,ROM, len);
|
||||
char title[21], rom_id[4], company_id[2];
|
||||
int type = 0, company, addon, has_ram = 0, has_sram = 0;
|
||||
switch (hilo_mode)
|
||||
|
@ -1514,7 +1514,7 @@ WRITE8_MEMBER(ti99_cartridge_pcb::write)
|
||||
gromwrite(space, offset, data, mem_mask);
|
||||
else
|
||||
{
|
||||
if (TRACE_ILLWRITE) logerror("%s: Cannot write to ROM space at %04x\n", tag(), offset);
|
||||
if (TRACE_ILLWRITE) space.device().logerror("%s: Cannot write to ROM space at %04x\n", tag(), offset);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1601,7 +1601,7 @@ WRITE8_MEMBER(ti99_minimem_cartridge::write)
|
||||
{
|
||||
if ((offset & 0x1000)==0x0000)
|
||||
{
|
||||
if (TRACE_ILLWRITE) logerror("%s: Write access to cartridge ROM at address %04x ignored", tag(), offset);
|
||||
if (TRACE_ILLWRITE) space.device().logerror("%s: Write access to cartridge ROM at address %04x ignored", tag(), offset);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1683,7 +1683,7 @@ READ8Z_MEMBER(ti99_super_cartridge::crureadz)
|
||||
|
||||
if ((offset & 0xfff0) == 0x0800)
|
||||
{
|
||||
if (TRACE_CRU) logerror("%s: CRU accessed at %04x\n", tag(), offset);
|
||||
if (TRACE_CRU) space.device().logerror("%s: CRU accessed at %04x\n", tag(), offset);
|
||||
UINT8 val = 0x02 << (m_ram_page << 1);
|
||||
*value = (val >> ((offset - 0x0800)>>1)) & 0xff;
|
||||
}
|
||||
@ -1693,7 +1693,7 @@ WRITE8_MEMBER(ti99_super_cartridge::cruwrite)
|
||||
{
|
||||
if ((offset & 0xfff0) == 0x0800)
|
||||
{
|
||||
if (TRACE_CRU) logerror("%s: CRU accessed at %04x\n", tag(), offset);
|
||||
if (TRACE_CRU) space.device().logerror("%s: CRU accessed at %04x\n", tag(), offset);
|
||||
if (data != 0)
|
||||
m_ram_page = (offset-0x0802)>>2;
|
||||
}
|
||||
@ -2051,7 +2051,7 @@ WRITE8_MEMBER(ti99_gromemu_cartridge::gromemuwrite)
|
||||
// Accept low address byte (second write)
|
||||
m_grom_address = (m_grom_address & 0xff00) | data;
|
||||
m_waddr_LSB = false;
|
||||
if (TRACE_GROM) logerror("%s: Set grom address %04x\n", tag(), m_grom_address);
|
||||
if (TRACE_GROM) space.device().logerror("%s: Set grom address %04x\n", tag(), m_grom_address);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -2061,7 +2061,7 @@ WRITE8_MEMBER(ti99_gromemu_cartridge::gromemuwrite)
|
||||
}
|
||||
}
|
||||
else {
|
||||
if (TRACE_ILLWRITE) logerror("%s: Ignoring write to GROM area at address %04x\n", tag(), m_grom_address);
|
||||
if (TRACE_ILLWRITE) space.device().logerror("%s: Ignoring write to GROM area at address %04x\n", tag(), m_grom_address);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2130,7 +2130,7 @@ rpk::rpk(emu_options& options, const char* sysname)
|
||||
|
||||
rpk::~rpk()
|
||||
{
|
||||
if (TRACE_RPK) logerror("gromport/RPK: Destroy RPK\n");
|
||||
//if (TRACE_RPK) logerror("gromport/RPK: Destroy RPK\n");
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2238,7 +2238,7 @@ rpk_socket* rpk_reader::load_rom_resource(zip_file* zip, xml_data_node* rom_reso
|
||||
file = xml_get_attribute_string(rom_resource_node, "file", NULL);
|
||||
if (file == NULL) throw rpk_exception(RPK_INVALID_LAYOUT, "<rom> must have a 'file' attribute");
|
||||
|
||||
if (TRACE_RPK) logerror("gromport/RPK: Loading ROM contents for socket '%s' from file %s\n", socketname, file);
|
||||
//if (TRACE_RPK) logerror("gromport/RPK: Loading ROM contents for socket '%s' from file %s\n", socketname, file);
|
||||
|
||||
// check for crc
|
||||
crcstr = xml_get_attribute_string(rom_resource_node, "crc", NULL);
|
||||
@ -2326,7 +2326,7 @@ rpk_socket* rpk_reader::load_ram_resource(emu_options &options, xml_data_node* r
|
||||
contents = global_alloc_array_clear(UINT8, length);
|
||||
if (contents==NULL) throw rpk_exception(RPK_OUT_OF_MEMORY);
|
||||
|
||||
if (TRACE_RPK) logerror("gromport/RPK: Allocating RAM buffer (%d bytes) for socket '%s'\n", length, socketname);
|
||||
//if (TRACE_RPK) logerror("gromport/RPK: Allocating RAM buffer (%d bytes) for socket '%s'\n", length, socketname);
|
||||
|
||||
ram_pname = NULL;
|
||||
|
||||
@ -2348,7 +2348,7 @@ rpk_socket* rpk_reader::load_ram_resource(emu_options &options, xml_data_node* r
|
||||
std::string ram_pathname = std::string(system_name).append(PATH_SEPARATOR).append(ram_filename);
|
||||
ram_pname = core_strdup(ram_pathname.c_str());
|
||||
// load, and fill rest with 00
|
||||
if (TRACE_RPK) logerror("gromport/RPK: Loading NVRAM contents from '%s'\n", ram_pname);
|
||||
//if (TRACE_RPK) logerror("gromport/RPK: Loading NVRAM contents from '%s'\n", ram_pname);
|
||||
image_battery_load_by_name(options, ram_pname, contents, length, 0x00);
|
||||
}
|
||||
}
|
||||
@ -2438,7 +2438,7 @@ rpk* rpk_reader::open(emu_options &options, const char *filename, const char *sy
|
||||
// We'll try to find the PCB type on the provided type list.
|
||||
pcb_type = xml_get_attribute_string(pcb_node, "type", NULL);
|
||||
if (pcb_type==NULL) throw rpk_exception(RPK_INVALID_LAYOUT, "<pcb> must have a 'type' attribute");
|
||||
if (TRACE_RPK) logerror("gromport/RPK: Cartridge says it has PCB type '%s'\n", pcb_type);
|
||||
//if (TRACE_RPK) logerror("gromport/RPK: Cartridge says it has PCB type '%s'\n", pcb_type);
|
||||
|
||||
i=0;
|
||||
do
|
||||
|
@ -14,7 +14,7 @@ void alto2_cpu_device::f1_early_curt_block()
|
||||
{
|
||||
m_dsp.curt_blocks = true;
|
||||
m_task_wakeup &= ~(1 << m_task);
|
||||
LOG((LOG_CURT,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_CURT,2," BLOCK %s\n", task_name(m_task)));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -23,7 +23,7 @@ void alto2_cpu_device::f1_early_curt_block()
|
||||
void alto2_cpu_device::f2_late_load_xpreg()
|
||||
{
|
||||
m_dsp.xpreg = X_RDBITS(m_bus,16,6,15);
|
||||
LOG((LOG_CURT, 9," XPREG<- BUS[6-15] (%#o)\n", m_dsp.xpreg));
|
||||
LOG((this,LOG_CURT, 9," XPREG<- BUS[6-15] (%#o)\n", m_dsp.xpreg));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -46,7 +46,7 @@ void alto2_cpu_device::f2_late_load_xpreg()
|
||||
void alto2_cpu_device::f2_late_load_csr()
|
||||
{
|
||||
m_dsp.csr = m_bus;
|
||||
LOG((LOG_CURT, m_dsp.csr ? 2 : 9," CSR<- BUS (%#o)\n", m_dsp.csr));
|
||||
LOG((this,LOG_CURT, m_dsp.csr ? 2 : 9," CSR<- BUS (%#o)\n", m_dsp.csr));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -15,7 +15,7 @@ void alto2_cpu_device::f1_early_dht_block()
|
||||
m_dsp.dht_blocks = true;
|
||||
// clear the wakeup for the display horizontal task
|
||||
m_task_wakeup &= ~(1 << m_task);
|
||||
LOG((LOG_DHT,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_DHT,2," BLOCK %s\n", task_name(m_task)));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -30,7 +30,7 @@ void alto2_cpu_device::f2_late_dht_setmode()
|
||||
{
|
||||
UINT16 r = X_RDBITS(m_bus,16,0,0);
|
||||
m_dsp.setmode = m_bus;
|
||||
LOG((LOG_DHT,2," SETMODE<- BUS (%#o), branch on BUS[0] (%#o | %#o)\n", m_bus, m_next2, r));
|
||||
LOG((this,LOG_DHT,2," SETMODE<- BUS (%#o), branch on BUS[0] (%#o | %#o)\n", m_bus, m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
|
@ -364,12 +364,12 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
int i;
|
||||
UINT8 s0, s1;
|
||||
|
||||
LOG((LOG_DISK,9," *** KWD timing bitclk:%d datin:%d block:%d\n", bitclk, datin, block));
|
||||
LOG((this,LOG_DISK,9," *** KWD timing bitclk:%d datin:%d block:%d\n", bitclk, datin, block));
|
||||
if (0 == m_dsk.seclate)
|
||||
{
|
||||
// if SECLATE is 0, WDDONE' never goes low (counter's clear has precedence).
|
||||
if (m_dsk.bitcount) {
|
||||
LOG((LOG_DISK,7," SECLATE:0 clears bitcount:0\n"));
|
||||
LOG((this,LOG_DISK,7," SECLATE:0 clears bitcount:0\n"));
|
||||
m_dsk.bitcount = 0;
|
||||
}
|
||||
}
|
||||
@ -386,7 +386,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
* counter. It has been loaded with 15, so it counts to 16 on
|
||||
* the next rising edge and makes WDDONE' go to 0.
|
||||
*/
|
||||
LOG((LOG_DISK,7," HIORDBIT:1 sets WFFO:1\n"));
|
||||
LOG((this,LOG_DISK,7," HIORDBIT:1 sets WFFO:1\n"));
|
||||
PUT_KCOM_WFFO(m_dsk.kcom, 1);
|
||||
// TODO: show disk indicators
|
||||
}
|
||||
@ -402,14 +402,14 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
* and Q will be 1. LOAD' is deassterted: count on clock.
|
||||
*/
|
||||
m_dsk.bitcount = (m_dsk.bitcount + 1) % 16;
|
||||
LOG((LOG_DISK,6," WFFO:1 count bitcount:%2d\n", m_dsk.bitcount));
|
||||
LOG((this,LOG_DISK,6," WFFO:1 count bitcount:%2d\n", m_dsk.bitcount));
|
||||
} else {
|
||||
/*
|
||||
* If BUS[4] (WFFO) was 0, both J and K' will be 0, and Q
|
||||
* will be 0. LOAD' is asserted and will load on rising bitclock (now)
|
||||
*/
|
||||
m_dsk.bitcount = 15;
|
||||
LOG((LOG_DISK,6," WFFO:0 load bitcount:%2d\n", m_dsk.bitcount));
|
||||
LOG((this,LOG_DISK,6," WFFO:0 load bitcount:%2d\n", m_dsk.bitcount));
|
||||
}
|
||||
}
|
||||
if (!m_dsk.bitclk && bitclk) {
|
||||
@ -420,7 +420,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
}
|
||||
|
||||
if (m_dsk.wddone != wddone) {
|
||||
LOG((LOG_DISK,8," WDDONE':%d->%d\n", m_dsk.wddone, wddone));
|
||||
LOG((this,LOG_DISK,8," WDDONE':%d->%d\n", m_dsk.wddone, wddone));
|
||||
}
|
||||
|
||||
if (15 == m_dsk.bitcount) {
|
||||
@ -437,7 +437,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
m_dsk.datain = m_dsk.shiftin & 0177777;
|
||||
/* load the output shift register */
|
||||
m_dsk.shiftout = m_dsk.dataout;
|
||||
LOG((LOG_DISK,8," LATCH in:%06o (0x%04x) out:%06o (0x%04x)\n", m_dsk.datain, m_dsk.datain, m_dsk.dataout, m_dsk.dataout));
|
||||
LOG((this,LOG_DISK,8," LATCH in:%06o (0x%04x) out:%06o (0x%04x)\n", m_dsk.datain, m_dsk.datain, m_dsk.dataout, m_dsk.dataout));
|
||||
}
|
||||
} else {
|
||||
/* CARRY = 0 -> WDDONE' = 1 */
|
||||
@ -472,10 +472,10 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
for (i = 0; i < 4; i++) {
|
||||
#if ALTO2_DEBUG
|
||||
if (m_sysclka0[i] != m_sysclka1[i]) {
|
||||
LOG((LOG_DISK,9," SYSCLKA' %s\n", raise_lower[m_sysclka1[i]]));
|
||||
LOG((this,LOG_DISK,9," SYSCLKA' %s\n", raise_lower[m_sysclka1[i]]));
|
||||
}
|
||||
if (m_sysclkb0[i] != m_sysclkb1[i]) {
|
||||
LOG((LOG_DISK,9," SYSCLKB' %s\n", raise_lower[m_sysclkb1[i]]));
|
||||
LOG((this,LOG_DISK,9," SYSCLKB' %s\n", raise_lower[m_sysclkb1[i]]));
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -654,7 +654,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
// rising edge immediately
|
||||
if ((m_dsk.wdinit = WDINIT) == 1)
|
||||
m_dsk.wdinit0 = 1;
|
||||
LOG((LOG_DISK,8," WDINIT:%d\n", m_dsk.wdinit));
|
||||
LOG((this,LOG_DISK,8," WDINIT:%d\n", m_dsk.wdinit));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -663,7 +663,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
*/
|
||||
if ((m_dsk.ff_53a & JKFF_Q) && (m_dsk.ff_43a & JKFF_Q)) {
|
||||
if (m_dsk.wdtskena == 1) {
|
||||
LOG((LOG_DISK,2," WDTSKENA':0 and WAKEKWDT':0 wake KWD\n"));
|
||||
LOG((this,LOG_DISK,2," WDTSKENA':0 and WAKEKWDT':0 wake KWD\n"));
|
||||
m_dsk.wdtskena = 0;
|
||||
m_task_wakeup |= 1 << task_kwd;
|
||||
}
|
||||
@ -672,7 +672,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
* If Q (43a) is 1, the WDTSKENA' signal is deasserted.
|
||||
*/
|
||||
if (m_dsk.wdtskena == 0) {
|
||||
LOG((LOG_DISK,2," WDTSKENA':1\n"));
|
||||
LOG((this,LOG_DISK,2," WDTSKENA':1\n"));
|
||||
m_dsk.wdtskena = 1;
|
||||
m_task_wakeup &= ~(1 << task_kwd);
|
||||
}
|
||||
@ -681,21 +681,21 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
if (0 != m_dsk.kfer) {
|
||||
// no fatal error: ready AND not seqerr AND seekok
|
||||
if (!RDYLAT && !SEQERR && SEEKOK) {
|
||||
LOG((LOG_DISK,6," reset KFER\n"));
|
||||
LOG((this,LOG_DISK,6," reset KFER\n"));
|
||||
m_dsk.kfer = 0;
|
||||
}
|
||||
} else {
|
||||
// fatal error: not ready OR seqerr OR not seekok
|
||||
if (RDYLAT) {
|
||||
LOG((LOG_DISK,6," RDYLAT sets KFER\n"));
|
||||
LOG((this,LOG_DISK,6," RDYLAT sets KFER\n"));
|
||||
m_dsk.kfer = 1;
|
||||
}
|
||||
if (SEQERR) {
|
||||
LOG((LOG_DISK,6," SEQERR sets KFER\n"));
|
||||
LOG((this,LOG_DISK,6," SEQERR sets KFER\n"));
|
||||
m_dsk.kfer = 1;
|
||||
}
|
||||
if (!SEEKOK) {
|
||||
LOG((LOG_DISK,6," not SEEKOK sets KFER\n"));
|
||||
LOG((this,LOG_DISK,6," not SEEKOK sets KFER\n"));
|
||||
m_dsk.kfer = 1;
|
||||
}
|
||||
}
|
||||
@ -706,12 +706,12 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
*/
|
||||
if (m_dsk.ff_22b & JKFF_Q) {
|
||||
if (0 == (m_task_wakeup & (1 << task_ksec))) {
|
||||
LOG((LOG_DISK,6," STSKENA:1; WAKEST':0 wake KSEC\n"));
|
||||
LOG((this,LOG_DISK,6," STSKENA:1; WAKEST':0 wake KSEC\n"));
|
||||
m_task_wakeup |= 1 << task_ksec;
|
||||
}
|
||||
} else {
|
||||
if (0 != (m_task_wakeup & (1 << task_ksec))) {
|
||||
LOG((LOG_DISK,6," STSKENA:0; WAKEST':1\n"));
|
||||
LOG((this,LOG_DISK,6," STSKENA:0; WAKEST':1\n"));
|
||||
m_task_wakeup &= ~(1 << task_ksec);
|
||||
}
|
||||
}
|
||||
@ -743,7 +743,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
m_dsk.seclate_timer->adjust(attotime::from_nsec(TW_SECLATE), 1);
|
||||
if (m_dsk.seclate) {
|
||||
m_dsk.seclate = 0;
|
||||
LOG((LOG_DISK,6," SECLATE -> 0 pulse until cycle %lld\n", cycle() + TW_SECLATE / ALTO2_UCYCLE));
|
||||
LOG((this,LOG_DISK,6," SECLATE -> 0 pulse until cycle %lld\n", cycle() + TW_SECLATE / ALTO2_UCYCLE));
|
||||
}
|
||||
}
|
||||
|
||||
@ -752,17 +752,17 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
#if ALTO2_DEBUG
|
||||
if (0 == m_dsk.egate || 0 == m_dsk.wrgate || 0 == m_dsk.rdgate) {
|
||||
// log the reason why gates are deasserted
|
||||
LOG((LOG_DISK,6," deassert gates because of"));
|
||||
LOG((this,LOG_DISK,6," deassert gates because of"));
|
||||
if (m_task_wakeup & (1 << task_ksec)) {
|
||||
LOG((LOG_DISK,6," KSECWAKE"));
|
||||
LOG((this,LOG_DISK,6," KSECWAKE"));
|
||||
}
|
||||
if (GET_KCOM_XFEROFF(m_dsk.kcom)) {
|
||||
LOG((LOG_DISK,6," XFEROFF"));
|
||||
LOG((this,LOG_DISK,6," XFEROFF"));
|
||||
}
|
||||
if (m_dsk.kfer) {
|
||||
LOG((LOG_DISK,6," KFER"));
|
||||
LOG((this,LOG_DISK,6," KFER"));
|
||||
}
|
||||
LOG((LOG_DISK,6,"\n"));
|
||||
LOG((this,LOG_DISK,6,"\n"));
|
||||
}
|
||||
#endif
|
||||
// sector task is active OR xferoff is set OR fatal error
|
||||
@ -776,14 +776,14 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
if (m_dsk.ok_to_run) {
|
||||
#if ALTO2_DEBUG
|
||||
if (1 == m_dsk.egate || 1 == m_dsk.wrgate) {
|
||||
LOG((LOG_DISK,6," assert "));
|
||||
LOG((this,LOG_DISK,6," assert "));
|
||||
if (m_dsk.egate) {
|
||||
LOG((LOG_DISK,6," EGATE"));
|
||||
LOG((this,LOG_DISK,6," EGATE"));
|
||||
}
|
||||
if (m_dsk.wrgate) {
|
||||
LOG((LOG_DISK,6," WRGATE"));
|
||||
LOG((this,LOG_DISK,6," WRGATE"));
|
||||
}
|
||||
LOG((LOG_DISK,6,"\n"));
|
||||
LOG((this,LOG_DISK,6,"\n"));
|
||||
}
|
||||
#endif
|
||||
// assert erase and write gates
|
||||
@ -794,7 +794,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
} else {
|
||||
#if ALTO2_DEBUG
|
||||
if (1 == m_dsk.rdgate) {
|
||||
LOG((LOG_DISK,6," assert RDGATE\n"));
|
||||
LOG((this,LOG_DISK,6," assert RDGATE\n"));
|
||||
}
|
||||
#endif
|
||||
// assert read gate
|
||||
@ -817,7 +817,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
|
||||
void alto2_cpu_device::disk_seclate(void* ptr, INT32 arg)
|
||||
{
|
||||
(void)ptr;
|
||||
LOG((LOG_DISK,2," SECLATE -> %d\n", arg));
|
||||
LOG((this,LOG_DISK,2," SECLATE -> %d\n", arg));
|
||||
m_dsk.seclate = arg;
|
||||
m_dsk.seclate_timer->enable(false);
|
||||
}
|
||||
@ -830,7 +830,7 @@ void alto2_cpu_device::disk_seclate(void* ptr, INT32 arg)
|
||||
void alto2_cpu_device::disk_ok_to_run(void* ptr, INT32 arg)
|
||||
{
|
||||
(void)ptr;
|
||||
LOG((LOG_DISK,2," OK TO RUN -> %d\n", arg));
|
||||
LOG((this,LOG_DISK,2," OK TO RUN -> %d\n", arg));
|
||||
m_dsk.ok_to_run = arg;
|
||||
m_dsk.ok_to_run_timer->enable(false);
|
||||
}
|
||||
@ -863,7 +863,7 @@ void alto2_cpu_device::disk_strobon(void* ptr, INT32 arg)
|
||||
int cylinder = arg / 4;
|
||||
|
||||
diablo_hd_device* dhd = m_drive[unit];
|
||||
LOG((LOG_DISK,2," STROBE #%d restore:%d cylinder:%d dhd:%p\n", unit, restore, cylinder, dhd));
|
||||
LOG((this,LOG_DISK,2," STROBE #%d restore:%d cylinder:%d dhd:%p\n", unit, restore, cylinder, dhd));
|
||||
|
||||
dhd->set_cylinder(cylinder);
|
||||
dhd->set_restore(restore);
|
||||
@ -873,7 +873,7 @@ void alto2_cpu_device::disk_strobon(void* ptr, INT32 arg)
|
||||
dhd->set_strobe(strobe); // pulse the strobe signal to the unit
|
||||
|
||||
int lai = dhd->get_log_addx_interlock_0();
|
||||
LOG((LOG_DISK,6," LAI':%d\n", lai));
|
||||
LOG((this,LOG_DISK,6," LAI':%d\n", lai));
|
||||
/**
|
||||
* JK flip-flop 44a (LAI' clocked)
|
||||
* <PRE>
|
||||
@ -903,16 +903,16 @@ void alto2_cpu_device::disk_strobon(void* ptr, INT32 arg)
|
||||
|
||||
} else {
|
||||
/* clear the monoflop 52b, i.e. no timer restart */
|
||||
LOG((LOG_DISK,2," STROBON:%d\n", m_dsk.strobe));
|
||||
LOG((this,LOG_DISK,2," STROBON:%d\n", m_dsk.strobe));
|
||||
/* update the seekok status: SKINC' && LAI' && Q' of FF 44a */
|
||||
int seekok = dhd->get_seek_incomplete_0();
|
||||
if (seekok != m_dsk.seekok) {
|
||||
m_dsk.seekok = seekok;
|
||||
LOG((LOG_DISK,2," SEEKOK:%d\n", m_dsk.seekok));
|
||||
LOG((this,LOG_DISK,2," SEEKOK:%d\n", m_dsk.seekok));
|
||||
}
|
||||
}
|
||||
|
||||
LOG((LOG_DISK,2," current cylinder:%d\n", dhd->get_cylinder()));
|
||||
LOG((this,LOG_DISK,2," current cylinder:%d\n", dhd->get_cylinder()));
|
||||
|
||||
/* if the strobe is still set, restart the timer */
|
||||
if (m_dsk.strobe) {
|
||||
@ -930,7 +930,7 @@ void alto2_cpu_device::disk_ready_mf31a(void* ptr, INT32 arg)
|
||||
diablo_hd_device* dhd = m_drive[m_dsk.drive];
|
||||
m_dsk.ready_mf31a = arg & dhd->get_ready_0();
|
||||
/* log the not ready result with level 0, else 2 */
|
||||
LOG((LOG_DISK,m_dsk.ready_mf31a ? 0 : 2," mf31a:%d %sready\n", m_dsk.ready_mf31a, m_dsk.ready_mf31a ? "not " : ""));
|
||||
LOG((this,LOG_DISK,m_dsk.ready_mf31a ? 0 : 2," mf31a:%d %sready\n", m_dsk.ready_mf31a, m_dsk.ready_mf31a ? "not " : ""));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -982,16 +982,16 @@ void alto2_cpu_device::bs_early_read_kstat()
|
||||
|
||||
r = m_dsk.kstat;
|
||||
|
||||
LOG((LOG_DISK,1," <-KSTAT; BUS &= %#o\n", r));
|
||||
LOG((LOG_DISK,2," SECTOR : %#o\n", GET_KSTAT_SECTOR(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," DONE : %#o\n", GET_KSTAT_DONE(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," SEEKFAIL : %d\n", GET_KSTAT_SEEKFAIL(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," SEEK : %d\n", GET_KSTAT_SEEK(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," NOTRDY : %d\n", GET_KSTAT_NOTRDY(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," DATALATE : %d\n", GET_KSTAT_DATALATE(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," IDLE : %d\n", GET_KSTAT_IDLE(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," CKSUM : %d\n", GET_KSTAT_CKSUM(m_dsk.kstat)));
|
||||
LOG((LOG_DISK,2," COMPLETION : %#o\n", GET_KSTAT_COMPLETION(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,1," <-KSTAT; BUS &= %#o\n", r));
|
||||
LOG((this,LOG_DISK,2," SECTOR : %#o\n", GET_KSTAT_SECTOR(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," DONE : %#o\n", GET_KSTAT_DONE(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," SEEKFAIL : %d\n", GET_KSTAT_SEEKFAIL(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," SEEK : %d\n", GET_KSTAT_SEEK(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," NOTRDY : %d\n", GET_KSTAT_NOTRDY(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," DATALATE : %d\n", GET_KSTAT_DATALATE(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," IDLE : %d\n", GET_KSTAT_IDLE(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," CKSUM : %d\n", GET_KSTAT_CKSUM(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,2," COMPLETION : %#o\n", GET_KSTAT_COMPLETION(m_dsk.kstat)));
|
||||
|
||||
m_bus &= r;
|
||||
}
|
||||
@ -1009,7 +1009,7 @@ void alto2_cpu_device::bs_early_read_kdata()
|
||||
UINT16 r;
|
||||
/* get the current word from the drive */
|
||||
r = m_dsk.datain;
|
||||
LOG((LOG_DISK,1," <-KDATA (%#o)\n", r));
|
||||
LOG((this,LOG_DISK,1," <-KDATA (%#o)\n", r));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -1023,7 +1023,7 @@ void alto2_cpu_device::bs_early_read_kdata()
|
||||
void alto2_cpu_device::f1_late_strobe()
|
||||
{
|
||||
if (GET_KCOM_SENDADR(m_dsk.kcom)) {
|
||||
LOG((LOG_DISK,1," STROBE (SENDADR:1)\n"));
|
||||
LOG((this,LOG_DISK,1," STROBE (SENDADR:1)\n"));
|
||||
/* Set the STROBON flag and start the STROBON monoflop */
|
||||
m_dsk.strobe = 1;
|
||||
disk_strobon(0,
|
||||
@ -1031,7 +1031,7 @@ void alto2_cpu_device::f1_late_strobe()
|
||||
2 * GET_KADDR_RESTORE(m_dsk.kaddr) +
|
||||
m_dsk.drive);
|
||||
} else {
|
||||
LOG((LOG_DISK,1," STROBE (w/o SENDADR)\n"));
|
||||
LOG((this,LOG_DISK,1," STROBE (w/o SENDADR)\n"));
|
||||
/* FIXME: what to do if SENDADR isn't set? */
|
||||
}
|
||||
}
|
||||
@ -1046,10 +1046,10 @@ void alto2_cpu_device::f1_late_strobe()
|
||||
*/
|
||||
void alto2_cpu_device::f1_late_load_kstat()
|
||||
{
|
||||
LOG((LOG_DISK,1," KSTAT<-; BUS[12-15] %#o\n", m_bus));
|
||||
LOG((LOG_DISK,2," IDLE : %d\n", GET_KSTAT_IDLE(m_bus)));
|
||||
LOG((LOG_DISK,2," CKSUM : %d\n", GET_KSTAT_CKSUM(m_bus)));
|
||||
LOG((LOG_DISK,2," COMPLETION : %#o\n", GET_KSTAT_COMPLETION(m_bus)));
|
||||
LOG((this,LOG_DISK,1," KSTAT<-; BUS[12-15] %#o\n", m_bus));
|
||||
LOG((this,LOG_DISK,2," IDLE : %d\n", GET_KSTAT_IDLE(m_bus)));
|
||||
LOG((this,LOG_DISK,2," CKSUM : %d\n", GET_KSTAT_CKSUM(m_bus)));
|
||||
LOG((this,LOG_DISK,2," COMPLETION : %#o\n", GET_KSTAT_COMPLETION(m_bus)));
|
||||
|
||||
/* KSTAT[12] is just taken from BUS[12] */
|
||||
PUT_KSTAT_IDLE(m_dsk.kstat, GET_KSTAT_IDLE(m_bus));
|
||||
@ -1096,7 +1096,7 @@ void alto2_cpu_device::f1_late_load_kdata()
|
||||
PUT_KADDR_DRIVE(m_dsk.kaddr, GET_KADDR_DRIVE(m_bus));
|
||||
m_dsk.drive = GET_KADDR_DRIVE(m_dsk.kaddr);
|
||||
|
||||
LOG((LOG_DISK,1," KDATA<-; BUS (%#o) (drive:%d restore:%d %d/%d/%02d)\n",
|
||||
LOG((this,LOG_DISK,1," KDATA<-; BUS (%#o) (drive:%d restore:%d %d/%d/%02d)\n",
|
||||
m_bus,
|
||||
GET_KADDR_DRIVE(m_dsk.kaddr),
|
||||
GET_KADDR_RESTORE(m_dsk.kaddr),
|
||||
@ -1121,7 +1121,7 @@ void alto2_cpu_device::f1_late_load_kdata()
|
||||
}
|
||||
#endif
|
||||
} else {
|
||||
LOG((LOG_DISK,1," KDATA<-; BUS %#o (%#x)\n", m_bus, m_bus));
|
||||
LOG((this,LOG_DISK,1," KDATA<-; BUS %#o (%#x)\n", m_bus, m_bus));
|
||||
}
|
||||
}
|
||||
|
||||
@ -1163,22 +1163,22 @@ void alto2_cpu_device::f1_late_increcno()
|
||||
case RECNO_HEADER:
|
||||
m_dsk.krecno = RECNO_LABEL;
|
||||
m_dsk.krwc = GET_KADR_LABEL(m_dsk.kadr);
|
||||
LOG((LOG_DISK,2," INCRECNO; HEADER -> LABEL (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
LOG((this,LOG_DISK,2," INCRECNO; HEADER -> LABEL (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
break;
|
||||
case RECNO_NOTHING:
|
||||
m_dsk.krecno = RECNO_HEADER;
|
||||
m_dsk.krwc = GET_KADR_HEADER(m_dsk.kadr);
|
||||
LOG((LOG_DISK,2," INCRECNO; NOTHING -> HEADER (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
LOG((this,LOG_DISK,2," INCRECNO; NOTHING -> HEADER (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
break;
|
||||
case RECNO_LABEL:
|
||||
m_dsk.krecno = RECNO_DATA;
|
||||
m_dsk.krwc = GET_KADR_DATA(m_dsk.kadr);
|
||||
LOG((LOG_DISK,2," INCRECNO; LABEL -> DATA (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
LOG((this,LOG_DISK,2," INCRECNO; LABEL -> DATA (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
break;
|
||||
case RECNO_DATA:
|
||||
m_dsk.krecno = RECNO_NOTHING;
|
||||
m_dsk.krwc = 0; /* read (?) */
|
||||
LOG((LOG_DISK,2," INCRECNO; DATA -> NOTHING (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
LOG((this,LOG_DISK,2," INCRECNO; DATA -> NOTHING (%o, rwc:%o)\n", m_dsk.krecno, m_dsk.krwc));
|
||||
break;
|
||||
}
|
||||
// TODO: show disk indicator
|
||||
@ -1274,7 +1274,7 @@ void alto2_cpu_device::f1_late_clrstat()
|
||||
/* start monoflop 31a, which resets ready_mf31a */
|
||||
m_dsk.ready_timer->adjust(attotime::from_nsec(TW_READY), 1);
|
||||
|
||||
LOG((LOG_DISK,1," CLRSTAT (44a:%d 44b:%d 45a:%d 45b:%d 31a:%d)\n",
|
||||
LOG((this,LOG_DISK,1," CLRSTAT (44a:%d 44b:%d 45a:%d 45b:%d 31a:%d)\n",
|
||||
m_dsk.ff_44a & JKFF_Q ? 1 : 0, m_dsk.ff_44b & JKFF_Q ? 1 : 0,
|
||||
m_dsk.ff_45a & JKFF_Q ? 1 : 0, m_dsk.ff_45b & JKFF_Q ? 1 : 0,
|
||||
m_dsk.ready_mf31a));
|
||||
@ -1299,12 +1299,12 @@ void alto2_cpu_device::f1_late_load_kcom()
|
||||
{
|
||||
UINT16 change = m_dsk.kcom ^ m_bus;
|
||||
m_dsk.kcom = m_bus;
|
||||
LOG((LOG_DISK,2," KCOM<-; BUS %06o\n", m_dsk.kcom));
|
||||
LOG((LOG_DISK,2," XFEROFF : %d\n", GET_KCOM_XFEROFF(m_dsk.kcom)));
|
||||
LOG((LOG_DISK,2," WDINHIB : %d\n", GET_KCOM_WDINHIB(m_dsk.kcom)));
|
||||
LOG((LOG_DISK,2," BCLKSRC : %d\n", GET_KCOM_BCLKSRC(m_dsk.kcom)));
|
||||
LOG((LOG_DISK,2," WFFO : %d\n", GET_KCOM_WFFO(m_dsk.kcom)));
|
||||
LOG((LOG_DISK,2," SENDADR : %d\n", GET_KCOM_SENDADR(m_dsk.kcom)));
|
||||
LOG((this,LOG_DISK,2," KCOM<-; BUS %06o\n", m_dsk.kcom));
|
||||
LOG((this,LOG_DISK,2," XFEROFF : %d\n", GET_KCOM_XFEROFF(m_dsk.kcom)));
|
||||
LOG((this,LOG_DISK,2," WDINHIB : %d\n", GET_KCOM_WDINHIB(m_dsk.kcom)));
|
||||
LOG((this,LOG_DISK,2," BCLKSRC : %d\n", GET_KCOM_BCLKSRC(m_dsk.kcom)));
|
||||
LOG((this,LOG_DISK,2," WFFO : %d\n", GET_KCOM_WFFO(m_dsk.kcom)));
|
||||
LOG((this,LOG_DISK,2," SENDADR : %d\n", GET_KCOM_SENDADR(m_dsk.kcom)));
|
||||
if (GET_KCOM_WDINHIB(change)) {
|
||||
// WDALLOW going 0: should asynchronously reset 43a and 53a and set 53b
|
||||
if (m_task == task_kwd) {
|
||||
@ -1407,13 +1407,13 @@ void alto2_cpu_device::f1_late_load_kadr()
|
||||
// current read/write/check is that for the header
|
||||
m_dsk.krwc = GET_KADR_HEADER(m_dsk.kadr);
|
||||
|
||||
LOG((LOG_DISK,1," KADR<-; BUS[8-14] #%o\n", m_dsk.kadr));
|
||||
LOG((LOG_DISK,2," SEAL : %d\n", GET_KADR_SEAL(m_dsk.kadr)));
|
||||
LOG((LOG_DISK,2," HEADER : %s (%#o)\n", rwc_name[GET_KADR_HEADER(m_dsk.kadr)], GET_KADR_HEADER(m_dsk.kadr)));
|
||||
LOG((LOG_DISK,2," LABEL : %s (%#o)\n", rwc_name[GET_KADR_LABEL(m_dsk.kadr)], GET_KADR_LABEL(m_dsk.kadr)));
|
||||
LOG((LOG_DISK,2," DATA : %s (%#o)\n", rwc_name[GET_KADR_DATA(m_dsk.kadr)], GET_KADR_DATA(m_dsk.kadr)));
|
||||
LOG((LOG_DISK,2," NOXFER : %d\n", GET_KADR_NOXFER(m_dsk.kadr)));
|
||||
LOG((LOG_DISK,2," unused : %d (drive?)\n", GET_KADR_UNUSED(m_dsk.kadr)));
|
||||
LOG((this,LOG_DISK,1," KADR<-; BUS[8-14] #%o\n", m_dsk.kadr));
|
||||
LOG((this,LOG_DISK,2," SEAL : %d\n", GET_KADR_SEAL(m_dsk.kadr)));
|
||||
LOG((this,LOG_DISK,2," HEADER : %s (%#o)\n", rwc_name[GET_KADR_HEADER(m_dsk.kadr)], GET_KADR_HEADER(m_dsk.kadr)));
|
||||
LOG((this,LOG_DISK,2," LABEL : %s (%#o)\n", rwc_name[GET_KADR_LABEL(m_dsk.kadr)], GET_KADR_LABEL(m_dsk.kadr)));
|
||||
LOG((this,LOG_DISK,2," DATA : %s (%#o)\n", rwc_name[GET_KADR_DATA(m_dsk.kadr)], GET_KADR_DATA(m_dsk.kadr)));
|
||||
LOG((this,LOG_DISK,2," NOXFER : %d\n", GET_KADR_NOXFER(m_dsk.kadr)));
|
||||
LOG((this,LOG_DISK,2," unused : %d (drive?)\n", GET_KADR_UNUSED(m_dsk.kadr)));
|
||||
// TODO: show disk indicator in the GUI?
|
||||
}
|
||||
|
||||
@ -1426,7 +1426,7 @@ void alto2_cpu_device::f2_late_init()
|
||||
{
|
||||
// INIT = current task == KWD and WDINIT
|
||||
UINT16 r = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
|
||||
LOG((LOG_DISK,1," INIT; %sbranch (%#o | %#o)\n", r ? "" : "no ", m_next2, r));
|
||||
LOG((this,LOG_DISK,1," INIT; %sbranch (%#o | %#o)\n", r ? "" : "no ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
m_dsk.wdinit0 = 0;
|
||||
}
|
||||
@ -1471,22 +1471,22 @@ void alto2_cpu_device::f2_late_rwc()
|
||||
|
||||
switch (m_dsk.krecno) {
|
||||
case RECNO_HEADER:
|
||||
LOG((LOG_DISK,1," RWC; %sbranch header(%d):%s (%#o|%#o|%#o)\n",
|
||||
LOG((this,LOG_DISK,1," RWC; %sbranch header(%d):%s (%#o|%#o|%#o)\n",
|
||||
(r | init) ? "" : "no ", m_dsk.krecno,
|
||||
rwc_name[m_dsk.krwc], m_next2, r, init));
|
||||
break;
|
||||
case RECNO_NOTHING:
|
||||
LOG((LOG_DISK,1," RWC; %sbranch pageno(%d):%s (%#o|%#o|%#o)\n",
|
||||
LOG((this,LOG_DISK,1," RWC; %sbranch pageno(%d):%s (%#o|%#o|%#o)\n",
|
||||
(r | init) ? "" : "no ", m_dsk.krecno,
|
||||
rwc_name[m_dsk.krwc], m_next2, r, init));
|
||||
break;
|
||||
case RECNO_LABEL:
|
||||
LOG((LOG_DISK,1," RWC; %sbranch label(%d):%s (%#o|%#o|%#o)\n",
|
||||
LOG((this,LOG_DISK,1," RWC; %sbranch label(%d):%s (%#o|%#o|%#o)\n",
|
||||
(r | init) ? "" : "no ", m_dsk.krecno,
|
||||
rwc_name[m_dsk.krwc], m_next2, r, init));
|
||||
break;
|
||||
case RECNO_DATA:
|
||||
LOG((LOG_DISK,1," RWC; %sbranch data(%d):%s (%#o|%#o|%#o)\n",
|
||||
LOG((this,LOG_DISK,1," RWC; %sbranch data(%d):%s (%#o|%#o|%#o)\n",
|
||||
(r | init) ? "" : "no ", m_dsk.krecno,
|
||||
rwc_name[m_dsk.krwc], m_next2, r, init));
|
||||
break;
|
||||
@ -1510,7 +1510,7 @@ void alto2_cpu_device::f2_late_recno()
|
||||
{
|
||||
UINT16 r = m_dsk.krecno;
|
||||
UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
|
||||
LOG((LOG_DISK,1," RECNO; %sbranch recno:%d (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_dsk.krecno, m_next2, r, init));
|
||||
LOG((this,LOG_DISK,1," RECNO; %sbranch recno:%d (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_dsk.krecno, m_next2, r, init));
|
||||
m_next2 |= r | init;
|
||||
m_dsk.wdinit0 = 0;
|
||||
}
|
||||
@ -1524,7 +1524,7 @@ void alto2_cpu_device::f2_late_xfrdat()
|
||||
{
|
||||
UINT16 r = GET_KADR_NOXFER(m_dsk.kadr) ? 0 : 1;
|
||||
UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
|
||||
LOG((LOG_DISK,1," XFRDAT; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
LOG((this,LOG_DISK,1," XFRDAT; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
m_next2 |= r | init;
|
||||
m_dsk.wdinit0 = 0;
|
||||
}
|
||||
@ -1540,7 +1540,7 @@ void alto2_cpu_device::f2_late_swrnrdy()
|
||||
UINT16 r = dhd->get_seek_read_write_0();
|
||||
UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
|
||||
|
||||
LOG((LOG_DISK,1," SWRNRDY; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
LOG((this,LOG_DISK,1," SWRNRDY; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
m_next2 |= r | init;
|
||||
m_dsk.wdinit0 = 0;
|
||||
}
|
||||
@ -1555,7 +1555,7 @@ void alto2_cpu_device::f2_late_nfer()
|
||||
UINT16 r = m_dsk.kfer ? 0 : 1;
|
||||
UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
|
||||
|
||||
LOG((LOG_DISK,1," NFER; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
LOG((this,LOG_DISK,1," NFER; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
m_next2 |= r | init;
|
||||
m_dsk.wdinit0 = 0;
|
||||
}
|
||||
@ -1584,7 +1584,7 @@ void alto2_cpu_device::f2_late_strobon()
|
||||
UINT16 r = m_dsk.strobe;
|
||||
UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
|
||||
|
||||
LOG((LOG_DISK,2," STROBON; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
LOG((this,LOG_DISK,2," STROBON; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
|
||||
m_next2 |= r | init;
|
||||
m_dsk.wdinit0 = 0;
|
||||
}
|
||||
@ -1620,7 +1620,7 @@ void alto2_cpu_device::disk_bitclk(void* ptr, INT32 arg)
|
||||
} else {
|
||||
bit = (m_dsk.shiftout >> 15) & 1;
|
||||
kwd_timing(clk, bit, 0);
|
||||
LOG((LOG_DISK,8," BITCLK#%d bit:%d (write) @%lldns\n", arg, bit, ntime()));
|
||||
LOG((this,LOG_DISK,8," BITCLK#%d bit:%d (write) @%lldns\n", arg, bit, ntime()));
|
||||
if (clk)
|
||||
dhd->wr_data(arg, bit);
|
||||
else
|
||||
@ -1629,7 +1629,7 @@ void alto2_cpu_device::disk_bitclk(void* ptr, INT32 arg)
|
||||
} else if (GET_KCOM_BCLKSRC(m_dsk.kcom)) {
|
||||
/* always select the crystal clock */
|
||||
bit = dhd->rd_data(arg);
|
||||
LOG((LOG_DISK,8," BITCLK#%d bit:%d (read, crystal) @%lldns\n", arg, bit, ntime()));
|
||||
LOG((this,LOG_DISK,8," BITCLK#%d bit:%d (read, crystal) @%lldns\n", arg, bit, ntime()));
|
||||
kwd_timing(clk, bit, 0);
|
||||
} else {
|
||||
/* if XFEROFF is set, keep the bit at 1 (RDGATE' is high) */
|
||||
@ -1638,7 +1638,7 @@ void alto2_cpu_device::disk_bitclk(void* ptr, INT32 arg)
|
||||
} else {
|
||||
clk = dhd->rd_clock(arg);
|
||||
bit = dhd->rd_data(arg);
|
||||
LOG((LOG_DISK,8," BITCLK#%d bit:%d (read, driveclk) @%lldns\n", arg, bit, ntime()));
|
||||
LOG((this,LOG_DISK,8," BITCLK#%d bit:%d (read, driveclk) @%lldns\n", arg, bit, ntime()));
|
||||
}
|
||||
kwd_timing(clk, bit, 0);
|
||||
}
|
||||
@ -1669,15 +1669,15 @@ void alto2_cpu_device::disk_bitclk(void* ptr, INT32 arg)
|
||||
void alto2_cpu_device::next_sector(int unit)
|
||||
{
|
||||
diablo_hd_device* dhd = m_drive[unit];
|
||||
LOG((LOG_DISK,0,"%s dhd=%p\n", __FUNCTION__, dhd));
|
||||
LOG((this,LOG_DISK,0,"%s dhd=%p\n", __FUNCTION__, dhd));
|
||||
// get bit time in pico seconds
|
||||
m_dsk.bitclk_time[unit] = static_cast<int>(dhd->bit_time().as_attoseconds() / 1000000);
|
||||
#if USE_BITCLK_TIMER
|
||||
LOG((LOG_DISK,0," unit #%d stop bitclk\n", unit));
|
||||
LOG((this,LOG_DISK,0," unit #%d stop bitclk\n", unit));
|
||||
m_dsk.bitclk_timer->enable(false);
|
||||
#else
|
||||
if (m_bitclk_time >= 0) {
|
||||
LOG((LOG_DISK,0," unit #%d stop bitclk\n", unit));
|
||||
LOG((this,LOG_DISK,0," unit #%d stop bitclk\n", unit));
|
||||
m_bitclk_time = -1;
|
||||
m_bitclk_index = -1;
|
||||
}
|
||||
@ -1690,7 +1690,7 @@ void alto2_cpu_device::next_sector(int unit)
|
||||
m_dsk.shiftin = 0;
|
||||
m_dsk.shiftout = 0;
|
||||
|
||||
LOG((LOG_DISK,1," unit #%d sector %d start\n", unit, GET_KSTAT_SECTOR(m_dsk.kstat)));
|
||||
LOG((this,LOG_DISK,1," unit #%d sector %d start\n", unit, GET_KSTAT_SECTOR(m_dsk.kstat)));
|
||||
|
||||
#if USE_BITCLK_TIMER
|
||||
// HACK: no command, no bit clock
|
||||
|
@ -291,13 +291,13 @@ void alto2_cpu_device::unload_word()
|
||||
UINT8 a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
|
||||
if (FIFO_MBEMPTY(a38))
|
||||
{
|
||||
LOG((LOG_DISPL,1, " DSP FIFO underrun y:%d x:%d\n", y, x));
|
||||
LOG((this,LOG_DISPL,1, " DSP FIFO underrun y:%d x:%d\n", y, x));
|
||||
}
|
||||
else
|
||||
{
|
||||
word ^= m_dsp.fifo[m_dsp.ra];
|
||||
m_dsp.ra = (m_dsp.ra + 1) % ALTO2_DISPLAY_FIFO;
|
||||
LOG((LOG_DISPL,3, " DSP pull %04x from FIFO[%02o] y:%d x:%d\n",
|
||||
LOG((this,LOG_DISPL,3, " DSP pull %04x from FIFO[%02o] y:%d x:%d\n",
|
||||
word, (m_dsp.ra - 1) & (ALTO2_DISPLAY_FIFO - 1), y, x));
|
||||
}
|
||||
|
||||
@ -334,10 +334,10 @@ void alto2_cpu_device::unload_word()
|
||||
*/
|
||||
void alto2_cpu_device::display_state_machine()
|
||||
{
|
||||
LOG((LOG_DISPL,5,"DSP%03o:", m_dsp.state));
|
||||
LOG((this,LOG_DISPL,5,"DSP%03o:", m_dsp.state));
|
||||
if (020 == m_dsp.state)
|
||||
{
|
||||
LOG((LOG_DISPL,2," HLC=%d", m_dsp.hlc));
|
||||
LOG((this,LOG_DISPL,2," HLC=%d", m_dsp.hlc));
|
||||
}
|
||||
|
||||
UINT8 a63 = m_disp_a63[m_dsp.state];
|
||||
@ -361,14 +361,14 @@ void alto2_cpu_device::display_state_machine()
|
||||
// Rising edge of VBLANK: remember HLC[1-10] where the VBLANK starts
|
||||
m_dsp.vblank = m_dsp.hlc & ~02000;
|
||||
|
||||
LOG((LOG_DISPL,1, " VBLANK"));
|
||||
LOG((this,LOG_DISPL,1, " VBLANK"));
|
||||
|
||||
// VSYNC is always within VBLANK, thus we handle it only here
|
||||
if (A66_VSYNC(a66))
|
||||
{
|
||||
if (!A66_VSYNC(m_dsp.a66))
|
||||
{
|
||||
LOG((LOG_DISPL,1, " VSYNC/ (wake DVT)"));
|
||||
LOG((this,LOG_DISPL,1, " VSYNC/ (wake DVT)"));
|
||||
/*
|
||||
* The display vertical task DVT is woken once per field
|
||||
* at the beginning of vertical retrace.
|
||||
@ -393,7 +393,7 @@ void alto2_cpu_device::display_state_machine()
|
||||
* the word task can be woken until the start of the
|
||||
* next field.
|
||||
*/
|
||||
LOG((LOG_DISPL,1, " VBLANKPULSE (wake DHT)"));
|
||||
LOG((this,LOG_DISPL,1, " VBLANKPULSE (wake DHT)"));
|
||||
m_dsp.dht_blocks = false;
|
||||
m_dsp.dwt_blocks = false;
|
||||
m_task_wakeup |= 1 << task_dht;
|
||||
@ -406,7 +406,7 @@ void alto2_cpu_device::display_state_machine()
|
||||
if (!A63_HBLANK(a63) && A63_HBLANK(m_dsp.a63))
|
||||
{
|
||||
// Falling edge of a63 HBLANK starts unloading of FIFO words
|
||||
LOG((LOG_DISPL,1, " HBLANK\\ UNLOAD"));
|
||||
LOG((this,LOG_DISPL,1, " HBLANK\\ UNLOAD"));
|
||||
m_unload_time = ALTO2_DISPLAY_BITTIME(m_dsp.halfclock ? 32 : 16);
|
||||
m_unload_word = 0;
|
||||
}
|
||||
@ -422,17 +422,17 @@ void alto2_cpu_device::display_state_machine()
|
||||
if (!m_dsp.dwt_blocks && !m_dsp.dht_blocks && !FIFO_STOPWAKE(a38))
|
||||
{
|
||||
m_task_wakeup |= 1 << task_dwt;
|
||||
LOG((LOG_DISPL,1, " (wake DWT)"));
|
||||
LOG((this,LOG_DISPL,1, " (wake DWT)"));
|
||||
}
|
||||
|
||||
// Stop waking up the DWT when SCANEND is active
|
||||
if (A63_SCANEND(a63))
|
||||
{
|
||||
m_task_wakeup &= ~(1 << task_dwt);
|
||||
LOG((LOG_DISPL,1, " SCANEND"));
|
||||
LOG((this,LOG_DISPL,1, " SCANEND"));
|
||||
}
|
||||
|
||||
LOG((LOG_DISPL,1, "%s", A63_HBLANK(a63) ? " HBLANK": ""));
|
||||
LOG((this,LOG_DISPL,1, "%s", A63_HBLANK(a63) ? " HBLANK": ""));
|
||||
|
||||
if (A63_HSYNC(a63))
|
||||
{
|
||||
@ -440,7 +440,7 @@ void alto2_cpu_device::display_state_machine()
|
||||
if (!A63_HSYNC(m_dsp.a63))
|
||||
{
|
||||
// Rising edge of HSYNC => CLRBUF
|
||||
LOG((LOG_DISPL,1, " HSYNC/ (CLRBUF)"));
|
||||
LOG((this,LOG_DISPL,1, " HSYNC/ (CLRBUF)"));
|
||||
/*
|
||||
* The hardware sets the buffer empty and clears the DWT block
|
||||
* flip-flop at the beginning of horizontal retrace for
|
||||
@ -457,7 +457,7 @@ void alto2_cpu_device::display_state_machine()
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG((LOG_DISPL,1, " HSYNC"));
|
||||
LOG((this,LOG_DISPL,1, " HSYNC"));
|
||||
}
|
||||
}
|
||||
else
|
||||
@ -475,7 +475,7 @@ void alto2_cpu_device::display_state_machine()
|
||||
m_task_wakeup |= 1 << task_curt;
|
||||
}
|
||||
|
||||
LOG((LOG_DISPL,1, " NEXT:%03o\n", next));
|
||||
LOG((this,LOG_DISPL,1, " NEXT:%03o\n", next));
|
||||
|
||||
m_dsp.a63 = a63;
|
||||
m_dsp.a66 = a66;
|
||||
@ -491,7 +491,7 @@ void alto2_cpu_device::display_state_machine()
|
||||
void alto2_cpu_device::f2_late_evenfield()
|
||||
{
|
||||
UINT16 r = HLC1024 ^ 1;
|
||||
LOG((LOG_DISPL,2," EVENFIELD branch (%#o | %#o)\n", m_next2, r));
|
||||
LOG((this,LOG_DISPL,2," EVENFIELD branch (%#o | %#o)\n", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
|
@ -13,7 +13,7 @@
|
||||
void alto2_cpu_device::f1_early_dvt_block()
|
||||
{
|
||||
// m_task_wakeup &= ~(1 << m_task);
|
||||
LOG((LOG_DVT,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_DVT,2," BLOCK %s\n", task_name(m_task)));
|
||||
}
|
||||
|
||||
|
||||
|
@ -19,7 +19,7 @@ void alto2_cpu_device::f1_early_dwt_block()
|
||||
|
||||
/* clear the wakeup for the display word task */
|
||||
m_task_wakeup &= ~(1 << m_task);
|
||||
LOG((LOG_DWT,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_DWT,2," BLOCK %s\n", task_name(m_task)));
|
||||
|
||||
/* wakeup the display horizontal task, if it didn't block itself */
|
||||
if (!m_dsp.dht_blocks)
|
||||
@ -31,13 +31,13 @@ void alto2_cpu_device::f1_early_dwt_block()
|
||||
*/
|
||||
void alto2_cpu_device::f2_late_dwt_load_ddr()
|
||||
{
|
||||
LOG((LOG_DWT,2," DDR<- BUS (%#o)\n", m_bus));
|
||||
LOG((this,LOG_DWT,2," DDR<- BUS (%#o)\n", m_bus));
|
||||
m_dsp.fifo[m_dsp.wa] = m_bus;
|
||||
m_dsp.wa = (m_dsp.wa + 1) % ALTO2_DISPLAY_FIFO;
|
||||
UINT8 a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
|
||||
if (FIFO_STOPWAKE(a38))
|
||||
m_task_wakeup &= ~(1 << task_dwt);
|
||||
LOG((LOG_DWT,2, " DWT push %04x into FIFO[%02o]%s\n",
|
||||
LOG((this,LOG_DWT,2, " DWT push %04x into FIFO[%02o]%s\n",
|
||||
m_bus, (m_dsp.wa - 1) & (ALTO2_DISPLAY_FIFO - 1),
|
||||
FIFO_STOPWAKE(a38) ? " STOPWAKE" : ""));
|
||||
}
|
||||
|
@ -251,7 +251,7 @@ void alto2_cpu_device::bs_early_emu_disp()
|
||||
if (IR_X(m_emu.ir)) {
|
||||
r = ((signed char)r) & 0177777;
|
||||
}
|
||||
LOG((LOG_EMU,2, " <-DISP (%06o)\n", r));
|
||||
LOG((this,LOG_EMU,2, " <-DISP (%06o)\n", r));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -264,7 +264,7 @@ void alto2_cpu_device::f1_early_emu_block()
|
||||
{
|
||||
#if 0
|
||||
CPU_CLR_TASK_WAKEUP(m_task);
|
||||
LOG((LOG_EMU,2, " BLOCK %02o:%s\n", m_task, task_name(m_task)));
|
||||
LOG((this,LOG_EMU,2, " BLOCK %02o:%s\n", m_task, task_name(m_task)));
|
||||
#elif 0
|
||||
fatal(1, "Emulator task want's to BLOCK.\n" \
|
||||
"%s-%04o: r:%02o af:%02o bs:%02o f1:%02o f2:%02o" \
|
||||
@ -283,7 +283,7 @@ void alto2_cpu_device::f1_early_emu_block()
|
||||
*/
|
||||
void alto2_cpu_device::f1_late_emu_load_rmr()
|
||||
{
|
||||
LOG((LOG_EMU,2," RMR<-; BUS (%#o)\n", m_bus));
|
||||
LOG((this,LOG_EMU,2," RMR<-; BUS (%#o)\n", m_bus));
|
||||
m_reset_mode = m_bus;
|
||||
}
|
||||
|
||||
@ -292,7 +292,7 @@ void alto2_cpu_device::f1_late_emu_load_rmr()
|
||||
*/
|
||||
void alto2_cpu_device::f1_late_emu_load_esrb()
|
||||
{
|
||||
LOG((LOG_EMU,2," ESRB<-; BUS[12-14] (%#o)\n", m_bus));
|
||||
LOG((this,LOG_EMU,2," ESRB<-; BUS[12-14] (%#o)\n", m_bus));
|
||||
m_s_reg_bank[m_task] = X_RDBITS(m_bus,16,12,14);
|
||||
}
|
||||
|
||||
@ -305,7 +305,7 @@ void alto2_cpu_device::f1_late_emu_load_esrb()
|
||||
void alto2_cpu_device::f1_early_rsnf()
|
||||
{
|
||||
UINT16 r = 0177400 | m_ether_id;
|
||||
LOG((LOG_EMU,2," <-RSNF; (%#o)\n", r));
|
||||
LOG((this,LOG_EMU,2," <-RSNF; (%#o)\n", r));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -338,13 +338,13 @@ void alto2_cpu_device::f1_early_rsnf()
|
||||
*/
|
||||
void alto2_cpu_device::f1_early_startf()
|
||||
{
|
||||
LOG((LOG_EMU,2," STARTF (BUS is %06o)\n", m_bus));
|
||||
LOG((this,LOG_EMU,2," STARTF (BUS is %06o)\n", m_bus));
|
||||
/* TODO: what do we do here? reset the CPU on bit 0? */
|
||||
if (X_BIT(m_bus,16,0)) {
|
||||
LOG((LOG_EMU,2,"**** Software boot feature\n"));
|
||||
LOG((this,LOG_EMU,2,"**** Software boot feature\n"));
|
||||
soft_reset();
|
||||
} else {
|
||||
LOG((LOG_EMU,2,"**** Ethernet start function\n"));
|
||||
LOG((this,LOG_EMU,2,"**** Ethernet start function\n"));
|
||||
eth_startf();
|
||||
}
|
||||
}
|
||||
@ -355,7 +355,7 @@ void alto2_cpu_device::f1_early_startf()
|
||||
void alto2_cpu_device::f2_late_busodd()
|
||||
{
|
||||
UINT16 r = m_bus & 1;
|
||||
LOG((LOG_EMU,2," BUSODD; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
LOG((this,LOG_EMU,2," BUSODD; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -369,12 +369,12 @@ void alto2_cpu_device::f2_late_magic()
|
||||
case f1_l_lsh_1: // <-L MLSH 1
|
||||
XC = (m_t >> 15) & 1;
|
||||
m_shifter = (m_l << 1) | XC;
|
||||
LOG((LOG_EMU,2," <-L MLSH 1 (shifer:%06o XC:%o)", m_shifter, XC));
|
||||
LOG((this,LOG_EMU,2," <-L MLSH 1 (shifer:%06o XC:%o)", m_shifter, XC));
|
||||
break;
|
||||
case f1_l_rsh_1: // <-L MRSH 1
|
||||
XC = (m_t & 1) << 15;
|
||||
m_shifter = (m_l >> 1) | XC;
|
||||
LOG((LOG_EMU,2," <-L MRSH 1 (shifter:%06o XC:%o)", m_shifter, XC));
|
||||
LOG((this,LOG_EMU,2," <-L MRSH 1 (shifter:%06o XC:%o)", m_shifter, XC));
|
||||
break;
|
||||
case f1_l_lcy_8: // <-L LCY 8
|
||||
m_shifter = (m_l >> 8) | (m_l << 8);
|
||||
@ -391,7 +391,7 @@ void alto2_cpu_device::f2_late_magic()
|
||||
void alto2_cpu_device::f2_early_load_dns()
|
||||
{
|
||||
X_WRBITS(m_rsel, 5, 3, 4, IR_DstAC(m_emu.ir) ^ 3);
|
||||
LOG((LOG_EMU,2," DNS<-; rsel := DstAC (%#o %s)\n", m_rsel, r_name(m_rsel)));
|
||||
LOG((this,LOG_EMU,2," DNS<-; rsel := DstAC (%#o %s)\n", m_rsel, r_name(m_rsel)));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -445,22 +445,22 @@ void alto2_cpu_device::f2_late_load_dns()
|
||||
case f1_l_rsh_1: // <-L RSH 1
|
||||
NEWCARRY = m_l & 1;
|
||||
m_shifter = ((m_l >> 1) | (XC << 15)) & 0177777;
|
||||
LOG((LOG_EMU,2," DNS; <-L RSH 1 (shifter:%06o XC:%o NEWCARRY:%o)", m_shifter, XC, NEWCARRY));
|
||||
LOG((this,LOG_EMU,2," DNS; <-L RSH 1 (shifter:%06o XC:%o NEWCARRY:%o)", m_shifter, XC, NEWCARRY));
|
||||
break;
|
||||
case f1_l_lsh_1: // <-L LSH 1
|
||||
NEWCARRY = (m_l >> 15) & 1;
|
||||
m_shifter = ((m_l << 1) | XC) & 0177777;
|
||||
LOG((LOG_EMU,2," DNS; <-L LSH 1 (shifter:%06o XC:%o NEWCARRY:%o)", m_shifter, XC, NEWCARRY));
|
||||
LOG((this,LOG_EMU,2," DNS; <-L LSH 1 (shifter:%06o XC:%o NEWCARRY:%o)", m_shifter, XC, NEWCARRY));
|
||||
break;
|
||||
case f1_l_lcy_8: // <-L LCY 8
|
||||
NEWCARRY = XC;
|
||||
m_shifter = (m_l >> 8) | (m_l << 8);
|
||||
LOG((LOG_EMU,2," DNS; (shifter:%06o NEWCARRY:%o)", m_shifter, NEWCARRY));
|
||||
LOG((this,LOG_EMU,2," DNS; (shifter:%06o NEWCARRY:%o)", m_shifter, NEWCARRY));
|
||||
break;
|
||||
default: // other
|
||||
NEWCARRY = XC;
|
||||
m_shifter = m_l;
|
||||
LOG((LOG_EMU,2," DNS; (shifter:%06o NEWCARRY:%o)", m_shifter, NEWCARRY));
|
||||
LOG((this,LOG_EMU,2," DNS; (shifter:%06o NEWCARRY:%o)", m_shifter, NEWCARRY));
|
||||
break;
|
||||
}
|
||||
SHZERO = (m_shifter == 0);
|
||||
@ -482,7 +482,7 @@ void alto2_cpu_device::f2_late_load_dns()
|
||||
void alto2_cpu_device::f2_early_acdest()
|
||||
{
|
||||
X_WRBITS(m_rsel, 5, 3, 4, IR_DstAC(m_emu.ir) ^ 3);
|
||||
LOG((LOG_EMU,2," ACDEST<-; mux (rsel:%#o %s)\n", m_rsel, r_name(m_rsel)));
|
||||
LOG((this,LOG_EMU,2," ACDEST<-; mux (rsel:%#o %s)\n", m_rsel, r_name(m_rsel)));
|
||||
}
|
||||
|
||||
#if ALTO2_DEBUG
|
||||
@ -493,35 +493,35 @@ void alto2_cpu_device::bitblt_info()
|
||||
int bbt = m_r[rsel_ac2];
|
||||
int val = debug_read_mem(bbt);
|
||||
|
||||
LOG((LOG_EMU,3," BITBLT AC1:%06o AC2:%06o\n", m_r[rsel_ac1], m_r[rsel_ac2]));
|
||||
LOG((LOG_EMU,3," function : %06o\n", val));
|
||||
LOG((LOG_EMU,3," src extRAM: %o\n", X_BIT(val,16,10)));
|
||||
LOG((LOG_EMU,3," dst extRAM: %o\n", X_BIT(val,16,11)));
|
||||
LOG((LOG_EMU,3," src type : %o (%s)\n", X_RDBITS(val,16,12,13), type_name[X_RDBITS(val,16,12,13)]));
|
||||
LOG((LOG_EMU,3," operation : %o (%s)\n", X_RDBITS(val,16,14,15), oper_name[X_RDBITS(val,16,14,15)]));
|
||||
LOG((this,LOG_EMU,3," BITBLT AC1:%06o AC2:%06o\n", m_r[rsel_ac1], m_r[rsel_ac2]));
|
||||
LOG((this,LOG_EMU,3," function : %06o\n", val));
|
||||
LOG((this,LOG_EMU,3," src extRAM: %o\n", X_BIT(val,16,10)));
|
||||
LOG((this,LOG_EMU,3," dst extRAM: %o\n", X_BIT(val,16,11)));
|
||||
LOG((this,LOG_EMU,3," src type : %o (%s)\n", X_RDBITS(val,16,12,13), type_name[X_RDBITS(val,16,12,13)]));
|
||||
LOG((this,LOG_EMU,3," operation : %o (%s)\n", X_RDBITS(val,16,14,15), oper_name[X_RDBITS(val,16,14,15)]));
|
||||
val = debug_read_mem(bbt+1);
|
||||
LOG((LOG_EMU,3," unused AC2: %06o (%d)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," unused AC2: %06o (%d)\n", val, val));
|
||||
val = debug_read_mem(bbt+2);
|
||||
LOG((LOG_EMU,3," DBCA : %06o (%d)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," DBCA : %06o (%d)\n", val, val));
|
||||
val = debug_read_mem(bbt+3);
|
||||
LOG((LOG_EMU,3," DBMR : %06o (%d words)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," DBMR : %06o (%d words)\n", val, val));
|
||||
val = debug_read_mem(bbt+4);
|
||||
LOG((LOG_EMU,3," DLX : %06o (%d bits)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," DLX : %06o (%d bits)\n", val, val));
|
||||
val = debug_read_mem(bbt+5);
|
||||
LOG((LOG_EMU,3," DTY : %06o (%d scanlines)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," DTY : %06o (%d scanlines)\n", val, val));
|
||||
val = debug_read_mem(bbt+6);
|
||||
LOG((LOG_EMU,3," DW : %06o (%d bits)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," DW : %06o (%d bits)\n", val, val));
|
||||
val = debug_read_mem(bbt+7);
|
||||
LOG((LOG_EMU,3," DH : %06o (%d scanlines)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," DH : %06o (%d scanlines)\n", val, val));
|
||||
val = debug_read_mem(bbt+8);
|
||||
LOG((LOG_EMU,3," SBCA : %06o (%d)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," SBCA : %06o (%d)\n", val, val));
|
||||
val = debug_read_mem(bbt+9);
|
||||
LOG((LOG_EMU,3," SBMR : %06o (%d words)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," SBMR : %06o (%d words)\n", val, val));
|
||||
val = debug_read_mem(bbt+10);
|
||||
LOG((LOG_EMU,3," SLX : %06o (%d bits)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," SLX : %06o (%d bits)\n", val, val));
|
||||
val = debug_read_mem(bbt+11);
|
||||
LOG((LOG_EMU,3," STY : %06o (%d scanlines)\n", val, val));
|
||||
LOG((LOG_EMU,3," GRAY0-3 : %06o %06o %06o %06o\n",
|
||||
LOG((this,LOG_EMU,3," STY : %06o (%d scanlines)\n", val, val));
|
||||
LOG((this,LOG_EMU,3," GRAY0-3 : %06o %06o %06o %06o\n",
|
||||
debug_read_mem(bbt+12), debug_read_mem(bbt+13),
|
||||
debug_read_mem(bbt+14), debug_read_mem(bbt+15)));
|
||||
}
|
||||
@ -540,31 +540,31 @@ void alto2_cpu_device::f2_late_load_ir()
|
||||
/* special logging of some opcodes */
|
||||
switch (m_bus) {
|
||||
case op_CYCLE:
|
||||
LOG((LOG_EMU,3," CYCLE AC0:#o\n", m_r[rsel_ac0]));
|
||||
LOG((this,LOG_EMU,3," CYCLE AC0:#o\n", m_r[rsel_ac0]));
|
||||
break;
|
||||
case op_CYCLE + 1: case op_CYCLE + 2: case op_CYCLE + 3: case op_CYCLE + 4:
|
||||
case op_CYCLE + 5: case op_CYCLE + 6: case op_CYCLE + 7: case op_CYCLE + 8:
|
||||
case op_CYCLE + 9: case op_CYCLE +10: case op_CYCLE +11: case op_CYCLE +12:
|
||||
case op_CYCLE +13: case op_CYCLE +14: case op_CYCLE +15:
|
||||
LOG((LOG_EMU,3," CYCLE %#o\n", m_bus - op_CYCLE));
|
||||
LOG((this,LOG_EMU,3," CYCLE %#o\n", m_bus - op_CYCLE));
|
||||
break;
|
||||
case op_BLT:
|
||||
LOG((LOG_EMU,3," BLT dst:%#o src:%#o size:%#o\n",
|
||||
LOG((this,LOG_EMU,3," BLT dst:%#o src:%#o size:%#o\n",
|
||||
(m_r[rsel_ac1] + m_r[rsel_ac3] + 1) & 0177777,
|
||||
(m_r[rsel_ac0] + 1) & 017777, -m_r[rsel_ac3] & 0177777));
|
||||
break;
|
||||
case op_BLKS:
|
||||
LOG((LOG_EMU,3," BLKS dst:%#o val:%#o size:%#o\n",
|
||||
LOG((this,LOG_EMU,3," BLKS dst:%#o val:%#o size:%#o\n",
|
||||
(m_r[rsel_ac1] + m_r[rsel_ac3] + 1) & 0177777,
|
||||
m_r[rsel_ac0], -m_r[rsel_ac3] & 0177777));
|
||||
break;
|
||||
case op_DIAGNOSE1:
|
||||
LOG((LOG_EMU,3," DIAGNOSE1 AC0:%06o AC1:%06o AC2:%06o AC3:%06o\n",
|
||||
LOG((this,LOG_EMU,3," DIAGNOSE1 AC0:%06o AC1:%06o AC2:%06o AC3:%06o\n",
|
||||
m_r[rsel_ac0], m_r[rsel_ac1],
|
||||
m_r[rsel_ac2], m_r[rsel_ac3]));
|
||||
break;
|
||||
case op_DIAGNOSE2:
|
||||
LOG((LOG_EMU,3," DIAGNOSE2 AC0:%06o AC1:%06o AC2:%06o AC3:%06o\n",
|
||||
LOG((this,LOG_EMU,3," DIAGNOSE2 AC0:%06o AC1:%06o AC2:%06o AC3:%06o\n",
|
||||
m_r[rsel_ac0], m_r[rsel_ac1],
|
||||
m_r[rsel_ac2], m_r[rsel_ac3]));
|
||||
break;
|
||||
@ -572,19 +572,19 @@ void alto2_cpu_device::f2_late_load_ir()
|
||||
bitblt_info();
|
||||
break;
|
||||
case op_RDRAM:
|
||||
LOG((LOG_EMU,3," RDRAM addr:%#o\n", m_r[rsel_ac1]));
|
||||
LOG((this,LOG_EMU,3," RDRAM addr:%#o\n", m_r[rsel_ac1]));
|
||||
break;
|
||||
case op_WRTRAM:
|
||||
LOG((LOG_EMU,3," WRTAM addr:%#o upper:%06o lower:%06o\n", m_r[rsel_ac1], m_r[rsel_ac0], m_r[rsel_ac3]));
|
||||
LOG((this,LOG_EMU,3," WRTAM addr:%#o upper:%06o lower:%06o\n", m_r[rsel_ac1], m_r[rsel_ac0], m_r[rsel_ac3]));
|
||||
break;
|
||||
case op_JMPRAM:
|
||||
LOG((LOG_EMU,3," JMPRAM addr:%#o\n", m_r[rsel_ac1]));
|
||||
LOG((this,LOG_EMU,3," JMPRAM addr:%#o\n", m_r[rsel_ac1]));
|
||||
break;
|
||||
case op_XMLDA:
|
||||
LOG((LOG_EMU,3," XMLDA AC0 = [bank:%o AC1:#o]\n", m_bank_reg[m_task] & 3, m_r[rsel_ac1]));
|
||||
LOG((this,LOG_EMU,3," XMLDA AC0 = [bank:%o AC1:#o]\n", m_bank_reg[m_task] & 3, m_r[rsel_ac1]));
|
||||
break;
|
||||
case op_XMSTA:
|
||||
LOG((LOG_EMU,3," XMSTA [bank:%o AC1:#o] = AC0 (%#o)\n", m_bank_reg[m_task] & 3, m_r[rsel_ac1], m_r[rsel_ac0]));
|
||||
LOG((this,LOG_EMU,3," XMSTA [bank:%o AC1:#o] = AC0 (%#o)\n", m_bank_reg[m_task] & 3, m_r[rsel_ac1], m_r[rsel_ac0]));
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
@ -604,12 +604,12 @@ void alto2_cpu_device::f2_late_idisp()
|
||||
if (IR_ARITH(m_emu.ir)) {
|
||||
/* 1xxxxxxxxxxxxxxx */
|
||||
r = IR_SH(m_emu.ir) ^ 3; /* complement of SH */
|
||||
LOG((LOG_EMU,2," IDISP<-; branch on SH^3 (%#o|%#o)\n", m_next2, r));
|
||||
LOG((this,LOG_EMU,2," IDISP<-; branch on SH^3 (%#o|%#o)\n", m_next2, r));
|
||||
} else {
|
||||
int addr = CTL2K_U3(f2_emu_idisp) + X_RDBITS(m_emu.ir,16,1,7);
|
||||
/* 0???????xxxxxxxx */
|
||||
r = m_ctl2k_u3[addr];
|
||||
LOG((LOG_EMU,2," IDISP<-; IR (%#o) branch on PROM ctl2k_u3[%03o] (%#o|%#o)\n", m_emu.ir, addr, m_next2, r));
|
||||
LOG((this,LOG_EMU,2," IDISP<-; IR (%#o) branch on PROM ctl2k_u3[%03o] (%#o|%#o)\n", m_emu.ir, addr, m_next2, r));
|
||||
}
|
||||
m_next2 |= r;
|
||||
}
|
||||
@ -620,7 +620,7 @@ void alto2_cpu_device::f2_late_idisp()
|
||||
void alto2_cpu_device::f2_early_acsource()
|
||||
{
|
||||
X_WRBITS(m_rsel, 5, 3, 4, IR_SrcAC(m_emu.ir) ^ 3);
|
||||
LOG((LOG_EMU,2," <-ACSOURCE; rsel := SrcAC (%#o %s)\n", m_rsel, r_name(m_rsel)));
|
||||
LOG((this,LOG_EMU,2," <-ACSOURCE; rsel := SrcAC (%#o %s)\n", m_rsel, r_name(m_rsel)));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -633,12 +633,12 @@ void alto2_cpu_device::f2_late_acsource()
|
||||
if (IR_ARITH(m_emu.ir)) {
|
||||
/* 1xxxxxxxxxxxxxxx */
|
||||
r = IR_SH(m_emu.ir) ^ 3; /* complement of SH */
|
||||
LOG((LOG_EMU,2," <-ACSOURCE; branch on SH^3 (%#o|%#o)\n", m_next2, r));
|
||||
LOG((this,LOG_EMU,2," <-ACSOURCE; branch on SH^3 (%#o|%#o)\n", m_next2, r));
|
||||
} else {
|
||||
int addr = CTL2K_U3(f2_emu_acsource) + X_RDBITS(m_emu.ir,16,1,7);
|
||||
/* 0???????xxxxxxxx */
|
||||
r = m_ctl2k_u3[addr];
|
||||
LOG((LOG_EMU,2," <-ACSOURCE; branch on PROM ctl2k_u3[%03o] (%#o|%#o)\n", addr, m_next2, r));
|
||||
LOG((this,LOG_EMU,2," <-ACSOURCE; branch on PROM ctl2k_u3[%03o] (%#o|%#o)\n", addr, m_next2, r));
|
||||
}
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
@ -207,35 +207,35 @@ static const UINT16 breath_of_life_data[BREATHLEN] =
|
||||
};
|
||||
|
||||
#if DEBUG_PACKETS
|
||||
static void dump_ascii(const UINT16 *src, size_t size)
|
||||
static void dump_ascii(device_t *device, const UINT16 *src, size_t size)
|
||||
{
|
||||
logerror(" [");
|
||||
device->logerror(" [");
|
||||
for (size_t offs = 0; offs < size; offs++) {
|
||||
char ch1 = src[offs] / 256;
|
||||
char ch2 = src[offs] % 256;
|
||||
logerror("%c", ch1 < 32 || ch1 > 126 ? '.' : ch1);
|
||||
logerror("%c", ch2 < 32 || ch2 > 126 ? '.' : ch2);
|
||||
device->logerror("%c", ch1 < 32 || ch1 > 126 ? '.' : ch1);
|
||||
device->logerror("%c", ch2 < 32 || ch2 > 126 ? '.' : ch2);
|
||||
}
|
||||
logerror("]\n");
|
||||
device->logerror("]\n");
|
||||
}
|
||||
|
||||
static void dump_packet(const char* name, const UINT16 *src, size_t addr, size_t size)
|
||||
static void dump_packet(device_t *device, const char* name, const UINT16 *src, size_t addr, size_t size)
|
||||
{
|
||||
size_t offs;
|
||||
for (offs = 0; offs < size; offs++) {
|
||||
UINT16 word = src[offs];
|
||||
if (offs % 8) {
|
||||
logerror(" %06o", word);
|
||||
device->logerror(" %06o", word);
|
||||
} else {
|
||||
if (offs > 0)
|
||||
dump_ascii(&src[offs-8], 8);
|
||||
logerror("%s\t%05o: %06o", name, static_cast<unsigned>(addr + offs), word);
|
||||
dump_ascii(device, &src[offs-8], 8);
|
||||
device->logerror("%s\t%05o: %06o", name, static_cast<unsigned>(addr + offs), word);
|
||||
}
|
||||
}
|
||||
if (offs % 8) {
|
||||
dump_ascii(&src[offs - (offs % 8)], offs % 8);
|
||||
dump_ascii(device, &src[offs - (offs % 8)], offs % 8);
|
||||
} else if (offs > 0) {
|
||||
dump_ascii(&src[offs - 8], 8);
|
||||
dump_ascii(device, &src[offs - 8], 8);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -246,7 +246,7 @@ static void dump_packet(const char* name, const UINT16 *src, size_t addr, size_t
|
||||
void alto2_cpu_device::eth_wakeup()
|
||||
{
|
||||
register int st = m_eth.status;
|
||||
LOG((LOG_ETH,0,"IBUSY=%d OBUSY=%d ", GET_ETH_IBUSY(st), GET_ETH_OBUSY(st)));
|
||||
LOG((this,LOG_ETH,0,"IBUSY=%d OBUSY=%d ", GET_ETH_IBUSY(st), GET_ETH_OBUSY(st)));
|
||||
UINT8 busy = GET_ETH_IBUSY(st) | GET_ETH_OBUSY(st);
|
||||
if (0 == busy) {
|
||||
// if not busy, reset the FIFO read and write counters
|
||||
@ -263,27 +263,27 @@ void alto2_cpu_device::eth_wakeup()
|
||||
* input gone
|
||||
*/
|
||||
if (GET_ETH_IDL(st)) {
|
||||
LOG((LOG_ETH,0,"POST (input data late)\n"));
|
||||
LOG((this,LOG_ETH,0,"POST (input data late)\n"));
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
return;
|
||||
}
|
||||
if (GET_ETH_OCMD(st)) {
|
||||
LOG((LOG_ETH,0,"POST (output command)\n"));
|
||||
LOG((this,LOG_ETH,0,"POST (output command)\n"));
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
return;
|
||||
}
|
||||
if (GET_ETH_ICMD(st)) {
|
||||
LOG((LOG_ETH,0,"POST (input command)\n"));
|
||||
LOG((this,LOG_ETH,0,"POST (input command)\n"));
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
return;
|
||||
}
|
||||
if (GET_ETH_OGONE(st)) {
|
||||
LOG((LOG_ETH,0,"POST (output gone)\n"));
|
||||
LOG((this,LOG_ETH,0,"POST (output gone)\n"));
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
return;
|
||||
}
|
||||
if (GET_ETH_IGONE(st)) {
|
||||
LOG((LOG_ETH,0,"POST (input gone)\n"));
|
||||
LOG((this,LOG_ETH,0,"POST (input gone)\n"));
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
return;
|
||||
}
|
||||
@ -319,7 +319,7 @@ void alto2_cpu_device::eth_wakeup()
|
||||
UINT8 IDR = ~(GET_ETH_IBUSY(st) & i2);
|
||||
if (0 == IDR) {
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
LOG((LOG_ETH,0,"IDR (input data ready)\n"));
|
||||
LOG((this,LOG_ETH,0,"IDR (input data ready)\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
@ -350,7 +350,7 @@ void alto2_cpu_device::eth_wakeup()
|
||||
UINT8 ODR = ~(GET_ETH_OBUSY(st) & ~GET_ETH_OEOT(st) & o1);
|
||||
if (0 == ODR) {
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
LOG((LOG_ETH,0,"ODR (output data ready)\n"));
|
||||
LOG((this,LOG_ETH,0,"ODR (output data ready)\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
@ -362,12 +362,12 @@ void alto2_cpu_device::eth_wakeup()
|
||||
*/
|
||||
if (m_ewfct) {
|
||||
m_task_wakeup |= 1 << task_ether;
|
||||
LOG((LOG_ETH,0,"EWFCT (ether wake function)\n"));
|
||||
LOG((this,LOG_ETH,0,"EWFCT (ether wake function)\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
// otherwise no more wakeups for the ether task
|
||||
LOG((LOG_ETH,0,"stop wake\n"));
|
||||
LOG((this,LOG_ETH,0,"stop wake\n"));
|
||||
m_task_wakeup &= ~(1 << task_ether);
|
||||
}
|
||||
|
||||
@ -539,7 +539,7 @@ void alto2_cpu_device::tx_packet(void* ptr, INT32 arg)
|
||||
// the last word sent is the CRC
|
||||
if (-1 == arg) {
|
||||
m_eth.tx_timer->reset();
|
||||
LOG((LOG_ETH,0," CRC:%06o\n", m_eth.tx_crc));
|
||||
LOG((this,LOG_ETH,0," CRC:%06o\n", m_eth.tx_crc));
|
||||
// TODO: send the CRC as final word of the packet
|
||||
m_eth.tx_crc = 0;
|
||||
PUT_ETH_OGONE(m_eth.status, 1); // set the OGONE flip flop
|
||||
@ -578,7 +578,7 @@ void alto2_cpu_device::eth_startf()
|
||||
PUT_ETH_ICMD(m_eth.status, X_BIT(m_bus,16,14));
|
||||
PUT_ETH_OCMD(m_eth.status, X_BIT(m_bus,16,15));
|
||||
#endif
|
||||
LOG((LOG_ETH,3, " STARTF; ICMD=%u OCMD=%u\n", GET_ETH_ICMD(m_eth.status), GET_ETH_ICMD(m_eth.status)));
|
||||
LOG((this,LOG_ETH,3, " STARTF; ICMD=%u OCMD=%u\n", GET_ETH_ICMD(m_eth.status), GET_ETH_ICMD(m_eth.status)));
|
||||
eth_wakeup();
|
||||
}
|
||||
|
||||
@ -591,7 +591,7 @@ void alto2_cpu_device::eth_startf()
|
||||
void alto2_cpu_device::bs_early_eidfct()
|
||||
{
|
||||
UINT16 r = m_eth.fifo[m_eth.fifo_rd];
|
||||
LOG((LOG_ETH,3, " <-EIDFCT; pull %06o from FIFO[%02o]\n", r, m_eth.fifo_rd));
|
||||
LOG((this,LOG_ETH,3, " <-EIDFCT; pull %06o from FIFO[%02o]\n", r, m_eth.fifo_rd));
|
||||
m_eth.fifo_rd = (m_eth.fifo_rd + 1) % ALTO2_ETHER_FIFO_SIZE;
|
||||
m_bus &= r;
|
||||
|
||||
@ -600,7 +600,7 @@ void alto2_cpu_device::bs_early_eidfct()
|
||||
m_eth.rx_packet[m_eth.rx_count] = r;
|
||||
m_eth.rx_count++;
|
||||
if (ALTO2_ETHER_PACKET_SIZE == m_eth.rx_count) {
|
||||
dump_packet("RX", m_eth.rx_packet, 0, m_eth.rx_count);
|
||||
dump_packet(this,"RX", m_eth.rx_packet, 0, m_eth.rx_count);
|
||||
m_eth.rx_count = 0;
|
||||
}
|
||||
#endif
|
||||
@ -612,7 +612,7 @@ void alto2_cpu_device::bs_early_eidfct()
|
||||
*/
|
||||
void alto2_cpu_device::f1_early_eth_block()
|
||||
{
|
||||
LOG((LOG_ETH,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_ETH,2," BLOCK %s\n", task_name(m_task)));
|
||||
m_task_wakeup &= ~(1 << task_ether);
|
||||
}
|
||||
|
||||
@ -625,7 +625,7 @@ void alto2_cpu_device::f1_early_eth_block()
|
||||
void alto2_cpu_device::f1_early_eilfct()
|
||||
{
|
||||
UINT16 r = m_eth.fifo[m_eth.fifo_rd];
|
||||
LOG((LOG_ETH,3, " <-EILFCT; %06o at FIFO[%02o]\n", r, m_eth.fifo_rd));
|
||||
LOG((this,LOG_ETH,3, " <-EILFCT; %06o at FIFO[%02o]\n", r, m_eth.fifo_rd));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -658,13 +658,13 @@ void alto2_cpu_device::f1_early_epfct()
|
||||
X_WRBITS(r,16,15,15,~GET_ETH_IT(st)); // BUS[13] = IT (input ???)
|
||||
m_bus &= r;
|
||||
|
||||
LOG((LOG_ETH,3, " <-EPFCT; BUS[8-15] = STATUS (%#o)\n", r));
|
||||
LOG((LOG_ETH,5, " IDL' : %u\n", GET_ETH_IDL(r)));
|
||||
LOG((LOG_ETH,5, " COLL' : %u\n", GET_ETH_COLL(r)));
|
||||
LOG((LOG_ETH,5, " CRC' : %u\n", GET_ETH_CRC(r)));
|
||||
LOG((LOG_ETH,5, " ICMD' : %u\n", GET_ETH_ICMD(r)));
|
||||
LOG((LOG_ETH,5, " OCMD' : %u\n", GET_ETH_OCMD(r)));
|
||||
LOG((LOG_ETH,5, " IT' : %u\n", GET_ETH_IT(r)));
|
||||
LOG((this,LOG_ETH,3, " <-EPFCT; BUS[8-15] = STATUS (%#o)\n", r));
|
||||
LOG((this,LOG_ETH,5, " IDL' : %u\n", GET_ETH_IDL(r)));
|
||||
LOG((this,LOG_ETH,5, " COLL' : %u\n", GET_ETH_COLL(r)));
|
||||
LOG((this,LOG_ETH,5, " CRC' : %u\n", GET_ETH_CRC(r)));
|
||||
LOG((this,LOG_ETH,5, " ICMD' : %u\n", GET_ETH_ICMD(r)));
|
||||
LOG((this,LOG_ETH,5, " OCMD' : %u\n", GET_ETH_OCMD(r)));
|
||||
LOG((this,LOG_ETH,5, " IT' : %u\n", GET_ETH_IT(r)));
|
||||
eth_wakeup();
|
||||
}
|
||||
|
||||
@ -700,7 +700,7 @@ void alto2_cpu_device::f1_late_ewfct()
|
||||
*/
|
||||
void alto2_cpu_device::f2_late_eodfct()
|
||||
{
|
||||
LOG((LOG_ETH,3, " EODFCT<-; push %06o into FIFO[%02o]\n", m_bus, m_eth.fifo_wr));
|
||||
LOG((this,LOG_ETH,3, " EODFCT<-; push %06o into FIFO[%02o]\n", m_bus, m_eth.fifo_wr));
|
||||
m_eth.fifo[m_eth.fifo_wr] = m_bus;
|
||||
m_eth.fifo_wr = (m_eth.fifo_wr + 1) % ALTO2_ETHER_FIFO_SIZE;
|
||||
|
||||
@ -709,7 +709,7 @@ void alto2_cpu_device::f2_late_eodfct()
|
||||
m_eth.tx_packet[m_eth.tx_count] = m_bus;
|
||||
m_eth.tx_count++;
|
||||
if (ALTO2_ETHER_PACKET_SIZE == m_eth.tx_count) {
|
||||
dump_packet("TX", m_eth.tx_packet, 0, m_eth.tx_count);
|
||||
dump_packet(this,"TX", m_eth.tx_packet, 0, m_eth.tx_count);
|
||||
m_eth.tx_count = 0;
|
||||
}
|
||||
#endif
|
||||
@ -735,7 +735,7 @@ void alto2_cpu_device::f2_late_eodfct()
|
||||
*/
|
||||
void alto2_cpu_device::f2_late_eosfct()
|
||||
{
|
||||
LOG((LOG_ETH,3, " EOSFCT\n"));
|
||||
LOG((this,LOG_ETH,3, " EOSFCT\n"));
|
||||
PUT_ETH_WLF(m_eth.status, 1);
|
||||
PUT_ETH_OBUSY(m_eth.status, 1);
|
||||
eth_wakeup();
|
||||
@ -756,7 +756,7 @@ void alto2_cpu_device::f2_late_erbfct()
|
||||
UINT16 r = 0;
|
||||
X_WRBITS(r,10,6,6,GET_ETH_ICMD(m_eth.status));
|
||||
X_WRBITS(r,10,7,7,GET_ETH_OCMD(m_eth.status));
|
||||
LOG((LOG_ETH,3, " ERBFCT; NEXT[6-7] = ICMD,OCMD (%#o | %#o)\n", m_next2, r));
|
||||
LOG((this,LOG_ETH,3, " ERBFCT; NEXT[6-7] = ICMD,OCMD (%#o | %#o)\n", m_next2, r));
|
||||
m_next2 |= r;
|
||||
eth_wakeup();
|
||||
}
|
||||
@ -797,7 +797,7 @@ void alto2_cpu_device::f2_late_ebfct()
|
||||
GET_ETH_OCMD(m_eth.status) |
|
||||
GET_ETH_IGONE(m_eth.status) |
|
||||
GET_ETH_OGONE(m_eth.status));
|
||||
LOG((LOG_ETH,3, " EBFCT; NEXT ... (%#o | %#o)\n", m_next2, r));
|
||||
LOG((this,LOG_ETH,3, " EBFCT; NEXT ... (%#o | %#o)\n", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -812,7 +812,7 @@ void alto2_cpu_device::f2_late_ecbfct()
|
||||
UINT16 r = 0;
|
||||
UINT8 a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
|
||||
X_WRBITS(r,10,7,7,~BE(a49));
|
||||
LOG((LOG_ETH,3, " ECBFCT; NEXT[7] = FIFO %sempty (%#o | %#o)\n", r ? "not " : "is ", m_next2, r));
|
||||
LOG((this,LOG_ETH,3, " ECBFCT; NEXT[7] = FIFO %sempty (%#o | %#o)\n", r ? "not " : "is ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -826,7 +826,7 @@ void alto2_cpu_device::f2_late_ecbfct()
|
||||
*/
|
||||
void alto2_cpu_device::f2_late_eisfct()
|
||||
{
|
||||
LOG((LOG_ETH,3, " EISFCT\n"));
|
||||
LOG((this,LOG_ETH,3, " EISFCT\n"));
|
||||
PUT_ETH_IBUSY(m_eth.status, 1);
|
||||
eth_wakeup();
|
||||
}
|
||||
|
@ -242,7 +242,7 @@ READ16_MEMBER( alto2_cpu_device::utilin_r )
|
||||
data = m_hw.utilin;
|
||||
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_HW,2," UTILIN rd %#o (%#o)\n", offset, data));
|
||||
LOG((this,LOG_HW,2," UTILIN rd %#o (%#o)\n", offset, data));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -258,7 +258,7 @@ READ16_MEMBER( alto2_cpu_device::xbus_r )
|
||||
UINT16 data = m_hw.xbus[offset & 3];
|
||||
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_HW,2," XBUS[%d] rd %#o (%#o)\n", offset & 3, offset, data));
|
||||
LOG((this,LOG_HW,2," XBUS[%d] rd %#o (%#o)\n", offset & 3, offset, data));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -274,7 +274,7 @@ READ16_MEMBER( alto2_cpu_device::xbus_r )
|
||||
WRITE16_MEMBER( alto2_cpu_device::xbus_w )
|
||||
{
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_HW,2," XBUS[%d] wr %#o (%#o)\n", offset & 3, offset, data));
|
||||
LOG((this,LOG_HW,2," XBUS[%d] wr %#o (%#o)\n", offset & 3, offset, data));
|
||||
}
|
||||
m_hw.xbus[offset&3] = data;
|
||||
}
|
||||
@ -289,7 +289,7 @@ READ16_MEMBER( alto2_cpu_device::utilout_r )
|
||||
{
|
||||
UINT16 data = m_hw.utilout ^ 0177777;
|
||||
if (!space.debugger_access()) {
|
||||
LOG((0,2," UTILOUT rd %#o (%#o)\n", offset, data));
|
||||
LOG((this,0,2," UTILOUT rd %#o (%#o)\n", offset, data));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -305,7 +305,7 @@ READ16_MEMBER( alto2_cpu_device::utilout_r )
|
||||
WRITE16_MEMBER( alto2_cpu_device::utilout_w )
|
||||
{
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_HW,2," UTILOUT wr %#o (%#o)\n", offset, data));
|
||||
LOG((this,LOG_HW,2," UTILOUT wr %#o (%#o)\n", offset, data));
|
||||
}
|
||||
m_hw.utilout = data ^ 0177777;
|
||||
|
||||
|
@ -68,7 +68,7 @@ static inline jkff_t update_jkff(UINT8 s0, UINT8 s1, const char* jkff_name)
|
||||
/* both J and K' are 0: set Q to 0, Q' to 1 */
|
||||
s1 = (s1 & ~JKFF_Q) | JKFF_Q0;
|
||||
if (s0 & JKFF_Q) {
|
||||
LOG((LOG_DISK,9,"\t\t%s J:0 K':0 -> Q:0\n", jkff_name));
|
||||
LOG((this,LOG_DISK,9,"\t\t%s J:0 K':0 -> Q:0\n", jkff_name));
|
||||
}
|
||||
break;
|
||||
case JKFF_J:
|
||||
@ -77,11 +77,11 @@ static inline jkff_t update_jkff(UINT8 s0, UINT8 s1, const char* jkff_name)
|
||||
s1 = (s1 & ~JKFF_Q) | JKFF_Q0;
|
||||
else
|
||||
s1 = (s1 | JKFF_Q) & ~JKFF_Q0;
|
||||
LOG((LOG_DISK,9,"\t\t%s J:0 K':1 flip-flop Q:%d\n", jkff_name, (s1 & JKFF_Q) ? 1 : 0));
|
||||
LOG((this,LOG_DISK,9,"\t\t%s J:0 K':1 flip-flop Q:%d\n", jkff_name, (s1 & JKFF_Q) ? 1 : 0));
|
||||
break;
|
||||
case JKFF_K:
|
||||
if ((s0 ^ s1) & JKFF_Q) {
|
||||
LOG((LOG_DISK,9,"\t\t%s J:0 K':1 keep Q:%d\n", jkff_name, (s1 & JKFF_Q) ? 1 : 0));
|
||||
LOG((this,LOG_DISK,9,"\t\t%s J:0 K':1 keep Q:%d\n", jkff_name, (s1 & JKFF_Q) ? 1 : 0));
|
||||
}
|
||||
/* J is 0, and K' is 1: keep Q as is */
|
||||
if (s0 & JKFF_Q)
|
||||
@ -93,7 +93,7 @@ static inline jkff_t update_jkff(UINT8 s0, UINT8 s1, const char* jkff_name)
|
||||
/* both J and K' are 1: set Q to 1 */
|
||||
s1 = (s1 | JKFF_Q) & ~JKFF_Q0;
|
||||
if (!(s0 & JKFF_Q)) {
|
||||
LOG((LOG_DISK,9,"\t\t%s J:1 K':1 -> Q:1\n", jkff_name));
|
||||
LOG((this,LOG_DISK,9,"\t\t%s J:1 K':1 -> Q:1\n", jkff_name));
|
||||
}
|
||||
break;
|
||||
}
|
||||
@ -106,21 +106,21 @@ static inline jkff_t update_jkff(UINT8 s0, UINT8 s1, const char* jkff_name)
|
||||
/* S' is 1, C' is 0: set Q to 0, Q' to 1 */
|
||||
s1 = (s1 & ~JKFF_Q) | JKFF_Q0;
|
||||
if (s0 & JKFF_Q) {
|
||||
LOG((LOG_DISK,9,"\t\t%s C':0 -> Q:0\n", jkff_name));
|
||||
LOG((this,LOG_DISK,9,"\t\t%s C':0 -> Q:0\n", jkff_name));
|
||||
}
|
||||
break;
|
||||
case JKFF_C:
|
||||
/* S' is 0, C' is 1: set Q to 1, Q' to 0 */
|
||||
s1 = (s1 | JKFF_Q) & ~JKFF_Q0;
|
||||
if (!(s0 & JKFF_Q)) {
|
||||
LOG((LOG_DISK,9,"\t\t%s S':0 -> Q:1\n", jkff_name));
|
||||
LOG((this,LOG_DISK,9,"\t\t%s S':0 -> Q:1\n", jkff_name));
|
||||
}
|
||||
break;
|
||||
case 0:
|
||||
default:
|
||||
/* unstable state (what to do?) */
|
||||
s1 = s1 | JKFF_Q | JKFF_Q0;
|
||||
LOG((LOG_DISK,9,"\t\t%s C':0 S':0 -> Q:1 and Q':1 <unstable>\n", jkff_name));
|
||||
LOG((this,LOG_DISK,9,"\t\t%s C':0 S':0 -> Q:1 and Q':1 <unstable>\n", jkff_name));
|
||||
break;
|
||||
}
|
||||
return static_cast<jkff_t>(s1);
|
||||
|
@ -32,11 +32,11 @@ READ16_MEMBER( alto2_cpu_device::kbd_ad_r )
|
||||
}
|
||||
m_kbd.matrix[offset & 03] = data;
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_KBD,2," read KBDAD+%o (%#o)\n", offset & 3, data));
|
||||
LOG((this,LOG_KBD,2," read KBDAD+%o (%#o)\n", offset & 3, data));
|
||||
}
|
||||
if (0 == (offset & 3) && (m_kbd.bootkey != 0177777)) {
|
||||
if (!space.debugger_access()) {
|
||||
LOG((0,2," boot keys (%#o & %#o)\n", data, m_kbd.bootkey));
|
||||
LOG((this,0,2," boot keys (%#o & %#o)\n", data, m_kbd.bootkey));
|
||||
}
|
||||
data &= m_kbd.bootkey;
|
||||
m_kbd.bootkey = 0177777;
|
||||
|
@ -10,7 +10,7 @@
|
||||
//! f1_ksec_block early: block the disk sector task
|
||||
void alto2_cpu_device::f1_early_ksec_block()
|
||||
{
|
||||
LOG((LOG_KSEC,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_KSEC,2," BLOCK %s\n", task_name(m_task)));
|
||||
disk_block(m_task);
|
||||
}
|
||||
|
||||
|
@ -10,7 +10,7 @@
|
||||
//! f1_kwd_block early: block the disk word task
|
||||
void alto2_cpu_device::f1_early_kwd_block()
|
||||
{
|
||||
LOG((LOG_KWD,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_KWD,2," BLOCK %s\n", task_name(m_task)));
|
||||
disk_block(m_task);
|
||||
}
|
||||
|
||||
|
@ -446,20 +446,20 @@ UINT32 alto2_cpu_device::hamming_code(int write, UINT32 dw_addr, UINT32 dw_data)
|
||||
PUT_MESR_BANK(m_mem.mesr, (dw_addr >> 15));
|
||||
/* latch memory address register */
|
||||
m_mem.mear = m_mem.mar & 0177777;
|
||||
LOG((LOG_MEM,5," memory error at dword addr:%07o data:%011o check:%03o\n", dw_addr * 2, dw_data, hpb));
|
||||
LOG((LOG_MEM,6," MEAR: %06o\n", m_mem.mear));
|
||||
LOG((LOG_MEM,6," MESR: %06o\n", m_mem.mesr ^ 0177777));
|
||||
LOG((LOG_MEM,7," Hamming code read : %#o\n", GET_MESR_HAMMING(m_mem.mesr)));
|
||||
LOG((LOG_MEM,7," Parity error : %o\n", GET_MESR_PERR(m_mem.mesr)));
|
||||
LOG((LOG_MEM,7," Memory parity bit : %o\n", GET_MESR_PARITY(m_mem.mesr)));
|
||||
LOG((LOG_MEM,7," Hamming syndrome : %#o (bit #%d)\n", GET_MESR_SYNDROME(m_mem.mesr), hamming_lut[GET_MESR_SYNDROME(m_mem.mesr)]));
|
||||
LOG((LOG_MEM,7," Memory bank : %#o\n", GET_MESR_BANK(m_mem.mesr)));
|
||||
LOG((LOG_MEM,6," MECR: %06o\n", m_mem.mecr ^ 0177777));
|
||||
LOG((LOG_MEM,7," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(m_mem.mecr)));
|
||||
LOG((LOG_MEM,7," Test mode : %s\n", GET_MECR_TEST_MODE(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((LOG_MEM,7," INT on single-bit err: %s\n", GET_MECR_INT_SBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((LOG_MEM,7," INT on double-bit err: %s\n", GET_MECR_INT_DBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((LOG_MEM,7," Error correction : %s\n", GET_MECR_ERRCORR(m_mem.mecr) ? "off" : "on"));
|
||||
LOG((this,LOG_MEM,5," memory error at dword addr:%07o data:%011o check:%03o\n", dw_addr * 2, dw_data, hpb));
|
||||
LOG((this,LOG_MEM,6," MEAR: %06o\n", m_mem.mear));
|
||||
LOG((this,LOG_MEM,6," MESR: %06o\n", m_mem.mesr ^ 0177777));
|
||||
LOG((this,LOG_MEM,7," Hamming code read : %#o\n", GET_MESR_HAMMING(m_mem.mesr)));
|
||||
LOG((this,LOG_MEM,7," Parity error : %o\n", GET_MESR_PERR(m_mem.mesr)));
|
||||
LOG((this,LOG_MEM,7," Memory parity bit : %o\n", GET_MESR_PARITY(m_mem.mesr)));
|
||||
LOG((this,LOG_MEM,7," Hamming syndrome : %#o (bit #%d)\n", GET_MESR_SYNDROME(m_mem.mesr), hamming_lut[GET_MESR_SYNDROME(m_mem.mesr)]));
|
||||
LOG((this,LOG_MEM,7," Memory bank : %#o\n", GET_MESR_BANK(m_mem.mesr)));
|
||||
LOG((this,LOG_MEM,6," MECR: %06o\n", m_mem.mecr ^ 0177777));
|
||||
LOG((this,LOG_MEM,7," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(m_mem.mecr)));
|
||||
LOG((this,LOG_MEM,7," Test mode : %s\n", GET_MECR_TEST_MODE(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,7," INT on single-bit err: %s\n", GET_MECR_INT_SBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,7," INT on double-bit err: %s\n", GET_MECR_INT_DBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,7," Error correction : %s\n", GET_MECR_ERRCORR(m_mem.mecr) ? "off" : "on"));
|
||||
}
|
||||
if (-1 == hamming_lut[syndrome]) {
|
||||
/* double-bit error: wake task_part, if we're told so */
|
||||
@ -471,7 +471,7 @@ UINT32 alto2_cpu_device::hamming_code(int write, UINT32 dw_addr, UINT32 dw_data)
|
||||
m_task_wakeup |= 1 << task_part;
|
||||
/* should we correct the single bit error ? */
|
||||
if (0 == GET_MECR_ERRCORR(m_mem.mecr)) {
|
||||
LOG((LOG_MEM,0," correct bit #%d addr:%07o data:%011o check:%03o\n", hamming_lut[syndrome], dw_addr * 2, dw_data, hpb));
|
||||
LOG((this,LOG_MEM,0," correct bit #%d addr:%07o data:%011o check:%03o\n", hamming_lut[syndrome], dw_addr * 2, dw_data, hpb));
|
||||
dw_data ^= 1ul << hamming_lut[syndrome];
|
||||
}
|
||||
}
|
||||
@ -493,7 +493,7 @@ READ16_MEMBER( alto2_cpu_device::mear_r )
|
||||
{
|
||||
int data = m_mem.error ? m_mem.mear : m_mem.mar;
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_MEM,2," MEAR read %07o\n", data));
|
||||
LOG((this,LOG_MEM,2," MEAR read %07o\n", data));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -518,16 +518,16 @@ READ16_MEMBER( alto2_cpu_device::mesr_r )
|
||||
{
|
||||
UINT16 data = m_mem.mesr ^ 0177777;
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_MEM,2," MESR read %07o\n", data));
|
||||
LOG((LOG_MEM,6," Hamming code read : %#o\n", GET_MESR_HAMMING(data)));
|
||||
LOG((LOG_MEM,6," Parity error : %o\n", GET_MESR_PERR(data)));
|
||||
LOG((LOG_MEM,6," Memory parity bit : %o\n", GET_MESR_PARITY(data)));
|
||||
LOG((this,LOG_MEM,2," MESR read %07o\n", data));
|
||||
LOG((this,LOG_MEM,6," Hamming code read : %#o\n", GET_MESR_HAMMING(data)));
|
||||
LOG((this,LOG_MEM,6," Parity error : %o\n", GET_MESR_PERR(data)));
|
||||
LOG((this,LOG_MEM,6," Memory parity bit : %o\n", GET_MESR_PARITY(data)));
|
||||
#if USE_HAMMING_CHECK
|
||||
LOG((LOG_MEM,6," Hamming syndrome : %#o (bit #%d)\n", GET_MESR_SYNDROME(data), hamming_lut[GET_MESR_SYNDROME(data)]));
|
||||
LOG((this,LOG_MEM,6," Hamming syndrome : %#o (bit #%d)\n", GET_MESR_SYNDROME(data), hamming_lut[GET_MESR_SYNDROME(data)]));
|
||||
#else
|
||||
LOG((LOG_MEM,6," Hamming syndrome : %#o\n", GET_MESR_SYNDROME(data)));
|
||||
LOG((this,LOG_MEM,6," Hamming syndrome : %#o\n", GET_MESR_SYNDROME(data)));
|
||||
#endif
|
||||
LOG((LOG_MEM,6," Memory bank : %#o\n", GET_MESR_BANK(data)));
|
||||
LOG((this,LOG_MEM,6," Memory bank : %#o\n", GET_MESR_BANK(data)));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -535,7 +535,7 @@ READ16_MEMBER( alto2_cpu_device::mesr_r )
|
||||
WRITE16_MEMBER( alto2_cpu_device::mesr_w )
|
||||
{
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_MEM,2," MESR write %07o (clear MESR; was %07o)\n", data, m_mem.mesr));
|
||||
LOG((this,LOG_MEM,2," MESR write %07o (clear MESR; was %07o)\n", data, m_mem.mesr));
|
||||
}
|
||||
m_mem.mesr = 0; // set all bits to 0
|
||||
m_mem.error = 0; // reset the error flag
|
||||
@ -569,12 +569,12 @@ WRITE16_MEMBER( alto2_cpu_device::mecr_w )
|
||||
X_WRBITS(m_mem.mecr,16, 0, 3,0);
|
||||
X_WRBITS(m_mem.mecr,16,15,15,0);
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_MEM,2," MECR write %07o\n", data));
|
||||
LOG((LOG_MEM,6," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(m_mem.mecr)));
|
||||
LOG((LOG_MEM,6," Test mode : %s\n", GET_MECR_TEST_MODE(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((LOG_MEM,6," INT on single-bit err: %s\n", GET_MECR_INT_SBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((LOG_MEM,6," INT on double-bit err: %s\n", GET_MECR_INT_DBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((LOG_MEM,6," Error correction : %s\n", GET_MECR_ERRCORR(m_mem.mecr) ? "off" : "on"));
|
||||
LOG((this,LOG_MEM,2," MECR write %07o\n", data));
|
||||
LOG((this,LOG_MEM,6," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(m_mem.mecr)));
|
||||
LOG((this,LOG_MEM,6," Test mode : %s\n", GET_MECR_TEST_MODE(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,6," INT on single-bit err: %s\n", GET_MECR_INT_SBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,6," INT on double-bit err: %s\n", GET_MECR_INT_DBERR(m_mem.mecr) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,6," Error correction : %s\n", GET_MECR_ERRCORR(m_mem.mecr) ? "off" : "on"));
|
||||
}
|
||||
}
|
||||
|
||||
@ -586,12 +586,12 @@ READ16_MEMBER( alto2_cpu_device::mecr_r )
|
||||
UINT16 data = m_mem.mecr ^ 0177777;
|
||||
/* set all spare bits */
|
||||
if (!space.debugger_access()) {
|
||||
LOG((LOG_MEM,2," MECR read %07o\n", data));
|
||||
LOG((LOG_MEM,6," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(data)));
|
||||
LOG((LOG_MEM,6," Test mode : %s\n", GET_MECR_TEST_MODE(data) ? "on" : "off"));
|
||||
LOG((LOG_MEM,6," INT on single-bit err: %s\n", GET_MECR_INT_SBERR(data) ? "on" : "off"));
|
||||
LOG((LOG_MEM,6," INT on double-bit err: %s\n", GET_MECR_INT_DBERR(data) ? "on" : "off"));
|
||||
LOG((LOG_MEM,6," Error correction : %s\n", GET_MECR_ERRCORR(data) ? "off" : "on"));
|
||||
LOG((this,LOG_MEM,2," MECR read %07o\n", data));
|
||||
LOG((this,LOG_MEM,6," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(data)));
|
||||
LOG((this,LOG_MEM,6," Test mode : %s\n", GET_MECR_TEST_MODE(data) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,6," INT on single-bit err: %s\n", GET_MECR_INT_SBERR(data) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,6," INT on double-bit err: %s\n", GET_MECR_INT_DBERR(data) ? "on" : "off"));
|
||||
LOG((this,LOG_MEM,6," Error correction : %s\n", GET_MECR_ERRCORR(data) ? "off" : "on"));
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -626,7 +626,7 @@ void alto2_cpu_device::load_mar(UINT8 rsel, UINT32 addr)
|
||||
* starting a memory refresh cycle
|
||||
* currently we don't do anything special
|
||||
*/
|
||||
LOG((LOG_MEM,5, " MAR<-; refresh cycle @ %#o\n", addr));
|
||||
LOG((this,LOG_MEM,5, " MAR<-; refresh cycle @ %#o\n", addr));
|
||||
m_mem.mar = addr;
|
||||
m_mem.access = ALTO2_MEM_REFRESH;
|
||||
m_mem.cycle = cycle();
|
||||
@ -635,7 +635,7 @@ void alto2_cpu_device::load_mar(UINT8 rsel, UINT32 addr)
|
||||
|
||||
m_mem.mar = addr;
|
||||
if (addr < m_mem.size) {
|
||||
LOG((LOG_MEM,2, " MAR<-; mar = %#o\n", addr));
|
||||
LOG((this,LOG_MEM,2, " MAR<-; mar = %#o\n", addr));
|
||||
m_mem.access = ALTO2_MEM_RAM;
|
||||
// fetch the memory double-word to the read/write latches
|
||||
m_mem.rmdd = m_mem.wmdd = m_mem.ram[m_mem.mar/2];
|
||||
@ -657,12 +657,12 @@ UINT16 alto2_cpu_device::read_mem()
|
||||
UINT32 base_addr;
|
||||
|
||||
if (ALTO2_MEM_NONE == m_mem.access) {
|
||||
LOG((LOG_MEM,0," fatal: mem read with no preceding address\n"));
|
||||
LOG((this,LOG_MEM,0," fatal: mem read with no preceding address\n"));
|
||||
return 0177777;
|
||||
}
|
||||
|
||||
if (cycle() > m_mem.cycle + 4) {
|
||||
LOG((LOG_MEM,0," fatal: mem read (MAR %#o) too late (+%lld cyc)\n", m_mem.mar, cycle() - m_mem.cycle));
|
||||
LOG((this,LOG_MEM,0," fatal: mem read (MAR %#o) too late (+%lld cyc)\n", m_mem.mar, cycle() - m_mem.cycle));
|
||||
m_mem.access = ALTO2_MEM_NONE;
|
||||
return 0177777;
|
||||
}
|
||||
@ -670,7 +670,7 @@ UINT16 alto2_cpu_device::read_mem()
|
||||
base_addr = m_mem.mar & 0177777;
|
||||
if (base_addr >= ALTO2_IO_PAGE_BASE && m_mem.mar < ALTO2_RAM_SIZE) {
|
||||
m_mem.md = m_iomem->read_word(m_iomem->address_to_byte(base_addr));
|
||||
LOG((LOG_MEM,6," MD = MMIO[%#o] (%#o)\n", base_addr, m_mem.md));
|
||||
LOG((this,LOG_MEM,6," MD = MMIO[%#o] (%#o)\n", base_addr, m_mem.md));
|
||||
m_mem.access = ALTO2_MEM_NONE;
|
||||
#if ALTO2_DEBUG
|
||||
watch_read(m_mem.mar, m_mem.md);
|
||||
@ -684,7 +684,7 @@ UINT16 alto2_cpu_device::read_mem()
|
||||
m_mem.rmdd = hamming_code(0, m_mem.mar/2, m_mem.rmdd);
|
||||
#endif
|
||||
m_mem.md = (m_mem.mar & ALTO2_MEM_ODD) ? GET_ODD(m_mem.rmdd) : GET_EVEN(m_mem.rmdd);
|
||||
LOG((LOG_MEM,6," MD = RAM[%#o] (%#o)\n", m_mem.mar, m_mem.md));
|
||||
LOG((this,LOG_MEM,6," MD = RAM[%#o] (%#o)\n", m_mem.mar, m_mem.md));
|
||||
|
||||
#if ALTO2_DEBUG
|
||||
watch_read(m_mem.mar, m_mem.md);
|
||||
@ -714,12 +714,12 @@ void alto2_cpu_device::write_mem(UINT16 data)
|
||||
|
||||
m_mem.md = data & 0177777;
|
||||
if (ALTO2_MEM_NONE == m_mem.access) {
|
||||
LOG((LOG_MEM,0," fatal: mem write with no preceding address\n"));
|
||||
LOG((this,LOG_MEM,0," fatal: mem write with no preceding address\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
if (cycle() > m_mem.cycle + 4) {
|
||||
LOG((LOG_MEM,0," fatal: mem write (MAR %#o, data %#o) too late (+%lld cyc)\n", m_mem.mar, data, cycle() - m_mem.cycle));
|
||||
LOG((this,LOG_MEM,0," fatal: mem write (MAR %#o, data %#o) too late (+%lld cyc)\n", m_mem.mar, data, cycle() - m_mem.cycle));
|
||||
m_mem.access = ALTO2_MEM_NONE;
|
||||
return;
|
||||
}
|
||||
@ -727,7 +727,7 @@ void alto2_cpu_device::write_mem(UINT16 data)
|
||||
base_addr = m_mem.mar & 0177777;
|
||||
if (base_addr >= ALTO2_IO_PAGE_BASE && m_mem.mar < ALTO2_RAM_SIZE) {
|
||||
m_iomem->write_word(m_iomem->address_to_byte(base_addr), m_mem.md);
|
||||
LOG((LOG_MEM,6, " MMIO[%#o] = MD (%#o)\n", base_addr, m_mem.md));
|
||||
LOG((this,LOG_MEM,6, " MMIO[%#o] = MD (%#o)\n", base_addr, m_mem.md));
|
||||
m_mem.access = ALTO2_MEM_NONE;
|
||||
#if ALTO2_DEBUG
|
||||
watch_write(m_mem.mar, m_mem.md);
|
||||
@ -735,7 +735,7 @@ void alto2_cpu_device::write_mem(UINT16 data)
|
||||
return;
|
||||
}
|
||||
|
||||
LOG((LOG_MEM,6, " RAM[%#o] = MD (%#o)\n", m_mem.mar, m_mem.md));
|
||||
LOG((this,LOG_MEM,6, " RAM[%#o] = MD (%#o)\n", m_mem.mar, m_mem.md));
|
||||
if (m_mem.mar & ALTO2_MEM_ODD)
|
||||
PUT_ODD(m_mem.wmdd, m_mem.md);
|
||||
else
|
||||
|
@ -12,7 +12,7 @@ void alto2_cpu_device::f1_early_mrt_block()
|
||||
{
|
||||
/* clear the wakeup for the memory refresh task */
|
||||
m_task_wakeup &= ~(1 << m_task);
|
||||
LOG((LOG_MRT,2," BLOCK %s\n", task_name(m_task)));
|
||||
LOG((this,LOG_MRT,2," BLOCK %s\n", task_name(m_task)));
|
||||
}
|
||||
|
||||
//! called by the CPU when MRT becomes active
|
||||
|
@ -80,25 +80,25 @@ void alto2_cpu_device::rdram()
|
||||
if (GET_CRAM_RAMROM(m_cram_addr)) {
|
||||
/* read CROM 0 at current mpc */
|
||||
addr = m_mpc & ALTO2_UCODE_PAGE_MASK;
|
||||
LOG((LOG_CPU,0," rdram: ROM [%05o] ", addr));
|
||||
LOG((this,LOG_CPU,0," rdram: ROM [%05o] ", addr));
|
||||
} else {
|
||||
/* read CRAM[bank] */
|
||||
addr = bank * ALTO2_UCODE_PAGE_SIZE + wordaddr;
|
||||
LOG((LOG_CPU,0," rdram: RAM%d [%04o] ", bank, wordaddr));
|
||||
LOG((this,LOG_CPU,0," rdram: RAM%d [%04o] ", bank, wordaddr));
|
||||
}
|
||||
|
||||
m_rdram_flag = false;
|
||||
if (ALTO2_UCODE_RAM_BASE + addr >= ALTO2_UCODE_SIZE) {
|
||||
value = 0177777; /* ??? */
|
||||
LOG((LOG_CPU,0,"invalid address (%06o)\n", addr));
|
||||
LOG((this,LOG_CPU,0,"invalid address (%06o)\n", addr));
|
||||
return;
|
||||
}
|
||||
value = RD_CRAM(addr) ^ ALTO2_UCODE_INVERTED;
|
||||
if (GET_CRAM_HALFSEL(m_cram_addr)) {
|
||||
value = value >> 16;
|
||||
LOG((LOG_CPU,0,"upper:%06o\n", value & 0177777));
|
||||
LOG((this,LOG_CPU,0,"upper:%06o\n", value & 0177777));
|
||||
} else {
|
||||
LOG((LOG_CPU,0,"lower:%06o\n", value & 0177777));
|
||||
LOG((this,LOG_CPU,0,"lower:%06o\n", value & 0177777));
|
||||
}
|
||||
m_bus &= value;
|
||||
}
|
||||
@ -120,7 +120,7 @@ void alto2_cpu_device::wrtram()
|
||||
UINT32 value = ((m_m << 16) | m_alu) ^ ALTO2_UCODE_INVERTED;
|
||||
|
||||
UINT32 addr = bank * ALTO2_UCODE_PAGE_SIZE + wordaddr; // write RAM 0,1,2
|
||||
LOG((LOG_CPU,0," wrtram: RAM%d [%04o] upper:%06o lower:%06o", bank, wordaddr, m_m, m_alu));
|
||||
LOG((this,LOG_CPU,0," wrtram: RAM%d [%04o] upper:%06o lower:%06o", bank, wordaddr, m_m, m_alu));
|
||||
|
||||
#if DEBUG_WRTRAM
|
||||
char buff[128];
|
||||
@ -136,10 +136,10 @@ void alto2_cpu_device::wrtram()
|
||||
|
||||
m_wrtram_flag = false;
|
||||
if (ALTO2_UCODE_RAM_BASE + addr >= ALTO2_UCODE_SIZE) {
|
||||
LOG((LOG_CPU,0," invalid address %06o\n", addr));
|
||||
LOG((this,LOG_CPU,0," invalid address %06o\n", addr));
|
||||
return;
|
||||
}
|
||||
LOG((LOG_CPU,0,"\n"));
|
||||
LOG((this,LOG_CPU,0,"\n"));
|
||||
WR_CRAM(addr, value);
|
||||
}
|
||||
|
||||
@ -156,10 +156,10 @@ void alto2_cpu_device::bs_early_read_sreg()
|
||||
if (m_d_rsel) {
|
||||
UINT8 bank = m_s_reg_bank[m_task];
|
||||
r = m_s[bank][m_d_rsel];
|
||||
LOG((LOG_RAM,2," <-S%02o; bus &= S[%o][%02o] (%#o)\n", m_d_rsel, bank, m_d_rsel, r));
|
||||
LOG((this,LOG_RAM,2," <-S%02o; bus &= S[%o][%02o] (%#o)\n", m_d_rsel, bank, m_d_rsel, r));
|
||||
} else {
|
||||
r = m_m;
|
||||
LOG((LOG_RAM,2," <-S%02o; bus &= M (%#o)\n", m_d_rsel, r));
|
||||
LOG((this,LOG_RAM,2," <-S%02o; bus &= M (%#o)\n", m_d_rsel, r));
|
||||
}
|
||||
m_bus &= r;
|
||||
}
|
||||
@ -170,7 +170,7 @@ void alto2_cpu_device::bs_early_read_sreg()
|
||||
void alto2_cpu_device::bs_early_load_sreg()
|
||||
{
|
||||
int r = 0; /* ??? */
|
||||
LOG((LOG_RAM,2," S%02o<- BUS &= garbage (%#o)\n", m_d_rsel, r));
|
||||
LOG((this,LOG_RAM,2," S%02o<- BUS &= garbage (%#o)\n", m_d_rsel, r));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -181,7 +181,7 @@ void alto2_cpu_device::bs_late_load_sreg()
|
||||
{
|
||||
UINT8 bank = m_s_reg_bank[m_task];
|
||||
m_s[bank][m_d_rsel] = m_m;
|
||||
LOG((LOG_RAM,2," S%02o<- S[%o][%02o] := %#o\n", m_d_rsel, bank, m_d_rsel, m_m));
|
||||
LOG((this,LOG_RAM,2," S%02o<- S[%o][%02o] := %#o\n", m_d_rsel, bank, m_d_rsel, m_m));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -191,7 +191,7 @@ void alto2_cpu_device::branch_ROM(const char *from, int page)
|
||||
{
|
||||
(void)from;
|
||||
m_next2 = (m_next2 & ALTO2_UCODE_PAGE_MASK) + page * ALTO2_UCODE_PAGE_SIZE;
|
||||
LOG((LOG_RAM,2," SWMODE: branch from %s to ROM%d (%#o)\n", from, page, m_next2));
|
||||
LOG((this,LOG_RAM,2," SWMODE: branch from %s to ROM%d (%#o)\n", from, page, m_next2));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -201,7 +201,7 @@ void alto2_cpu_device::branch_RAM(const char *from, int page)
|
||||
{
|
||||
(void)from;
|
||||
m_next2 = (m_next2 & ALTO2_UCODE_PAGE_MASK) + ALTO2_UCODE_RAM_BASE + page * ALTO2_UCODE_PAGE_SIZE;
|
||||
LOG((LOG_RAM,2," SWMODE: branch from %s to RAM%d\n", from, page, m_next2));
|
||||
LOG((this,LOG_RAM,2," SWMODE: branch from %s to RAM%d\n", from, page, m_next2));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -367,7 +367,7 @@ void alto2_cpu_device::f1_late_swmode()
|
||||
void alto2_cpu_device::f1_late_wrtram()
|
||||
{
|
||||
m_wrtram_flag = true;
|
||||
LOG((LOG_RAM,2," WRTRAM\n"));
|
||||
LOG((this,LOG_RAM,2," WRTRAM\n"));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -376,7 +376,7 @@ void alto2_cpu_device::f1_late_wrtram()
|
||||
void alto2_cpu_device::f1_late_rdram()
|
||||
{
|
||||
m_rdram_flag = true;
|
||||
LOG((LOG_RAM,2," RDRAM\n"));
|
||||
LOG((this,LOG_RAM,2," RDRAM\n"));
|
||||
}
|
||||
|
||||
#if (ALTO2_UCODE_RAM_PAGES == 3)
|
||||
@ -390,7 +390,7 @@ void alto2_cpu_device::f1_late_rdram()
|
||||
*/
|
||||
void alto2_cpu_device::f1_late_load_rmr()
|
||||
{
|
||||
LOG((LOG_RAM,2," RMR<-; BUS (%#o)\n", m_bus));
|
||||
LOG((this,LOG_RAM,2," RMR<-; BUS (%#o)\n", m_bus));
|
||||
m_reset_mode = m_bus;
|
||||
}
|
||||
#else // ALTO2_UCODE_RAM_PAGES != 3
|
||||
@ -400,7 +400,7 @@ void alto2_cpu_device::f1_late_load_rmr()
|
||||
void alto2_cpu_device::f1_late_load_srb()
|
||||
{
|
||||
m_s_reg_bank[m_task] = X_RDBITS(m_bus,16,12,14) % ALTO2_SREG_BANKS;
|
||||
LOG((LOG_RAM,2," SRB<-; srb[%d] := %#o\n", m_task, m_s_reg_bank[m_task]));
|
||||
LOG((this,LOG_RAM,2," SRB<-; srb[%d] := %#o\n", m_task, m_s_reg_bank[m_task]));
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -24,7 +24,7 @@ int g_log_types = LOG_DISK | LOG_ETH;
|
||||
int g_log_level = 8;
|
||||
bool g_log_newline = true;
|
||||
|
||||
void logprintf(int type, int level, const char* format, ...)
|
||||
void logprintf(device_t *device, int type, int level, const char* format, ...)
|
||||
{
|
||||
static const char* type_name[] = {
|
||||
"[CPU]",
|
||||
@ -61,11 +61,11 @@ void logprintf(int type, int level, const char* format, ...)
|
||||
// last line had a \n - print type name
|
||||
for (int i = 0; i < sizeof(type_name)/sizeof(type_name[0]); i++)
|
||||
if (type & (1 << i))
|
||||
logerror("%-7s ", type_name[i]);
|
||||
device->logerror("%-7s ", type_name[i]);
|
||||
}
|
||||
va_list ap;
|
||||
va_start(ap, format);
|
||||
vlogerror(format, ap);
|
||||
device->vlogerror(format, ap);
|
||||
va_end(ap);
|
||||
g_log_newline = format[strlen(format) - 1] == '\n';
|
||||
}
|
||||
@ -1271,12 +1271,12 @@ const char* alto2_cpu_device::f2_name(UINT8 f2)
|
||||
#if ALTO2_DEBUG
|
||||
void alto2_cpu_device::watch_read(UINT32 addr, UINT32 data)
|
||||
{
|
||||
LOG((LOG_MEM,0,"mem: rd[%06o] = %06o\n", addr, data));
|
||||
LOG((this,LOG_MEM,0,"mem: rd[%06o] = %06o\n", addr, data));
|
||||
}
|
||||
|
||||
void alto2_cpu_device::watch_write(UINT32 addr, UINT32 data)
|
||||
{
|
||||
LOG((LOG_MEM,0,"mem: wr[%06o] = %06o\n", addr, data));
|
||||
LOG((this,LOG_MEM,0,"mem: wr[%06o] = %06o\n", addr, data));
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1389,7 +1389,7 @@ static const char* memory_range_name(offs_t offset)
|
||||
*/
|
||||
READ16_MEMBER( alto2_cpu_device::noop_r )
|
||||
{
|
||||
LOG((LOG_CPU,0," MMIO rd %s\n", memory_range_name(offset)));
|
||||
LOG((this,LOG_CPU,0," MMIO rd %s\n", memory_range_name(offset)));
|
||||
return 0177777;
|
||||
}
|
||||
|
||||
@ -1398,7 +1398,7 @@ READ16_MEMBER( alto2_cpu_device::noop_r )
|
||||
*/
|
||||
WRITE16_MEMBER( alto2_cpu_device::noop_w )
|
||||
{
|
||||
LOG((LOG_CPU,0," MMIO wr %s\n", memory_range_name(offset)));
|
||||
LOG((this,LOG_CPU,0," MMIO wr %s\n", memory_range_name(offset)));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1422,7 +1422,7 @@ WRITE16_MEMBER( alto2_cpu_device::bank_reg_w )
|
||||
{
|
||||
int task = offset & 017;
|
||||
m_bank_reg[task] = data & 017;
|
||||
LOG((LOG_CPU,0," write bank[%02o]=%#o normal:%o extended:%o (%s)\n",
|
||||
LOG((this,LOG_CPU,0," write bank[%02o]=%#o normal:%o extended:%o (%s)\n",
|
||||
task, data,
|
||||
GET_BANK_NORMAL(data),
|
||||
GET_BANK_EXTENDED(data),
|
||||
@ -1435,7 +1435,7 @@ WRITE16_MEMBER( alto2_cpu_device::bank_reg_w )
|
||||
void alto2_cpu_device::bs_early_read_r()
|
||||
{
|
||||
UINT16 r = m_r[m_rsel];
|
||||
LOG((LOG_CPU,2," <-R%02o; %s (%#o)\n", m_rsel, r_name(m_rsel), r));
|
||||
LOG((this,LOG_CPU,2," <-R%02o; %s (%#o)\n", m_rsel, r_name(m_rsel), r));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -1445,7 +1445,7 @@ void alto2_cpu_device::bs_early_read_r()
|
||||
void alto2_cpu_device::bs_early_load_r()
|
||||
{
|
||||
UINT16 r = 0;
|
||||
LOG((LOG_CPU,2," R%02o<-; %s (BUS&=0)\n", m_rsel, r_name(m_rsel)));
|
||||
LOG((this,LOG_CPU,2," R%02o<-; %s (BUS&=0)\n", m_rsel, r_name(m_rsel)));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -1456,7 +1456,7 @@ void alto2_cpu_device::bs_late_load_r()
|
||||
{
|
||||
if (m_d_f2 != f2_emu_load_dns) {
|
||||
m_r[m_rsel] = m_shifter;
|
||||
LOG((LOG_CPU,2," R%02o<-; %s = SHIFTER (%#o)\n", m_rsel, r_name(m_rsel), m_shifter));
|
||||
LOG((this,LOG_CPU,2," R%02o<-; %s = SHIFTER (%#o)\n", m_rsel, r_name(m_rsel), m_shifter));
|
||||
#if 0
|
||||
/* HACK: programs writing r37 with xxx3 make the cursor
|
||||
* display go nuts. Until I found the real reason for this
|
||||
@ -1480,7 +1480,7 @@ void alto2_cpu_device::bs_early_read_md()
|
||||
UINT32 mar = m_mem.mar;
|
||||
#endif
|
||||
UINT16 md = read_mem();
|
||||
LOG((LOG_CPU,2," <-MD; BUS&=MD (%#o=[%#o])\n", md, mar));
|
||||
LOG((this,LOG_CPU,2," <-MD; BUS&=MD (%#o=[%#o])\n", md, mar));
|
||||
m_bus &= md;
|
||||
}
|
||||
|
||||
@ -1490,7 +1490,7 @@ void alto2_cpu_device::bs_early_read_md()
|
||||
void alto2_cpu_device::bs_early_mouse()
|
||||
{
|
||||
UINT16 r = mouse_read();
|
||||
LOG((LOG_CPU,2," <-MOUSE; BUS&=MOUSE (%#o)\n", r));
|
||||
LOG((this,LOG_CPU,2," <-MOUSE; BUS&=MOUSE (%#o)\n", r));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -1500,8 +1500,8 @@ void alto2_cpu_device::bs_early_mouse()
|
||||
void alto2_cpu_device::bs_early_disp()
|
||||
{
|
||||
UINT16 r = 0177777;
|
||||
LOG((LOG_CPU,0,"BS <-DISP not handled by task %s mpc:%04x\n", task_name(m_task), m_mpc));
|
||||
LOG((LOG_CPU,2," <-DISP; BUS&=DISP ?? (%#o)\n", r));
|
||||
LOG((this,LOG_CPU,0,"BS <-DISP not handled by task %s mpc:%04x\n", task_name(m_task), m_mpc));
|
||||
LOG((this,LOG_CPU,2," <-DISP; BUS&=DISP ?? (%#o)\n", r));
|
||||
m_bus &= r;
|
||||
}
|
||||
|
||||
@ -1517,7 +1517,7 @@ void alto2_cpu_device::f1_late_load_mar()
|
||||
UINT32 msb;
|
||||
if (m_d_f2 == f2_load_md) {
|
||||
msb = GET_BANK_EXTENDED(bank) << 16;
|
||||
LOG((LOG_CPU,7, " XMAR %#o\n", msb | m_alu));
|
||||
LOG((this,LOG_CPU,7, " XMAR %#o\n", msb | m_alu));
|
||||
} else {
|
||||
msb = GET_BANK_NORMAL(bank) << 16;
|
||||
|
||||
@ -1593,60 +1593,60 @@ static __inline f9318_out_t f9318(f9318_in_t in)
|
||||
|
||||
if (in & PRIO_IN_EI) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_GS | PRIO_OUT_QZ;
|
||||
LOG((LOG_CPU,2," f9318 case (a) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (a) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (0 == (in & PRIO_I7)) {
|
||||
out = PRIO_OUT_EO;
|
||||
LOG((LOG_CPU,2," f9318 case (c) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (c) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (PRIO_I7 == (in & PRIO_I6_I7)) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_Q0;
|
||||
LOG((LOG_CPU,2," f9318 case (d) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (d) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (PRIO_I6_I7 == (in & PRIO_I5_I7)) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_Q1;
|
||||
LOG((LOG_CPU,2," f9318 case (e) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (e) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (PRIO_I5_I7 == (in & PRIO_I4_I7)) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_Q0 | PRIO_OUT_Q1;
|
||||
LOG((LOG_CPU,2," f9318 case (f) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (f) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (PRIO_I4_I7 == (in & PRIO_I3_I7)) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_Q2;
|
||||
LOG((LOG_CPU,2," f9318 case (g) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (g) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (PRIO_I3_I7 == (in & PRIO_I2_I7)) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_Q0 | PRIO_OUT_Q2;
|
||||
LOG((LOG_CPU,2," f9318 case (h) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (h) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (PRIO_I2_I7 == (in & PRIO_I1_I7)) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_Q1 | PRIO_OUT_Q2;
|
||||
LOG((LOG_CPU,2," f9318 case (i) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (i) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
if (PRIO_I1_I7 == (in & PRIO_I0_I7)) {
|
||||
out = PRIO_OUT_EO | PRIO_OUT_Q0 | PRIO_OUT_Q1 | PRIO_OUT_Q2;
|
||||
LOG((LOG_CPU,2," f9318 case (j) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (j) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
|
||||
out = PRIO_OUT_QZ | PRIO_OUT_GS;
|
||||
LOG((LOG_CPU,2," f9318 case (b) in:%#o out:%#o\n", in, out));
|
||||
LOG((this,LOG_CPU,2," f9318 case (b) in:%#o out:%#o\n", in, out));
|
||||
return out;
|
||||
}
|
||||
#endif
|
||||
@ -1734,11 +1734,11 @@ void alto2_cpu_device::f1_early_task()
|
||||
register int ct1, ct2, ct4, ct8;
|
||||
register int wakeup, ct;
|
||||
|
||||
LOG((LOG_CPU,2, " TASK %02o:%s\n", m_task, task_name(m_task)));
|
||||
LOG((this,LOG_CPU,2, " TASK %02o:%s\n", m_task, task_name(m_task)));
|
||||
|
||||
if (m_task > task_emu && (m_task_wakeup & (1 << m_task)))
|
||||
addr = m_task;
|
||||
LOG((LOG_CPU,2," ctl2k_u38[%02o] = %04o\n", addr, ctl2k_u38[addr] & 017));
|
||||
LOG((this,LOG_CPU,2," ctl2k_u38[%02o] = %04o\n", addr, ctl2k_u38[addr] & 017));
|
||||
|
||||
rdct1 = (ctl2k_u38[addr] >> U38_RDCT1) & 1;
|
||||
rdct2 = (ctl2k_u38[addr] >> U38_RDCT2) & 1;
|
||||
@ -1766,38 +1766,38 @@ void alto2_cpu_device::f1_early_task()
|
||||
|
||||
/* CT1 = (U1.Q0' & U2.Q0' & RDCT1')' */
|
||||
ct1 = !((u1 & PRIO_OUT_Q0) && (u2 & PRIO_OUT_Q0) && rdct1);
|
||||
LOG((LOG_CPU,2," CT1:%o U1.Q0':%o U2.Q0':%o RDCT1':%o\n",
|
||||
LOG((this,LOG_CPU,2," CT1:%o U1.Q0':%o U2.Q0':%o RDCT1':%o\n",
|
||||
ct1, (u1 & PRIO_OUT_Q0)?1:0, (u2 & PRIO_OUT_Q0)?1:0, rdct1));
|
||||
/* CT2 = (U1.Q1' & U2.Q1' & RDCT2')' */
|
||||
ct2 = !((u1 & PRIO_OUT_Q1) && (u2 & PRIO_OUT_Q1) && rdct2);
|
||||
LOG((LOG_CPU,2," CT2:%o U1.Q1':%o U2.Q1':%o RDCT2':%o\n",
|
||||
LOG((this,LOG_CPU,2," CT2:%o U1.Q1':%o U2.Q1':%o RDCT2':%o\n",
|
||||
ct2, (u1 & PRIO_OUT_Q1)?1:0, (u2 & PRIO_OUT_Q1)?1:0, rdct2));
|
||||
/* CT4 = (U1.Q2' & U2.Q2' & RDCT4')' */
|
||||
ct4 = !((u1 & PRIO_OUT_Q2) && (u2 & PRIO_OUT_Q2) && rdct4);
|
||||
LOG((LOG_CPU,2," CT4:%o U1.Q2':%o U2.Q2':%o RDCT4':%o\n",
|
||||
LOG((this,LOG_CPU,2," CT4:%o U1.Q2':%o U2.Q2':%o RDCT4':%o\n",
|
||||
ct4, (u1 & PRIO_OUT_Q2)?1:0, (u2 & PRIO_OUT_Q2)?1:0, rdct4));
|
||||
/* CT8 */
|
||||
ct8 = !((u1 & PRIO_OUT_GS) && rdct8);
|
||||
LOG((LOG_CPU,2," CT8:%o U1.GS':%o RDCT8':%o\n",
|
||||
LOG((this,LOG_CPU,2," CT8:%o U1.GS':%o RDCT8':%o\n",
|
||||
ct8, (u1 & PRIO_OUT_GS)?1:0, rdct8));
|
||||
|
||||
ct = 8*ct8 + 4*ct4 + 2*ct2 + ct1;
|
||||
|
||||
if (ct != m_next_task) {
|
||||
LOG((LOG_CPU,2, " switch to %02o\n", ct));
|
||||
LOG((this,LOG_CPU,2, " switch to %02o\n", ct));
|
||||
m_next2_task = ct;
|
||||
} else {
|
||||
LOG((LOG_CPU,2, " no switch\n"));
|
||||
LOG((this,LOG_CPU,2, " no switch\n"));
|
||||
}
|
||||
#else /* USE_PRIO_F9318 */
|
||||
LOG((LOG_CPU,2, " TASK %02o:%s", m_task, task_name(m_task)));
|
||||
LOG((this,LOG_CPU,2, " TASK %02o:%s", m_task, task_name(m_task)));
|
||||
for (int i = 15; i >= 0; i--) {
|
||||
if (m_task_wakeup & (1 << i)) {
|
||||
m_next2_task = i;
|
||||
if (m_next2_task != m_next_task) {
|
||||
LOG((LOG_CPU,2, " switch to %02o:%s\n", m_next2_task, task_name(m_next2_task)));
|
||||
LOG((this,LOG_CPU,2, " switch to %02o:%s\n", m_next2_task, task_name(m_next2_task)));
|
||||
} else {
|
||||
LOG((LOG_CPU,2, " no switch\n"));
|
||||
LOG((this,LOG_CPU,2, " no switch\n"));
|
||||
}
|
||||
return;
|
||||
}
|
||||
@ -1814,7 +1814,7 @@ void alto2_cpu_device::f1_early_task()
|
||||
void alto2_cpu_device::f1_early_block()
|
||||
{
|
||||
m_task_wakeup &= ~(1 << m_task);
|
||||
LOG((LOG_CPU,2, " BLOCK %02o:%s\n", m_task, task_name(m_task)));
|
||||
LOG((this,LOG_CPU,2, " BLOCK %02o:%s\n", m_task, task_name(m_task)));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1823,7 +1823,7 @@ void alto2_cpu_device::f1_early_block()
|
||||
void alto2_cpu_device::f1_late_l_lsh_1()
|
||||
{
|
||||
m_shifter = m_l << 1;
|
||||
LOG((LOG_CPU,2," SHIFTER <-L LSH 1 (%#o := %#o<<1)\n", m_shifter, m_l));
|
||||
LOG((this,LOG_CPU,2," SHIFTER <-L LSH 1 (%#o := %#o<<1)\n", m_shifter, m_l));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1832,7 +1832,7 @@ void alto2_cpu_device::f1_late_l_lsh_1()
|
||||
void alto2_cpu_device::f1_late_l_rsh_1()
|
||||
{
|
||||
m_shifter = m_l >> 1;
|
||||
LOG((LOG_CPU,2," SHIFTER <-L RSH 1 (%#o := %#o>>1)\n", m_shifter, m_l));
|
||||
LOG((this,LOG_CPU,2," SHIFTER <-L RSH 1 (%#o := %#o>>1)\n", m_shifter, m_l));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1841,7 +1841,7 @@ void alto2_cpu_device::f1_late_l_rsh_1()
|
||||
void alto2_cpu_device::f1_late_l_lcy_8()
|
||||
{
|
||||
m_shifter = (m_l >> 8) | (m_l << 8);
|
||||
LOG((LOG_CPU,2," SHIFTER <-L LCY 8 (%#o := bswap %#o)\n", m_shifter, m_l));
|
||||
LOG((this,LOG_CPU,2," SHIFTER <-L LCY 8 (%#o := bswap %#o)\n", m_shifter, m_l));
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1850,7 +1850,7 @@ void alto2_cpu_device::f1_late_l_lcy_8()
|
||||
void alto2_cpu_device::f2_late_bus_eq_zero()
|
||||
{
|
||||
UINT16 r = m_bus == 0 ? 1 : 0;
|
||||
LOG((LOG_CPU,2, " BUS=0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
LOG((this,LOG_CPU,2, " BUS=0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -1860,7 +1860,7 @@ void alto2_cpu_device::f2_late_bus_eq_zero()
|
||||
void alto2_cpu_device::f2_late_shifter_lt_zero()
|
||||
{
|
||||
UINT16 r = (m_shifter & 0100000) ? 1 : 0;
|
||||
LOG((LOG_CPU,2, " SH<0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
LOG((this,LOG_CPU,2, " SH<0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -1870,7 +1870,7 @@ void alto2_cpu_device::f2_late_shifter_lt_zero()
|
||||
void alto2_cpu_device::f2_late_shifter_eq_zero()
|
||||
{
|
||||
UINT16 r = m_shifter == 0 ? 1 : 0;
|
||||
LOG((LOG_CPU,2, " SH=0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
LOG((this,LOG_CPU,2, " SH=0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -1880,7 +1880,7 @@ void alto2_cpu_device::f2_late_shifter_eq_zero()
|
||||
void alto2_cpu_device::f2_late_bus()
|
||||
{
|
||||
UINT16 r = X_RDBITS(m_bus,16,6,15);
|
||||
LOG((LOG_CPU,2, " BUS; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
LOG((this,LOG_CPU,2, " BUS; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -1890,7 +1890,7 @@ void alto2_cpu_device::f2_late_bus()
|
||||
void alto2_cpu_device::f2_late_alucy()
|
||||
{
|
||||
UINT16 r = m_laluc0;
|
||||
LOG((LOG_CPU,2, " ALUCY; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
LOG((this,LOG_CPU,2, " ALUCY; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
|
||||
m_next2 |= r;
|
||||
}
|
||||
|
||||
@ -1906,10 +1906,10 @@ void alto2_cpu_device::f2_late_load_md()
|
||||
#endif
|
||||
if (m_d_f1 == f1_load_mar) {
|
||||
/* part of an XMAR */
|
||||
LOG((LOG_CPU,2, " XMAR %#o (%#o)\n", mar, m_bus));
|
||||
LOG((this,LOG_CPU,2, " XMAR %#o (%#o)\n", mar, m_bus));
|
||||
} else {
|
||||
write_mem(m_bus);
|
||||
LOG((LOG_CPU,2, " MD<- BUS ([%#o]=%#o)\n", mar, m_bus));
|
||||
LOG((this,LOG_CPU,2, " MD<- BUS ([%#o]=%#o)\n", mar, m_bus));
|
||||
}
|
||||
}
|
||||
|
||||
@ -2320,11 +2320,11 @@ void alto2_cpu_device::execute_run()
|
||||
|
||||
|
||||
if (m_d_f1 == f1_load_mar && check_mem_load_mar_stall(m_rsel)) {
|
||||
LOG((LOG_CPU,3, " MAR<- stall\n"));
|
||||
LOG((this,LOG_CPU,3, " MAR<- stall\n"));
|
||||
continue;
|
||||
}
|
||||
if (m_d_f2 == f2_load_md && check_mem_write_stall()) {
|
||||
LOG((LOG_CPU,3, " MD<- stall\n"));
|
||||
LOG((this,LOG_CPU,3, " MD<- stall\n"));
|
||||
continue;
|
||||
}
|
||||
/*
|
||||
@ -2334,14 +2334,14 @@ void alto2_cpu_device::execute_run()
|
||||
*/
|
||||
do_bs = !(m_d_f1 == f1_const || m_d_f2 == f2_const);
|
||||
if (do_bs && m_d_bs == bs_read_md && check_mem_read_stall()) {
|
||||
LOG((LOG_CPU,3, " <-MD stall\n"));
|
||||
LOG((this,LOG_CPU,3, " <-MD stall\n"));
|
||||
continue;
|
||||
}
|
||||
// now read the next instruction field from the MIR and modify it
|
||||
m_next = X_RDBITS(m_mir, 32, NEXT0, NEXT9) | m_next2;
|
||||
// prefetch the next instruction's next field as next2
|
||||
m_next2 = X_RDBITS(RD_UCODE(m_next), 32, NEXT0, NEXT9) | (m_next2 & ~ALTO2_UCODE_PAGE_MASK);
|
||||
LOG((LOG_CPU,2,"%s-%04o: %011o r:%02o aluf:%02o bs:%02o f1:%02o f2:%02o t:%o l:%o next:%05o next2:%05o\n",
|
||||
LOG((this,LOG_CPU,2,"%s-%04o: %011o r:%02o aluf:%02o bs:%02o f1:%02o f2:%02o t:%o l:%o next:%05o next2:%05o\n",
|
||||
task_name(m_task), m_mpc, m_mir, m_rsel, m_d_aluf, m_d_bs, m_d_f1, m_d_f2, m_d_loadt, m_d_loadl, m_next, m_next2));
|
||||
|
||||
// BUS is all ones at the start of each cycle
|
||||
@ -2356,7 +2356,7 @@ void alto2_cpu_device::execute_run()
|
||||
// FIXME: is the format of m_const_data endian safe?
|
||||
UINT16 data = m_const_data[2*addr] | (m_const_data[2*addr+1] << 8);
|
||||
m_bus &= data;
|
||||
LOG((LOG_CPU,2," %#o; BUS &= %#o CONST[%03o]\n", m_bus, data, addr));
|
||||
LOG((this,LOG_CPU,2," %#o; BUS &= %#o CONST[%03o]\n", m_bus, data, addr));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2402,7 +2402,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM;
|
||||
LOG((LOG_CPU,2," ALU<- BUS (%#o := %#o)\n", alu, m_bus));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS (%#o := %#o)\n", alu, m_bus));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2415,7 +2415,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_t;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM;
|
||||
LOG((LOG_CPU,2," ALU<- T (%#o := %#o)\n", alu, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- T (%#o := %#o)\n", alu, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2428,7 +2428,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus | m_t;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM | TSELECT;
|
||||
LOG((LOG_CPU,2," ALU<- BUS OR T (%#o := %#o | %#o)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS OR T (%#o := %#o | %#o)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2441,7 +2441,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus & m_t;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM;
|
||||
LOG((LOG_CPU,2," ALU<- BUS AND T (%#o := %#o & %#o)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS AND T (%#o := %#o & %#o)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2454,7 +2454,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus ^ m_t;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM;
|
||||
LOG((LOG_CPU,2," ALU<- BUS XOR T (%#o := %#o ^ %#o)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS XOR T (%#o := %#o ^ %#o)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2467,7 +2467,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus + 1;
|
||||
m_aluc0 = (alu >> 16) & 1;
|
||||
flags = TSELECT;
|
||||
LOG((LOG_CPU,2," ALU<- BUS + 1 (%#o := %#o + 1)\n", alu, m_bus));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS + 1 (%#o := %#o + 1)\n", alu, m_bus));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2480,7 +2480,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus + 0177777;
|
||||
m_aluc0 = (~alu >> 16) & 1;
|
||||
flags = TSELECT;
|
||||
LOG((LOG_CPU,2," ALU<- BUS - 1 (%#o := %#o - 1)\n", alu, m_bus));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS - 1 (%#o := %#o - 1)\n", alu, m_bus));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2493,7 +2493,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus + m_t;
|
||||
m_aluc0 = (alu >> 16) & 1;
|
||||
flags = 0;
|
||||
LOG((LOG_CPU,2," ALU<- BUS + T (%#o := %#o + %#o)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS + T (%#o := %#o + %#o)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2506,7 +2506,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus + ~m_t + 1;
|
||||
m_aluc0 = (~alu >> 16) & 1;
|
||||
flags = 0;
|
||||
LOG((LOG_CPU,2," ALU<- BUS - T (%#o := %#o - %#o)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS - T (%#o := %#o - %#o)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2519,7 +2519,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus + ~m_t;
|
||||
m_aluc0 = (~alu >> 16) & 1;
|
||||
flags = 0;
|
||||
LOG((LOG_CPU,2," ALU<- BUS - T - 1 (%#o := %#o - %#o - 1)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS - T - 1 (%#o := %#o - %#o - 1)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2532,7 +2532,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus + m_t + 1;
|
||||
m_aluc0 = (alu >> 16) & 1;
|
||||
flags = TSELECT;
|
||||
LOG((LOG_CPU,2," ALU<- BUS + T + 1 (%#o := %#o + %#o + 1)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS + T + 1 (%#o := %#o + %#o + 1)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2545,7 +2545,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus + m_emu.skip;
|
||||
m_aluc0 = (alu >> 16) & 1;
|
||||
flags = TSELECT;
|
||||
LOG((LOG_CPU,2," ALU<- BUS + SKIP (%#o := %#o + %#o)\n", alu, m_bus, m_emu.skip));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS + SKIP (%#o := %#o + %#o)\n", alu, m_bus, m_emu.skip));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2558,7 +2558,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus & m_t;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM | TSELECT;
|
||||
LOG((LOG_CPU,2," ALU<- BUS,T (%#o := %#o & %#o)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS,T (%#o := %#o & %#o)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2571,7 +2571,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus & ~m_t;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM;
|
||||
LOG((LOG_CPU,2," ALU<- BUS AND NOT T (%#o := %#o & ~%#o)\n", alu, m_bus, m_t));
|
||||
LOG((this,LOG_CPU,2," ALU<- BUS AND NOT T (%#o := %#o & ~%#o)\n", alu, m_bus, m_t));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2584,7 +2584,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM | TSELECT;
|
||||
LOG((LOG_CPU,0," ALU<- 0 (illegal aluf in task %s, mpc:%05o aluf:%02o)\n", task_name(m_task), m_mpc, m_d_aluf));
|
||||
LOG((this,LOG_CPU,0," ALU<- 0 (illegal aluf in task %s, mpc:%05o aluf:%02o)\n", task_name(m_task), m_mpc, m_d_aluf));
|
||||
break;
|
||||
|
||||
/**
|
||||
@ -2598,7 +2598,7 @@ void alto2_cpu_device::execute_run()
|
||||
alu = m_bus;
|
||||
m_aluc0 = 1;
|
||||
flags = ALUM | TSELECT;
|
||||
LOG((LOG_CPU,0," ALU<- 0 (illegal aluf in task %s, mpc:%05o aluf:%02o)\n", task_name(m_task), m_mpc, m_d_aluf));
|
||||
LOG((this,LOG_CPU,0," ALU<- 0 (illegal aluf in task %s, mpc:%05o aluf:%02o)\n", task_name(m_task), m_mpc, m_d_aluf));
|
||||
}
|
||||
m_alu = static_cast<UINT16>(alu);
|
||||
#endif
|
||||
@ -2625,10 +2625,10 @@ void alto2_cpu_device::execute_run()
|
||||
m_cram_addr = m_alu; // latch CRAM address
|
||||
if (flags & TSELECT) {
|
||||
m_t = m_alu; // T source is ALU
|
||||
LOG((LOG_CPU,2, " T<- ALU (%#o)\n", m_alu));
|
||||
LOG((this,LOG_CPU,2, " T<- ALU (%#o)\n", m_alu));
|
||||
} else {
|
||||
m_t = m_bus; // T source is BUS
|
||||
LOG((LOG_CPU,2, " T<- BUS (%#o)\n", m_bus));
|
||||
LOG((this,LOG_CPU,2, " T<- BUS (%#o)\n", m_bus));
|
||||
}
|
||||
}
|
||||
|
||||
@ -2637,16 +2637,16 @@ void alto2_cpu_device::execute_run()
|
||||
m_l = m_alu; // load L from ALU
|
||||
if (flags & ALUM) {
|
||||
m_laluc0 = 0; // logic operation - put 0 into latched carry
|
||||
LOG((LOG_CPU,2, " L<- ALU (%#o); LALUC0<- %o\n", m_alu, 0));
|
||||
LOG((this,LOG_CPU,2, " L<- ALU (%#o); LALUC0<- %o\n", m_alu, 0));
|
||||
} else {
|
||||
m_laluc0 = m_aluc0; // arithmethic operation - put ALU carry into latched carry
|
||||
LOG((LOG_CPU,2, " L<- ALU (%#o); LALUC0<- ALUC0 (%o)\n", m_alu, m_aluc0));
|
||||
LOG((this,LOG_CPU,2, " L<- ALU (%#o); LALUC0<- ALUC0 (%o)\n", m_alu, m_aluc0));
|
||||
}
|
||||
// update M (MYL) register, if a RAM related task is active
|
||||
if (m_ram_related[m_task]) {
|
||||
m_m = m_alu; // load M from ALU, if 'GOODTASK'
|
||||
m_s[m_s_reg_bank[m_task]][0] = m_alu; // also writes to S[bank][0], which can't be read
|
||||
LOG((LOG_CPU,2, " M<- ALU (%#o)\n", m_alu));
|
||||
LOG((this,LOG_CPU,2, " M<- ALU (%#o)\n", m_alu));
|
||||
}
|
||||
}
|
||||
|
||||
@ -2661,7 +2661,7 @@ void alto2_cpu_device::execute_run()
|
||||
m_task_mpc[m_task] = m_next;
|
||||
m_task_next2[m_task] = m_next2;
|
||||
m_task = m_next_task;
|
||||
LOG((LOG_CPU,1, "task switch to %02o:%s (cycle %lld)\n", m_task, task_name(m_task), cycle()));
|
||||
LOG((this,LOG_CPU,1, "task switch to %02o:%s (cycle %lld)\n", m_task, task_name(m_task), cycle()));
|
||||
m_next = m_task_mpc[m_task]; // get new task's mpc
|
||||
m_next2 = m_task_next2[m_task]; // get address modifier after task switch (needed?)
|
||||
|
||||
|
@ -128,7 +128,7 @@ enum {
|
||||
extern int m_log_types;
|
||||
extern int m_log_level;
|
||||
extern bool m_log_newline;
|
||||
void logprintf(int type, int level, const char* format, ...);
|
||||
void logprintf(device_t *device, int type, int level, const char* format, ...);
|
||||
# define LOG(x) logprintf x
|
||||
#else
|
||||
# define LOG(x)
|
||||
|
@ -394,7 +394,7 @@ void external_p_wait_states_set(dsp56k_core* cpustate, UINT16 value)
|
||||
void PBC_set(dsp56k_core* cpustate, UINT16 value)
|
||||
{
|
||||
if (value & 0xfffe)
|
||||
logerror("Dsp56k : Attempting to set reserved bits in the PBC. Ignoring.\n");
|
||||
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PBC. Ignoring.\n");
|
||||
|
||||
value = value & 0x0001;
|
||||
PBC &= ~(0x0001);
|
||||
@ -413,7 +413,7 @@ int host_interface_active(dsp56k_core* cpustate)
|
||||
void PBDDR_set(dsp56k_core* cpustate, UINT16 value)
|
||||
{
|
||||
if (value & 0x8000)
|
||||
logerror("Dsp56k : Attempting to set reserved bits in the PBDDR. Ignoring.\n");
|
||||
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PBDDR. Ignoring.\n");
|
||||
|
||||
value = value & 0x7fff;
|
||||
PBDDR &= ~(0x7fff);
|
||||
@ -426,7 +426,7 @@ void PBDDR_set(dsp56k_core* cpustate, UINT16 value)
|
||||
void PBD_set(dsp56k_core* cpustate, UINT16 value)
|
||||
{
|
||||
if (value & 0x8000)
|
||||
logerror("Dsp56k : Attempting to set reserved bits in the PBD. Ignoring.\n");
|
||||
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PBD. Ignoring.\n");
|
||||
|
||||
value = value & 0x7fff;
|
||||
PBD &= ~(0x7fff);
|
||||
@ -439,7 +439,7 @@ void PBD_set(dsp56k_core* cpustate, UINT16 value)
|
||||
void PCC_set(dsp56k_core* cpustate, UINT16 value)
|
||||
{
|
||||
if (value & 0xf000)
|
||||
logerror("Dsp56k : Attempting to set reserved bits in the PCC. Ignoring.\n");
|
||||
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PCC. Ignoring.\n");
|
||||
|
||||
value = value & 0x0fff;
|
||||
PCC &= ~(0x0fff);
|
||||
@ -452,7 +452,7 @@ void PCC_set(dsp56k_core* cpustate, UINT16 value)
|
||||
void PCDDR_set(dsp56k_core* cpustate, UINT16 value)
|
||||
{
|
||||
if (value & 0xf000)
|
||||
logerror("Dsp56k : Attempting to set reserved bits in the PCDDR. Ignoring.\n");
|
||||
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PCDDR. Ignoring.\n");
|
||||
|
||||
value = value & 0x0fff;
|
||||
PCDDR &= ~(0x0fff);
|
||||
@ -465,10 +465,10 @@ void PCDDR_set(dsp56k_core* cpustate, UINT16 value)
|
||||
void PCD_set(dsp56k_core* cpustate, UINT16 value)
|
||||
{
|
||||
if (value & 0xf000)
|
||||
logerror("Dsp56k : Attempting to set reserved bits in the PCD. Ignoring.\n");
|
||||
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PCD. Ignoring.\n");
|
||||
|
||||
/* TODO: Temporary */
|
||||
logerror("Dsp56k : Setting general output port C data to 0x%04x\n", value);
|
||||
cpustate->device->logerror("Dsp56k : Setting general output port C data to 0x%04x\n", value);
|
||||
|
||||
value = value & 0x0fff;
|
||||
PCD &= ~(0x0fff);
|
||||
@ -492,7 +492,7 @@ void dsp56k_io_reset(dsp56k_core* cpustate)
|
||||
READ16_MEMBER( dsp56k_device::peripheral_register_r )
|
||||
{
|
||||
dsp56k_core* cpustate = &m_dsp56k_core;
|
||||
// (printf) logerror("Peripheral read 0x%04x\n", O2A(offset));
|
||||
// (printf) cpustate->device->logerror("Peripheral read 0x%04x\n", O2A(offset));
|
||||
|
||||
switch (O2A(offset))
|
||||
{
|
||||
@ -630,7 +630,7 @@ WRITE16_MEMBER( dsp56k_device::peripheral_register_w )
|
||||
// Its primary behavior is RAM
|
||||
// COMBINE_DATA(&cpustate->peripheral_ram[offset]);
|
||||
|
||||
// (printf) logerror("Peripheral write 0x%04x = %04x\n", O2A(offset), data);
|
||||
// (printf) cpustate->device->logerror("Peripheral write 0x%04x = %04x\n", O2A(offset), data);
|
||||
|
||||
// 4-8
|
||||
switch (O2A(offset))
|
||||
@ -665,7 +665,7 @@ WRITE16_MEMBER( dsp56k_device::peripheral_register_w )
|
||||
|
||||
// reserved for test
|
||||
case 0xffc9:
|
||||
logerror("DSP56k : Warning write to 0xffc9 reserved for test.\n");
|
||||
cpustate->device->logerror("DSP56k : Warning write to 0xffc9 reserved for test.\n");
|
||||
break;
|
||||
|
||||
// CRA-SSI0 Control Register A
|
||||
@ -685,7 +685,7 @@ WRITE16_MEMBER( dsp56k_device::peripheral_register_w )
|
||||
|
||||
// reserved for future use
|
||||
case 0xffdd:
|
||||
logerror("DSP56k : Warning write to 0xffdd reserved for future use.\n");
|
||||
cpustate->device->logerror("DSP56k : Warning write to 0xffdd reserved for future use.\n");
|
||||
break;
|
||||
|
||||
// BCR: Bus Control Register
|
||||
@ -773,7 +773,7 @@ WRITE16_MEMBER( dsp56k_device::peripheral_register_w )
|
||||
|
||||
// Reserved for on-chip emulation
|
||||
case 0xffff:
|
||||
logerror("DSP56k : Warning write to 0xffff reserved for on-chip emulation.\n");
|
||||
cpustate->device->logerror("DSP56k : Warning write to 0xffff reserved for on-chip emulation.\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -787,7 +787,7 @@ void dsp56k_device::host_interface_write(UINT8 offset, UINT8 data)
|
||||
/* Not exactly correct since the bootstrap hack doesn't need this to be true */
|
||||
/*
|
||||
if (!host_interface_active())
|
||||
logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
|
||||
cpustate->device->logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
|
||||
*/
|
||||
|
||||
switch (offset)
|
||||
@ -817,7 +817,7 @@ void dsp56k_device::host_interface_write(UINT8 offset, UINT8 data)
|
||||
|
||||
// Interrupt status register (ISR) - Read only!
|
||||
case 0x02:
|
||||
logerror("DSP56k : Interrupt status register is read only.\n");
|
||||
cpustate->device->logerror("DSP56k : Interrupt status register is read only.\n");
|
||||
break;
|
||||
|
||||
// Interrupt vector register (IVR)
|
||||
@ -825,12 +825,12 @@ void dsp56k_device::host_interface_write(UINT8 offset, UINT8 data)
|
||||
|
||||
// Not used
|
||||
case 0x04:
|
||||
logerror("DSP56k : Address 0x4 on the host side of the host interface is not used.\n");
|
||||
cpustate->device->logerror("DSP56k : Address 0x4 on the host side of the host interface is not used.\n");
|
||||
break;
|
||||
|
||||
// Reserved
|
||||
case 0x05:
|
||||
logerror("DSP56k : Address 0x5 on the host side of the host interface is reserved.\n");
|
||||
cpustate->device->logerror("DSP56k : Address 0x5 on the host side of the host interface is reserved.\n");
|
||||
break;
|
||||
|
||||
// Transmit byte register - high byte (TXH)
|
||||
@ -872,7 +872,7 @@ void dsp56k_device::host_interface_write(UINT8 offset, UINT8 data)
|
||||
}
|
||||
break;
|
||||
|
||||
default: logerror("DSP56k : dsp56k_host_interface_write called with invalid address 0x%02x.\n", offset);
|
||||
default: cpustate->device->logerror("DSP56k : dsp56k_host_interface_write called with invalid address 0x%02x.\n", offset);
|
||||
}
|
||||
}
|
||||
|
||||
@ -883,7 +883,7 @@ UINT8 dsp56k_device::host_interface_read(UINT8 offset)
|
||||
/* Not exactly correct since the bootstrap hack doesn't need this to be true */
|
||||
/*
|
||||
if (!host_interface_active())
|
||||
logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
|
||||
cpustate->device->logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
|
||||
*/
|
||||
|
||||
switch (offset)
|
||||
@ -910,7 +910,7 @@ UINT8 dsp56k_device::host_interface_read(UINT8 offset)
|
||||
|
||||
// Reserved
|
||||
case 0x05:
|
||||
logerror("DSP56k : Address 0x5 on the host side of the host interface is reserved.\n");
|
||||
cpustate->device->logerror("DSP56k : Address 0x5 on the host side of the host interface is reserved.\n");
|
||||
break;
|
||||
|
||||
// Receive byte register - high byte (RXH)
|
||||
@ -933,7 +933,7 @@ UINT8 dsp56k_device::host_interface_read(UINT8 offset)
|
||||
return value;
|
||||
}
|
||||
|
||||
default: logerror("DSP56k : dsp56k_host_interface_read called with invalid address 0x%02x.\n", offset);
|
||||
default: cpustate->device->logerror("DSP56k : dsp56k_host_interface_read called with invalid address 0x%02x.\n", offset);
|
||||
}
|
||||
|
||||
/* Shouldn't get here */
|
||||
|
@ -323,7 +323,7 @@ static void execute_one(dsp56k_core* cpustate)
|
||||
|
||||
/* Now evaluate the parallel data move */
|
||||
/* TODO // decode_x_memory_data_write_and_register_data_move(op, parallel_move_str, parallel_move_str2); */
|
||||
logerror("DSP56k: Unemulated Dual X Memory Data And Register Data Move @ 0x%x\n", PC);
|
||||
cpustate->device->logerror("DSP56k: Unemulated Dual X Memory Data And Register Data Move @ 0x%x\n", PC);
|
||||
}
|
||||
|
||||
/* Handle Other parallel types */
|
||||
@ -1088,7 +1088,7 @@ static void execute_one(dsp56k_core* cpustate)
|
||||
/* Not recognized? Nudge debugger onto the next word */
|
||||
if (size == 0x1337)
|
||||
{
|
||||
logerror("DSP56k: Unimplemented opcode at 0x%04x : %04x\n", PC, op);
|
||||
cpustate->device->logerror("DSP56k: Unimplemented opcode at 0x%04x : %04x\n", PC, op);
|
||||
size = 1 ; /* Just to get the debugger past the bad opcode */
|
||||
}
|
||||
|
||||
@ -2865,17 +2865,17 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
|
||||
/* HACK */
|
||||
if (lValue >= 0xfff0)
|
||||
{
|
||||
logerror("Dsp56k : DO_2 operation changed %04x to 0000.\n", lValue);
|
||||
cpustate->device->logerror("Dsp56k : DO_2 operation changed %04x to 0000.\n", lValue);
|
||||
lValue = 0x0000;
|
||||
}
|
||||
|
||||
/* TODO: Fix for special cased SP S */
|
||||
if (S.addr == &SP)
|
||||
logerror("DSP56k: do with SP as the source not properly implemented yet.\n");
|
||||
cpustate->device->logerror("DSP56k: do with SP as the source not properly implemented yet.\n");
|
||||
|
||||
/* TODO: Fix for special cased SSSL S */
|
||||
if (S.addr == &SSL)
|
||||
logerror("DSP56k: do with SP as the source not properly implemented yet.\n");
|
||||
cpustate->device->logerror("DSP56k: do with SP as the source not properly implemented yet.\n");
|
||||
|
||||
/* Don't execute if the loop counter == 0 */
|
||||
if (lValue != 0x00)
|
||||
@ -3429,7 +3429,7 @@ static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const UINT16 op, const UI
|
||||
if (t)
|
||||
{
|
||||
/* 16-bit long data */
|
||||
logerror("DSP56k: Movec - I don't think this exists?");
|
||||
cpustate->device->logerror("DSP56k: Movec - I don't think this exists?");
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -3812,7 +3812,7 @@ static size_t dsp56k_op_rep_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
|
||||
|
||||
/* TODO: handle special A&B source cases */
|
||||
if (D.addr == &A || D.addr == &B)
|
||||
logerror("DSP56k ERROR : Rep with A or B instruction not implemented yet!\n");
|
||||
cpustate->device->logerror("DSP56k ERROR : Rep with A or B instruction not implemented yet!\n");
|
||||
|
||||
repValue = *((UINT16*)D.addr);
|
||||
|
||||
|
@ -127,7 +127,7 @@ void pcu_reset(dsp56k_core* cpustate)
|
||||
switch(dsp56k_operating_mode(cpustate))
|
||||
{
|
||||
case 0x00:
|
||||
logerror("Dsp56k in Special Bootstrap Mode 1\n");
|
||||
cpustate->device->logerror("Dsp56k in Special Bootstrap Mode 1\n");
|
||||
|
||||
/* HACK - We don't need to put the bootstrap mode on here since */
|
||||
/* we'll simulate it entirely in this function */
|
||||
@ -160,7 +160,7 @@ void pcu_reset(dsp56k_core* cpustate)
|
||||
break;
|
||||
|
||||
case 0x01:
|
||||
logerror("Dsp56k in Special Bootstrap Mode 2\n");
|
||||
cpustate->device->logerror("Dsp56k in Special Bootstrap Mode 2\n");
|
||||
|
||||
/* HACK - Turn bootstrap mode on. This hijacks the CPU execute loop and lets */
|
||||
/* Either the host interface or the SSIO interface suck in all the data */
|
||||
@ -170,12 +170,12 @@ void pcu_reset(dsp56k_core* cpustate)
|
||||
if (cpustate->program->read_word(0xc000<<1) & 0x8000)
|
||||
{
|
||||
cpustate->bootstrap_mode = BOOTSTRAP_SSIX;
|
||||
logerror("DSP56k : Currently in (hacked) bootstrap mode - reading from SSIx.\n");
|
||||
cpustate->device->logerror("DSP56k : Currently in (hacked) bootstrap mode - reading from SSIx.\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
cpustate->bootstrap_mode = BOOTSTRAP_HI;
|
||||
logerror("DSP56k : Currently in (hacked) bootstrap mode - reading from Host Interface.\n");
|
||||
cpustate->device->logerror("DSP56k : Currently in (hacked) bootstrap mode - reading from Host Interface.\n");
|
||||
}
|
||||
|
||||
/* HACK - Set the PC to 0x0000 as per the boot ROM. */
|
||||
@ -188,13 +188,13 @@ void pcu_reset(dsp56k_core* cpustate)
|
||||
break;
|
||||
|
||||
case 0x02:
|
||||
logerror("Dsp56k in Normal Expanded Mode\n");
|
||||
cpustate->device->logerror("Dsp56k in Normal Expanded Mode\n");
|
||||
PC = 0xe000;
|
||||
cpustate->PCU.reset_vector = 0xe000;
|
||||
break;
|
||||
|
||||
case 0x03:
|
||||
logerror("Dsp56k in Development Expanded Mode\n");
|
||||
cpustate->device->logerror("Dsp56k in Development Expanded Mode\n");
|
||||
/* TODO: Disable internal ROM, etc. Likely a tricky thing for MAME? */
|
||||
PC = 0x0000;
|
||||
cpustate->PCU.reset_vector = 0x0000;
|
||||
|
@ -2299,7 +2299,7 @@ public:
|
||||
{
|
||||
if (m_t)
|
||||
{
|
||||
logerror("DSP561xx|Movec_4: This sure seems like it can't happen.");
|
||||
osd_printf_error("DSP561xx|Movec_4: This sure seems like it can't happen.");
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1646,7 +1646,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
|
||||
|
||||
default:
|
||||
sprintf(buffer, "Ext. OP $%X @ %X\n", extended_op, pc);
|
||||
logerror(buffer, "Illegal Extended Opcode: %X @ %X\n", extended_op, pc);
|
||||
osd_printf_verbose(buffer, "Illegal Extended Opcode: %X @ %X\n", extended_op, pc);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -1681,7 +1681,7 @@ static void fmove_fpcr(m68000_base_device *m68k, UINT16 w2)
|
||||
int rnd = (REG_FPCR(m68k) >> 4) & 3;
|
||||
int prec = (REG_FPCR(m68k) >> 6) & 3;
|
||||
|
||||
logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", REG_FPCR(m68k), prec, rnd);
|
||||
m68k->logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", REG_FPCR(m68k), prec, rnd);
|
||||
|
||||
#ifdef FLOATX80
|
||||
switch (prec)
|
||||
|
@ -8676,7 +8676,7 @@ void m68000_base_device_ops::m68k_op_callm_32_ai(m68000_base_device* mc68kcpu)
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
REG_PC(mc68kcpu) += 2;
|
||||
(void)ea; /* just to avoid an 'unused variable' warning */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -8694,7 +8694,7 @@ void m68000_base_device_ops::m68k_op_callm_32_di(m68000_base_device* mc68kcpu)
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
REG_PC(mc68kcpu) += 2;
|
||||
(void)ea; /* just to avoid an 'unused variable' warning */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -8712,7 +8712,7 @@ void m68000_base_device_ops::m68k_op_callm_32_ix(m68000_base_device* mc68kcpu)
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
REG_PC(mc68kcpu) += 2;
|
||||
(void)ea; /* just to avoid an 'unused variable' warning */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -8730,7 +8730,7 @@ void m68000_base_device_ops::m68k_op_callm_32_aw(m68000_base_device* mc68kcpu)
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
REG_PC(mc68kcpu) += 2;
|
||||
(void)ea; /* just to avoid an 'unused variable' warning */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -8748,7 +8748,7 @@ void m68000_base_device_ops::m68k_op_callm_32_al(m68000_base_device* mc68kcpu)
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
REG_PC(mc68kcpu) += 2;
|
||||
(void)ea; /* just to avoid an 'unused variable' warning */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -8766,7 +8766,7 @@ void m68000_base_device_ops::m68k_op_callm_32_pcdi(m68000_base_device* mc68kcpu)
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
REG_PC(mc68kcpu) += 2;
|
||||
(void)ea; /* just to avoid an 'unused variable' warning */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -8784,7 +8784,7 @@ void m68000_base_device_ops::m68k_op_callm_32_pcix(m68000_base_device* mc68kcpu)
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
REG_PC(mc68kcpu) += 2;
|
||||
(void)ea; /* just to avoid an 'unused variable' warning */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -12455,7 +12455,7 @@ void m68000_base_device_ops::m68k_op_cpbcc_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
|
||||
{
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -12467,7 +12467,7 @@ void m68000_base_device_ops::m68k_op_cpdbcc_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
|
||||
{
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -12479,7 +12479,7 @@ void m68000_base_device_ops::m68k_op_cpgen_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) && (mc68kcpu->has_fpu || mc68kcpu->has_pmmu))
|
||||
{
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -12491,7 +12491,7 @@ void m68000_base_device_ops::m68k_op_cpscc_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
|
||||
{
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -12503,7 +12503,7 @@ void m68000_base_device_ops::m68k_op_cptrapcc_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
|
||||
{
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -26508,7 +26508,7 @@ void m68000_base_device_ops::m68k_op_pflusha_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu))
|
||||
{
|
||||
logerror("68040: unhandled PFLUSHA (ir=%04x)\n", mc68kcpu->ir);
|
||||
mc68kcpu->logerror("68040: unhandled PFLUSHA (ir=%04x)\n", mc68kcpu->ir);
|
||||
return;
|
||||
}
|
||||
m68ki_exception_1111(mc68kcpu);
|
||||
@ -26519,7 +26519,7 @@ void m68000_base_device_ops::m68k_op_pflushan_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if ((CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu))
|
||||
{
|
||||
logerror("68040: unhandled PFLUSHAN (ir=%04x)\n", mc68kcpu->ir);
|
||||
mc68kcpu->logerror("68040: unhandled PFLUSHAN (ir=%04x)\n", mc68kcpu->ir);
|
||||
return;
|
||||
}
|
||||
m68ki_exception_1111(mc68kcpu);
|
||||
@ -26543,7 +26543,7 @@ void m68000_base_device_ops::m68k_op_ptest_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if ((CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type)) && ((mc68kcpu)->has_pmmu))
|
||||
{
|
||||
logerror("68040: unhandled PTEST\n");
|
||||
mc68kcpu->logerror("68040: unhandled PTEST\n");
|
||||
return;
|
||||
}
|
||||
else
|
||||
@ -27808,7 +27808,7 @@ void m68000_base_device_ops::m68k_op_rtm_32(m68000_base_device* mc68kcpu)
|
||||
if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type))
|
||||
{
|
||||
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
@ -32746,7 +32746,7 @@ void m68000_base_device_ops::m68k_op_cpush_32(m68000_base_device* mc68kcpu)
|
||||
{
|
||||
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
|
||||
{
|
||||
logerror("%s at %08x: called unimplemented instruction %04x (cpush)\n",
|
||||
mc68kcpu->logerror("%s at %08x: called unimplemented instruction %04x (cpush)\n",
|
||||
(mc68kcpu)->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
|
||||
return;
|
||||
}
|
||||
|
@ -12,7 +12,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level, const char *s_fmt, ... )
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -21,7 +21,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
device.logerror( "%s: %s", device.machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
@ -118,13 +118,13 @@ void psxdma_device::dma_interrupt_update()
|
||||
|
||||
if( ( n_mask & 0x80 ) != 0 && ( n_int & n_mask ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 2, "dma_interrupt_update( %02x, %02x ) interrupt triggered\n", n_int, n_mask );
|
||||
verboselog( *this, 2, "dma_interrupt_update( %02x, %02x ) interrupt triggered\n", n_int, n_mask );
|
||||
m_dicr |= 0x80000000;
|
||||
m_irq_handler(1);
|
||||
}
|
||||
else if( n_int != 0 )
|
||||
{
|
||||
verboselog( machine(), 2, "dma_interrupt_update( %02x, %02x ) interrupt not enabled\n", n_int, n_mask );
|
||||
verboselog( *this, 2, "dma_interrupt_update( %02x, %02x ) interrupt not enabled\n", n_int, n_mask );
|
||||
}
|
||||
m_dicr &= 0x00ffffff | ( m_dicr << 8 );
|
||||
}
|
||||
@ -221,15 +221,15 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
switch( offset % 4 )
|
||||
{
|
||||
case 0:
|
||||
verboselog( machine(), 2, "dmabase( %d ) = %08x\n", index, data );
|
||||
verboselog( *this, 2, "dmabase( %d ) = %08x\n", index, data );
|
||||
dma->n_base = data;
|
||||
break;
|
||||
case 1:
|
||||
verboselog( machine(), 2, "dmablockcontrol( %d ) = %08x\n", index, data );
|
||||
verboselog( *this, 2, "dmablockcontrol( %d ) = %08x\n", index, data );
|
||||
dma->n_blockcontrol = data;
|
||||
break;
|
||||
case 2:
|
||||
verboselog( machine(), 2, "dmachannelcontrol( %d ) = %08x\n", index, data );
|
||||
verboselog( *this, 2, "dmachannelcontrol( %d ) = %08x\n", index, data );
|
||||
dma->n_channelcontrol = data;
|
||||
if( ( dma->n_channelcontrol & ( 1L << 0x18 ) ) != 0 && ( m_dpcp & ( 1 << ( 3 + ( index * 4 ) ) ) ) != 0 )
|
||||
{
|
||||
@ -256,14 +256,14 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
if( dma->n_channelcontrol == 0x01000000 &&
|
||||
!dma->fn_read.isnull() )
|
||||
{
|
||||
verboselog( machine(), 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
|
||||
verboselog( *this, 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
|
||||
dma->fn_read( m_ram, n_address, n_size );
|
||||
dma_finished( index );
|
||||
}
|
||||
else if ((dma->n_channelcontrol & 0xffbffeff) == 0x11000000 && // CD DMA
|
||||
!dma->fn_read.isnull() )
|
||||
{
|
||||
verboselog( machine(), 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
|
||||
verboselog( *this, 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
|
||||
|
||||
// pSX's CD DMA size calc formula
|
||||
int oursize = (dma->n_blockcontrol>>16);
|
||||
@ -276,7 +276,7 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
else if( dma->n_channelcontrol == 0x01000200 &&
|
||||
!dma->fn_read.isnull() )
|
||||
{
|
||||
verboselog( machine(), 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
|
||||
verboselog( *this, 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
|
||||
dma->fn_read( m_ram, n_address, n_size );
|
||||
if( index == 1 )
|
||||
{
|
||||
@ -290,7 +290,7 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
else if( dma->n_channelcontrol == 0x01000201 &&
|
||||
!dma->fn_write.isnull() )
|
||||
{
|
||||
verboselog( machine(), 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
|
||||
verboselog( *this, 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
|
||||
dma->fn_write( m_ram, n_address, n_size );
|
||||
dma_finished( index );
|
||||
}
|
||||
@ -298,7 +298,7 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
!dma->fn_write.isnull() )
|
||||
{
|
||||
/* todo: check this is a write not a read... */
|
||||
verboselog( machine(), 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
|
||||
verboselog( *this, 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
|
||||
dma->fn_write( m_ram, n_address, n_size );
|
||||
dma_finished( index );
|
||||
}
|
||||
@ -306,7 +306,7 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
!dma->fn_write.isnull() )
|
||||
{
|
||||
/* todo: check this is a write not a read... */
|
||||
verboselog( machine(), 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
|
||||
verboselog( *this, 1, "dma %d write block %08x %08x\n", index, n_address, n_size );
|
||||
dma->fn_write( m_ram, n_address, n_size );
|
||||
dma_finished( index );
|
||||
}
|
||||
@ -314,7 +314,7 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
index == 2 &&
|
||||
!dma->fn_write.isnull() )
|
||||
{
|
||||
verboselog( machine(), 1, "dma %d write linked list %08x\n",
|
||||
verboselog( *this, 1, "dma %d write linked list %08x\n",
|
||||
index, dma->n_base );
|
||||
|
||||
dma_finished( index );
|
||||
@ -322,7 +322,7 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
else if( dma->n_channelcontrol == 0x11000002 &&
|
||||
index == 6 )
|
||||
{
|
||||
verboselog( machine(), 1, "dma 6 reverse clear %08x %08x\n",
|
||||
verboselog( *this, 1, "dma 6 reverse clear %08x %08x\n",
|
||||
dma->n_base, dma->n_blockcontrol );
|
||||
if( n_size > 0 )
|
||||
{
|
||||
@ -340,16 +340,16 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "dma %d unknown mode %08x\n", index, dma->n_channelcontrol );
|
||||
verboselog( *this, 1, "dma %d unknown mode %08x\n", index, dma->n_channelcontrol );
|
||||
}
|
||||
}
|
||||
else if( dma->n_channelcontrol != 0 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_dma_w( %04x, %08x, %08x ) channel not enabled\n", offset, dma->n_channelcontrol, mem_mask );
|
||||
verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) channel not enabled\n", offset, dma->n_channelcontrol, mem_mask );
|
||||
}
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 1, "psx_dma_w( %04x, %08x, %08x ) Unknown dma channel register\n", offset, data, mem_mask );
|
||||
verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) Unknown dma channel register\n", offset, data, mem_mask );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -358,7 +358,7 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
switch( offset % 4 )
|
||||
{
|
||||
case 0x0:
|
||||
verboselog( machine(), 1, "psx_dma_w( %04x, %08x, %08x ) dpcp\n", offset, data, mem_mask );
|
||||
verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) dpcp\n", offset, data, mem_mask );
|
||||
m_dpcp = ( m_dpcp & ~mem_mask ) | data;
|
||||
break;
|
||||
case 0x1:
|
||||
@ -369,14 +369,14 @@ WRITE32_MEMBER( psxdma_device::write )
|
||||
|
||||
if( ( m_dicr & 0x80000000 ) != 0 && ( m_dicr & 0x7f000000 ) == 0 )
|
||||
{
|
||||
verboselog( machine(), 2, "dma interrupt cleared\n" );
|
||||
verboselog( *this, 2, "dma interrupt cleared\n" );
|
||||
m_dicr &= ~0x80000000;
|
||||
}
|
||||
|
||||
verboselog( machine(), 1, "psx_dma_w( %04x, %08x, %08x ) dicr -> %08x\n", offset, data, mem_mask, m_dicr );
|
||||
verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) dicr -> %08x\n", offset, data, mem_mask, m_dicr );
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_dma_w( %04x, %08x, %08x ) Unknown dma control register\n", offset, data, mem_mask );
|
||||
verboselog( *this, 0, "psx_dma_w( %04x, %08x, %08x ) Unknown dma control register\n", offset, data, mem_mask );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -392,16 +392,16 @@ READ32_MEMBER( psxdma_device::read )
|
||||
switch( offset % 4 )
|
||||
{
|
||||
case 0:
|
||||
verboselog( machine(), 1, "psx_dma_r dmabase[ %d ] ( %08x )\n", index, dma->n_base );
|
||||
verboselog( *this, 1, "psx_dma_r dmabase[ %d ] ( %08x )\n", index, dma->n_base );
|
||||
return dma->n_base;
|
||||
case 1:
|
||||
verboselog( machine(), 1, "psx_dma_r dmablockcontrol[ %d ] ( %08x )\n", index, dma->n_blockcontrol );
|
||||
verboselog( *this, 1, "psx_dma_r dmablockcontrol[ %d ] ( %08x )\n", index, dma->n_blockcontrol );
|
||||
return dma->n_blockcontrol;
|
||||
case 2:
|
||||
verboselog( machine(), 1, "psx_dma_r dmachannelcontrol[ %d ] ( %08x )\n", index, dma->n_channelcontrol );
|
||||
verboselog( *this, 1, "psx_dma_r dmachannelcontrol[ %d ] ( %08x )\n", index, dma->n_channelcontrol );
|
||||
return dma->n_channelcontrol;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_dma_r( %08x, %08x ) Unknown dma channel register\n", offset, mem_mask );
|
||||
verboselog( *this, 0, "psx_dma_r( %08x, %08x ) Unknown dma channel register\n", offset, mem_mask );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -410,13 +410,13 @@ READ32_MEMBER( psxdma_device::read )
|
||||
switch( offset % 4 )
|
||||
{
|
||||
case 0x0:
|
||||
verboselog( machine(), 1, "psx_dma_r dpcp ( %08x )\n", m_dpcp );
|
||||
verboselog( *this, 1, "psx_dma_r dpcp ( %08x )\n", m_dpcp );
|
||||
return m_dpcp;
|
||||
case 0x1:
|
||||
verboselog( machine(), 1, "psx_dma_r dicr ( %08x )\n", m_dicr );
|
||||
verboselog( *this, 1, "psx_dma_r dicr ( %08x )\n", m_dicr );
|
||||
return m_dicr;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_dma_r( %08x, %08x ) Unknown dma control register\n", offset, mem_mask );
|
||||
verboselog( *this, 0, "psx_dma_r( %08x, %08x ) Unknown dma control register\n", offset, mem_mask );
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -939,8 +939,8 @@ int gte::docop2( UINT32 pc, int gteop )
|
||||
return 1;
|
||||
}
|
||||
|
||||
popmessage( "unknown GTE op %08x", gteop );
|
||||
logerror( "%08x: unknown GTE op %08x\n", pc, gteop );
|
||||
//popmessage( "unknown GTE op %08x", gteop );
|
||||
//logerror( "%08x: unknown GTE op %08x\n", pc, gteop );
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -14,7 +14,7 @@
|
||||
|
||||
#define PSX_IRQ_MASK ( 0x7fd )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level, const char *s_fmt, ... )
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -23,7 +23,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
device.logerror( "%s: %s", device.machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
@ -58,7 +58,7 @@ void psxirq_device::device_start()
|
||||
|
||||
void psxirq_device::set( UINT32 bitmask )
|
||||
{
|
||||
verboselog( machine(), 2, "psx_irq_set %08x\n", bitmask );
|
||||
verboselog( *this, 2, "psx_irq_set %08x\n", bitmask );
|
||||
n_irqdata |= bitmask;
|
||||
psx_irq_update();
|
||||
}
|
||||
@ -67,12 +67,12 @@ void psxirq_device::psx_irq_update( void )
|
||||
{
|
||||
if( ( n_irqdata & n_irqmask ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 2, "psx irq assert\n" );
|
||||
verboselog( *this, 2, "psx irq assert\n" );
|
||||
m_irq_handler( ASSERT_LINE );
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 2, "psx irq clear\n" );
|
||||
verboselog( *this, 2, "psx irq clear\n" );
|
||||
m_irq_handler( CLEAR_LINE );
|
||||
}
|
||||
}
|
||||
@ -82,21 +82,21 @@ WRITE32_MEMBER( psxirq_device::write )
|
||||
switch( offset )
|
||||
{
|
||||
case 0x00:
|
||||
verboselog( machine(), 2, "psx irq data ( %08x, %08x ) %08x -> %08x\n", data, mem_mask, n_irqdata, ( n_irqdata & ~mem_mask ) | ( n_irqdata & n_irqmask & data ) );
|
||||
verboselog( *this, 2, "psx irq data ( %08x, %08x ) %08x -> %08x\n", data, mem_mask, n_irqdata, ( n_irqdata & ~mem_mask ) | ( n_irqdata & n_irqmask & data ) );
|
||||
n_irqdata = ( n_irqdata & ~mem_mask ) | ( n_irqdata & n_irqmask & data );
|
||||
psx_irq_update();
|
||||
break;
|
||||
case 0x01:
|
||||
verboselog( machine(), 2, "psx irq mask ( %08x, %08x ) %08x -> %08x\n", data, mem_mask, n_irqmask, ( n_irqmask & ~mem_mask ) | data );
|
||||
verboselog( *this, 2, "psx irq mask ( %08x, %08x ) %08x -> %08x\n", data, mem_mask, n_irqmask, ( n_irqmask & ~mem_mask ) | data );
|
||||
n_irqmask = ( n_irqmask & ~mem_mask ) | data;
|
||||
if( ( n_irqmask &~ PSX_IRQ_MASK ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 0, "psx_irq_w( %08x, %08x, %08x ) unknown irq\n", offset, data, mem_mask );
|
||||
verboselog( *this, 0, "psx_irq_w( %08x, %08x, %08x ) unknown irq\n", offset, data, mem_mask );
|
||||
}
|
||||
psx_irq_update();
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_irq_w( %08x, %08x, %08x ) unknown register\n", offset, data, mem_mask );
|
||||
verboselog( *this, 0, "psx_irq_w( %08x, %08x, %08x ) unknown register\n", offset, data, mem_mask );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -106,13 +106,13 @@ READ32_MEMBER( psxirq_device::read )
|
||||
switch( offset )
|
||||
{
|
||||
case 0x00:
|
||||
verboselog( machine(), 1, "psx_irq_r irq data %08x\n", n_irqdata );
|
||||
verboselog( *this, 1, "psx_irq_r irq data %08x\n", n_irqdata );
|
||||
return n_irqdata;
|
||||
case 0x01:
|
||||
verboselog( machine(), 1, "psx_irq_r irq mask %08x\n", n_irqmask );
|
||||
verboselog( *this, 1, "psx_irq_r irq mask %08x\n", n_irqmask );
|
||||
return n_irqmask;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_irq_r unknown register %d\n", offset );
|
||||
verboselog( *this, 0, "psx_irq_r unknown register %d\n", offset );
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
|
@ -15,7 +15,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level, const char *s_fmt, ... )
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -24,7 +24,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
device.logerror( "%s: %s", device.machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
@ -424,18 +424,18 @@ void psxmdec_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_si
|
||||
{
|
||||
int n_index;
|
||||
|
||||
verboselog( machine(), 2, "mdec0_write( %08x, %08x )\n", n_address, n_size );
|
||||
verboselog( *this, 2, "mdec0_write( %08x, %08x )\n", n_address, n_size );
|
||||
|
||||
switch( n_0_command >> 28 )
|
||||
{
|
||||
case 0x3:
|
||||
verboselog( machine(), 1, "mdec decode %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
verboselog( *this, 1, "mdec decode %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
n_0_address = n_address;
|
||||
n_0_size = n_size * 4;
|
||||
n_1_status |= ( 1L << 29 );
|
||||
break;
|
||||
case 0x4:
|
||||
verboselog( machine(), 1, "mdec quantize table %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
verboselog( *this, 1, "mdec quantize table %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
n_index = 0;
|
||||
while( n_size > 0 )
|
||||
{
|
||||
@ -459,7 +459,7 @@ void psxmdec_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_si
|
||||
}
|
||||
break;
|
||||
case 0x6:
|
||||
verboselog( machine(), 1, "mdec cosine table %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
verboselog( *this, 1, "mdec cosine table %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
n_index = 0;
|
||||
while( n_size > 0 )
|
||||
{
|
||||
@ -472,7 +472,7 @@ void psxmdec_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_si
|
||||
mdec_cos_precalc();
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "mdec unknown command %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
verboselog( *this, 0, "mdec unknown command %08x %08x %08x\n", n_0_command, n_address, n_size );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -482,7 +482,7 @@ void psxmdec_device::dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_siz
|
||||
UINT32 n_this;
|
||||
UINT32 n_nextaddress;
|
||||
|
||||
verboselog( machine(), 2, "mdec1_read( %08x, %08x )\n", n_address, n_size );
|
||||
verboselog( *this, 2, "mdec1_read( %08x, %08x )\n", n_address, n_size );
|
||||
if( ( n_0_command & ( 1L << 29 ) ) != 0 && n_0_size != 0 )
|
||||
{
|
||||
while( n_size > 0 )
|
||||
@ -547,11 +547,11 @@ WRITE32_MEMBER( psxmdec_device::write )
|
||||
switch( offset )
|
||||
{
|
||||
case 0:
|
||||
verboselog( machine(), 2, "mdec 0 command %08x\n", data );
|
||||
verboselog( *this, 2, "mdec 0 command %08x\n", data );
|
||||
n_0_command = data;
|
||||
break;
|
||||
case 1:
|
||||
verboselog( machine(), 2, "mdec 1 command %08x\n", data );
|
||||
verboselog( *this, 2, "mdec 1 command %08x\n", data );
|
||||
n_1_command = data;
|
||||
break;
|
||||
}
|
||||
@ -562,10 +562,10 @@ READ32_MEMBER( psxmdec_device::read )
|
||||
switch( offset )
|
||||
{
|
||||
case 0:
|
||||
verboselog( machine(), 2, "mdec 0 status %08x\n", 0 );
|
||||
verboselog( *this, 2, "mdec 0 status %08x\n", 0 );
|
||||
return 0;
|
||||
case 1:
|
||||
verboselog( machine(), 2, "mdec 1 status %08x\n", n_1_status );
|
||||
verboselog( *this, 2, "mdec 1 status %08x\n", n_1_status );
|
||||
return n_1_status;
|
||||
}
|
||||
return 0;
|
||||
|
@ -11,7 +11,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level, const char *s_fmt, ... )
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -20,7 +20,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
device.logerror( "%s: %s", device.machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
@ -74,7 +74,7 @@ WRITE32_MEMBER( psxrcnt_device::write )
|
||||
int n_counter = offset / 4;
|
||||
psx_root *root = &root_counter[ n_counter ];
|
||||
|
||||
verboselog( machine(), 1, "psx_counter_w ( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog( *this, 1, "psx_counter_w ( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
|
||||
switch( offset % 4 )
|
||||
{
|
||||
@ -107,7 +107,7 @@ WRITE32_MEMBER( psxrcnt_device::write )
|
||||
root->n_target = data;
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_counter_w( %08x, %08x, %08x ) unknown register\n", offset, mem_mask, data );
|
||||
verboselog( *this, 0, "psx_counter_w( %08x, %08x, %08x ) unknown register\n", offset, mem_mask, data );
|
||||
return;
|
||||
}
|
||||
|
||||
@ -132,10 +132,10 @@ READ32_MEMBER( psxrcnt_device::read )
|
||||
data = root->n_target;
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_counter_r( %08x, %08x ) unknown register\n", offset, mem_mask );
|
||||
verboselog( *this, 0, "psx_counter_r( %08x, %08x ) unknown register\n", offset, mem_mask );
|
||||
return 0;
|
||||
}
|
||||
verboselog( machine(), 1, "psx_counter_r ( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
verboselog( *this, 1, "psx_counter_r ( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -231,7 +231,7 @@ void psxrcnt_device::device_timer(emu_timer &timer, device_timer_id id, int para
|
||||
int n_counter = id;
|
||||
psx_root *root = &root_counter[ n_counter ];
|
||||
|
||||
verboselog( machine(), 2, "root_finished( %d ) %04x\n", n_counter, root_current( n_counter ) );
|
||||
verboselog( *this, 2, "root_finished( %d ) %04x\n", n_counter, root_current( n_counter ) );
|
||||
//if( ( root->n_mode & PSX_RC_COUNTTARGET ) != 0 )
|
||||
{
|
||||
/* TODO: wrap should be handled differently as PSX_RC_COUNTTARGET & PSX_RC_IRQTARGET don't have to be the same. */
|
||||
|
@ -11,7 +11,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level, const char *s_fmt, ... )
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -20,7 +20,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
device.logerror( "%s: %s", device.machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
@ -88,7 +88,7 @@ void psxsio_device::device_start()
|
||||
|
||||
void psxsio_device::sio_interrupt()
|
||||
{
|
||||
verboselog( machine(), 1, "sio_interrupt( %s )\n", tag() );
|
||||
verboselog( *this, 1, "sio_interrupt( %s )\n", tag() );
|
||||
m_status |= SIO_STATUS_IRQ;
|
||||
m_irq_handler(1);
|
||||
}
|
||||
@ -120,18 +120,18 @@ void psxsio_device::sio_timer_adjust()
|
||||
if( m_baud != 0 && n_prescaler != 0 )
|
||||
{
|
||||
n_time = attotime::from_hz(33868800) * (n_prescaler * m_baud);
|
||||
verboselog( machine(), 2, "sio_timer_adjust( %s ) = %s ( %d x %d )\n", tag(), n_time.as_string(), n_prescaler, m_baud );
|
||||
verboselog( *this, 2, "sio_timer_adjust( %s ) = %s ( %d x %d )\n", tag(), n_time.as_string(), n_prescaler, m_baud );
|
||||
}
|
||||
else
|
||||
{
|
||||
n_time = attotime::never;
|
||||
verboselog( machine(), 0, "sio_timer_adjust( %s ) invalid baud rate ( %d x %d )\n", tag(), n_prescaler, m_baud );
|
||||
verboselog( *this, 0, "sio_timer_adjust( %s ) invalid baud rate ( %d x %d )\n", tag(), n_prescaler, m_baud );
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
n_time = attotime::never;
|
||||
verboselog( machine(), 2, "sio_timer_adjust( %s ) finished\n", tag() );
|
||||
verboselog( *this, 2, "sio_timer_adjust( %s ) finished\n", tag() );
|
||||
}
|
||||
|
||||
m_timer->adjust( n_time );
|
||||
@ -139,7 +139,7 @@ void psxsio_device::sio_timer_adjust()
|
||||
|
||||
void psxsio_device::device_timer(emu_timer &timer, device_timer_id tid, int param, void *ptr)
|
||||
{
|
||||
verboselog( machine(), 2, "sio tick\n" );
|
||||
verboselog( *this, 2, "sio tick\n" );
|
||||
|
||||
if( m_tx_bits == 0 &&
|
||||
( m_control & SIO_CONTROL_TX_ENA ) != 0 &&
|
||||
@ -213,29 +213,29 @@ WRITE32_MEMBER( psxsio_device::write )
|
||||
switch( offset % 4 )
|
||||
{
|
||||
case 0:
|
||||
verboselog( machine(), 1, "psx_sio_w %s data %02x (%08x)\n", tag(), data, mem_mask );
|
||||
verboselog( *this, 1, "psx_sio_w %s data %02x (%08x)\n", tag(), data, mem_mask );
|
||||
m_tx_data = data;
|
||||
m_status &= ~( SIO_STATUS_TX_RDY );
|
||||
m_status &= ~( SIO_STATUS_TX_EMPTY );
|
||||
sio_timer_adjust();
|
||||
break;
|
||||
case 1:
|
||||
verboselog( machine(), 0, "psx_sio_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog( *this, 0, "psx_sio_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
break;
|
||||
case 2:
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
m_mode = data & 0xffff;
|
||||
verboselog( machine(), 1, "psx_sio_w %s mode %04x\n", tag(), data & 0xffff );
|
||||
verboselog( *this, 1, "psx_sio_w %s mode %04x\n", tag(), data & 0xffff );
|
||||
}
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_sio_w %s control %04x\n", tag(), data >> 16 );
|
||||
verboselog( *this, 1, "psx_sio_w %s control %04x\n", tag(), data >> 16 );
|
||||
m_control = data >> 16;
|
||||
|
||||
if( ( m_control & SIO_CONTROL_RESET ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_sio_w reset\n" );
|
||||
verboselog( *this, 1, "psx_sio_w reset\n" );
|
||||
m_status |= SIO_STATUS_TX_EMPTY | SIO_STATUS_TX_RDY;
|
||||
m_status &= ~( SIO_STATUS_RX_RDY | SIO_STATUS_OVERRUN | SIO_STATUS_IRQ );
|
||||
m_irq_handler(0);
|
||||
@ -252,7 +252,7 @@ WRITE32_MEMBER( psxsio_device::write )
|
||||
}
|
||||
if( ( m_control & SIO_CONTROL_IACK ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_sio_w iack\n" );
|
||||
verboselog( *this, 1, "psx_sio_w iack\n" );
|
||||
m_status &= ~( SIO_STATUS_IRQ );
|
||||
m_control &= ~( SIO_CONTROL_IACK );
|
||||
m_irq_handler(0);
|
||||
@ -270,16 +270,16 @@ WRITE32_MEMBER( psxsio_device::write )
|
||||
case 3:
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
verboselog( machine(), 0, "psx_sio_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog( *this, 0, "psx_sio_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
m_baud = data >> 16;
|
||||
verboselog( machine(), 1, "psx_sio_w %s baud %04x\n", tag(), data >> 16 );
|
||||
verboselog( *this, 1, "psx_sio_w %s baud %04x\n", tag(), data >> 16 );
|
||||
}
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "psx_sio_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog( *this, 0, "psx_sio_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -294,44 +294,44 @@ READ32_MEMBER( psxsio_device::read )
|
||||
data = m_rx_data;
|
||||
m_status &= ~( SIO_STATUS_RX_RDY );
|
||||
m_rx_data = 0xff;
|
||||
verboselog( machine(), 1, "psx_sio_r %s data %02x (%08x)\n", tag(), data, mem_mask );
|
||||
verboselog( *this, 1, "psx_sio_r %s data %02x (%08x)\n", tag(), data, mem_mask );
|
||||
break;
|
||||
case 1:
|
||||
data = m_status;
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_sio_r %s status %04x\n", tag(), data & 0xffff );
|
||||
verboselog( *this, 1, "psx_sio_r %s status %04x\n", tag(), data & 0xffff );
|
||||
}
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
verboselog( machine(), 0, "psx_sio_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
verboselog( *this, 0, "psx_sio_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
data = ( m_control << 16 ) | m_mode;
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_sio_r %s mode %04x\n", tag(), data & 0xffff );
|
||||
verboselog( *this, 1, "psx_sio_r %s mode %04x\n", tag(), data & 0xffff );
|
||||
}
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_sio_r %s control %04x\n", tag(), data >> 16 );
|
||||
verboselog( *this, 1, "psx_sio_r %s control %04x\n", tag(), data >> 16 );
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
data = m_baud << 16;
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
verboselog( machine(), 0, "psx_sio_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
verboselog( *this, 0, "psx_sio_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
}
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
verboselog( machine(), 1, "psx_sio_r %s baud %04x\n", tag(), data >> 16 );
|
||||
verboselog( *this, 1, "psx_sio_r %s baud %04x\n", tag(), data >> 16 );
|
||||
}
|
||||
break;
|
||||
default:
|
||||
data = 0;
|
||||
verboselog( machine(), 0, "psx_sio_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
verboselog( *this, 0, "psx_sio_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
break;
|
||||
}
|
||||
return data;
|
||||
|
@ -347,7 +347,7 @@ static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigne
|
||||
/*****************************************************************************
|
||||
* Disassemble a single command and return the number of bytes it uses.
|
||||
*****************************************************************************/
|
||||
unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram)
|
||||
unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram, device_t *device)
|
||||
{
|
||||
int OP, OP2, opc;
|
||||
int sarg, darg, smode, dmode;
|
||||
@ -787,7 +787,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
|
||||
}
|
||||
|
||||
default:
|
||||
logerror("debbugger internal error, file %s, line %d\n", __FILE__, __LINE__);
|
||||
device->logerror("debbugger internal error, file %s, line %d\n", __FILE__, __LINE__);
|
||||
case illegal:
|
||||
sprintf (buffer, "data >%04x", OP);
|
||||
break;
|
||||
@ -798,15 +798,15 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
|
||||
|
||||
CPU_DISASSEMBLE( tms9900 )
|
||||
{
|
||||
return Dasm9900(buffer, pc, TMS9900_ID, oprom, opram);
|
||||
return Dasm9900(buffer, pc, TMS9900_ID, oprom, opram, device);
|
||||
}
|
||||
|
||||
CPU_DISASSEMBLE( tms9980 )
|
||||
{
|
||||
return Dasm9900(buffer, pc, TMS9980_ID, oprom, opram);
|
||||
return Dasm9900(buffer, pc, TMS9980_ID, oprom, opram, device);
|
||||
}
|
||||
|
||||
CPU_DISASSEMBLE( tms9995 )
|
||||
{
|
||||
return Dasm9900(buffer, pc, TMS9995_ID, oprom, opram);
|
||||
return Dasm9900(buffer, pc, TMS9995_ID, oprom, opram, device);
|
||||
}
|
||||
|
@ -561,7 +561,7 @@ void z8000_init_tables(void)
|
||||
for (i = init->beg; i <= init->end; i += init->step)
|
||||
{
|
||||
if (z8000_exec[i].opcode != &z8002_device::zinvalid)
|
||||
logerror("Z8000 opcode %04x clash '%s'\n", i, z8000_exec[i].dasm);
|
||||
osd_printf_error("Z8000 opcode %04x clash '%s'\n", i, z8000_exec[i].dasm);
|
||||
|
||||
z8000_exec[i].opcode = init->opcode;
|
||||
z8000_exec[i].cycles = init->cycles;
|
||||
|
@ -942,7 +942,7 @@ void ui_menu_control_floppy_image::do_load_create()
|
||||
if(input_filename.compare("")==0) {
|
||||
int err = fd->create(output_filename.c_str(), 0, NULL);
|
||||
if (err != 0) {
|
||||
popmessage("Error: %s", fd->error());
|
||||
machine().popmessage("Error: %s", fd->error());
|
||||
return;
|
||||
}
|
||||
fd->setup_write(output_format);
|
||||
@ -951,7 +951,7 @@ void ui_menu_control_floppy_image::do_load_create()
|
||||
if (!err && output_filename.compare("") != 0)
|
||||
err = fd->reopen_for_write(output_filename.c_str());
|
||||
if(err != 0) {
|
||||
popmessage("Error: %s", fd->error());
|
||||
machine().popmessage("Error: %s", fd->error());
|
||||
return;
|
||||
}
|
||||
if(output_format)
|
||||
@ -963,7 +963,7 @@ void ui_menu_control_floppy_image::hook_load(std::string filename, bool softlist
|
||||
{
|
||||
if (softlist)
|
||||
{
|
||||
popmessage("When loaded from software list, the disk is Read-only.\n");
|
||||
machine().popmessage("When loaded from software list, the disk is Read-only.\n");
|
||||
image->load(filename.c_str());
|
||||
ui_menu::stack_pop(machine());
|
||||
return;
|
||||
@ -974,7 +974,7 @@ void ui_menu_control_floppy_image::hook_load(std::string filename, bool softlist
|
||||
|
||||
if (!input_format)
|
||||
{
|
||||
popmessage("Error: %s\n", image->error());
|
||||
machine().popmessage("Error: %s\n", image->error());
|
||||
ui_menu::stack_pop(machine());
|
||||
return;
|
||||
}
|
||||
@ -1049,7 +1049,7 @@ void ui_menu_control_floppy_image::handle()
|
||||
break;
|
||||
|
||||
case ui_menu_select_rw::WRITE_DIFF:
|
||||
popmessage("Sorry, diffs are not supported yet\n");
|
||||
machine().popmessage("Sorry, diffs are not supported yet\n");
|
||||
ui_menu::stack_pop(machine());
|
||||
break;
|
||||
|
||||
|
@ -346,7 +346,7 @@ void mfm_harddisk_device::device_start()
|
||||
m_current_cylinder = m_landing_zone; // Park position
|
||||
m_spinup_timer->adjust(attotime::from_msec(m_spinupms));
|
||||
|
||||
m_cache = global_alloc(mfmhd_trackimage_cache);
|
||||
m_cache = global_alloc(mfmhd_trackimage_cache(machine()));
|
||||
|
||||
// In 5 second periods, check whether the cache has dirty lines
|
||||
m_cache_timer->adjust(attotime::from_msec(5000), 0, attotime::from_msec(5000));
|
||||
@ -952,15 +952,16 @@ const device_type MFMHD_ST251 = &device_creator<mfm_hd_st251_device>;
|
||||
// This is a write-back LRU cache.
|
||||
// ===========================================================
|
||||
|
||||
mfmhd_trackimage_cache::mfmhd_trackimage_cache():
|
||||
m_tracks(NULL)
|
||||
mfmhd_trackimage_cache::mfmhd_trackimage_cache(running_machine &machine):
|
||||
m_tracks(NULL),
|
||||
m_machine(machine)
|
||||
{
|
||||
}
|
||||
|
||||
mfmhd_trackimage_cache::~mfmhd_trackimage_cache()
|
||||
{
|
||||
mfmhd_trackimage* current = m_tracks;
|
||||
if (TRACE_CACHE) logerror("%s: MFM HD cache destroy\n", m_mfmhd->tag());
|
||||
if (TRACE_CACHE) m_machine.logerror("%s: MFM HD cache destroy\n", m_mfmhd->tag());
|
||||
|
||||
while (current != NULL)
|
||||
{
|
||||
@ -991,12 +992,12 @@ void mfmhd_trackimage_cache::write_back_one()
|
||||
void mfmhd_trackimage_cache::cleanup()
|
||||
{
|
||||
mfmhd_trackimage* current = m_tracks;
|
||||
if (TRACE_CACHE) logerror("%s: MFM HD cache cleanup\n", m_mfmhd->tag());
|
||||
if (TRACE_CACHE) m_machine.logerror("%s: MFM HD cache cleanup\n", m_mfmhd->tag());
|
||||
|
||||
// Still dirty?
|
||||
while (current != NULL)
|
||||
{
|
||||
if (TRACE_CACHE) logerror("%s: MFM HD cache: evict line cylinder=%d head=%d\n", m_mfmhd->tag(), current->cylinder, current->head);
|
||||
if (TRACE_CACHE) m_machine.logerror("%s: MFM HD cache: evict line cylinder=%d head=%d\n", m_mfmhd->tag(), current->cylinder, current->head);
|
||||
if (current->dirty)
|
||||
{
|
||||
m_mfmhd->write_track(current->encdata, current->cylinder, current->head);
|
||||
@ -1023,7 +1024,7 @@ const char *encnames[] = { "MFM_BITS","MFM_BYTE","SEPARATE","SSIMPLE " };
|
||||
*/
|
||||
void mfmhd_trackimage_cache::init(mfm_harddisk_device* mfmhd, int tracksize, int trackslots)
|
||||
{
|
||||
if (TRACE_CACHE) logerror("%s: MFM HD cache init; cache size is %d tracks\n", mfmhd->tag(), trackslots);
|
||||
if (TRACE_CACHE) m_machine.logerror("%s: MFM HD cache init; cache size is %d tracks\n", mfmhd->tag(), trackslots);
|
||||
|
||||
chd_error state = CHDERR_NONE;
|
||||
|
||||
@ -1039,7 +1040,7 @@ void mfmhd_trackimage_cache::init(mfm_harddisk_device* mfmhd, int tracksize, int
|
||||
|
||||
while (track < trackslots)
|
||||
{
|
||||
if (TRACE_CACHE && TRACE_DETAIL) logerror("%s: MFM HD allocate cache slot\n", mfmhd->tag());
|
||||
if (TRACE_CACHE && TRACE_DETAIL) m_machine.logerror("%s: MFM HD allocate cache slot\n", mfmhd->tag());
|
||||
previous = current;
|
||||
current = global_alloc(mfmhd_trackimage);
|
||||
current->encdata = global_alloc_array(UINT16, tracksize);
|
||||
@ -1118,7 +1119,7 @@ UINT16* mfmhd_trackimage_cache::get_trackimage(int cylinder, int head)
|
||||
|
||||
// previous points to the second to last element
|
||||
current = previous->next;
|
||||
if (TRACE_CACHE) logerror("%s: MFM HD cache: evict line (c=%d,h=%d)\n", m_mfmhd->tag(), current->cylinder, current->head);
|
||||
if (TRACE_CACHE) m_machine.logerror("%s: MFM HD cache: evict line (c=%d,h=%d)\n", m_mfmhd->tag(), current->cylinder, current->head);
|
||||
|
||||
if (current->dirty)
|
||||
{
|
||||
|
@ -33,7 +33,7 @@ public:
|
||||
class mfmhd_trackimage_cache
|
||||
{
|
||||
public:
|
||||
mfmhd_trackimage_cache();
|
||||
mfmhd_trackimage_cache(running_machine &machine);
|
||||
~mfmhd_trackimage_cache();
|
||||
void init(mfm_harddisk_device* mfmhd, int tracksize, int trackslots);
|
||||
UINT16* get_trackimage(int cylinder, int head);
|
||||
@ -44,6 +44,7 @@ public:
|
||||
private:
|
||||
mfm_harddisk_device* m_mfmhd;
|
||||
mfmhd_trackimage* m_tracks;
|
||||
running_machine & m_machine;
|
||||
};
|
||||
|
||||
class mfm_harddisk_device : public harddisk_image_device,
|
||||
|
@ -86,22 +86,22 @@ WRITE16_MEMBER( m68307cpu_device::m68307_internal_sim_w )
|
||||
|
||||
case m68307SIM_LICR1:
|
||||
logerror("%08x m68307_internal_sim_w %08x, %04x (%04x) (Latched Interrupt Control Register 1 - LICR1)\n", pc, offset*2,data,mem_mask);
|
||||
sim->write_licr1(data,mem_mask);
|
||||
sim->write_licr1(this,data,mem_mask);
|
||||
break;
|
||||
|
||||
case m68307SIM_LICR2:
|
||||
logerror("%08x m68307_internal_sim_w %08x, %04x (%04x) (Latched Interrupt Control Register 2 - LICR2)\n", pc, offset*2,data,mem_mask);
|
||||
sim->write_licr2(data,mem_mask);
|
||||
sim->write_licr2(this,data,mem_mask);
|
||||
break;
|
||||
|
||||
case m68307SIM_PICR:
|
||||
logerror("%08x m68307_internal_sim_w %08x, %04x (%04x) (Peripheral Interrupt Control Register - PICR)\n", pc, offset*2,data,mem_mask);
|
||||
sim->write_picr(data,mem_mask);
|
||||
sim->write_picr(this,data,mem_mask);
|
||||
break;
|
||||
|
||||
case m68307SIM_PIVR:
|
||||
logerror("%08x m68307_internal_sim_w %08x, %04x (%04x) (Peripheral Interrupt Vector Register - PIVR)\n", pc, offset*2,data,mem_mask);
|
||||
sim->write_pivr(data,mem_mask);
|
||||
sim->write_pivr(this,data,mem_mask);
|
||||
break;
|
||||
|
||||
case m68307SIM_BR0:
|
||||
@ -171,7 +171,7 @@ UINT16 m68307_sim::read_padat(m68307cpu_device* m68k, address_space &space, UINT
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("%08x m68307_internal_sim_r (%04x) (Port A (8-bit) Data Register - PADAT)\n", pc, mem_mask);
|
||||
m68k->logerror("%08x m68307_internal_sim_r (%04x) (Port A (8-bit) Data Register - PADAT)\n", pc, mem_mask);
|
||||
}
|
||||
return 0xffff;
|
||||
}
|
||||
@ -188,7 +188,7 @@ void m68307_sim::write_padat(m68307cpu_device* m68k, address_space &space, UINT1
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("%08x m68307_internal_sim_w %04x (%04x) (Port A (8-bit) Data Register - PADAT)\n", pc, data,mem_mask);
|
||||
m68k->logerror("%08x m68307_internal_sim_w %04x (%04x) (Port A (8-bit) Data Register - PADAT)\n", pc, data,mem_mask);
|
||||
}
|
||||
}
|
||||
|
||||
@ -222,7 +222,7 @@ UINT16 m68307_sim::read_pbdat(m68307cpu_device* m68k, address_space &space, UINT
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("%08x m68307_internal_sim_r (%04x) (Port B (16-bit) Data Register - PBDAT)\n", pc, mem_mask);
|
||||
m68k->logerror("%08x m68307_internal_sim_r (%04x) (Port B (16-bit) Data Register - PBDAT)\n", pc, mem_mask);
|
||||
}
|
||||
return 0xffff;
|
||||
}
|
||||
@ -239,40 +239,40 @@ void m68307_sim::write_pbdat(m68307cpu_device* m68k, address_space &space, UINT1
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("%08x m68307_internal_sim_w %04x (%04x) (Port B (16-bit) Data Register - PBDAT)\n", pc, data,mem_mask);
|
||||
m68k->logerror("%08x m68307_internal_sim_w %04x (%04x) (Port B (16-bit) Data Register - PBDAT)\n", pc, data,mem_mask);
|
||||
}
|
||||
}
|
||||
|
||||
void m68307_sim::write_licr1(UINT16 data, UINT16 mem_mask)
|
||||
void m68307_sim::write_licr1(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_licr1);
|
||||
data = m_licr1;
|
||||
logerror("m_licr1 value %04x : Details :\n", data);
|
||||
logerror("int4ipl %01x\n", (data>>0)&7);
|
||||
logerror("pir4 %01x\n", (data>>3)&1);
|
||||
logerror("int3ipl %01x\n", (data>>4)&7);
|
||||
logerror("pir3 %01x\n", (data>>7)&1);
|
||||
logerror("int2ipl %01x\n", (data>>8)&7);
|
||||
logerror("pir2 %01x\n", (data>>11)&1);
|
||||
logerror("int1ipl %01x\n", (data>>12)&7);
|
||||
logerror("pir1 %01x\n", (data>>15)&1);
|
||||
logerror("\n");
|
||||
m68k->logerror("m_licr1 value %04x : Details :\n", data);
|
||||
m68k->logerror("int4ipl %01x\n", (data>>0)&7);
|
||||
m68k->logerror("pir4 %01x\n", (data>>3)&1);
|
||||
m68k->logerror("int3ipl %01x\n", (data>>4)&7);
|
||||
m68k->logerror("pir3 %01x\n", (data>>7)&1);
|
||||
m68k->logerror("int2ipl %01x\n", (data>>8)&7);
|
||||
m68k->logerror("pir2 %01x\n", (data>>11)&1);
|
||||
m68k->logerror("int1ipl %01x\n", (data>>12)&7);
|
||||
m68k->logerror("pir1 %01x\n", (data>>15)&1);
|
||||
m68k->logerror("\n");
|
||||
}
|
||||
|
||||
void m68307_sim::write_licr2(UINT16 data, UINT16 mem_mask)
|
||||
void m68307_sim::write_licr2(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_licr2);
|
||||
UINT16 newdata = m_licr2;
|
||||
logerror("m_licr2 value %04x : Details :\n", newdata);
|
||||
logerror("int8ipl %01x\n", (newdata>>0)&7);
|
||||
logerror("pir8 %01x\n", (newdata>>3)&1);
|
||||
logerror("int7ipl %01x\n", (newdata>>4)&7);
|
||||
logerror("pir7 %01x\n", (newdata>>7)&1);
|
||||
logerror("int6ipl %01x\n", (newdata>>8)&7);
|
||||
logerror("pir6 %01x\n", (newdata>>11)&1);
|
||||
logerror("int5ipl %01x\n", (newdata>>12)&7);
|
||||
logerror("pir5 %01x\n", (newdata>>15)&1);
|
||||
logerror("\n");
|
||||
m68k->logerror("m_licr2 value %04x : Details :\n", newdata);
|
||||
m68k->logerror("int8ipl %01x\n", (newdata>>0)&7);
|
||||
m68k->logerror("pir8 %01x\n", (newdata>>3)&1);
|
||||
m68k->logerror("int7ipl %01x\n", (newdata>>4)&7);
|
||||
m68k->logerror("pir7 %01x\n", (newdata>>7)&1);
|
||||
m68k->logerror("int6ipl %01x\n", (newdata>>8)&7);
|
||||
m68k->logerror("pir6 %01x\n", (newdata>>11)&1);
|
||||
m68k->logerror("int5ipl %01x\n", (newdata>>12)&7);
|
||||
m68k->logerror("pir5 %01x\n", (newdata>>15)&1);
|
||||
m68k->logerror("\n");
|
||||
|
||||
if (data & 0x0008) m_licr2 = m_licr2 & ~0x0008;
|
||||
if (data & 0x0080) m_licr2 = m_licr2 & ~0x0080;
|
||||
@ -283,25 +283,25 @@ void m68307_sim::write_licr2(UINT16 data, UINT16 mem_mask)
|
||||
}
|
||||
|
||||
|
||||
void m68307_sim::write_picr(UINT16 data, UINT16 mem_mask)
|
||||
void m68307_sim::write_picr(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_picr);
|
||||
data = m_picr;
|
||||
logerror("picr value %04x : Details :\n", data);
|
||||
logerror("mbipl %01x\n", (data>>0)&7);
|
||||
logerror("uaipl %01x\n", (data>>4)&7);
|
||||
logerror("t2ipl %01x\n", (data>>8)&7);
|
||||
logerror("t1ipl %01x\n", (data>>12)&7);
|
||||
logerror("\n");
|
||||
m68k->logerror("picr value %04x : Details :\n", data);
|
||||
m68k->logerror("mbipl %01x\n", (data>>0)&7);
|
||||
m68k->logerror("uaipl %01x\n", (data>>4)&7);
|
||||
m68k->logerror("t2ipl %01x\n", (data>>8)&7);
|
||||
m68k->logerror("t1ipl %01x\n", (data>>12)&7);
|
||||
m68k->logerror("\n");
|
||||
}
|
||||
|
||||
void m68307_sim::write_pivr(UINT16 data, UINT16 mem_mask)
|
||||
void m68307_sim::write_pivr(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_pivr);
|
||||
data = m_pivr;
|
||||
logerror("pivr value %04x : Details :\n", data);
|
||||
logerror("unused %01x\n", (data>>0)&0xf);
|
||||
logerror("high vector %01x\n", (data>>4)&0xf);
|
||||
m68k->logerror("pivr value %04x : Details :\n", data);
|
||||
m68k->logerror("unused %01x\n", (data>>0)&0xf);
|
||||
m68k->logerror("high vector %01x\n", (data>>4)&0xf);
|
||||
}
|
||||
|
||||
void m68307_sim::reset(void)
|
||||
|
@ -65,10 +65,10 @@ class m68307_sim
|
||||
|
||||
|
||||
|
||||
void write_licr1(UINT16 data, UINT16 mem_mask);
|
||||
void write_licr2(UINT16 data, UINT16 mem_mask);
|
||||
void write_picr(UINT16 data, UINT16 mem_mask);
|
||||
void write_pivr(UINT16 data, UINT16 mem_mask);
|
||||
void write_licr1(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask);
|
||||
void write_licr2(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask);
|
||||
void write_picr(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask);
|
||||
void write_pivr(m68307cpu_device* m68k, UINT16 data, UINT16 mem_mask);
|
||||
|
||||
void reset(void);
|
||||
};
|
||||
|
@ -179,35 +179,35 @@ void m68307_timer::write_tmr(UINT16 data, UINT16 mem_mask, int which)
|
||||
int rst = data & (0x0001)>>0;
|
||||
|
||||
|
||||
logerror("tmr value %04x : Details :\n", data);
|
||||
logerror("prescale %d\n", ps);
|
||||
logerror("(clock divided by %d)\n", ps+1);
|
||||
logerror("capture edge / enable interrupt %d\n", ce);
|
||||
if (ce==0x0) logerror("(disable interrupt on capture event)\n");
|
||||
if (ce==0x1) logerror("(capture on rising edge only + enable capture interrupt)\n");
|
||||
if (ce==0x2) logerror("(capture on falling edge only + enable capture interrupt)\n");
|
||||
if (ce==0x3) logerror("(capture on any edge + enable capture interrupt)\n");
|
||||
logerror("output mode %d\n", om);
|
||||
if (om==0x0) logerror("(active-low pulse for one cycle))\n");
|
||||
if (om==0x1) logerror("(toggle output)\n");
|
||||
logerror("output reference interrupt %d\n", ori);
|
||||
if (ori==0x0) logerror("(disable reference interrupt)\n");
|
||||
if (ori==0x1) logerror("(enable interrupt on reaching reference value))\n");
|
||||
logerror("free running %d\n", frr);
|
||||
if (frr==0x0) logerror("(free running mode, counter continues after value reached)\n");
|
||||
if (frr==0x1) logerror("(restart mode, counter resets after value reached)\n");
|
||||
logerror("interrupt clock source %d\n", iclk);
|
||||
if (iclk==0x0) logerror("(stop count)\n");
|
||||
if (iclk==0x1) logerror("(master system clock)\n");
|
||||
if (iclk==0x2) logerror("(master system clock divided by 16)\n");
|
||||
if (iclk==0x3) logerror("(TIN Pin)\n");
|
||||
logerror("reset %d\n", rst);
|
||||
if (rst==0x0) logerror("(timer is reset)\n");
|
||||
if (rst==0x1) logerror("(timer is running)\n");
|
||||
m68k->logerror("tmr value %04x : Details :\n", data);
|
||||
m68k->logerror("prescale %d\n", ps);
|
||||
m68k->logerror("(clock divided by %d)\n", ps+1);
|
||||
m68k->logerror("capture edge / enable interrupt %d\n", ce);
|
||||
if (ce==0x0) m68k->logerror("(disable interrupt on capture event)\n");
|
||||
if (ce==0x1) m68k->logerror("(capture on rising edge only + enable capture interrupt)\n");
|
||||
if (ce==0x2) m68k->logerror("(capture on falling edge only + enable capture interrupt)\n");
|
||||
if (ce==0x3) m68k->logerror("(capture on any edge + enable capture interrupt)\n");
|
||||
m68k->logerror("output mode %d\n", om);
|
||||
if (om==0x0) m68k->logerror("(active-low pulse for one cycle))\n");
|
||||
if (om==0x1) m68k->logerror("(toggle output)\n");
|
||||
m68k->logerror("output reference interrupt %d\n", ori);
|
||||
if (ori==0x0) m68k->logerror("(disable reference interrupt)\n");
|
||||
if (ori==0x1) m68k->logerror("(enable interrupt on reaching reference value))\n");
|
||||
m68k->logerror("free running %d\n", frr);
|
||||
if (frr==0x0) m68k->logerror("(free running mode, counter continues after value reached)\n");
|
||||
if (frr==0x1) m68k->logerror("(restart mode, counter resets after value reached)\n");
|
||||
m68k->logerror("interrupt clock source %d\n", iclk);
|
||||
if (iclk==0x0) m68k->logerror("(stop count)\n");
|
||||
if (iclk==0x1) m68k->logerror("(master system clock)\n");
|
||||
if (iclk==0x2) m68k->logerror("(master system clock divided by 16)\n");
|
||||
if (iclk==0x3) m68k->logerror("(TIN Pin)\n");
|
||||
m68k->logerror("reset %d\n", rst);
|
||||
if (rst==0x0) m68k->logerror("(timer is reset)\n");
|
||||
if (rst==0x1) m68k->logerror("(timer is running)\n");
|
||||
|
||||
tptr->mametimer->adjust(m68k->cycles_to_attotime(100000));
|
||||
|
||||
logerror("\n");
|
||||
m68k->logerror("\n");
|
||||
|
||||
}
|
||||
|
||||
|
@ -13,7 +13,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF( 3, 4 ) verboselog( int n_level, running_machine &machine, const char *s_fmt, ... )
|
||||
INLINE void ATTR_PRINTF( 3, 4 ) verboselog( int n_level, device_t &device, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -22,7 +22,7 @@ INLINE void ATTR_PRINTF( 3, 4 ) verboselog( int n_level, running_machine &machin
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context( ), buf );
|
||||
device.logerror( "%s: %s", device.machine().describe_context( ), buf );
|
||||
}
|
||||
}
|
||||
|
||||
@ -144,7 +144,7 @@ WRITE_LINE_MEMBER( adc083x_device::cs_write )
|
||||
{
|
||||
if( m_cs != state )
|
||||
{
|
||||
verboselog( 2, machine(), "adc083x_cs_write( %s, %d )\n", tag(), state );
|
||||
verboselog( 2, *this, "adc083x_cs_write( %s, %d )\n", tag(), state );
|
||||
}
|
||||
|
||||
if( m_cs == 0 && state != 0 )
|
||||
@ -259,7 +259,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
{
|
||||
if( m_clk != state )
|
||||
{
|
||||
verboselog( 2, machine(), "adc083x_clk_write( %s, %d )\n", tag(), state );
|
||||
verboselog( 2, *this, "adc083x_clk_write( %s, %d )\n", tag(), state );
|
||||
}
|
||||
|
||||
if( m_cs == 0 )
|
||||
@ -271,7 +271,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
case STATE_WAIT_FOR_START:
|
||||
if( m_di != 0 )
|
||||
{
|
||||
verboselog( 1, machine(), "adc083x %s got start bit\n", tag() );
|
||||
verboselog( 1, *this, "adc083x %s got start bit\n", tag() );
|
||||
m_state = STATE_SHIFT_MUX;
|
||||
m_sars = 0;
|
||||
m_sgl = 0;
|
||||
@ -282,7 +282,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( 1, machine(), "adc083x %s not start bit\n", tag() );
|
||||
verboselog( 1, *this, "adc083x %s not start bit\n", tag() );
|
||||
}
|
||||
break;
|
||||
|
||||
@ -294,7 +294,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
{
|
||||
m_sgl = 1;
|
||||
}
|
||||
verboselog( 1, machine(), "adc083x %s sgl <- %d\n", tag(), m_sgl );
|
||||
verboselog( 1, *this, "adc083x %s sgl <- %d\n", tag(), m_sgl );
|
||||
break;
|
||||
|
||||
case 1:
|
||||
@ -302,7 +302,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
{
|
||||
m_odd = 1;
|
||||
}
|
||||
verboselog( 1, machine(), "adc083x %s odd <- %d\n", tag(), m_odd );
|
||||
verboselog( 1, *this, "adc083x %s odd <- %d\n", tag(), m_odd );
|
||||
break;
|
||||
|
||||
case 2:
|
||||
@ -310,7 +310,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
{
|
||||
m_sel1 = 1;
|
||||
}
|
||||
verboselog( 1, machine(), "adc083x %s sel1 <- %d\n", tag(), m_sel1 );
|
||||
verboselog( 1, *this, "adc083x %s sel1 <- %d\n", tag(), m_sel1 );
|
||||
break;
|
||||
|
||||
case 3:
|
||||
@ -318,7 +318,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
{
|
||||
m_sel0 = 1;
|
||||
}
|
||||
verboselog( 1, machine(), "adc083x %s sel0 <- %d\n", tag(), m_sel0 );
|
||||
verboselog( 1, *this, "adc083x %s sel0 <- %d\n", tag(), m_sel0 );
|
||||
break;
|
||||
}
|
||||
|
||||
@ -334,11 +334,11 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
m_sars = 0;
|
||||
if( type() == ADC0838 && m_se != 0 )
|
||||
{
|
||||
verboselog( 1, machine(), "adc083x %s not se\n", tag() );
|
||||
verboselog( 1, *this, "adc083x %s not se\n", tag() );
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( 1, machine(), "adc083x %s got se\n", tag() );
|
||||
verboselog( 1, *this, "adc083x %s got se\n", tag() );
|
||||
m_state = STATE_OUTPUT_LSB_FIRST;
|
||||
m_bit = 1;
|
||||
}
|
||||
@ -351,7 +351,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
switch( m_state )
|
||||
{
|
||||
case STATE_MUX_SETTLE:
|
||||
verboselog( 1, machine(), "adc083x %s mux settle\n", tag() );
|
||||
verboselog( 1, *this, "adc083x %s mux settle\n", tag() );
|
||||
m_output = conversion();
|
||||
m_state = STATE_OUTPUT_MSB_FIRST;
|
||||
m_bit = 7;
|
||||
@ -361,7 +361,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
|
||||
case STATE_OUTPUT_MSB_FIRST:
|
||||
m_do = ( m_output >> m_bit ) & 1;
|
||||
verboselog( 1, machine(), "adc083x %s msb %d -> %d\n", tag(), m_bit, m_do );
|
||||
verboselog( 1, *this, "adc083x %s msb %d -> %d\n", tag(), m_bit, m_do );
|
||||
|
||||
m_bit--;
|
||||
if( m_bit < 0 )
|
||||
@ -379,7 +379,7 @@ WRITE_LINE_MEMBER( adc083x_device::clk_write )
|
||||
|
||||
case STATE_OUTPUT_LSB_FIRST:
|
||||
m_do = ( m_output >> m_bit ) & 1;
|
||||
verboselog( 1, machine(), "adc083x %s lsb %d -> %d\n", tag(), m_bit, m_do );
|
||||
verboselog( 1, *this, "adc083x %s lsb %d -> %d\n", tag(), m_bit, m_do );
|
||||
|
||||
m_bit++;
|
||||
if( m_bit == 8 )
|
||||
@ -407,7 +407,7 @@ WRITE_LINE_MEMBER( adc083x_device::di_write )
|
||||
{
|
||||
if( m_di != state )
|
||||
{
|
||||
verboselog( 2, machine(), "adc083x_di_write( %s, %d )\n", tag(), state );
|
||||
verboselog( 2, *this, "adc083x_di_write( %s, %d )\n", tag(), state );
|
||||
}
|
||||
|
||||
m_di = state;
|
||||
@ -421,7 +421,7 @@ WRITE_LINE_MEMBER( adc083x_device::se_write )
|
||||
{
|
||||
if( m_se != state )
|
||||
{
|
||||
verboselog( 2, machine(), "adc083x_se_write( %s, %d )\n", tag(), state );
|
||||
verboselog( 2, *this, "adc083x_se_write( %s, %d )\n", tag(), state );
|
||||
}
|
||||
|
||||
m_se = state;
|
||||
@ -433,7 +433,7 @@ WRITE_LINE_MEMBER( adc083x_device::se_write )
|
||||
|
||||
READ_LINE_MEMBER( adc083x_device::sars_read )
|
||||
{
|
||||
verboselog( 1, machine(), "adc083x_sars_read( %s ) %d\n", tag(), m_sars );
|
||||
verboselog( 1, *this, "adc083x_sars_read( %s ) %d\n", tag(), m_sars );
|
||||
return m_sars;
|
||||
}
|
||||
|
||||
@ -443,6 +443,6 @@ READ_LINE_MEMBER( adc083x_device::sars_read )
|
||||
|
||||
READ_LINE_MEMBER( adc083x_device::do_read )
|
||||
{
|
||||
verboselog( 1, machine(), "adc083x_do_read( %s ) %d\n", tag(), m_do );
|
||||
verboselog( 1, *this, "adc083x_do_read( %s ) %d\n", tag(), m_do );
|
||||
return m_do;
|
||||
}
|
||||
|
@ -124,7 +124,7 @@ READ16_MEMBER( amiga_autoconfig::autoconfig_read )
|
||||
UINT16 data = m_cfg[offset] | 0x0fff;
|
||||
|
||||
if (VERBOSE && !space.debugger_access())
|
||||
logerror("autoconfig_read %04x @ %02x [mask = %04x]\n", data, offset, mem_mask);
|
||||
space.device().logerror("autoconfig_read %04x @ %02x [mask = %04x]\n", data, offset, mem_mask);
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -132,7 +132,7 @@ READ16_MEMBER( amiga_autoconfig::autoconfig_read )
|
||||
WRITE16_MEMBER( amiga_autoconfig::autoconfig_write )
|
||||
{
|
||||
if (VERBOSE && !space.debugger_access())
|
||||
logerror("autoconfig_write %04x @ %02x [mask = %04x]\n", data, offset, mem_mask);
|
||||
space.device().logerror("autoconfig_write %04x @ %02x [mask = %04x]\n", data, offset, mem_mask);
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
|
@ -49,7 +49,7 @@ INLINE void ATTR_PRINTF( 3, 4 ) verboselog( device_t *device, int n_level, const
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: I2CMEM(%s) %s", device->machine().describe_context( ), device->tag(), buf );
|
||||
device->logerror( "%s: I2CMEM(%s) %s", device->machine().describe_context( ), device->tag(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -94,7 +94,7 @@ void matsucd_set_subcode_ready_callback( void (*scor_cb)( running_machine &machi
|
||||
cd.scor_cb = scor_cb;
|
||||
}
|
||||
|
||||
static int matsucd_getsector_type( void )
|
||||
static int matsucd_getsector_type( running_machine &machine )
|
||||
{
|
||||
switch( cd.sector_size )
|
||||
{
|
||||
@ -103,13 +103,13 @@ static int matsucd_getsector_type( void )
|
||||
case 2336: return CD_TRACK_MODE2;
|
||||
case 2352: return CD_TRACK_MODE2_RAW;
|
||||
|
||||
default: logerror( "MATSUCD: Sector size %d unsupported!\n", cd.sector_size ); break;
|
||||
default: machine.logerror( "MATSUCD: Sector size %d unsupported!\n", cd.sector_size ); break;
|
||||
}
|
||||
|
||||
return CD_TRACK_RAW_DONTCARE;
|
||||
}
|
||||
|
||||
void matsucd_read_next_block( void )
|
||||
void matsucd_read_next_block( running_machine &machine )
|
||||
{
|
||||
cd.xfer_offset = 0;
|
||||
|
||||
@ -118,9 +118,9 @@ void matsucd_read_next_block( void )
|
||||
cd.lba++;
|
||||
cd.num_blocks--;
|
||||
|
||||
if (!cdrom_read_data(cd.cdrom, cd.lba, cd.sector_buffer, matsucd_getsector_type()))
|
||||
if (!cdrom_read_data(cd.cdrom, cd.lba, cd.sector_buffer, matsucd_getsector_type(machine)))
|
||||
{
|
||||
logerror( "MATSUCD - Warning: Read error on CD!\n" );
|
||||
machine.logerror( "MATSUCD - Warning: Read error on CD!\n" );
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -409,9 +409,9 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
|
||||
cd.xfer_offset = 0;
|
||||
|
||||
/* go ahead and cache the first block */
|
||||
if (!cdrom_read_data(cd.cdrom, cd.lba, cd.sector_buffer, matsucd_getsector_type()))
|
||||
if (!cdrom_read_data(cd.cdrom, cd.lba, cd.sector_buffer, matsucd_getsector_type(machine)))
|
||||
{
|
||||
logerror( "MATSUCD - Warning: Read error on CD!\n" );
|
||||
machine.logerror( "MATSUCD - Warning: Read error on CD!\n" );
|
||||
matsucd_command_error( machine );
|
||||
return;
|
||||
}
|
||||
@ -696,14 +696,14 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
|
||||
|
||||
if ( cd.cdrom == NULL )
|
||||
{
|
||||
logerror( "MATSUCD - Warning: Reading TOC without a CD!\n" );
|
||||
machine.logerror( "MATSUCD - Warning: Reading TOC without a CD!\n" );
|
||||
matsucd_command_error( machine );
|
||||
return;
|
||||
}
|
||||
|
||||
if ( track > cdrom_get_last_track(cd.cdrom) )
|
||||
{
|
||||
logerror( "MATSUCD - Warning: Reading invalid track entry from TOC!\n" );
|
||||
machine.logerror( "MATSUCD - Warning: Reading invalid track entry from TOC!\n" );
|
||||
matsucd_command_error( machine );
|
||||
return;
|
||||
}
|
||||
@ -751,7 +751,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror( "MATSUCD: Unknown/inimplemented command %08x\n", cmd );
|
||||
machine.logerror( "MATSUCD: Unknown/inimplemented command %08x\n", cmd );
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -234,19 +234,19 @@ void netlist_mame_t::vlog(const plog_level &l, const pstring &ls) const
|
||||
switch (l)
|
||||
{
|
||||
case plog_level::DEBUG:
|
||||
logerror("netlist DEBUG: %s\n", errstr.cstr());
|
||||
m_parent.logerror("netlist DEBUG: %s\n", errstr.cstr());
|
||||
break;
|
||||
case plog_level::INFO:
|
||||
logerror("netlist INFO: %s\n", errstr.cstr());
|
||||
m_parent.logerror("netlist INFO: %s\n", errstr.cstr());
|
||||
break;
|
||||
case plog_level::VERBOSE:
|
||||
logerror("netlist VERBOSE: %s\n", errstr.cstr());
|
||||
m_parent.logerror("netlist VERBOSE: %s\n", errstr.cstr());
|
||||
break;
|
||||
case plog_level::WARNING:
|
||||
logerror("netlist WARNING: %s\n", errstr.cstr());
|
||||
m_parent.logerror("netlist WARNING: %s\n", errstr.cstr());
|
||||
break;
|
||||
case plog_level::ERROR:
|
||||
logerror("netlist ERROR: %s\n", errstr.cstr());
|
||||
m_parent.logerror("netlist ERROR: %s\n", errstr.cstr());
|
||||
break;
|
||||
case plog_level::FATAL:
|
||||
emu_fatalerror error("netlist ERROR: %s\n", errstr.cstr());
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t &device, int n_level, const char *s_fmt, ...)
|
||||
{
|
||||
if (VERBOSE_LEVEL >= n_level)
|
||||
{
|
||||
@ -25,7 +25,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
|
||||
va_start( v, s_fmt);
|
||||
vsprintf( buf, s_fmt, v);
|
||||
va_end( v);
|
||||
logerror( "%s: %s", machine.describe_context( ), buf);
|
||||
device.logerror( "%s: %s", device.machine().describe_context( ), buf);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t &device, int n_level, const char *s_fmt, ...)
|
||||
{
|
||||
if (VERBOSE_LEVEL >= n_level)
|
||||
{
|
||||
@ -25,7 +25,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
|
||||
va_start( v, s_fmt);
|
||||
vsprintf( buf, s_fmt, v);
|
||||
va_end( v);
|
||||
logerror( "%s: %s", machine.describe_context( ), buf);
|
||||
device.logerror( "%s: %s", device.machine().describe_context( ), buf);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t &device, int n_level, const char *s_fmt, ...)
|
||||
{
|
||||
if (VERBOSE_LEVEL >= n_level)
|
||||
{
|
||||
@ -25,7 +25,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
|
||||
va_start( v, s_fmt);
|
||||
vsprintf( buf, s_fmt, v);
|
||||
va_end( v);
|
||||
logerror( "%s: %s", machine.describe_context( ), buf);
|
||||
device.logerror( "%s: %s", device.machine().describe_context( ), buf);
|
||||
}
|
||||
}
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -17,16 +17,16 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t &device, int n_level, const char *s_fmt, ...)
|
||||
{
|
||||
if (VERBOSE_LEVEL >= n_level)
|
||||
{
|
||||
va_list v;
|
||||
char buf[32768];
|
||||
va_start(v, s_fmt);
|
||||
vsprintf(buf, s_fmt, v);
|
||||
va_end(v);
|
||||
logerror("%s: %s", machine.describe_context(), buf);
|
||||
va_start( v, s_fmt);
|
||||
vsprintf( buf, s_fmt, v);
|
||||
va_end( v);
|
||||
device.logerror( "%s: %s", device.machine().describe_context( ), buf);
|
||||
}
|
||||
}
|
||||
|
||||
@ -331,13 +331,13 @@ void s3c44b0_device::lcd_dma_reload()
|
||||
m_lcd.pagewidth_cur = 0;
|
||||
m_lcd.pagewidth_max = BITS(m_lcd.regs.lcdsaddr3, 8, 0);
|
||||
m_lcd.bswp = BIT(m_lcd.regs.lcdsaddr2, 29); // note: juicebox changes bswp when video playback starts
|
||||
// verboselog(machine(), 3, "LCD - vramaddr %08X %08X offsize %08X pagewidth %08X\n", m_lcd.vramaddr_cur, m_lcd.vramaddr_max, m_lcd.offsize, m_lcd.pagewidth_max);
|
||||
// verboselog( *this, 3, "LCD - vramaddr %08X %08X offsize %08X pagewidth %08X\n", m_lcd.vramaddr_cur, m_lcd.vramaddr_max, m_lcd.offsize, m_lcd.pagewidth_max);
|
||||
}
|
||||
|
||||
void s3c44b0_device::lcd_dma_init()
|
||||
{
|
||||
m_lcd.modesel = BITS(m_lcd.regs.lcdsaddr1, 28, 27);
|
||||
// verboselog(machine(), 3, "LCD - modesel %d bswp %d\n", m_lcd.modesel, m_lcd.bswp);
|
||||
// verboselog( *this, 3, "LCD - modesel %d bswp %d\n", m_lcd.modesel, m_lcd.bswp);
|
||||
lcd_dma_reload();
|
||||
}
|
||||
|
||||
@ -444,13 +444,13 @@ attotime s3c44b0_device::time_until_pos(int vpos, int hpos)
|
||||
{
|
||||
attoseconds_t time1, time2;
|
||||
attotime retval;
|
||||
verboselog(machine(), 3, "s3c44b0_time_until_pos - vpos %d hpos %d\n", vpos, hpos);
|
||||
verboselog( *this, 3, "s3c44b0_time_until_pos - vpos %d hpos %d\n", vpos, hpos);
|
||||
time1 = (attoseconds_t)vpos * m_lcd.scantime + (attoseconds_t)hpos * m_lcd.pixeltime;
|
||||
time2 = (machine().time() - m_lcd.frame_time).as_attoseconds();
|
||||
verboselog(machine(), 3, "machine %f frametime %f time1 %f time2 %f\n", machine().time().as_double(), m_lcd.frame_time.as_double(), attotime(0, time1).as_double(), attotime(0, time2).as_double());
|
||||
verboselog( *this, 3, "machine %f frametime %f time1 %f time2 %f\n", machine().time().as_double(), m_lcd.frame_time.as_double(), attotime(0, time1).as_double(), attotime(0, time2).as_double());
|
||||
while (time1 <= time2) time1 += m_lcd.frame_period;
|
||||
retval = attotime( 0, time1 - time2);
|
||||
verboselog(machine(), 3, "result %f\n", retval.as_double());
|
||||
verboselog( *this, 3, "result %f\n", retval.as_double());
|
||||
return retval;
|
||||
}
|
||||
|
||||
@ -478,20 +478,20 @@ int s3c44b0_device::lcd_get_hpos()
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::lcd_timer_exp )
|
||||
{
|
||||
int vpos = m_lcd.vpos;
|
||||
verboselog(machine(), 2, "LCD timer callback (%f)\n", machine().time().as_double());
|
||||
verboselog(machine(), 3, "LCD - (1) vramaddr %08X vpos %d hpos %d\n", m_lcd.vramaddr_cur, m_lcd.vpos, m_lcd.hpos);
|
||||
verboselog( *this, 2, "LCD timer callback (%f)\n", machine().time().as_double());
|
||||
verboselog( *this, 3, "LCD - (1) vramaddr %08X vpos %d hpos %d\n", m_lcd.vramaddr_cur, m_lcd.vpos, m_lcd.hpos);
|
||||
switch (m_lcd.modesel)
|
||||
{
|
||||
case S3C44B0_MODESEL_04 : lcd_render_stn_04(); break;
|
||||
case S3C44B0_MODESEL_08 : lcd_render_stn_08(); break;
|
||||
default : verboselog(machine(), 0, "s3c44b0_lcd_timer_exp: modesel %d not supported\n", m_lcd.modesel); break;
|
||||
default : verboselog( *this, 0, "s3c44b0_lcd_timer_exp: modesel %d not supported\n", m_lcd.modesel); break;
|
||||
}
|
||||
verboselog(machine(), 3, "LCD - (2) vramaddr %08X vpos %d hpos %d\n", m_lcd.vramaddr_cur, m_lcd.vpos, m_lcd.hpos);
|
||||
verboselog( *this, 3, "LCD - (2) vramaddr %08X vpos %d hpos %d\n", m_lcd.vramaddr_cur, m_lcd.vpos, m_lcd.hpos);
|
||||
if (m_lcd.vpos < vpos)
|
||||
{
|
||||
// verboselog(machine(), 3, "LCD - (1) frame_time %f\n", attotime_to_double(m_lcd.frame_time));
|
||||
// verboselog( *this, 3, "LCD - (1) frame_time %f\n", attotime_to_double(m_lcd.frame_time));
|
||||
m_lcd.frame_time = machine().time() + time_until_pos(m_lcd.vpos_min, m_lcd.hpos_min);
|
||||
// verboselog(machine(), 3, "LCD - (2) frame_time %f\n", attotime_to_double(m_lcd.frame_time));
|
||||
// verboselog( *this, 3, "LCD - (2) frame_time %f\n", attotime_to_double(m_lcd.frame_time));
|
||||
}
|
||||
m_lcd.timer->adjust(time_until_pos(m_lcd.vpos, m_lcd.hpos), 0);
|
||||
}
|
||||
@ -551,7 +551,7 @@ READ32_MEMBER( s3c44b0_device::lcd_r )
|
||||
}
|
||||
break;
|
||||
}
|
||||
// verboselog(machine(), 9, "(LCD) %08X -> %08X\n", S3C44B0_BASE_LCD + (offset << 2), data);
|
||||
// verboselog( *this, 9, "(LCD) %08X -> %08X\n", S3C44B0_BASE_LCD + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -561,7 +561,7 @@ void s3c44b0_device::lcd_configure()
|
||||
int dismode, clkval, lineval, wdly, hozval, lineblank, wlh, mclk;
|
||||
double vclk, framerate;
|
||||
int width, height;
|
||||
verboselog(machine(), 5, "s3c44b0_lcd_configure\n");
|
||||
verboselog( *this, 5, "s3c44b0_lcd_configure\n");
|
||||
dismode = BITS(m_lcd.regs.lcdcon1, 6, 5);
|
||||
clkval = BITS(m_lcd.regs.lcdcon1, 21, 12);
|
||||
lineval = BITS(m_lcd.regs.lcdcon2, 9, 0);
|
||||
@ -570,12 +570,12 @@ void s3c44b0_device::lcd_configure()
|
||||
lineblank = BITS(m_lcd.regs.lcdcon2, 31, 21);
|
||||
wlh = BITS(m_lcd.regs.lcdcon1, 11, 10);
|
||||
mclk = get_mclk();
|
||||
verboselog(machine(), 3, "LCD - dismode %d clkval %d lineval %d wdly %d hozval %d lineblank %d wlh %d mclk %d\n", dismode, clkval, lineval, wdly, hozval, lineblank, wlh, mclk);
|
||||
verboselog( *this, 3, "LCD - dismode %d clkval %d lineval %d wdly %d hozval %d lineblank %d wlh %d mclk %d\n", dismode, clkval, lineval, wdly, hozval, lineblank, wlh, mclk);
|
||||
vclk = (double)(mclk / (clkval * 2));
|
||||
verboselog(machine(), 3, "LCD - vclk %f\n", vclk);
|
||||
verboselog( *this, 3, "LCD - vclk %f\n", vclk);
|
||||
framerate = 1 / (((1 / vclk) * (hozval + 1) + (1 / mclk) * (wlh + wdly + lineblank)) * (lineval + 1));
|
||||
framerate = framerate / 3; // ???
|
||||
verboselog(machine(), 3, "LCD - framerate %f\n", framerate);
|
||||
verboselog( *this, 3, "LCD - framerate %f\n", framerate);
|
||||
switch (dismode)
|
||||
{
|
||||
case S3C44B0_PNRMODE_STN_04_SS : width = ((hozval + 1) * 4); break;
|
||||
@ -585,7 +585,7 @@ void s3c44b0_device::lcd_configure()
|
||||
}
|
||||
height = lineval + 1;
|
||||
m_lcd.framerate = framerate;
|
||||
verboselog(machine(), 3, "video_screen_configure %d %d %f\n", width, height, m_lcd.framerate);
|
||||
verboselog( *this, 3, "video_screen_configure %d %d %f\n", width, height, m_lcd.framerate);
|
||||
screen->configure(screen->width(), screen->height(), screen->visible_area(), HZ_TO_ATTOSECONDS(m_lcd.framerate));
|
||||
m_lcd.hpos_min = 25;
|
||||
m_lcd.hpos_max = 25 + width - 1;
|
||||
@ -593,7 +593,7 @@ void s3c44b0_device::lcd_configure()
|
||||
m_lcd.vpos_min = 25;
|
||||
m_lcd.vpos_max = 25 + height - 1;
|
||||
m_lcd.vpos_end = 25 + height - 1 + 25;
|
||||
verboselog(machine(), 3, "LCD - min_x %d min_y %d max_x %d max_y %d\n", m_lcd.hpos_min, m_lcd.vpos_min, m_lcd.hpos_max, m_lcd.vpos_max);
|
||||
verboselog( *this, 3, "LCD - min_x %d min_y %d max_x %d max_y %d\n", m_lcd.hpos_min, m_lcd.vpos_min, m_lcd.hpos_max, m_lcd.vpos_max);
|
||||
if (m_lcd.bitmap)
|
||||
{
|
||||
auto_free(machine(), m_lcd.bitmap);
|
||||
@ -611,7 +611,7 @@ void s3c44b0_device::lcd_configure()
|
||||
void s3c44b0_device::lcd_start()
|
||||
{
|
||||
screen_device *screen = machine().first_screen();
|
||||
verboselog(machine(), 1, "LCD start\n");
|
||||
verboselog( *this, 1, "LCD start\n");
|
||||
lcd_configure();
|
||||
lcd_dma_init();
|
||||
m_lcd.vpos = m_lcd.vpos_min;
|
||||
@ -623,7 +623,7 @@ void s3c44b0_device::lcd_start()
|
||||
|
||||
void s3c44b0_device::lcd_stop()
|
||||
{
|
||||
verboselog(machine(), 1, "LCD stop\n");
|
||||
verboselog( *this, 1, "LCD stop\n");
|
||||
m_lcd.timer->adjust(attotime::never, 0);
|
||||
}
|
||||
|
||||
@ -638,7 +638,7 @@ void s3c44b0_device::lcd_recalc()
|
||||
WRITE32_MEMBER( s3c44b0_device::lcd_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_lcd.regs)[offset];
|
||||
// verboselog(machine(), 9, "(LCD) %08X <- %08X\n", S3C44B0_BASE_LCD + (offset << 2), data);
|
||||
// verboselog( *this, 9, "(LCD) %08X <- %08X\n", S3C44B0_BASE_LCD + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_lcd.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -669,19 +669,19 @@ UINT32 s3c44b0_device::get_mclk()
|
||||
READ32_MEMBER( s3c44b0_device::clkpow_r )
|
||||
{
|
||||
UINT32 data = ((UINT32*)&m_clkpow.regs)[offset];
|
||||
verboselog(machine(), 9, "(CLKPOW) %08X -> %08X\n", S3C44B0_BASE_CLKPOW + (offset << 2), data);
|
||||
verboselog( *this, 9, "(CLKPOW) %08X -> %08X\n", S3C44B0_BASE_CLKPOW + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::clkpow_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(CLKPOW) %08X <- %08X\n", S3C44B0_BASE_CLKPOW + (offset << 2), data);
|
||||
verboselog( *this, 9, "(CLKPOW) %08X <- %08X\n", S3C44B0_BASE_CLKPOW + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_clkpow.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
case S3C44B0_PLLCON :
|
||||
{
|
||||
verboselog(machine(), 5, "CLKPOW - mclk %d\n", get_mclk());
|
||||
verboselog( *this, 5, "CLKPOW - mclk %d\n", get_mclk());
|
||||
m_cpu->set_unscaled_clock(get_mclk() * CLOCK_MULTIPLIER);
|
||||
}
|
||||
break;
|
||||
@ -754,7 +754,7 @@ void s3c44b0_device::check_pending_irq()
|
||||
|
||||
void s3c44b0_device::request_irq(UINT32 int_type)
|
||||
{
|
||||
verboselog(machine(), 5, "request irq %d\n", int_type);
|
||||
verboselog( *this, 5, "request irq %d\n", int_type);
|
||||
m_irq.regs.intpnd |= (1 << int_type);
|
||||
check_pending_irq();
|
||||
}
|
||||
@ -776,7 +776,7 @@ void s3c44b0_device::check_pending_eint()
|
||||
|
||||
void s3c44b0_device::request_eint(UINT32 number)
|
||||
{
|
||||
verboselog(machine(), 5, "request external interrupt %d\n", number);
|
||||
verboselog( *this, 5, "request external interrupt %d\n", number);
|
||||
if (number < 4)
|
||||
{
|
||||
request_irq(S3C44B0_INT_EINT0 + number);
|
||||
@ -791,13 +791,13 @@ void s3c44b0_device::request_eint(UINT32 number)
|
||||
READ32_MEMBER( s3c44b0_device::irq_r )
|
||||
{
|
||||
UINT32 data = ((UINT32*)&m_irq.regs)[offset];
|
||||
verboselog(machine(), 9, "(IRQ) %08X -> %08X\n", S3C44B0_BASE_INT + (offset << 2), data);
|
||||
verboselog( *this, 9, "(IRQ) %08X -> %08X\n", S3C44B0_BASE_INT + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::irq_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(IRQ) %08X <- %08X\n", S3C44B0_BASE_INT + (offset << 2), data);
|
||||
verboselog( *this, 9, "(IRQ) %08X <- %08X\n", S3C44B0_BASE_INT + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_irq.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -874,7 +874,7 @@ READ32_MEMBER( s3c44b0_device::pwm_r )
|
||||
}
|
||||
break;
|
||||
}
|
||||
verboselog(machine(), 9, "(PWM) %08X -> %08X\n", S3C44B0_BASE_PWM + (offset << 2), data);
|
||||
verboselog( *this, 9, "(PWM) %08X -> %08X\n", S3C44B0_BASE_PWM + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -885,7 +885,7 @@ void s3c44b0_device::pwm_start(int timer)
|
||||
const int mux_shift[] = { 0, 4, 8, 12, 16, 20};
|
||||
UINT32 mclk, prescaler, mux, cnt, cmp, auto_reload;
|
||||
double freq, hz;
|
||||
verboselog(machine(), 1, "PWM %d start\n", timer);
|
||||
verboselog( *this, 1, "PWM %d start\n", timer);
|
||||
mclk = get_mclk();
|
||||
prescaler = (m_pwm.regs.tcfg0 >> prescaler_shift[timer]) & 0xFF;
|
||||
mux = (m_pwm.regs.tcfg1 >> mux_shift[timer]) & 0x0F;
|
||||
@ -957,7 +957,7 @@ void s3c44b0_device::pwm_start(int timer)
|
||||
{
|
||||
hz = freq / cnt;
|
||||
}
|
||||
verboselog(machine(), 5, "PWM %d - mclk=%d prescaler=%d div=%d freq=%f cnt=%d cmp=%d auto_reload=%d hz=%f\n", timer, mclk, prescaler, mux_table[mux], freq, cnt, cmp, auto_reload, hz);
|
||||
verboselog( *this, 5, "PWM %d - mclk=%d prescaler=%d div=%d freq=%f cnt=%d cmp=%d auto_reload=%d hz=%f\n", timer, mclk, prescaler, mux_table[mux], freq, cnt, cmp, auto_reload, hz);
|
||||
m_pwm.cnt[timer] = cnt;
|
||||
m_pwm.cmp[timer] = cmp;
|
||||
m_pwm.freq[timer] = freq;
|
||||
@ -980,7 +980,7 @@ void s3c44b0_device::pwm_start(int timer)
|
||||
|
||||
void s3c44b0_device::pwm_stop(int timer)
|
||||
{
|
||||
verboselog(machine(), 1, "PWM %d stop\n", timer);
|
||||
verboselog( *this, 1, "PWM %d stop\n", timer);
|
||||
m_pwm.timer[timer]->adjust(attotime::never, 0);
|
||||
}
|
||||
|
||||
@ -996,7 +996,7 @@ void s3c44b0_device::pwm_recalc(int timer)
|
||||
WRITE32_MEMBER( s3c44b0_device::pwm_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_pwm.regs)[offset];
|
||||
verboselog(machine(), 9, "(PWM) %08X <- %08X\n", S3C44B0_BASE_PWM + (offset << 2), data);
|
||||
verboselog( *this, 9, "(PWM) %08X <- %08X\n", S3C44B0_BASE_PWM + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_pwm.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -1035,7 +1035,7 @@ TIMER_CALLBACK_MEMBER( s3c44b0_device::pwm_timer_exp )
|
||||
{
|
||||
int ch = param;
|
||||
const int ch_int[] = { S3C44B0_INT_TIMER0, S3C44B0_INT_TIMER1, S3C44B0_INT_TIMER2, S3C44B0_INT_TIMER3, S3C44B0_INT_TIMER4, S3C44B0_INT_TIMER5 };
|
||||
verboselog(machine(), 2, "PWM %d timer callback\n", ch);
|
||||
verboselog( *this, 2, "PWM %d timer callback\n", ch);
|
||||
if (BITS(m_pwm.regs.tcfg1, 27, 24) == (ch + 1))
|
||||
{
|
||||
fatalerror("s3c44b0_dma_request_pwm( device)\n");
|
||||
@ -1070,7 +1070,7 @@ inline int s3c44b0_device::iface_i2c_sda_r()
|
||||
|
||||
void s3c44b0_device::i2c_send_start()
|
||||
{
|
||||
verboselog(machine(), 5, "i2c_send_start\n");
|
||||
verboselog( *this, 5, "i2c_send_start\n");
|
||||
iface_i2c_sda_w(1);
|
||||
iface_i2c_scl_w(1);
|
||||
iface_i2c_sda_w(0);
|
||||
@ -1079,7 +1079,7 @@ void s3c44b0_device::i2c_send_start()
|
||||
|
||||
void s3c44b0_device::i2c_send_stop()
|
||||
{
|
||||
verboselog(machine(), 5, "i2c_send_stop\n");
|
||||
verboselog( *this, 5, "i2c_send_stop\n");
|
||||
iface_i2c_sda_w(0);
|
||||
iface_i2c_scl_w(1);
|
||||
iface_i2c_sda_w(1);
|
||||
@ -1089,7 +1089,7 @@ void s3c44b0_device::i2c_send_stop()
|
||||
UINT8 s3c44b0_device::i2c_receive_byte(int ack)
|
||||
{
|
||||
UINT8 data = 0;
|
||||
verboselog(machine(), 5, "i2c_receive_byte ...\n");
|
||||
verboselog( *this, 5, "i2c_receive_byte ...\n");
|
||||
iface_i2c_sda_w(1);
|
||||
for (int i = 0; i < 8; i++)
|
||||
{
|
||||
@ -1097,8 +1097,8 @@ UINT8 s3c44b0_device::i2c_receive_byte(int ack)
|
||||
data = (data << 1) + (iface_i2c_sda_r() ? 1 : 0);
|
||||
iface_i2c_scl_w(0);
|
||||
}
|
||||
verboselog(machine(), 5, "recv data %02X\n", data);
|
||||
verboselog(machine(), 5, "send ack %d\n", ack);
|
||||
verboselog( *this, 5, "recv data %02X\n", data);
|
||||
verboselog( *this, 5, "send ack %d\n", ack);
|
||||
iface_i2c_sda_w(ack ? 0 : 1);
|
||||
iface_i2c_scl_w(1);
|
||||
iface_i2c_scl_w(0);
|
||||
@ -1108,8 +1108,8 @@ UINT8 s3c44b0_device::i2c_receive_byte(int ack)
|
||||
int s3c44b0_device::i2c_send_byte(UINT8 data)
|
||||
{
|
||||
int ack;
|
||||
verboselog(machine(), 5, "i2c_send_byte ...\n");
|
||||
verboselog(machine(), 5, "send data %02X\n", data);
|
||||
verboselog( *this, 5, "i2c_send_byte ...\n");
|
||||
verboselog( *this, 5, "send data %02X\n", data);
|
||||
for (int i = 0; i < 8; i++)
|
||||
{
|
||||
iface_i2c_sda_w((data & 0x80) ? 1 : 0);
|
||||
@ -1120,7 +1120,7 @@ int s3c44b0_device::i2c_send_byte(UINT8 data)
|
||||
iface_i2c_sda_w(1); // ack bit
|
||||
iface_i2c_scl_w(1);
|
||||
ack = iface_i2c_sda_r();
|
||||
verboselog(machine(), 5, "recv ack %d\n", ack);
|
||||
verboselog( *this, 5, "recv ack %d\n", ack);
|
||||
iface_i2c_scl_w(0);
|
||||
return ack;
|
||||
}
|
||||
@ -1128,7 +1128,7 @@ int s3c44b0_device::i2c_send_byte(UINT8 data)
|
||||
void s3c44b0_device::iic_start()
|
||||
{
|
||||
int mode_selection;
|
||||
verboselog(machine(), 1, "IIC start\n");
|
||||
verboselog( *this, 1, "IIC start\n");
|
||||
i2c_send_start();
|
||||
mode_selection = BITS(m_iic.regs.iicstat, 7, 6);
|
||||
switch (mode_selection)
|
||||
@ -1141,7 +1141,7 @@ void s3c44b0_device::iic_start()
|
||||
|
||||
void s3c44b0_device::iic_stop()
|
||||
{
|
||||
verboselog(machine(), 1, "IIC stop\n");
|
||||
verboselog( *this, 1, "IIC stop\n");
|
||||
i2c_send_stop();
|
||||
m_iic.timer->adjust(attotime::never, 0);
|
||||
}
|
||||
@ -1149,7 +1149,7 @@ void s3c44b0_device::iic_stop()
|
||||
void s3c44b0_device::iic_resume()
|
||||
{
|
||||
int mode_selection;
|
||||
verboselog(machine(), 1, "IIC resume\n");
|
||||
verboselog( *this, 1, "IIC resume\n");
|
||||
mode_selection = BITS(m_iic.regs.iicstat, 7, 6);
|
||||
switch (mode_selection)
|
||||
{
|
||||
@ -1170,14 +1170,14 @@ READ32_MEMBER( s3c44b0_device::iic_r )
|
||||
}
|
||||
break;
|
||||
}
|
||||
verboselog(machine(), 9, "(IIC) %08X -> %08X\n", S3C44B0_BASE_IIC + (offset << 2), data);
|
||||
verboselog( *this, 9, "(IIC) %08X -> %08X\n", S3C44B0_BASE_IIC + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::iic_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_iic.regs)[offset];
|
||||
verboselog(machine(), 9, "(IIC) %08X <- %08X\n", S3C44B0_BASE_IIC + (offset << 2), data);
|
||||
verboselog( *this, 9, "(IIC) %08X <- %08X\n", S3C44B0_BASE_IIC + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_iic.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -1255,7 +1255,7 @@ WRITE32_MEMBER( s3c44b0_device::iic_w )
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::iic_timer_exp )
|
||||
{
|
||||
int enable_interrupt;
|
||||
verboselog(machine(), 2, "IIC timer callback\n");
|
||||
verboselog( *this, 2, "IIC timer callback\n");
|
||||
m_iic.count++;
|
||||
enable_interrupt = BIT(m_iic.regs.iiccon, 5);
|
||||
|
||||
@ -1325,14 +1325,14 @@ READ32_MEMBER( s3c44b0_device::gpio_r )
|
||||
}
|
||||
break;
|
||||
}
|
||||
verboselog(machine(), 9, "(GPIO) %08X -> %08X\n", S3C44B0_BASE_GPIO + (offset << 2), data);
|
||||
verboselog( *this, 9, "(GPIO) %08X -> %08X\n", S3C44B0_BASE_GPIO + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::gpio_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_gpio.regs)[offset];
|
||||
verboselog(machine(), 9, "(GPIO) %08X <- %08X\n", S3C44B0_BASE_GPIO + (offset << 2), data);
|
||||
verboselog( *this, 9, "(GPIO) %08X <- %08X\n", S3C44B0_BASE_GPIO + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_gpio.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -1395,7 +1395,7 @@ UINT32 s3c44b0_device::uart_r(int ch, UINT32 offset)
|
||||
case S3C44B0_URXH :
|
||||
{
|
||||
UINT8 rxdata = data & 0xFF;
|
||||
verboselog(machine(), 5, "UART %d read %02X (%c)\n", ch, rxdata, ((rxdata >= 32) && (rxdata < 128)) ? (char)rxdata : '?');
|
||||
verboselog( *this, 5, "UART %d read %02X (%c)\n", ch, rxdata, ((rxdata >= 32) && (rxdata < 128)) ? (char)rxdata : '?');
|
||||
m_uart[ch].regs.utrstat &= ~1; // [bit 0] Receive buffer data ready
|
||||
}
|
||||
break;
|
||||
@ -1411,7 +1411,7 @@ void s3c44b0_device::uart_w(int ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
|
||||
case S3C44B0_UTXH :
|
||||
{
|
||||
UINT8 txdata = data & 0xFF;
|
||||
verboselog(machine(), 5, "UART %d write %02X (%c)\n", ch, txdata, ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
|
||||
verboselog( *this, 5, "UART %d write %02X (%c)\n", ch, txdata, ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
|
||||
#ifdef UART_PRINTF
|
||||
printf( "%c", ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
|
||||
#endif
|
||||
@ -1422,7 +1422,7 @@ void s3c44b0_device::uart_w(int ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
|
||||
UINT32 mclk, hz;
|
||||
mclk = get_mclk();
|
||||
hz = (mclk / (m_uart->regs.ubrdiv + 1)) / 16;
|
||||
verboselog(machine(), 5, "UART %d - mclk %08X hz %08X\n", ch, mclk, hz);
|
||||
verboselog( *this, 5, "UART %d - mclk %08X hz %08X\n", ch, mclk, hz);
|
||||
m_uart->timer->adjust(attotime::from_hz(hz), ch, attotime::from_hz(hz));
|
||||
}
|
||||
break;
|
||||
@ -1432,26 +1432,26 @@ void s3c44b0_device::uart_w(int ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
|
||||
READ32_MEMBER( s3c44b0_device::uart_0_r )
|
||||
{
|
||||
UINT32 data = uart_r(0, offset);
|
||||
// verboselog(machine(), 9, "(UART 0) %08X -> %08X\n", S3C44B0_BASE_UART_0 + (offset << 2), data);
|
||||
// verboselog( *this, 9, "(UART 0) %08X -> %08X\n", S3C44B0_BASE_UART_0 + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
READ32_MEMBER( s3c44b0_device::uart_1_r )
|
||||
{
|
||||
UINT32 data = uart_r(1, offset);
|
||||
// verboselog(machine(), 9, "(UART 1) %08X -> %08X\n", S3C44B0_BASE_UART_1 + (offset << 2), data);
|
||||
// verboselog( *this, 9, "(UART 1) %08X -> %08X\n", S3C44B0_BASE_UART_1 + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::uart_0_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(UART 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_UART_0 + (offset << 2), data, mem_mask);
|
||||
verboselog( *this, 9, "(UART 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_UART_0 + (offset << 2), data, mem_mask);
|
||||
uart_w(0, offset, data, mem_mask);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::uart_1_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(UART 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_UART_1 + (offset << 2), data, mem_mask);
|
||||
verboselog( *this, 9, "(UART 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_UART_1 + (offset << 2), data, mem_mask);
|
||||
uart_w(1, offset, data, mem_mask);
|
||||
}
|
||||
|
||||
@ -1465,7 +1465,7 @@ void s3c44b0_device::uart_fifo_w(int uart, UINT8 data)
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::uart_timer_exp )
|
||||
{
|
||||
int ch = param;
|
||||
verboselog(machine(), 2, "UART %d timer callback\n", ch);
|
||||
verboselog( *this, 2, "UART %d timer callback\n", ch);
|
||||
if ((m_uart->regs.ucon & (1 << 9)) != 0)
|
||||
{
|
||||
const int ch_int[] = { S3C44B0_INT_UTXD0, S3C44B0_INT_UTXD1 };
|
||||
@ -1495,7 +1495,7 @@ READ32_MEMBER( s3c44b0_device::wdt_r )
|
||||
}
|
||||
break;
|
||||
}
|
||||
verboselog(machine(), 9, "(WDT) %08X -> %08X\n", S3C44B0_BASE_WDT + (offset << 2), data);
|
||||
verboselog( *this, 9, "(WDT) %08X -> %08X\n", S3C44B0_BASE_WDT + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -1503,19 +1503,19 @@ void s3c44b0_device::wdt_start()
|
||||
{
|
||||
UINT32 mclk, prescaler, clock;
|
||||
double freq, hz;
|
||||
verboselog(machine(), 1, "WDT start\n");
|
||||
verboselog( *this, 1, "WDT start\n");
|
||||
mclk = get_mclk();
|
||||
prescaler = BITS(m_wdt.regs.wtcon, 15, 8);
|
||||
clock = 16 << BITS(m_wdt.regs.wtcon, 4, 3);
|
||||
freq = (double)mclk / (prescaler + 1) / clock;
|
||||
hz = freq / m_wdt.regs.wtcnt;
|
||||
verboselog(machine(), 5, "WDT mclk %d prescaler %d clock %d freq %f hz %f\n", mclk, prescaler, clock, freq, hz);
|
||||
verboselog( *this, 5, "WDT mclk %d prescaler %d clock %d freq %f hz %f\n", mclk, prescaler, clock, freq, hz);
|
||||
m_wdt.timer->adjust(attotime::from_hz(hz), 0, attotime::from_hz(hz));
|
||||
}
|
||||
|
||||
void s3c44b0_device::wdt_stop()
|
||||
{
|
||||
verboselog(machine(), 1, "WDT stop\n");
|
||||
verboselog( *this, 1, "WDT stop\n");
|
||||
m_wdt.regs.wtcnt = wdt_calc_current_count();
|
||||
m_wdt.timer->adjust(attotime::never, 0);
|
||||
}
|
||||
@ -1531,7 +1531,7 @@ void s3c44b0_device::wdt_recalc()
|
||||
WRITE32_MEMBER( s3c44b0_device::wdt_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_wdt.regs)[offset];
|
||||
verboselog(machine(), 9, "(WDT) %08X <- %08X\n", S3C44B0_BASE_WDT + (offset << 2), data);
|
||||
verboselog( *this, 9, "(WDT) %08X <- %08X\n", S3C44B0_BASE_WDT + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_wdt.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -1548,7 +1548,7 @@ WRITE32_MEMBER( s3c44b0_device::wdt_w )
|
||||
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::wdt_timer_exp )
|
||||
{
|
||||
verboselog(machine(), 2, "WDT timer callback\n");
|
||||
verboselog( *this, 2, "WDT timer callback\n");
|
||||
if ((m_wdt.regs.wtcon & (1 << 2)) != 0)
|
||||
{
|
||||
request_irq(S3C44B0_INT_WDT);
|
||||
@ -1565,13 +1565,13 @@ TIMER_CALLBACK_MEMBER( s3c44b0_device::wdt_timer_exp )
|
||||
READ32_MEMBER( s3c44b0_device::cpuwrap_r )
|
||||
{
|
||||
UINT32 data = ((UINT32*)&m_cpuwrap.regs)[offset];
|
||||
verboselog(machine(), 9, "(CPUWRAP) %08X -> %08X\n", S3C44B0_BASE_CPU_WRAPPER + (offset << 2), data);
|
||||
verboselog( *this, 9, "(CPUWRAP) %08X -> %08X\n", S3C44B0_BASE_CPU_WRAPPER + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::cpuwrap_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(CPUWRAP) %08X <- %08X\n", S3C44B0_BASE_CPU_WRAPPER + (offset << 2), data);
|
||||
verboselog( *this, 9, "(CPUWRAP) %08X <- %08X\n", S3C44B0_BASE_CPU_WRAPPER + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_cpuwrap.regs)[offset]);
|
||||
}
|
||||
|
||||
@ -1580,7 +1580,7 @@ WRITE32_MEMBER( s3c44b0_device::cpuwrap_w )
|
||||
READ32_MEMBER( s3c44b0_device::adc_r )
|
||||
{
|
||||
UINT32 data = ((UINT32*)&m_adc.regs)[offset];
|
||||
verboselog(machine(), 9, "(ADC) %08X -> %08X\n", S3C44B0_BASE_ADC + (offset << 2), data);
|
||||
verboselog( *this, 9, "(ADC) %08X -> %08X\n", S3C44B0_BASE_ADC + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -1588,18 +1588,18 @@ void s3c44b0_device::adc_start()
|
||||
{
|
||||
UINT32 mclk, prescaler;
|
||||
double freq, hz;
|
||||
verboselog(machine(), 1, "ADC start\n");
|
||||
verboselog( *this, 1, "ADC start\n");
|
||||
mclk = get_mclk();
|
||||
prescaler = BITS(m_adc.regs.adcpsr, 7, 0);
|
||||
freq = (double)mclk / (2 * (prescaler + 1)) / 16;
|
||||
hz = freq / 1; //m_wdt.regs.wtcnt;
|
||||
verboselog(machine(), 5, "ADC mclk %d prescaler %d freq %f hz %f\n", mclk, prescaler, freq, hz);
|
||||
verboselog( *this, 5, "ADC mclk %d prescaler %d freq %f hz %f\n", mclk, prescaler, freq, hz);
|
||||
m_adc.timer->adjust(attotime::from_hz(hz), 0);
|
||||
}
|
||||
|
||||
void s3c44b0_device::adc_stop()
|
||||
{
|
||||
verboselog(machine(), 1, "ADC stop\n");
|
||||
verboselog( *this, 1, "ADC stop\n");
|
||||
m_adc.timer->adjust(attotime::never, 0);
|
||||
}
|
||||
|
||||
@ -1614,7 +1614,7 @@ void s3c44b0_device::adc_recalc()
|
||||
WRITE32_MEMBER( s3c44b0_device::adc_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_wdt.regs)[offset];
|
||||
verboselog(machine(), 9, "(ADC) %08X <- %08X\n", S3C44B0_BASE_ADC + (offset << 2), data);
|
||||
verboselog( *this, 9, "(ADC) %08X <- %08X\n", S3C44B0_BASE_ADC + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_adc.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -1632,7 +1632,7 @@ WRITE32_MEMBER( s3c44b0_device::adc_w )
|
||||
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::adc_timer_exp )
|
||||
{
|
||||
verboselog(machine(), 2, "ADC timer callback\n");
|
||||
verboselog( *this, 2, "ADC timer callback\n");
|
||||
m_adc.regs.adccon |= (1 << 6);
|
||||
request_irq(S3C44B0_INT_ADC);
|
||||
}
|
||||
@ -1642,7 +1642,7 @@ TIMER_CALLBACK_MEMBER( s3c44b0_device::adc_timer_exp )
|
||||
READ32_MEMBER( s3c44b0_device::sio_r )
|
||||
{
|
||||
UINT32 data = ((UINT32*)&m_sio.regs)[offset];
|
||||
verboselog(machine(), 9, "(SIO) %08X -> %08X\n", S3C44B0_BASE_SIO + (offset << 2), data);
|
||||
verboselog( *this, 9, "(SIO) %08X -> %08X\n", S3C44B0_BASE_SIO + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -1650,19 +1650,19 @@ void s3c44b0_device::sio_start()
|
||||
{
|
||||
UINT32 mclk, prescaler;
|
||||
double freq, hz;
|
||||
verboselog(machine(), 1, "SIO start\n");
|
||||
verboselog( *this, 1, "SIO start\n");
|
||||
mclk = get_mclk();
|
||||
prescaler = BITS(m_sio.regs.sbrdr, 11, 0);
|
||||
freq = (double)mclk / 2 / (prescaler + 1);
|
||||
hz = freq / 1; //m_wdt.regs.wtcnt;
|
||||
verboselog(machine(), 5, "SIO mclk %d prescaler %d freq %f hz %f\n", mclk, prescaler, freq, hz);
|
||||
verboselog( *this, 5, "SIO mclk %d prescaler %d freq %f hz %f\n", mclk, prescaler, freq, hz);
|
||||
m_sio.timer->adjust(attotime::from_hz(hz), 0);
|
||||
// printf("SIO transmit %02X (%c)\n", m_sio.regs.siodat, ((m_sio.regs.siodat >= 32) && (m_sio.regs.siodat < 128)) ? (char)m_sio.regs.siodat : '?');
|
||||
}
|
||||
|
||||
void s3c44b0_device::sio_stop()
|
||||
{
|
||||
verboselog(machine(), 1, "SIO stop\n");
|
||||
verboselog( *this, 1, "SIO stop\n");
|
||||
// m_wdt.regs.wtcnt = s3c44b0_wdt_calc_current_count( device);
|
||||
m_sio.timer->adjust(attotime::never, 0);
|
||||
}
|
||||
@ -1678,7 +1678,7 @@ void s3c44b0_device::sio_recalc()
|
||||
WRITE32_MEMBER( s3c44b0_device::sio_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_sio.regs)[offset];
|
||||
verboselog(machine(), 9, "(SIO) %08X <- %08X\n", S3C44B0_BASE_SIO + (offset << 2), data);
|
||||
verboselog( *this, 9, "(SIO) %08X <- %08X\n", S3C44B0_BASE_SIO + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_sio.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -1696,7 +1696,7 @@ WRITE32_MEMBER( s3c44b0_device::sio_w )
|
||||
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::sio_timer_exp )
|
||||
{
|
||||
verboselog(machine(), 2, "SIO timer callback\n");
|
||||
verboselog( *this, 2, "SIO timer callback\n");
|
||||
|
||||
m_sio.regs.siodat = 0x00; // TEST
|
||||
|
||||
@ -1720,32 +1720,32 @@ void s3c44b0_device::iis_start()
|
||||
int prescaler;
|
||||
double freq, hz;
|
||||
const int div[] = { 2, 4, 6, 8, 10, 12, 14, 16, 1, 0, 3, 0, 5, 0, 7, 0 };
|
||||
verboselog(machine(), 1, "IIS start\n");
|
||||
verboselog( *this, 1, "IIS start\n");
|
||||
mclk = get_mclk();
|
||||
prescaler = BITS(m_iis.regs.iispsr, 3, 0);
|
||||
freq = (double)mclk / div[prescaler];
|
||||
hz = freq / 256 * 2;
|
||||
verboselog(machine(), 5, "IIS mclk %d prescaler %d freq %f hz %f\n", mclk, prescaler, freq, hz);
|
||||
verboselog( *this, 5, "IIS mclk %d prescaler %d freq %f hz %f\n", mclk, prescaler, freq, hz);
|
||||
m_iis.timer->adjust(attotime::from_hz(hz), 0, attotime::from_hz(hz));
|
||||
}
|
||||
|
||||
void s3c44b0_device::iis_stop()
|
||||
{
|
||||
verboselog(machine(), 1, "IIS stop\n");
|
||||
verboselog( *this, 1, "IIS stop\n");
|
||||
m_iis.timer->adjust(attotime::never, 0);
|
||||
}
|
||||
|
||||
READ32_MEMBER( s3c44b0_device::iis_r )
|
||||
{
|
||||
UINT32 data = ((UINT32*)&m_iis.regs)[offset];
|
||||
verboselog(machine(), 9, "(IIS) %08X -> %08X\n", S3C44B0_BASE_IIS + (offset << 2), data);
|
||||
verboselog( *this, 9, "(IIS) %08X -> %08X\n", S3C44B0_BASE_IIS + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::iis_w )
|
||||
{
|
||||
UINT32 old_value = ((UINT32*)&m_iis.regs)[offset];
|
||||
verboselog(machine(), 9, "(IIS) %08X <- %08X\n", S3C44B0_BASE_IIS + (offset << 2), data);
|
||||
verboselog( *this, 9, "(IIS) %08X <- %08X\n", S3C44B0_BASE_IIS + (offset << 2), data);
|
||||
COMBINE_DATA(&((UINT32*)&m_iis.regs)[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
@ -1787,7 +1787,7 @@ WRITE32_MEMBER( s3c44b0_device::iis_w )
|
||||
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::iis_timer_exp )
|
||||
{
|
||||
verboselog(machine(), 2, "IIS timer callback\n");
|
||||
verboselog( *this, 2, "IIS timer callback\n");
|
||||
if ((m_iis.regs.iiscon & (1 << 5)) != 0)
|
||||
{
|
||||
bdma_request_iis();
|
||||
@ -1801,20 +1801,20 @@ void s3c44b0_device::zdma_trigger(int ch)
|
||||
address_space &space = m_cpu->space(AS_PROGRAM);
|
||||
UINT32 saddr, daddr;
|
||||
int dal, dst, opt, das, cnt;
|
||||
verboselog(machine(), 5, "s3c44b0_zdma_trigger %d\n", ch);
|
||||
verboselog( *this, 5, "s3c44b0_zdma_trigger %d\n", ch);
|
||||
dst = BITS(m_zdma->regs.dcsrc, 31, 30);
|
||||
dal = BITS(m_zdma->regs.dcsrc, 29, 28);
|
||||
saddr = BITS(m_zdma->regs.dcsrc, 27, 0);
|
||||
verboselog(machine(), 5, "dst %d dal %d saddr %08X\n", dst, dal, saddr);
|
||||
verboselog( *this, 5, "dst %d dal %d saddr %08X\n", dst, dal, saddr);
|
||||
opt = BITS(m_zdma->regs.dcdst, 31, 30);
|
||||
das = BITS(m_zdma->regs.dcdst, 29, 28);
|
||||
daddr = BITS(m_zdma->regs.dcdst, 27, 0);
|
||||
verboselog(machine(), 5, "opt %d das %d daddr %08X\n", opt, das, daddr);
|
||||
verboselog( *this, 5, "opt %d das %d daddr %08X\n", opt, das, daddr);
|
||||
cnt = BITS(m_zdma->regs.dccnt, 19, 0);
|
||||
verboselog(machine(), 5, "icnt %08X\n", cnt);
|
||||
verboselog( *this, 5, "icnt %08X\n", cnt);
|
||||
while (cnt > 0)
|
||||
{
|
||||
verboselog(machine(), 9, "[%08X] -> [%08X]\n", saddr, daddr);
|
||||
verboselog( *this, 9, "[%08X] -> [%08X]\n", saddr, daddr);
|
||||
switch (dst)
|
||||
{
|
||||
case 0 : space.write_byte(daddr, space.read_byte(saddr)); break;
|
||||
@ -1848,7 +1848,7 @@ void s3c44b0_device::zdma_trigger(int ch)
|
||||
|
||||
void s3c44b0_device::zdma_start(int ch)
|
||||
{
|
||||
verboselog(machine(), 5, "ZDMA %d start\n", ch);
|
||||
verboselog( *this, 5, "ZDMA %d start\n", ch);
|
||||
m_zdma->regs.dcsrc = m_zdma->regs.disrc;
|
||||
m_zdma->regs.dcdst = m_zdma->regs.didst;
|
||||
m_zdma->regs.dccnt = m_zdma->regs.dicnt;
|
||||
@ -1885,33 +1885,33 @@ void s3c44b0_device::zdma_w(int ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
|
||||
READ32_MEMBER( s3c44b0_device::zdma_0_r )
|
||||
{
|
||||
UINT32 data = zdma_r(0, offset);
|
||||
verboselog(machine(), 9, "(ZDMA 0) %08X -> %08X\n", S3C44B0_BASE_ZDMA_0 + (offset << 2), data);
|
||||
verboselog( *this, 9, "(ZDMA 0) %08X -> %08X\n", S3C44B0_BASE_ZDMA_0 + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
READ32_MEMBER( s3c44b0_device::zdma_1_r )
|
||||
{
|
||||
UINT32 data = zdma_r(1, offset);
|
||||
verboselog(machine(), 9, "(ZDMA 1) %08X -> %08X\n", S3C44B0_BASE_ZDMA_1 + (offset << 2), data);
|
||||
verboselog( *this, 9, "(ZDMA 1) %08X -> %08X\n", S3C44B0_BASE_ZDMA_1 + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::zdma_0_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(ZDMA 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_ZDMA_0 + (offset << 2), data, mem_mask);
|
||||
verboselog( *this, 9, "(ZDMA 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_ZDMA_0 + (offset << 2), data, mem_mask);
|
||||
zdma_w(0, offset, data, mem_mask);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::zdma_1_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(ZDMA 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_ZDMA_1 + (offset << 2), data, mem_mask);
|
||||
verboselog( *this, 9, "(ZDMA 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_ZDMA_1 + (offset << 2), data, mem_mask);
|
||||
zdma_w(1, offset, data, mem_mask);
|
||||
}
|
||||
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::zdma_timer_exp )
|
||||
{
|
||||
int ch = param;
|
||||
verboselog(machine(), 2, "ZDMA %d timer callback\n", ch);
|
||||
verboselog( *this, 2, "ZDMA %d timer callback\n", ch);
|
||||
}
|
||||
|
||||
/* BDMA */
|
||||
@ -1921,18 +1921,18 @@ void s3c44b0_device::bdma_trigger(int ch)
|
||||
address_space &space = m_cpu->space(AS_PROGRAM);
|
||||
UINT32 saddr, daddr;
|
||||
int dal, dst, tdm, das, cnt;
|
||||
verboselog(machine(), 5, "s3c44b0_bdma_trigger %d\n", ch);
|
||||
verboselog( *this, 5, "s3c44b0_bdma_trigger %d\n", ch);
|
||||
dst = BITS(m_bdma->regs.dcsrc, 31, 30);
|
||||
dal = BITS(m_bdma->regs.dcsrc, 29, 28);
|
||||
saddr = BITS(m_bdma->regs.dcsrc, 27, 0);
|
||||
verboselog(machine(), 5, "dst %d dal %d saddr %08X\n", dst, dal, saddr);
|
||||
verboselog( *this, 5, "dst %d dal %d saddr %08X\n", dst, dal, saddr);
|
||||
tdm = BITS(m_bdma->regs.dcdst, 31, 30);
|
||||
das = BITS(m_bdma->regs.dcdst, 29, 28);
|
||||
daddr = BITS(m_bdma->regs.dcdst, 27, 0);
|
||||
verboselog(machine(), 5, "tdm %d das %d daddr %08X\n", tdm, das, daddr);
|
||||
verboselog( *this, 5, "tdm %d das %d daddr %08X\n", tdm, das, daddr);
|
||||
cnt = BITS(m_bdma->regs.dccnt, 19, 0);
|
||||
verboselog(machine(), 5, "icnt %08X\n", cnt);
|
||||
verboselog(machine(), 9, "[%08X] -> [%08X]\n", saddr, daddr);
|
||||
verboselog( *this, 5, "icnt %08X\n", cnt);
|
||||
verboselog( *this, 9, "[%08X] -> [%08X]\n", saddr, daddr);
|
||||
switch (dst)
|
||||
{
|
||||
case 0 : space.write_byte(daddr, space.read_byte(saddr)); break;
|
||||
@ -1965,7 +1965,7 @@ void s3c44b0_device::bdma_trigger(int ch)
|
||||
|
||||
void s3c44b0_device::bdma_request_iis()
|
||||
{
|
||||
verboselog(machine(), 5, "s3c44b0_bdma_request_iis\n");
|
||||
verboselog( *this, 5, "s3c44b0_bdma_request_iis\n");
|
||||
bdma_trigger(0);
|
||||
}
|
||||
|
||||
@ -1977,7 +1977,7 @@ UINT32 s3c44b0_device::bdma_r(int ch, UINT32 offset)
|
||||
|
||||
void s3c44b0_device::bdma_start(int ch)
|
||||
{
|
||||
verboselog(machine(), 5, "BDMA %d start\n", ch);
|
||||
verboselog( *this, 5, "BDMA %d start\n", ch);
|
||||
int qsc = BITS(m_bdma->regs.dicnt, 31, 30);
|
||||
if ((ch == 0) && (qsc == 1))
|
||||
{
|
||||
@ -1994,7 +1994,7 @@ void s3c44b0_device::bdma_start(int ch)
|
||||
|
||||
void s3c44b0_device::bdma_stop(int ch)
|
||||
{
|
||||
verboselog(machine(), 5, "BDMA %d stop\n", ch);
|
||||
verboselog( *this, 5, "BDMA %d stop\n", ch);
|
||||
m_bdma[ch].timer->adjust(attotime::never, ch);
|
||||
}
|
||||
|
||||
@ -2025,31 +2025,31 @@ void s3c44b0_device::bdma_w(int ch, UINT32 offset, UINT32 data, UINT32 mem_mask)
|
||||
READ32_MEMBER( s3c44b0_device::bdma_0_r )
|
||||
{
|
||||
UINT32 data = bdma_r(0, offset);
|
||||
verboselog(machine(), 9, "(BDMA 0) %08X -> %08X\n", S3C44B0_BASE_BDMA_0 + (offset << 2), data);
|
||||
verboselog( *this, 9, "(BDMA 0) %08X -> %08X\n", S3C44B0_BASE_BDMA_0 + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
READ32_MEMBER( s3c44b0_device::bdma_1_r )
|
||||
{
|
||||
UINT32 data = bdma_r(1, offset);
|
||||
verboselog(machine(), 9, "(BDMA 1) %08X -> %08X\n", S3C44B0_BASE_BDMA_1 + (offset << 2), data);
|
||||
verboselog( *this, 9, "(BDMA 1) %08X -> %08X\n", S3C44B0_BASE_BDMA_1 + (offset << 2), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::bdma_0_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(BDMA 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_BDMA_0 + (offset << 2), data, mem_mask);
|
||||
verboselog( *this, 9, "(BDMA 0) %08X <- %08X (%08X)\n", S3C44B0_BASE_BDMA_0 + (offset << 2), data, mem_mask);
|
||||
bdma_w(0, offset, data, mem_mask);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( s3c44b0_device::bdma_1_w )
|
||||
{
|
||||
verboselog(machine(), 9, "(BDMA 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_BDMA_1 + (offset << 2), data, mem_mask);
|
||||
verboselog( *this, 9, "(BDMA 1) %08X <- %08X (%08X)\n", S3C44B0_BASE_BDMA_1 + (offset << 2), data, mem_mask);
|
||||
bdma_w(1, offset, data, mem_mask);
|
||||
}
|
||||
|
||||
TIMER_CALLBACK_MEMBER( s3c44b0_device::bdma_timer_exp )
|
||||
{
|
||||
int ch = param;
|
||||
verboselog(machine(), 2, "BDMA %d timer callback\n", ch);
|
||||
verboselog( *this, 2, "BDMA %d timer callback\n", ch);
|
||||
}
|
||||
|
@ -13,6 +13,7 @@ static int to_msf(int frame)
|
||||
|
||||
void t10mmc::t10_start(device_t &device)
|
||||
{
|
||||
m_device = &device;
|
||||
t10spc::t10_start(device);
|
||||
|
||||
device.save_item(NAME(m_lba));
|
||||
@ -30,7 +31,7 @@ void t10mmc::t10_reset()
|
||||
SetDevice( m_image->get_cdrom_file() );
|
||||
if( !m_cdrom )
|
||||
{
|
||||
logerror( "T10MMC %s: no CD found!\n", m_image->tag() );
|
||||
m_device->logerror( "T10MMC %s: no CD found!\n", m_image->tag() );
|
||||
}
|
||||
|
||||
m_lba = 0;
|
||||
@ -112,7 +113,7 @@ void t10mmc::ExecCommand()
|
||||
switch ( command[0] )
|
||||
{
|
||||
case T10SPC_CMD_INQUIRY:
|
||||
logerror("T10MMC: INQUIRY\n");
|
||||
m_device->logerror("T10MMC: INQUIRY\n");
|
||||
m_phase = SCSI_PHASE_DATAIN;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = SCSILengthFromUINT8( &command[ 4 ] );
|
||||
@ -121,7 +122,7 @@ void t10mmc::ExecCommand()
|
||||
break;
|
||||
|
||||
case T10SPC_CMD_MODE_SELECT_6:
|
||||
logerror("T10MMC: MODE SELECT(6) length %x control %x\n", command[4], command[5]);
|
||||
m_device->logerror("T10MMC: MODE SELECT(6) length %x control %x\n", command[4], command[5]);
|
||||
m_phase = SCSI_PHASE_DATAOUT;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = SCSILengthFromUINT8( &command[ 4 ] );
|
||||
@ -156,7 +157,7 @@ void t10mmc::ExecCommand()
|
||||
m_lba = command[2]<<24 | command[3]<<16 | command[4]<<8 | command[5];
|
||||
m_blocks = SCSILengthFromUINT16( &command[7] );
|
||||
|
||||
logerror("T10MMC: READ(10) at LBA %x for %d blocks (%d bytes)\n", m_lba, m_blocks, m_blocks * m_sector_bytes);
|
||||
m_device->logerror("T10MMC: READ(10) at LBA %x for %d blocks (%d bytes)\n", m_lba, m_blocks, m_blocks * m_sector_bytes);
|
||||
|
||||
if (m_num_subblocks > 1)
|
||||
{
|
||||
@ -176,7 +177,7 @@ void t10mmc::ExecCommand()
|
||||
break;
|
||||
|
||||
case T10MMC_CMD_READ_SUB_CHANNEL:
|
||||
//logerror("T10MMC: READ SUB-CHANNEL type %d\n", command[3]);
|
||||
//m_device->logerror("T10MMC: READ SUB-CHANNEL type %d\n", command[3]);
|
||||
m_phase = SCSI_PHASE_DATAIN;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = SCSILengthFromUINT16( &command[ 7 ] );
|
||||
@ -197,7 +198,7 @@ void t10mmc::ExecCommand()
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("T10MMC: Unhandled READ TOC format %d\n", toc_format());
|
||||
m_device->logerror("T10MMC: Unhandled READ TOC format %d\n", toc_format());
|
||||
length = 0;
|
||||
break;
|
||||
}
|
||||
@ -227,10 +228,10 @@ void t10mmc::ExecCommand()
|
||||
}
|
||||
else if (m_lba == 0xffffffff)
|
||||
{
|
||||
logerror("T10MMC: play audio from current not implemented!\n");
|
||||
m_device->logerror("T10MMC: play audio from current not implemented!\n");
|
||||
}
|
||||
|
||||
logerror("T10MMC: PLAY AUDIO(10) at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
m_device->logerror("T10MMC: PLAY AUDIO(10) at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
|
||||
trk = cdrom_get_track(m_cdrom, m_lba);
|
||||
|
||||
@ -241,7 +242,7 @@ void t10mmc::ExecCommand()
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("T10MMC: track is NOT audio!\n");
|
||||
m_device->logerror("T10MMC: track is NOT audio!\n");
|
||||
set_sense(SCSI_SENSE_KEY_ILLEGAL_REQUEST, SCSI_SENSE_ASC_ASCQ_ILLEGAL_MODE_FOR_THIS_TRACK);
|
||||
}
|
||||
|
||||
@ -253,7 +254,7 @@ void t10mmc::ExecCommand()
|
||||
case T10MMC_CMD_PLAY_AUDIO_TRACK_INDEX:
|
||||
// be careful: tracks here are zero-based, but the SCSI command
|
||||
// uses the real CD track number which is 1-based!
|
||||
logerror("T10MMC: PLAY AUDIO T/I: strk %d idx %d etrk %d idx %d frames %d\n", command[4], command[5], command[7], command[8], m_blocks);
|
||||
m_device->logerror("T10MMC: PLAY AUDIO T/I: strk %d idx %d etrk %d idx %d frames %d\n", command[4], command[5], command[7], command[8], m_blocks);
|
||||
m_lba = cdrom_get_track_start(m_cdrom, command[4]-1);
|
||||
m_blocks = cdrom_get_track_start(m_cdrom, command[7]-1) - m_lba;
|
||||
if (command[4] > command[7])
|
||||
@ -275,7 +276,7 @@ void t10mmc::ExecCommand()
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("T10MMC: track is NOT audio!\n");
|
||||
m_device->logerror("T10MMC: track is NOT audio!\n");
|
||||
set_sense(SCSI_SENSE_KEY_ILLEGAL_REQUEST, SCSI_SENSE_ASC_ASCQ_ILLEGAL_MODE_FOR_THIS_TRACK);
|
||||
}
|
||||
|
||||
@ -290,7 +291,7 @@ void t10mmc::ExecCommand()
|
||||
m_cdda->pause_audio((command[8] & 0x01) ^ 0x01);
|
||||
}
|
||||
|
||||
logerror("T10MMC: PAUSE/RESUME: %s\n", command[8]&1 ? "RESUME" : "PAUSE");
|
||||
m_device->logerror("T10MMC: PAUSE/RESUME: %s\n", command[8]&1 ? "RESUME" : "PAUSE");
|
||||
m_phase = SCSI_PHASE_STATUS;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = 0;
|
||||
@ -299,14 +300,14 @@ void t10mmc::ExecCommand()
|
||||
case T10MMC_CMD_STOP_PLAY_SCAN:
|
||||
abort_audio();
|
||||
|
||||
logerror("T10MMC: STOP_PLAY_SCAN\n");
|
||||
m_device->logerror("T10MMC: STOP_PLAY_SCAN\n");
|
||||
m_phase = SCSI_PHASE_STATUS;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = 0;
|
||||
break;
|
||||
|
||||
case T10SPC_CMD_MODE_SELECT_10:
|
||||
logerror("T10MMC: MODE SELECT length %x control %x\n", command[7]<<8 | command[8], command[1]);
|
||||
m_device->logerror("T10MMC: MODE SELECT length %x control %x\n", command[7]<<8 | command[8], command[1]);
|
||||
m_phase = SCSI_PHASE_DATAOUT;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = SCSILengthFromUINT16( &command[ 7 ] );
|
||||
@ -329,10 +330,10 @@ void t10mmc::ExecCommand()
|
||||
}
|
||||
else if (m_lba == 0xffffffff)
|
||||
{
|
||||
logerror("T10MMC: play audio from current not implemented!\n");
|
||||
m_device->logerror("T10MMC: play audio from current not implemented!\n");
|
||||
}
|
||||
|
||||
logerror("T10MMC: PLAY AUDIO(12) at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
m_device->logerror("T10MMC: PLAY AUDIO(12) at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
|
||||
trk = cdrom_get_track(m_cdrom, m_lba);
|
||||
|
||||
@ -343,7 +344,7 @@ void t10mmc::ExecCommand()
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("T10MMC: track is NOT audio!\n");
|
||||
m_device->logerror("T10MMC: track is NOT audio!\n");
|
||||
set_sense(SCSI_SENSE_KEY_ILLEGAL_REQUEST, SCSI_SENSE_ASC_ASCQ_ILLEGAL_MODE_FOR_THIS_TRACK);
|
||||
}
|
||||
|
||||
@ -356,7 +357,7 @@ void t10mmc::ExecCommand()
|
||||
m_lba = command[2]<<24 | command[3]<<16 | command[4]<<8 | command[5];
|
||||
m_blocks = command[7]<<16 | command[8]<<8 | command[9];
|
||||
|
||||
logerror("T10MMC: READ(12) at LBA %x for %x blocks (%x bytes)\n", m_lba, m_blocks, m_blocks * m_sector_bytes);
|
||||
m_device->logerror("T10MMC: READ(12) at LBA %x for %x blocks (%x bytes)\n", m_lba, m_blocks, m_blocks * m_sector_bytes);
|
||||
|
||||
if (m_num_subblocks > 1)
|
||||
{
|
||||
@ -376,7 +377,7 @@ void t10mmc::ExecCommand()
|
||||
break;
|
||||
|
||||
case T10MMC_CMD_SET_CD_SPEED:
|
||||
logerror("T10MMC: SET CD SPEED to %d kbytes/sec.\n", command[2]<<8 | command[3]);
|
||||
m_device->logerror("T10MMC: SET CD SPEED to %d kbytes/sec.\n", command[2]<<8 | command[3]);
|
||||
m_phase = SCSI_PHASE_STATUS;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = 0;
|
||||
@ -414,7 +415,7 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
break;
|
||||
|
||||
case T10SBC_CMD_READ_CAPACITY:
|
||||
logerror("T10MMC: READ CAPACITY\n");
|
||||
m_device->logerror("T10MMC: READ CAPACITY\n");
|
||||
|
||||
temp = cdrom_get_track_start(m_cdrom, 0xaa);
|
||||
temp--; // return the last used block on the disc
|
||||
@ -431,17 +432,17 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
|
||||
case T10SBC_CMD_READ_10:
|
||||
case T10SBC_CMD_READ_12:
|
||||
logerror("T10MMC: read %x dataLength, \n", dataLength);
|
||||
m_device->logerror("T10MMC: read %x dataLength, \n", dataLength);
|
||||
if ((m_cdrom) && (m_blocks))
|
||||
{
|
||||
while (dataLength > 0)
|
||||
{
|
||||
if (!cdrom_read_data(m_cdrom, m_lba, tmp_buffer, CD_TRACK_MODE1))
|
||||
{
|
||||
logerror("T10MMC: CD read error!\n");
|
||||
m_device->logerror("T10MMC: CD read error!\n");
|
||||
}
|
||||
|
||||
logerror("True LBA: %d, buffer half: %d\n", m_lba, m_cur_subblock * m_sector_bytes);
|
||||
m_device->logerror("True LBA: %d, buffer half: %d\n", m_lba, m_cur_subblock * m_sector_bytes);
|
||||
|
||||
memcpy(data, &tmp_buffer[m_cur_subblock * m_sector_bytes], m_sector_bytes);
|
||||
|
||||
@ -471,7 +472,7 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
return;
|
||||
}
|
||||
|
||||
logerror("T10MMC: READ SUB-CHANNEL Time = %x, SUBQ = %x\n", command[1], command[2]);
|
||||
m_device->logerror("T10MMC: READ SUB-CHANNEL Time = %x, SUBQ = %x\n", command[1], command[2]);
|
||||
|
||||
bool msf = (command[1] & 0x2) != 0;
|
||||
|
||||
@ -546,7 +547,7 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
break;
|
||||
}
|
||||
default:
|
||||
logerror("T10MMC: Unknown subchannel type %d requested\n", command[3]);
|
||||
m_device->logerror("T10MMC: Unknown subchannel type %d requested\n", command[3]);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -560,7 +561,7 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
{
|
||||
bool msf = (command[1] & 0x2) != 0;
|
||||
|
||||
logerror("T10MMC: READ TOC, format = %d time=%d\n", toc_format(),msf);
|
||||
m_device->logerror("T10MMC: READ TOC, format = %d time=%d\n", toc_format(),msf);
|
||||
switch (toc_format())
|
||||
{
|
||||
case TOC_FORMAT_TRACKS:
|
||||
@ -647,7 +648,7 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("T10MMC: Unhandled READ TOC format %d\n", toc_format());
|
||||
m_device->logerror("T10MMC: Unhandled READ TOC format %d\n", toc_format());
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -655,7 +656,7 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
|
||||
case T10SPC_CMD_MODE_SENSE_6:
|
||||
case T10SPC_CMD_MODE_SENSE_10:
|
||||
logerror("T10MMC: MODE SENSE page code = %x, PC = %x\n", command[2] & 0x3f, (command[2]&0xc0)>>6);
|
||||
m_device->logerror("T10MMC: MODE SENSE page code = %x, PC = %x\n", command[2] & 0x3f, (command[2]&0xc0)>>6);
|
||||
|
||||
memset(data, 0, SCSILengthFromUINT16( &command[ 7 ] ));
|
||||
|
||||
@ -698,7 +699,7 @@ void t10mmc::ReadData( UINT8 *data, int dataLength )
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("T10MMC: MODE SENSE unknown page %x\n", command[2] & 0x3f);
|
||||
m_device->logerror("T10MMC: MODE SENSE unknown page %x\n", command[2] & 0x3f);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@ -719,7 +720,7 @@ void t10mmc::WriteData( UINT8 *data, int dataLength )
|
||||
{
|
||||
case T10SPC_CMD_MODE_SELECT_6:
|
||||
case T10SPC_CMD_MODE_SELECT_10:
|
||||
logerror("T10MMC: MODE SELECT page %x\n", data[0] & 0x3f);
|
||||
m_device->logerror("T10MMC: MODE SELECT page %x\n", data[0] & 0x3f);
|
||||
|
||||
switch (data[0] & 0x3f)
|
||||
{
|
||||
@ -727,22 +728,22 @@ void t10mmc::WriteData( UINT8 *data, int dataLength )
|
||||
// check for SGI extension to force 512-byte blocks
|
||||
if ((data[3] == 8) && (data[10] == 2))
|
||||
{
|
||||
logerror("T10MMC: Experimental SGI 512-byte block extension enabled\n");
|
||||
m_device->logerror("T10MMC: Experimental SGI 512-byte block extension enabled\n");
|
||||
|
||||
m_sector_bytes = 512;
|
||||
m_num_subblocks = 4;
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("T10MMC: Unknown vendor-specific page!\n");
|
||||
m_device->logerror("T10MMC: Unknown vendor-specific page!\n");
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xe: // audio page
|
||||
logerror("Ch 0 route: %x vol: %x\n", data[8], data[9]);
|
||||
logerror("Ch 1 route: %x vol: %x\n", data[10], data[11]);
|
||||
logerror("Ch 2 route: %x vol: %x\n", data[12], data[13]);
|
||||
logerror("Ch 3 route: %x vol: %x\n", data[14], data[15]);
|
||||
m_device->logerror("Ch 0 route: %x vol: %x\n", data[8], data[9]);
|
||||
m_device->logerror("Ch 1 route: %x vol: %x\n", data[10], data[11]);
|
||||
m_device->logerror("Ch 2 route: %x vol: %x\n", data[12], data[13]);
|
||||
m_device->logerror("Ch 3 route: %x vol: %x\n", data[14], data[15]);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
@ -58,6 +58,8 @@ protected:
|
||||
UINT32 m_num_subblocks;
|
||||
UINT32 m_cur_subblock;
|
||||
int m_audio_sense;
|
||||
|
||||
device_t *m_device;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
@ -4,6 +4,7 @@
|
||||
|
||||
void t10sbc::t10_start(device_t &device)
|
||||
{
|
||||
m_device = &device;
|
||||
t10spc::t10_start(device);
|
||||
|
||||
device.save_item( NAME( m_lba ) );
|
||||
@ -21,7 +22,7 @@ void t10sbc::t10_reset()
|
||||
m_disk = m_image->get_hard_disk_file();
|
||||
if (!m_disk)
|
||||
{
|
||||
logerror("T10SBC %s: no HD found!\n", m_image->owner()->tag());
|
||||
m_device->logerror("T10SBC %s: no HD found!\n", m_image->owner()->tag());
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -45,7 +46,7 @@ void t10sbc::ExecCommand()
|
||||
case T10SBC_CMD_SEEK_6:
|
||||
m_lba = (command[1]&0x1f)<<16 | command[2]<<8 | command[3];
|
||||
|
||||
logerror("S1410: SEEK to LBA %x\n", m_lba);
|
||||
m_device->logerror("S1410: SEEK to LBA %x\n", m_lba);
|
||||
|
||||
m_phase = SCSI_PHASE_STATUS;
|
||||
m_transfer_length = 0;
|
||||
@ -55,7 +56,7 @@ void t10sbc::ExecCommand()
|
||||
m_lba = (command[1]&0x1f)<<16 | command[2]<<8 | command[3];
|
||||
m_blocks = SCSILengthFromUINT8( &command[4] );
|
||||
|
||||
logerror("T10SBC: READ at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
m_device->logerror("T10SBC: READ at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
|
||||
m_phase = SCSI_PHASE_DATAIN;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
@ -66,7 +67,7 @@ void t10sbc::ExecCommand()
|
||||
m_lba = (command[1]&0x1f)<<16 | command[2]<<8 | command[3];
|
||||
m_blocks = SCSILengthFromUINT8( &command[4] );
|
||||
|
||||
logerror("T10SBC: WRITE to LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
m_device->logerror("T10SBC: WRITE to LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
|
||||
m_phase = SCSI_PHASE_DATAOUT;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
@ -80,7 +81,7 @@ void t10sbc::ExecCommand()
|
||||
break;
|
||||
|
||||
case T10SPC_CMD_MODE_SELECT_6:
|
||||
logerror("T10SBC: MODE SELECT length %x control %x\n", command[4], command[5]);
|
||||
m_device->logerror("T10SBC: MODE SELECT length %x control %x\n", command[4], command[5]);
|
||||
m_phase = SCSI_PHASE_DATAOUT;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = SCSILengthFromUINT8( &command[ 4 ] );
|
||||
@ -102,7 +103,7 @@ void t10sbc::ExecCommand()
|
||||
m_lba = command[2]<<24 | command[3]<<16 | command[4]<<8 | command[5];
|
||||
m_blocks = SCSILengthFromUINT16( &command[7] );
|
||||
|
||||
logerror("T10SBC: READ at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
m_device->logerror("T10SBC: READ at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
|
||||
m_phase = SCSI_PHASE_DATAIN;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
@ -113,7 +114,7 @@ void t10sbc::ExecCommand()
|
||||
m_lba = command[2]<<24 | command[3]<<16 | command[4]<<8 | command[5];
|
||||
m_blocks = SCSILengthFromUINT16( &command[7] );
|
||||
|
||||
logerror("T10SBC: WRITE to LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
m_device->logerror("T10SBC: WRITE to LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
|
||||
m_phase = SCSI_PHASE_DATAOUT;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
@ -124,7 +125,7 @@ void t10sbc::ExecCommand()
|
||||
m_lba = command[2]<<24 | command[3]<<16 | command[4]<<8 | command[5];
|
||||
m_blocks = command[6]<<24 | command[7]<<16 | command[8]<<8 | command[9];
|
||||
|
||||
logerror("T10SBC: READ at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
m_device->logerror("T10SBC: READ at LBA %x for %x blocks\n", m_lba, m_blocks);
|
||||
|
||||
m_phase = SCSI_PHASE_DATAIN;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
@ -181,7 +182,7 @@ void t10sbc::ReadData( UINT8 *data, int dataLength )
|
||||
{
|
||||
if (!hard_disk_read(m_disk, m_lba, data))
|
||||
{
|
||||
logerror("T10SBC: HD read error!\n");
|
||||
m_device->logerror("T10SBC: HD read error!\n");
|
||||
}
|
||||
m_lba++;
|
||||
m_blocks--;
|
||||
@ -198,7 +199,7 @@ void t10sbc::ReadData( UINT8 *data, int dataLength )
|
||||
|
||||
info = hard_disk_get_info(m_disk);
|
||||
|
||||
logerror("T10SBC: READ CAPACITY\n");
|
||||
m_device->logerror("T10SBC: READ CAPACITY\n");
|
||||
|
||||
// get # of sectors
|
||||
temp = info->cylinders * info->heads * info->sectors;
|
||||
@ -241,7 +242,7 @@ void t10sbc::WriteData( UINT8 *data, int dataLength )
|
||||
{
|
||||
if (!hard_disk_write(m_disk, m_lba, data))
|
||||
{
|
||||
logerror("T10SBC: HD write error!\n");
|
||||
m_device->logerror("T10SBC: HD write error!\n");
|
||||
}
|
||||
m_lba++;
|
||||
m_blocks--;
|
||||
|
@ -31,6 +31,7 @@ protected:
|
||||
UINT32 m_blocks;
|
||||
|
||||
hard_disk_file *m_disk;
|
||||
device_t *m_device;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
@ -4,6 +4,7 @@
|
||||
|
||||
void t10spc::t10_start(device_t &device)
|
||||
{
|
||||
m_device = &device;
|
||||
device.save_item(NAME(command));
|
||||
device.save_item(NAME(commandLength));
|
||||
device.save_item(NAME(m_transfer_length));
|
||||
@ -72,7 +73,7 @@ void t10spc::ExecCommand()
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror( "SCSIDEV unknown command %02x\n", command[ 0 ] );
|
||||
m_device->logerror( "SCSIDEV unknown command %02x\n", command[ 0 ] );
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = 0;
|
||||
break;
|
||||
@ -117,7 +118,7 @@ void t10spc::ReadData( UINT8 *data, int dataLength )
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror( "SCSIDEV unknown read %02x\n", command[ 0 ] );
|
||||
m_device->logerror( "SCSIDEV unknown read %02x\n", command[ 0 ] );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -130,7 +131,7 @@ void t10spc::WriteData( UINT8 *data, int dataLength )
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror( "SCSIDEV unknown write %02x\n", command[ 0 ] );
|
||||
m_device->logerror( "SCSIDEV unknown write %02x\n", command[ 0 ] );
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -2290,7 +2290,7 @@ int wd_fdc_digital_t::digital_pll_t::get_next_bit(attotime &tm, floppy_image_dev
|
||||
if(counter & 0x800)
|
||||
break;
|
||||
}
|
||||
if (TRACE_TRANSITION) logerror("first transition, time=%03x, inc=%3d\n", transition_time, increment);
|
||||
//if (TRACE_TRANSITION) logerror("first transition, time=%03x, inc=%3d\n", transition_time, increment);
|
||||
int bit = transition_time != 0xffff;
|
||||
|
||||
if(transition_time != 0xffff) {
|
||||
|
@ -22,6 +22,7 @@
|
||||
#define VERBOSE 0
|
||||
|
||||
#define VPRINTF(x) do { if (VERBOSE) logerror x; } while (0)
|
||||
#define VPRINTF_CHANNEL(x) do { if (VERBOSE) m_device->logerror x; } while (0)
|
||||
|
||||
|
||||
|
||||
@ -339,7 +340,7 @@ attotime z80ctc_device::ctc_channel::period() const
|
||||
// if counter mode, no real period
|
||||
if ((m_mode & MODE) == MODE_COUNTER)
|
||||
{
|
||||
logerror("CTC %d is CounterMode : Can't calculate period\n", m_index);
|
||||
m_device->logerror("CTC %d is CounterMode : Can't calculate period\n", m_index);
|
||||
return attotime::zero;
|
||||
}
|
||||
|
||||
@ -364,7 +365,7 @@ UINT8 z80ctc_device::ctc_channel::read()
|
||||
{
|
||||
attotime period = ((m_mode & PRESCALER) == PRESCALER_16) ? m_device->m_period16 : m_device->m_period256;
|
||||
|
||||
VPRINTF(("CTC clock %f\n",ATTOSECONDS_TO_HZ(period.attoseconds())));
|
||||
VPRINTF_CHANNEL(("CTC clock %f\n",ATTOSECONDS_TO_HZ(period.attoseconds())));
|
||||
|
||||
if (m_timer != NULL)
|
||||
return ((int)(m_timer->remaining().as_double() / period.as_double()) + 1) & 0xff;
|
||||
@ -383,7 +384,7 @@ void z80ctc_device::ctc_channel::write(UINT8 data)
|
||||
// if we're waiting for a time constant, this is it
|
||||
if ((m_mode & CONSTANT) == CONSTANT_LOAD)
|
||||
{
|
||||
VPRINTF(("CTC ch.%d constant = %02x\n", m_index, data));
|
||||
VPRINTF_CHANNEL(("CTC ch.%d constant = %02x\n", m_index, data));
|
||||
|
||||
// set the time constant (0 -> 0x100)
|
||||
m_tconst = data ? data : 0x100;
|
||||
@ -423,7 +424,7 @@ void z80ctc_device::ctc_channel::write(UINT8 data)
|
||||
#endif
|
||||
{
|
||||
m_device->m_vector = data & 0xf8;
|
||||
logerror("CTC Vector = %02x\n", m_device->m_vector);
|
||||
VPRINTF_CHANNEL(("CTC Vector = %02x\n", m_device->m_vector));
|
||||
}
|
||||
|
||||
// this must be a control word
|
||||
@ -431,7 +432,7 @@ void z80ctc_device::ctc_channel::write(UINT8 data)
|
||||
{
|
||||
// set the new mode
|
||||
m_mode = data;
|
||||
VPRINTF(("CTC ch.%d mode = %02x\n", m_index, data));
|
||||
VPRINTF_CHANNEL(("CTC ch.%d mode = %02x\n", m_index, data));
|
||||
|
||||
// if we're being reset, clear out any pending timers for this channel
|
||||
if ((data & RESET) == RESET_ACTIVE)
|
||||
@ -465,7 +466,7 @@ void z80ctc_device::ctc_channel::trigger(UINT8 data)
|
||||
if ((m_mode & WAITING_FOR_TRIG) && (m_mode & MODE) == MODE_TIMER)
|
||||
{
|
||||
attotime curperiod = period();
|
||||
VPRINTF(("CTC period %s\n", curperiod.as_string()));
|
||||
VPRINTF_CHANNEL(("CTC period %s\n", curperiod.as_string()));
|
||||
m_timer->adjust(curperiod, m_index, curperiod);
|
||||
}
|
||||
|
||||
@ -495,7 +496,7 @@ void z80ctc_device::ctc_channel::timer_callback()
|
||||
if ((m_mode & INTERRUPT) == INTERRUPT_ON)
|
||||
{
|
||||
m_int_state |= Z80_DAISY_INT;
|
||||
VPRINTF(("CTC timer ch%d\n", m_index));
|
||||
VPRINTF_CHANNEL(("CTC timer ch%d\n", m_index));
|
||||
m_device->interrupt_check();
|
||||
}
|
||||
|
||||
|
@ -360,7 +360,7 @@ void z80pio_device::pio_port::reset()
|
||||
void z80pio_device::pio_port::trigger_interrupt()
|
||||
{
|
||||
m_ip = true;
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Transfer Mode Interrupt Pending\n", m_device->tag(), 'A' + m_index);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Transfer Mode Interrupt Pending\n", m_device->tag(), 'A' + m_index);
|
||||
|
||||
check_interrupts();
|
||||
}
|
||||
@ -374,7 +374,7 @@ void z80pio_device::pio_port::set_rdy(bool state)
|
||||
{
|
||||
if (m_rdy == state) return;
|
||||
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Ready: %u\n", m_device->tag(), 'A' + m_index, state);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Ready: %u\n", m_device->tag(), 'A' + m_index, state);
|
||||
|
||||
m_rdy = state;
|
||||
if (m_index == PORT_A)
|
||||
@ -390,7 +390,7 @@ void z80pio_device::pio_port::set_rdy(bool state)
|
||||
|
||||
void z80pio_device::pio_port::set_mode(int mode)
|
||||
{
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Mode: %u\n", m_device->tag(), 'A' + m_index, mode);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Mode: %u\n", m_device->tag(), 'A' + m_index, mode);
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
@ -416,7 +416,7 @@ void z80pio_device::pio_port::set_mode(int mode)
|
||||
case MODE_BIDIRECTIONAL:
|
||||
if (m_index == PORT_B)
|
||||
{
|
||||
logerror("Z80PIO '%s' Port %c Invalid Mode: %u!\n", m_device->tag(), 'A' + m_index, mode);
|
||||
m_device->logerror("Z80PIO '%s' Port %c Invalid Mode: %u!\n", m_device->tag(), 'A' + m_index, mode);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -455,7 +455,7 @@ void z80pio_device::pio_port::set_mode(int mode)
|
||||
|
||||
void z80pio_device::pio_port::strobe(bool state)
|
||||
{
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Strobe: %u\n", m_device->tag(), 'A' + m_index, state);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Strobe: %u\n", m_device->tag(), 'A' + m_index, state);
|
||||
|
||||
if (m_device->m_port[PORT_A].m_mode == MODE_BIDIRECTIONAL)
|
||||
{
|
||||
@ -573,7 +573,7 @@ void z80pio_device::pio_port::write(UINT8 data)
|
||||
{
|
||||
// trigger interrupt
|
||||
m_ip = true;
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Bit Control Mode Interrupt Pending\n", m_device->tag(), 'A' + m_index);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Bit Control Mode Interrupt Pending\n", m_device->tag(), 'A' + m_index);
|
||||
}
|
||||
|
||||
m_match = match;
|
||||
@ -596,7 +596,7 @@ void z80pio_device::pio_port::control_write(UINT8 data)
|
||||
{
|
||||
// load interrupt vector
|
||||
m_vector = data;
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Vector: %02x\n", m_device->tag(), 'A' + m_index, data);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Interrupt Vector: %02x\n", m_device->tag(), 'A' + m_index, data);
|
||||
|
||||
// set interrupt enable
|
||||
m_icw |= ICW_ENABLE_INT;
|
||||
@ -616,10 +616,10 @@ void z80pio_device::pio_port::control_write(UINT8 data)
|
||||
|
||||
if (LOG)
|
||||
{
|
||||
logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", m_device->tag(), 'A' + m_index, BIT(data, 7));
|
||||
logerror("Z80PIO '%s' Port %c Logic: %s\n", m_device->tag(), 'A' + m_index, BIT(data, 6) ? "AND" : "OR");
|
||||
logerror("Z80PIO '%s' Port %c Active %s\n", m_device->tag(), 'A' + m_index, BIT(data, 5) ? "High" : "Low");
|
||||
logerror("Z80PIO '%s' Port %c Mask Follows: %u\n", m_device->tag(), 'A' + m_index, BIT(data, 4));
|
||||
m_device->logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", m_device->tag(), 'A' + m_index, BIT(data, 7));
|
||||
m_device->logerror("Z80PIO '%s' Port %c Logic: %s\n", m_device->tag(), 'A' + m_index, BIT(data, 6) ? "AND" : "OR");
|
||||
m_device->logerror("Z80PIO '%s' Port %c Active %s\n", m_device->tag(), 'A' + m_index, BIT(data, 5) ? "High" : "Low");
|
||||
m_device->logerror("Z80PIO '%s' Port %c Mask Follows: %u\n", m_device->tag(), 'A' + m_index, BIT(data, 4));
|
||||
}
|
||||
|
||||
if (m_icw & ICW_MASK_FOLLOWS)
|
||||
@ -647,7 +647,7 @@ void z80pio_device::pio_port::control_write(UINT8 data)
|
||||
|
||||
case 0x03: // set interrupt enable flip-flop
|
||||
m_icw = (data & 0x80) | (m_icw & 0x7f);
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", m_device->tag(), 'A' + m_index, BIT(data, 7));
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", m_device->tag(), 'A' + m_index, BIT(data, 7));
|
||||
|
||||
// set interrupt enable
|
||||
m_ie = BIT(m_icw, 7) ? true : false;
|
||||
@ -655,14 +655,14 @@ void z80pio_device::pio_port::control_write(UINT8 data)
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("Z80PIO '%s' Port %c Invalid Control Word: %02x!\n", m_device->tag(), 'A' + m_index, data);
|
||||
m_device->logerror("Z80PIO '%s' Port %c Invalid Control Word: %02x!\n", m_device->tag(), 'A' + m_index, data);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case IOR: // data direction register
|
||||
m_ior = data;
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c IOR: %02x\n", m_device->tag(), 'A' + m_index, data);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c IOR: %02x\n", m_device->tag(), 'A' + m_index, data);
|
||||
|
||||
// set interrupt enable
|
||||
m_ie = BIT(m_icw, 7) ? true : false;
|
||||
@ -674,7 +674,7 @@ void z80pio_device::pio_port::control_write(UINT8 data)
|
||||
|
||||
case MASK: // interrupt mask
|
||||
m_mask = data;
|
||||
if (LOG) logerror("Z80PIO '%s' Port %c Mask: %02x\n", m_device->tag(), 'A' + m_index, data);
|
||||
if (LOG) m_device->logerror("Z80PIO '%s' Port %c Mask: %02x\n", m_device->tag(), 'A' + m_index, data);
|
||||
|
||||
// set interrupt enable
|
||||
m_ie = BIT(m_icw, 7) ? true : false;
|
||||
|
@ -436,7 +436,7 @@ void discrete_base_node::resolve_input_nodes(void)
|
||||
{
|
||||
m_device->discrete_log("Warning - discrete_start - NODE_%02d trying to use a node on static input %d", index(), inputnum);
|
||||
/* also report it in the error log so it is not missed */
|
||||
logerror("Warning - discrete_start - NODE_%02d trying to use a node on static input %d", index(), inputnum);
|
||||
m_device->logerror("Warning - discrete_start - NODE_%02d trying to use a node on static input %d", index(), inputnum);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -683,7 +683,7 @@ struct FM_OPN
|
||||
#define LOG_LEVEL LOG_INF
|
||||
|
||||
#ifndef __RAINE__
|
||||
#define LOG(n,x) do { if( (n)>=LOG_LEVEL ) logerror x; } while (0)
|
||||
#define LOG(d,n,x) do { if( (n)>=LOG_LEVEL ) d->logerror x; } while (0)
|
||||
#endif
|
||||
|
||||
/* limitter */
|
||||
@ -2422,6 +2422,8 @@ struct YM2610
|
||||
|
||||
UINT8 flagmask; /* YM2608 only */
|
||||
UINT8 irqmask; /* YM2608 only */
|
||||
|
||||
device_t *device;
|
||||
};
|
||||
|
||||
/* here is the virtual YM2608 */
|
||||
@ -2558,19 +2560,19 @@ static void FM_ADPCMAWrite(YM2610 *F2610,int r,int v)
|
||||
|
||||
if(F2610->pcmbuf==NULL)
|
||||
{ /* Check ROM Mapped */
|
||||
logerror("YM2608-YM2610: ADPCM-A rom not mapped\n");
|
||||
F2610->device->logerror("YM2608-YM2610: ADPCM-A rom not mapped\n");
|
||||
adpcm[c].flag = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(adpcm[c].end >= F2610->pcm_size)
|
||||
{ /* Check End in Range */
|
||||
logerror("YM2610: ADPCM-A end out of range: $%08x\n",adpcm[c].end);
|
||||
F2610->device->logerror("YM2610: ADPCM-A end out of range: $%08x\n",adpcm[c].end);
|
||||
/*adpcm[c].end = F2610->pcm_size-1;*/ /* JB: DO NOT uncomment this, otherwise you will break the comparison in the ADPCM_CALC_CHA() */
|
||||
}
|
||||
if(adpcm[c].start >= F2610->pcm_size) /* Check Start in Range */
|
||||
{
|
||||
logerror("YM2608-YM2610: ADPCM-A start out of range: $%08x\n",adpcm[c].start);
|
||||
F2610->device->logerror("YM2608-YM2610: ADPCM-A start out of range: $%08x\n",adpcm[c].start);
|
||||
adpcm[c].flag = 0;
|
||||
}
|
||||
}
|
||||
@ -3070,7 +3072,7 @@ void ym2608_reset_chip(void *chip)
|
||||
DELTAT->output_pointer = OPN->out_delta;
|
||||
DELTAT->portshift = 5; /* always 5bits shift */ /* ASG */
|
||||
DELTAT->output_range = 1<<23;
|
||||
YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_NORMAL);
|
||||
YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_NORMAL,DELTAT->device);
|
||||
}
|
||||
|
||||
/* YM2608 write */
|
||||
@ -3153,7 +3155,7 @@ int ym2608_write(void *chip, int a,UINT8 v)
|
||||
switch( addr )
|
||||
{
|
||||
case 0x0e: /* DAC data */
|
||||
logerror("YM2608: write to DAC data (unimplemented) value=%02x\n",v);
|
||||
F2608->device->logerror("YM2608: write to DAC data (unimplemented) value=%02x\n",v);
|
||||
break;
|
||||
default:
|
||||
/* 0x00-0x0d */
|
||||
@ -3205,7 +3207,7 @@ UINT8 ym2608_read(void *chip,int a)
|
||||
{
|
||||
if(addr == 0x0f)
|
||||
{
|
||||
logerror("YM2608 A/D convertion is accessed but not implemented !\n");
|
||||
F2608->device->logerror("YM2608 A/D convertion is accessed but not implemented !\n");
|
||||
ret = 0x80; /* 2's complement PCM data - result from A/D convertion */
|
||||
}
|
||||
}
|
||||
@ -3283,9 +3285,9 @@ void ym2610_update_one(void *chip, FMSAMPLE **buffer, int length)
|
||||
#define FM_MSG_YM2610B "YM2610-%p.CH%d is playing,Check whether the type of the chip is YM2610B\n"
|
||||
/* Check YM2610B warning message */
|
||||
if( FM_KEY_IS(&F2610->CH[0].SLOT[3]) )
|
||||
LOG(LOG_WAR,(FM_MSG_YM2610B,F2610->OPN.ST.param,0));
|
||||
LOG(F2610->device,LOG_WAR,(FM_MSG_YM2610B,F2610->OPN.ST.param,0));
|
||||
if( FM_KEY_IS(&F2610->CH[3].SLOT[3]) )
|
||||
LOG(LOG_WAR,(FM_MSG_YM2610B,F2610->OPN.ST.param,3));
|
||||
LOG(F2610->device,LOG_WAR,(FM_MSG_YM2610B,F2610->OPN.ST.param,3));
|
||||
#endif
|
||||
|
||||
/* refresh PG and EG */
|
||||
@ -3628,6 +3630,7 @@ void *ym2610_init(void *param, device_t *device, int clock, int rate,
|
||||
return NULL;
|
||||
}
|
||||
|
||||
F2610->device = device;
|
||||
/* FM */
|
||||
F2610->OPN.ST.param = param;
|
||||
F2610->OPN.type = TYPE_YM2610;
|
||||
@ -3744,7 +3747,7 @@ void ym2610_reset_chip(void *chip)
|
||||
DELTAT->output_pointer = OPN->out_delta;
|
||||
DELTAT->portshift = 8; /* allways 8bits shift */
|
||||
DELTAT->output_range = 1<<23;
|
||||
YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_YM2610);
|
||||
YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_YM2610,F2610->device);
|
||||
}
|
||||
|
||||
/* YM2610 write */
|
||||
@ -3817,7 +3820,7 @@ int ym2610_write(void *chip, int a, UINT8 v)
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("YM2610: write to unknown deltat register %02x val=%02x\n",addr,v);
|
||||
F2610->device->logerror("YM2610: write to unknown deltat register %02x val=%02x\n",addr,v);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -693,6 +693,7 @@ struct YM2612
|
||||
/* dac output (YM2612) */
|
||||
int dacen;
|
||||
INT32 dacout;
|
||||
device_t *device;
|
||||
};
|
||||
|
||||
/* log output level */
|
||||
@ -702,7 +703,7 @@ struct YM2612
|
||||
#define LOG_LEVEL LOG_INF
|
||||
|
||||
#ifndef __RAINE__
|
||||
#define LOG(n,x) do { if( (n)>=LOG_LEVEL ) logerror x; } while (0)
|
||||
#define LOG(d,n,x) do { if( (n)>=LOG_LEVEL ) d->logerror x; } while (0)
|
||||
#endif
|
||||
|
||||
/* limitter */
|
||||
@ -2375,6 +2376,7 @@ void * ym2612_init(void *param, device_t *device, int clock, int rate,
|
||||
/* allocate total level table (128kb space) */
|
||||
init_tables();
|
||||
|
||||
F2612->device = device;
|
||||
F2612->OPN.ST.param = param;
|
||||
F2612->OPN.type = TYPE_YM2612;
|
||||
F2612->OPN.P_CH = F2612->CH;
|
||||
@ -2528,7 +2530,7 @@ UINT8 ym2612_read(void *chip,int a)
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
LOG(LOG_WAR,("YM2612 #%p:A=%d read unmapped area\n",F2612->OPN.ST.param,a));
|
||||
LOG(F2612->device,LOG_WAR,("YM2612 #%p:A=%d read unmapped area\n",F2612->OPN.ST.param,a));
|
||||
return FM_STATUS_FLAG(&F2612->OPN.ST);
|
||||
}
|
||||
return 0;
|
||||
|
@ -1520,7 +1520,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
|
||||
if(OPL->keyboardhandler_w)
|
||||
OPL->keyboardhandler_w(OPL->keyboard_param,v);
|
||||
else
|
||||
logerror("Y8950: write unmapped KEYBOARD port\n");
|
||||
OPL->device->logerror("Y8950: write unmapped KEYBOARD port\n");
|
||||
}
|
||||
break;
|
||||
case 0x07: /* DELTA-T control 1 : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
|
||||
@ -1554,7 +1554,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
|
||||
case 0x15: /* DAC data high 8 bits (F7,F6...F2) */
|
||||
case 0x16: /* DAC data low 2 bits (F1, F0 in bits 7,6) */
|
||||
case 0x17: /* DAC data shift (S2,S1,S0 in bits 2,1,0) */
|
||||
logerror("FMOPL.C: DAC data register written, but not implemented reg=%02x val=%02x\n",r,v);
|
||||
OPL->device->logerror("FMOPL.C: DAC data register written, but not implemented reg=%02x val=%02x\n",r,v);
|
||||
break;
|
||||
|
||||
case 0x18: /* I/O CTRL (Direction) */
|
||||
@ -1571,7 +1571,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
logerror("FMOPL.C: write to unknown register: %02x\n",r);
|
||||
OPL->device->logerror("FMOPL.C: write to unknown register: %02x\n",r);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@ -1748,7 +1748,7 @@ static int OPL_LockTable(device_t *device)
|
||||
if (cymfile)
|
||||
device->machine().scheduler().timer_pulse ( attotime::from_hz(110), FUNC(cymfile_callback)); /*110 Hz pulse timer*/
|
||||
else
|
||||
logerror("Could not create file 3812_.cym\n");
|
||||
device->logerror("Could not create file 3812_.cym\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -1808,7 +1808,7 @@ static void OPLResetChip(FM_OPL *OPL)
|
||||
DELTAT->output_pointer = &OPL->output_deltat[0];
|
||||
DELTAT->portshift = 5;
|
||||
DELTAT->output_range = 1<<23;
|
||||
YM_DELTAT_ADPCM_Reset(DELTAT,0,YM_DELTAT_EMULATION_MODE_NORMAL);
|
||||
YM_DELTAT_ADPCM_Reset(DELTAT,0,YM_DELTAT_EMULATION_MODE_NORMAL,OPL->device);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@ -2074,7 +2074,7 @@ static unsigned char OPLRead(FM_OPL *OPL,int a)
|
||||
if(OPL->keyboardhandler_r)
|
||||
return OPL->keyboardhandler_r(OPL->keyboard_param);
|
||||
else
|
||||
logerror("Y8950: read unmapped KEYBOARD port\n");
|
||||
OPL->device->logerror("Y8950: read unmapped KEYBOARD port\n");
|
||||
}
|
||||
return 0;
|
||||
|
||||
@ -2095,13 +2095,13 @@ static unsigned char OPLRead(FM_OPL *OPL,int a)
|
||||
if(OPL->porthandler_r)
|
||||
return OPL->porthandler_r(OPL->port_param);
|
||||
else
|
||||
logerror("Y8950:read unmapped I/O port\n");
|
||||
OPL->device->logerror("Y8950:read unmapped I/O port\n");
|
||||
}
|
||||
return 0;
|
||||
case 0x1a: /* PCM-DATA */
|
||||
if(OPL->type&OPL_TYPE_ADPCM)
|
||||
{
|
||||
logerror("Y8950 A/D convertion is accessed but not implemented !\n");
|
||||
OPL->device->logerror("Y8950 A/D convertion is accessed but not implemented !\n");
|
||||
return 0x80; /* 2's complement PCM data - result from A/D convertion */
|
||||
}
|
||||
return 0;
|
||||
|
@ -383,10 +383,10 @@ void k053260_device::KDSC_Voice::update_pan_volume()
|
||||
void k053260_device::KDSC_Voice::key_on()
|
||||
{
|
||||
if (m_start >= m_device->m_rom_size)
|
||||
logerror("K053260: Attempting to start playing past the end of the ROM ( start = %06x, length = %06x )\n", m_start, m_length);
|
||||
m_device->logerror("K053260: Attempting to start playing past the end of the ROM ( start = %06x, length = %06x )\n", m_start, m_length);
|
||||
|
||||
else if (m_start + m_length >= m_device->m_rom_size)
|
||||
logerror("K053260: Attempting to play past the end of the ROM ( start = %06x, length = %06x )\n",
|
||||
m_device->logerror("K053260: Attempting to play past the end of the ROM ( start = %06x, length = %06x )\n",
|
||||
m_start, m_length);
|
||||
|
||||
else
|
||||
@ -395,7 +395,7 @@ void k053260_device::KDSC_Voice::key_on()
|
||||
m_counter = 0x1000 - CLOCKS_PER_SAMPLE; // force update on next sound_stream_update
|
||||
m_output = 0;
|
||||
m_playing = true;
|
||||
if (LOG) logerror("K053260: start = %06x, length = %06x, pitch = %04x, vol = %02x, loop = %s, %s\n",
|
||||
if (LOG) m_device->logerror("K053260: start = %06x, length = %06x, pitch = %04x, vol = %02x, loop = %s, %s\n",
|
||||
m_start, m_length, m_pitch, m_volume, m_loop ? "yes" : "no", m_kadpcm ? "KADPCM" : "PCM" );
|
||||
}
|
||||
}
|
||||
@ -465,7 +465,7 @@ UINT8 k053260_device::KDSC_Voice::read_rom()
|
||||
|
||||
if (offs >= m_device->m_rom_size)
|
||||
{
|
||||
logerror("%s: K053260: Attempting to read past the end of the ROM (offs = %06x, size = %06x)\n",
|
||||
m_device->logerror("%s: K053260: Attempting to read past the end of the ROM (offs = %06x, size = %06x)\n",
|
||||
m_device->machine().describe_context(), offs, m_device->m_rom_size);
|
||||
return 0;
|
||||
}
|
||||
|
@ -1197,7 +1197,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("YM2151 Write %02x to undocumented register #%02x\n",v,r);
|
||||
chip->device->logerror("YM2151 Write %02x to undocumented register #%02x\n",v,r);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@ -1548,7 +1548,7 @@ void * ym2151_init(device_t *device, int clock, int rate)
|
||||
if (cymfile)
|
||||
device->machine().scheduler().timer_pulse ( attotime::from_hz(110), FUNC(cymfile_callback)); /*110 Hz pulse timer*/
|
||||
else
|
||||
logerror("Could not create file 2151_.cym\n");
|
||||
device->logerror("Could not create file 2151_.cym\n");
|
||||
}
|
||||
|
||||
return PSG;
|
||||
|
@ -1689,7 +1689,7 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
|
||||
if ((chip->rhythm&0x20)==0)
|
||||
/*rhythm off to on*/
|
||||
{
|
||||
logerror("YM2413: Rhythm mode enable\n");
|
||||
chip->device->logerror("YM2413: Rhythm mode enable\n");
|
||||
|
||||
/* Load instrument settings for channel seven(chan=6 since we're zero based). (Bass drum) */
|
||||
chan = 6;
|
||||
@ -1751,7 +1751,7 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
|
||||
if (chip->rhythm&0x20)
|
||||
/*rhythm on to off*/
|
||||
{
|
||||
logerror("YM2413: Rhythm mode disable\n");
|
||||
chip->device->logerror("YM2413: Rhythm mode disable\n");
|
||||
/* Load instrument settings for channel seven(chan=6 since we're zero based).*/
|
||||
chan = 6;
|
||||
inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
|
||||
@ -1825,7 +1825,7 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
|
||||
|
||||
|
||||
if (CH->sus!=(v&0x20))
|
||||
logerror("chan=%i sus=%2x\n",chan,v&0x20);
|
||||
chip->device->logerror("chan=%i sus=%2x\n",chan,v&0x20);
|
||||
|
||||
CH->sus = v & 0x20;
|
||||
}
|
||||
@ -1939,7 +1939,7 @@ static int OPLL_LockTable(device_t *device)
|
||||
if (cymfile)
|
||||
device->machine().scheduler().timer_pulse ( attotime::from_hz(110), FUNC(cymfile_callback)); /*110 Hz pulse timer*/
|
||||
else
|
||||
logerror("Could not create file 2413_.cym\n");
|
||||
device->logerror("Could not create file 2413_.cym\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -228,7 +228,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
|
||||
/* if yes, then let's check if ADPCM memory is mapped and big enough */
|
||||
if(DELTAT->memory == 0)
|
||||
{
|
||||
logerror("YM Delta-T ADPCM rom not mapped\n");
|
||||
DELTAT->device->logerror("YM Delta-T ADPCM rom not mapped\n");
|
||||
DELTAT->portstate = 0x00;
|
||||
DELTAT->PCM_BSY = 0;
|
||||
}
|
||||
@ -236,12 +236,12 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
|
||||
{
|
||||
if( DELTAT->end >= DELTAT->memory_size ) /* Check End in Range */
|
||||
{
|
||||
logerror("YM Delta-T ADPCM end out of range: $%08x\n", DELTAT->end);
|
||||
DELTAT->device->logerror("YM Delta-T ADPCM end out of range: $%08x\n", DELTAT->end);
|
||||
DELTAT->end = DELTAT->memory_size - 1;
|
||||
}
|
||||
if( DELTAT->start >= DELTAT->memory_size ) /* Check Start in Range */
|
||||
{
|
||||
logerror("YM Delta-T ADPCM start out of range: $%08x\n", DELTAT->start);
|
||||
DELTAT->device->logerror("YM Delta-T ADPCM start out of range: $%08x\n", DELTAT->start);
|
||||
DELTAT->portstate = 0x00;
|
||||
DELTAT->PCM_BSY = 0;
|
||||
}
|
||||
@ -411,8 +411,9 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
|
||||
}
|
||||
}
|
||||
|
||||
void YM_DELTAT_ADPCM_Reset(YM_DELTAT *DELTAT,int pan,int emulation_mode)
|
||||
void YM_DELTAT_ADPCM_Reset(YM_DELTAT *DELTAT,int pan,int emulation_mode,device_t *device)
|
||||
{
|
||||
DELTAT->device = device;
|
||||
DELTAT->now_addr = 0;
|
||||
DELTAT->now_step = 0;
|
||||
DELTAT->step = 0;
|
||||
|
@ -71,13 +71,14 @@ struct YM_DELTAT { /* AT: rearranged and tigntened structure */
|
||||
|
||||
UINT8 reg[16]; /* adpcm registers */
|
||||
UINT8 emulation_mode; /* which chip we're emulating */
|
||||
device_t *device;
|
||||
};
|
||||
|
||||
/*void YM_DELTAT_BRDY_callback(YM_DELTAT *DELTAT);*/
|
||||
|
||||
UINT8 YM_DELTAT_ADPCM_Read(YM_DELTAT *DELTAT);
|
||||
void YM_DELTAT_ADPCM_Write(YM_DELTAT *DELTAT,int r,int v);
|
||||
void YM_DELTAT_ADPCM_Reset(YM_DELTAT *DELTAT,int pan,int emulation_mode);
|
||||
void YM_DELTAT_ADPCM_Reset(YM_DELTAT *DELTAT,int pan,int emulation_mode, device_t *device);
|
||||
void YM_DELTAT_ADPCM_CALC(YM_DELTAT *DELTAT);
|
||||
|
||||
void YM_DELTAT_postload(YM_DELTAT *DELTAT,UINT8 *regs);
|
||||
|
@ -1701,7 +1701,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
|
||||
|
||||
default:
|
||||
if (r < 0x120)
|
||||
logerror("YMF262: write to unknown register (set#2): %03x value=%02x\n",r,v);
|
||||
chip->device->logerror("YMF262: write to unknown register (set#2): %03x value=%02x\n",r,v);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1761,7 +1761,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("YMF262: write to unknown register: %02x value=%02x\n",r,v);
|
||||
chip->device->logerror("YMF262: write to unknown register: %02x value=%02x\n",r,v);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@ -2271,7 +2271,7 @@ static int OPL3_LockTable(device_t *device)
|
||||
if (cymfile)
|
||||
device->machine().scheduler().timer_pulse ( attotime::from_hz(110), FUNC(cymfile_callback)); /*110 Hz pulse timer*/
|
||||
else
|
||||
logerror("Could not create ymf262_.cym file\n");
|
||||
device->logerror("Could not create ymf262_.cym file\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -13,7 +13,7 @@
|
||||
|
||||
#define VERBOSE_LEVEL ( 0 )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t &device, int n_level, const char *s_fmt, ...)
|
||||
{
|
||||
if (VERBOSE_LEVEL >= n_level)
|
||||
{
|
||||
@ -22,7 +22,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
|
||||
va_start(v, s_fmt);
|
||||
vsprintf(buf, s_fmt, v);
|
||||
va_end(v);
|
||||
logerror("%s: %s", machine.describe_context(), buf);
|
||||
device.logerror("%s: %s", device.machine().describe_context(), buf);
|
||||
}
|
||||
}
|
||||
|
||||
@ -125,7 +125,7 @@ READ32_MEMBER( gf4500_device::read )
|
||||
}
|
||||
if ((offset < (GF4500_FRAMEBUF_OFFSET / 4)) || (offset >= ((GF4500_FRAMEBUF_OFFSET + (321 * 240 * 2)) / 4)))
|
||||
{
|
||||
verboselog(machine(), 9, "(GFO) %08X -> %08X\n", 0x34000000 + (offset << 2), data);
|
||||
verboselog( *this, 9, "(GFO) %08X -> %08X\n", 0x34000000 + (offset << 2), data);
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -135,7 +135,7 @@ WRITE32_MEMBER( gf4500_device::write )
|
||||
COMBINE_DATA(&m_data[offset]);
|
||||
if ((offset < (GF4500_FRAMEBUF_OFFSET / 4)) || (offset >= ((GF4500_FRAMEBUF_OFFSET + (321 * 240 * 2)) / 4)))
|
||||
{
|
||||
verboselog(machine(), 9, "(GFO) %08X <- %08X\n", 0x34000000 + (offset << 2), data);
|
||||
verboselog( *this, 9, "(GFO) %08X <- %08X\n", 0x34000000 + (offset << 2), data);
|
||||
}
|
||||
switch (offset)
|
||||
{
|
||||
|
@ -466,7 +466,7 @@ void poly_manager<_BaseType, _ObjectData, _MaxParams, _MaxPolys>::wait(const cha
|
||||
{
|
||||
time = get_profile_ticks() - time;
|
||||
if (time > LOG_WAIT_THRESHOLD)
|
||||
logerror("Poly:Waited %d cycles for %s\n", (int)time, debug_reason);
|
||||
machine().logerror("Poly:Waited %d cycles for %s\n", (int)time, debug_reason);
|
||||
}
|
||||
|
||||
// reset the state
|
||||
|
@ -414,7 +414,7 @@ void poly_wait(legacy_poly_manager *poly, const char *debug_reason)
|
||||
{
|
||||
time = get_profile_ticks() - time;
|
||||
if (time > LOG_WAIT_THRESHOLD)
|
||||
logerror("Poly:Waited %d cycles for %s\n", (int)time, debug_reason);
|
||||
osd_printf_verbose("Poly:Waited %d cycles for %s\n", (int)time, debug_reason);
|
||||
}
|
||||
|
||||
/* reset the state */
|
||||
|
@ -101,7 +101,7 @@ static const UINT16 m_p_n_prevpointlist3[] = { 2, 0, 1 };
|
||||
#define TEXTURE_V( a ) ( a.b.h )
|
||||
#define TEXTURE_U( a ) ( a.b.l )
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level, const char *s_fmt, ... )
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -110,7 +110,7 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine& machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
device.logerror( "%s: %s", device.machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
@ -790,11 +790,11 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
|
||||
n_ti = 0;
|
||||
if( ( tpage & ~0x39ff ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 1, "not handled: draw mode %08x\n", tpage & ~0x39ff );
|
||||
verboselog( *this, 1, "not handled: draw mode %08x\n", tpage & ~0x39ff );
|
||||
}
|
||||
if( n_tp == 3 )
|
||||
{
|
||||
verboselog( machine(), 0, "not handled: tp == 3\n" );
|
||||
verboselog( *this, 0, "not handled: tp == 3\n" );
|
||||
}
|
||||
}
|
||||
else
|
||||
@ -810,15 +810,15 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
|
||||
n_iy = 0;
|
||||
if( ( tpage & ~0x27ef ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 1, "not handled: draw mode %08x\n", tpage & ~0x27ef );
|
||||
verboselog( *this, 1, "not handled: draw mode %08x\n", tpage & ~0x27ef );
|
||||
}
|
||||
if( n_tp == 3 )
|
||||
{
|
||||
verboselog( machine(), 0, "not handled: tp == 3\n" );
|
||||
verboselog( *this, 0, "not handled: tp == 3\n" );
|
||||
}
|
||||
else if( n_tp == 2 && n_ti != 0 )
|
||||
{
|
||||
verboselog( machine(), 0, "not handled: interleaved 15 bit texture\n" );
|
||||
verboselog( *this, 0, "not handled: interleaved 15 bit texture\n" );
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -863,7 +863,7 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
|
||||
p_n_redtrans = p_n_redaddtrans; \
|
||||
p_n_greentrans = p_n_greenaddtrans; \
|
||||
p_n_bluetrans = p_n_blueaddtrans; \
|
||||
verboselog( machine(), 2, "Transparency Mode: 0.5*B + 0.5*F\n" ); \
|
||||
verboselog( *this, 2, "Transparency Mode: 0.5*B + 0.5*F\n" ); \
|
||||
break; \
|
||||
case 0x01: \
|
||||
p_n_f = p_n_f1; \
|
||||
@ -873,7 +873,7 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
|
||||
p_n_redtrans = p_n_redaddtrans; \
|
||||
p_n_greentrans = p_n_greenaddtrans; \
|
||||
p_n_bluetrans = p_n_blueaddtrans; \
|
||||
verboselog( machine(), 2, "Transparency Mode: 1.0*B + 1.0*F\n" ); \
|
||||
verboselog( *this, 2, "Transparency Mode: 1.0*B + 1.0*F\n" ); \
|
||||
break; \
|
||||
case 0x02: \
|
||||
p_n_f = p_n_f1; \
|
||||
@ -883,7 +883,7 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
|
||||
p_n_redtrans = p_n_redsubtrans; \
|
||||
p_n_greentrans = p_n_greensubtrans; \
|
||||
p_n_bluetrans = p_n_bluesubtrans; \
|
||||
verboselog( machine(), 2, "Transparency Mode: 1.0*B - 1.0*F\n" ); \
|
||||
verboselog( *this, 2, "Transparency Mode: 1.0*B - 1.0*F\n" ); \
|
||||
break; \
|
||||
case 0x03: \
|
||||
p_n_f = p_n_f025; \
|
||||
@ -893,7 +893,7 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
|
||||
p_n_redtrans = p_n_redaddtrans; \
|
||||
p_n_greentrans = p_n_greenaddtrans; \
|
||||
p_n_bluetrans = p_n_blueaddtrans; \
|
||||
verboselog( machine(), 2, "Transparency Mode: 1.0*B + 0.25*F\n" ); \
|
||||
verboselog( *this, 2, "Transparency Mode: 1.0*B + 0.25*F\n" ); \
|
||||
break; \
|
||||
} \
|
||||
break; \
|
||||
@ -3046,15 +3046,15 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
{
|
||||
UINT32 data = *( p_ram );
|
||||
|
||||
verboselog( machine(), 2, "PSX Packet #%u %08x\n", n_gpu_buffer_offset, data );
|
||||
verboselog( *this, 2, "PSX Packet #%u %08x\n", n_gpu_buffer_offset, data );
|
||||
m_packet.n_entry[ n_gpu_buffer_offset ] = data;
|
||||
switch( m_packet.n_entry[ 0 ] >> 24 )
|
||||
{
|
||||
case 0x00:
|
||||
verboselog( machine(), 1, "not handled: GPU Command 0x00: (%08x)\n", data );
|
||||
verboselog( *this, 1, "not handled: GPU Command 0x00: (%08x)\n", data );
|
||||
break;
|
||||
case 0x01:
|
||||
verboselog( machine(), 1, "not handled: clear cache\n" );
|
||||
verboselog( *this, 1, "not handled: clear cache\n" );
|
||||
break;
|
||||
case 0x02:
|
||||
if( n_gpu_buffer_offset < 2 )
|
||||
@ -3063,7 +3063,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: frame buffer rectangle %u,%u %u,%u\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: frame buffer rectangle %u,%u %u,%u\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
m_packet.n_entry[ 1 ] & 0xffff, m_packet.n_entry[ 1 ] >> 16, m_packet.n_entry[ 2 ] & 0xffff, m_packet.n_entry[ 2 ] >> 16 );
|
||||
FrameBufferRectangleDraw();
|
||||
n_gpu_buffer_offset = 0;
|
||||
@ -3079,7 +3079,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: monochrome 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: monochrome 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
FlatPolygon( 3 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3094,7 +3094,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: textured 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: textured 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
FlatTexturedPolygon( 3 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3109,7 +3109,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: monochrome 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: monochrome 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
FlatPolygon( 4 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3124,7 +3124,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: textured 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: textured 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
FlatTexturedPolygon( 4 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3139,7 +3139,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: gouraud 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: gouraud 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
GouraudPolygon( 3 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3154,7 +3154,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: gouraud textured 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: gouraud textured 3 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
GouraudTexturedPolygon( 3 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3169,7 +3169,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: gouraud 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: gouraud 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
GouraudPolygon( 4 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3184,7 +3184,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: gouraud textured 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: gouraud textured 4 point polygon\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
GouraudTexturedPolygon( 4 );
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3198,7 +3198,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: monochrome line\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: monochrome line\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
MonochromeLine();
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3213,7 +3213,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: monochrome polyline\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: monochrome polyline\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
MonochromeLine();
|
||||
if( ( m_packet.n_entry[ 3 ] & 0xf000f000 ) != 0x50005000 )
|
||||
{
|
||||
@ -3237,7 +3237,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: gouraud line\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: gouraud line\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
GouraudLine();
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3253,7 +3253,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: gouraud polyline\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: gouraud polyline\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
GouraudLine();
|
||||
if( ( m_packet.n_entry[ 4 ] & 0xf000f000 ) != 0x50005000 )
|
||||
{
|
||||
@ -3279,7 +3279,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: rectangle %d,%d %d,%d\n",
|
||||
verboselog( *this, 1, "%02x: rectangle %d,%d %d,%d\n",
|
||||
m_packet.n_entry[ 0 ] >> 24,
|
||||
(INT16)( m_packet.n_entry[ 1 ] & 0xffff ), (INT16)( m_packet.n_entry[ 1 ] >> 16 ),
|
||||
(INT16)( m_packet.n_entry[ 2 ] & 0xffff ), (INT16)( m_packet.n_entry[ 2 ] >> 16 ) );
|
||||
@ -3297,7 +3297,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: sprite %d,%d %u,%u %08x, %08x\n",
|
||||
verboselog( *this, 1, "%02x: sprite %d,%d %u,%u %08x, %08x\n",
|
||||
m_packet.n_entry[ 0 ] >> 24,
|
||||
(INT16)( m_packet.n_entry[ 1 ] & 0xffff ), (INT16)( m_packet.n_entry[ 1 ] >> 16 ),
|
||||
m_packet.n_entry[ 3 ] & 0xffff, m_packet.n_entry[ 3 ] >> 16,
|
||||
@ -3314,7 +3314,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: dot %d,%d %08x\n",
|
||||
verboselog( *this, 1, "%02x: dot %d,%d %08x\n",
|
||||
m_packet.n_entry[ 0 ] >> 24,
|
||||
(INT16)( m_packet.n_entry[ 1 ] & 0xffff ), (INT16)( m_packet.n_entry[ 1 ] >> 16 ),
|
||||
m_packet.n_entry[ 0 ] & 0xffffff );
|
||||
@ -3331,7 +3331,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: 16x16 rectangle %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: 16x16 rectangle %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
m_packet.n_entry[ 0 ], m_packet.n_entry[ 1 ] );
|
||||
FlatRectangle8x8();
|
||||
n_gpu_buffer_offset = 0;
|
||||
@ -3347,7 +3347,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: 8x8 sprite %08x %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: 8x8 sprite %08x %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
m_packet.n_entry[ 0 ], m_packet.n_entry[ 1 ], m_packet.n_entry[ 2 ] );
|
||||
Sprite8x8();
|
||||
n_gpu_buffer_offset = 0;
|
||||
@ -3362,7 +3362,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: 16x16 rectangle %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: 16x16 rectangle %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
m_packet.n_entry[ 0 ], m_packet.n_entry[ 1 ] );
|
||||
FlatRectangle16x16();
|
||||
n_gpu_buffer_offset = 0;
|
||||
@ -3378,7 +3378,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: 16x16 sprite %08x %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: 16x16 sprite %08x %08x %08x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
m_packet.n_entry[ 0 ], m_packet.n_entry[ 1 ], m_packet.n_entry[ 2 ] );
|
||||
Sprite16x16();
|
||||
n_gpu_buffer_offset = 0;
|
||||
@ -3391,7 +3391,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "move image in frame buffer %08x %08x %08x %08x\n", m_packet.n_entry[ 0 ], m_packet.n_entry[ 1 ], m_packet.n_entry[ 2 ], m_packet.n_entry[ 3 ] );
|
||||
verboselog( *this, 1, "move image in frame buffer %08x %08x %08x %08x\n", m_packet.n_entry[ 0 ], m_packet.n_entry[ 1 ], m_packet.n_entry[ 2 ], m_packet.n_entry[ 3 ] );
|
||||
MoveImage();
|
||||
n_gpu_buffer_offset = 0;
|
||||
}
|
||||
@ -3408,7 +3408,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
{
|
||||
UINT16 *p_vram;
|
||||
|
||||
verboselog( machine(), 2, "send image to framebuffer ( pixel %u,%u = %u )\n",
|
||||
verboselog( *this, 2, "send image to framebuffer ( pixel %u,%u = %u )\n",
|
||||
( n_vramx + m_packet.n_entry[ 1 ] ) & 1023,
|
||||
( n_vramy + ( m_packet.n_entry[ 1 ] >> 16 ) ) & 1023,
|
||||
data & 0xffff );
|
||||
@ -3422,7 +3422,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
n_vramy++;
|
||||
if( n_vramy >= ( m_packet.n_entry[ 2 ] >> 16 ) )
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: send image to framebuffer %u,%u %u,%u\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: send image to framebuffer %u,%u %u,%u\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
m_packet.n_entry[ 1 ] & 0xffff, ( m_packet.n_entry[ 1 ] >> 16 ),
|
||||
m_packet.n_entry[ 2 ] & 0xffff, ( m_packet.n_entry[ 2 ] >> 16 ) );
|
||||
n_gpu_buffer_offset = 0;
|
||||
@ -3442,12 +3442,12 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "%02x: copy image from frame buffer\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
verboselog( *this, 1, "%02x: copy image from frame buffer\n", m_packet.n_entry[ 0 ] >> 24 );
|
||||
n_gpustatus |= ( 1L << 0x1b );
|
||||
}
|
||||
break;
|
||||
case 0xe1:
|
||||
verboselog( machine(), 1, "%02x: draw mode %06x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: draw mode %06x\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
m_packet.n_entry[ 0 ] & 0xffffff );
|
||||
decode_tpage( m_packet.n_entry[ 0 ] & 0xffffff );
|
||||
break;
|
||||
@ -3456,7 +3456,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
n_twx = ( ( ( m_packet.n_entry[ 0 ] >> 10 ) & 0x1f ) << 3 );
|
||||
n_twh = 255 - ( ( ( m_packet.n_entry[ 0 ] >> 5 ) & 0x1f ) << 3 );
|
||||
n_tww = 255 - ( ( m_packet.n_entry[ 0 ] & 0x1f ) << 3 );
|
||||
verboselog( machine(), 1, "%02x: texture window %u,%u %u,%u\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: texture window %u,%u %u,%u\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
n_twx, n_twy, n_tww, n_twh );
|
||||
break;
|
||||
case 0xe3:
|
||||
@ -3469,7 +3469,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
{
|
||||
n_drawarea_y1 = ( m_packet.n_entry[ 0 ] >> 12 ) & 1023;
|
||||
}
|
||||
verboselog( machine(), 1, "%02x: drawing area top left %d,%d\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: drawing area top left %d,%d\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
n_drawarea_x1, n_drawarea_y1 );
|
||||
break;
|
||||
case 0xe4:
|
||||
@ -3482,7 +3482,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
{
|
||||
n_drawarea_y2 = ( m_packet.n_entry[ 0 ] >> 12 ) & 1023;
|
||||
}
|
||||
verboselog( machine(), 1, "%02x: drawing area bottom right %d,%d\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: drawing area bottom right %d,%d\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
n_drawarea_x2, n_drawarea_y2 );
|
||||
break;
|
||||
case 0xe5:
|
||||
@ -3495,7 +3495,7 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
{
|
||||
n_drawoffset_y = SINT11( ( m_packet.n_entry[ 0 ] >> 12 ) & 2047 );
|
||||
}
|
||||
verboselog( machine(), 1, "%02x: drawing offset %d,%d\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
verboselog( *this, 1, "%02x: drawing offset %d,%d\n", m_packet.n_entry[ 0 ] >> 24,
|
||||
n_drawoffset_x, n_drawoffset_y );
|
||||
break;
|
||||
case 0xe6:
|
||||
@ -3503,18 +3503,18 @@ void psxgpu_device::gpu_write( UINT32 *p_ram, INT32 n_size )
|
||||
n_gpustatus |= ( data & 0x03 ) << 0xb;
|
||||
if( ( m_packet.n_entry[ 0 ] & 3 ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 1, "not handled: mask setting %d\n", m_packet.n_entry[ 0 ] & 3 );
|
||||
verboselog( *this, 1, "not handled: mask setting %d\n", m_packet.n_entry[ 0 ] & 3 );
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 1, "mask setting %d\n", m_packet.n_entry[ 0 ] & 3 );
|
||||
verboselog( *this, 1, "mask setting %d\n", m_packet.n_entry[ 0 ] & 3 );
|
||||
}
|
||||
break;
|
||||
default:
|
||||
#if defined( MAME_DEBUG )
|
||||
popmessage( "unknown GPU packet %08x", m_packet.n_entry[ 0 ] );
|
||||
#endif
|
||||
verboselog( machine(), 0, "unknown GPU packet %08x (%08x)\n", m_packet.n_entry[ 0 ], data );
|
||||
verboselog( *this, 0, "unknown GPU packet %08x (%08x)\n", m_packet.n_entry[ 0 ], data );
|
||||
#if ( STOP_ON_ERROR )
|
||||
n_gpu_buffer_offset = 1;
|
||||
#endif
|
||||
@ -3539,18 +3539,18 @@ WRITE32_MEMBER( psxgpu_device::write )
|
||||
gpu_reset();
|
||||
break;
|
||||
case 0x01:
|
||||
verboselog( machine(), 1, "not handled: reset command buffer\n" );
|
||||
verboselog( *this, 1, "not handled: reset command buffer\n" );
|
||||
n_gpu_buffer_offset = 0;
|
||||
break;
|
||||
case 0x02:
|
||||
verboselog( machine(), 1, "not handled: reset irq\n" );
|
||||
verboselog( *this, 1, "not handled: reset irq\n" );
|
||||
break;
|
||||
case 0x03:
|
||||
n_gpustatus &= ~( 1L << 0x17 );
|
||||
n_gpustatus |= ( data & 0x01 ) << 0x17;
|
||||
break;
|
||||
case 0x04:
|
||||
verboselog( machine(), 1, "dma setup %d\n", data & 3 );
|
||||
verboselog( *this, 1, "dma setup %d\n", data & 3 );
|
||||
n_gpustatus &= ~( 3L << 0x1d );
|
||||
n_gpustatus |= ( data & 0x03 ) << 0x1d;
|
||||
n_gpustatus &= ~( 1L << 0x19 );
|
||||
@ -3569,20 +3569,20 @@ WRITE32_MEMBER( psxgpu_device::write )
|
||||
{
|
||||
n_displaystarty = ( data >> 12 ) & 1023;
|
||||
}
|
||||
verboselog( machine(), 1, "start of display area %d %d\n", m_n_displaystartx, n_displaystarty );
|
||||
verboselog( *this, 1, "start of display area %d %d\n", m_n_displaystartx, n_displaystarty );
|
||||
break;
|
||||
case 0x06:
|
||||
n_horiz_disstart = data & 4095;
|
||||
n_horiz_disend = ( data >> 12 ) & 4095;
|
||||
verboselog( machine(), 1, "horizontal display range %d %d\n", n_horiz_disstart, n_horiz_disend );
|
||||
verboselog( *this, 1, "horizontal display range %d %d\n", n_horiz_disstart, n_horiz_disend );
|
||||
break;
|
||||
case 0x07:
|
||||
n_vert_disstart = data & 1023;
|
||||
n_vert_disend = ( data >> 10 ) & 2047;
|
||||
verboselog( machine(), 1, "vertical display range %d %d\n", n_vert_disstart, n_vert_disend );
|
||||
verboselog( *this, 1, "vertical display range %d %d\n", n_vert_disstart, n_vert_disend );
|
||||
break;
|
||||
case 0x08:
|
||||
verboselog( machine(), 1, "display mode %02x\n", data & 0xff );
|
||||
verboselog( *this, 1, "display mode %02x\n", data & 0xff );
|
||||
n_gpustatus &= ~( 127L << 0x10 );
|
||||
n_gpustatus |= ( data & 0x3f ) << 0x11; /* width 0 + height + videmode + isrgb24 + isinter */
|
||||
n_gpustatus |= ( ( data & 0x40 ) >> 0x06 ) << 0x10; /* width 1 */
|
||||
@ -3593,10 +3593,10 @@ WRITE32_MEMBER( psxgpu_device::write )
|
||||
updatevisiblearea();
|
||||
break;
|
||||
case 0x09:
|
||||
verboselog( machine(), 1, "not handled: GPU Control 0x09: %08x\n", data );
|
||||
verboselog( *this, 1, "not handled: GPU Control 0x09: %08x\n", data );
|
||||
break;
|
||||
case 0x0d:
|
||||
verboselog( machine(), 1, "reset lightgun coordinates %08x\n", data );
|
||||
verboselog( *this, 1, "reset lightgun coordinates %08x\n", data );
|
||||
n_lightgun_x = 0;
|
||||
n_lightgun_y = 0;
|
||||
break;
|
||||
@ -3612,7 +3612,7 @@ WRITE32_MEMBER( psxgpu_device::write )
|
||||
{
|
||||
n_gpuinfo = n_drawarea_x1 | ( n_drawarea_y1 << 12 );
|
||||
}
|
||||
verboselog( machine(), 1, "GPU Info - Draw area top left %08x\n", n_gpuinfo );
|
||||
verboselog( *this, 1, "GPU Info - Draw area top left %08x\n", n_gpuinfo );
|
||||
break;
|
||||
case 0x04:
|
||||
if( m_n_gputype == 2 )
|
||||
@ -3623,7 +3623,7 @@ WRITE32_MEMBER( psxgpu_device::write )
|
||||
{
|
||||
n_gpuinfo = n_drawarea_x2 | ( n_drawarea_y2 << 12 );
|
||||
}
|
||||
verboselog( machine(), 1, "GPU Info - Draw area bottom right %08x\n", n_gpuinfo );
|
||||
verboselog( *this, 1, "GPU Info - Draw area bottom right %08x\n", n_gpuinfo );
|
||||
break;
|
||||
case 0x05:
|
||||
if( m_n_gputype == 2 )
|
||||
@ -3634,35 +3634,35 @@ WRITE32_MEMBER( psxgpu_device::write )
|
||||
{
|
||||
n_gpuinfo = ( n_drawoffset_x & 2047 ) | ( ( n_drawoffset_y & 2047 ) << 12 );
|
||||
}
|
||||
verboselog( machine(), 1, "GPU Info - Draw offset %08x\n", n_gpuinfo );
|
||||
verboselog( *this, 1, "GPU Info - Draw offset %08x\n", n_gpuinfo );
|
||||
break;
|
||||
case 0x07:
|
||||
n_gpuinfo = m_n_gputype;
|
||||
verboselog( machine(), 1, "GPU Info - GPU Type %08x\n", n_gpuinfo );
|
||||
verboselog( *this, 1, "GPU Info - GPU Type %08x\n", n_gpuinfo );
|
||||
break;
|
||||
case 0x08:
|
||||
n_gpuinfo = n_lightgun_x | ( n_lightgun_y << 16 );
|
||||
verboselog( machine(), 1, "GPU Info - lightgun coordinates %08x\n", n_gpuinfo );
|
||||
verboselog( *this, 1, "GPU Info - lightgun coordinates %08x\n", n_gpuinfo );
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "GPU Info - unknown request (%08x)\n", data );
|
||||
verboselog( *this, 0, "GPU Info - unknown request (%08x)\n", data );
|
||||
n_gpuinfo = 0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 0x20:
|
||||
verboselog( machine(), 1, "not handled: GPU Control 0x20: %08x\n", data );
|
||||
verboselog( *this, 1, "not handled: GPU Control 0x20: %08x\n", data );
|
||||
break;
|
||||
default:
|
||||
#if defined( MAME_DEBUG )
|
||||
popmessage( "unknown GPU command %08x", data );
|
||||
#endif
|
||||
verboselog( machine(), 0, "gpu_w( %08x ) unknown GPU command\n", data );
|
||||
verboselog( *this, 0, "gpu_w( %08x ) unknown GPU command\n", data );
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "gpu_w( %08x, %08x, %08x ) unknown register\n", offset, data, mem_mask );
|
||||
verboselog( *this, 0, "gpu_w( %08x, %08x, %08x ) unknown register\n", offset, data, mem_mask );
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -3682,7 +3682,7 @@ void psxgpu_device::gpu_read( UINT32 *p_ram, INT32 n_size )
|
||||
UINT32 n_pixel;
|
||||
PAIR data;
|
||||
|
||||
verboselog( machine(), 2, "copy image from frame buffer ( %d, %d )\n", n_vramx, n_vramy );
|
||||
verboselog( *this, 2, "copy image from frame buffer ( %d, %d )\n", n_vramx, n_vramy );
|
||||
data.d = 0;
|
||||
for( n_pixel = 0; n_pixel < 2; n_pixel++ )
|
||||
{
|
||||
@ -3695,7 +3695,7 @@ void psxgpu_device::gpu_read( UINT32 *p_ram, INT32 n_size )
|
||||
n_vramy++;
|
||||
if( n_vramy >= ( m_packet.n_entry[ 2 ] >> 16 ) )
|
||||
{
|
||||
verboselog( machine(), 1, "copy image from frame buffer end\n" );
|
||||
verboselog( *this, 1, "copy image from frame buffer end\n" );
|
||||
n_gpustatus &= ~( 1L << 0x1b );
|
||||
n_gpu_buffer_offset = 0;
|
||||
n_vramx = 0;
|
||||
@ -3713,7 +3713,7 @@ void psxgpu_device::gpu_read( UINT32 *p_ram, INT32 n_size )
|
||||
}
|
||||
else
|
||||
{
|
||||
verboselog( machine(), 2, "read GPU info (%08x)\n", n_gpuinfo );
|
||||
verboselog( *this, 2, "read GPU info (%08x)\n", n_gpuinfo );
|
||||
*( p_ram ) = n_gpuinfo;
|
||||
}
|
||||
p_ram++;
|
||||
@ -3732,10 +3732,10 @@ READ32_MEMBER( psxgpu_device::read )
|
||||
break;
|
||||
case 0x01:
|
||||
data = n_gpustatus;
|
||||
verboselog( machine(), 1, "read GPU status (%08x)\n", data );
|
||||
verboselog( *this, 1, "read GPU status (%08x)\n", data );
|
||||
break;
|
||||
default:
|
||||
verboselog( machine(), 0, "gpu_r( %08x, %08x ) unknown register\n", offset, mem_mask );
|
||||
verboselog( *this, 0, "gpu_r( %08x, %08x ) unknown register\n", offset, mem_mask );
|
||||
data = 0;
|
||||
break;
|
||||
}
|
||||
@ -3757,7 +3757,7 @@ void psxgpu_device::vblank(screen_device &screen, bool vblank_state)
|
||||
|
||||
void psxgpu_device::gpu_reset( void )
|
||||
{
|
||||
verboselog( machine(), 1, "reset gpu\n" );
|
||||
verboselog( *this, 1, "reset gpu\n" );
|
||||
n_gpu_buffer_offset = 0;
|
||||
n_gpustatus = 0x14802000;
|
||||
n_drawarea_x1 = 0;
|
||||
|
@ -413,7 +413,7 @@ int voodoo_update(device_t *device, bitmap_rgb32 &bitmap, const rectangle &clipr
|
||||
|
||||
/* display stats */
|
||||
if (v->stats.display)
|
||||
popmessage(v->stats.buffer, 0, 0);
|
||||
device->popmessage(v->stats.buffer, 0, 0);
|
||||
|
||||
/* update render override */
|
||||
v->stats.render_override = device->machine().input().code_pressed(KEYCODE_ENTER);
|
||||
@ -457,7 +457,7 @@ void voodoo_set_init_enable(device_t *device, UINT32 newval)
|
||||
voodoo_state *v = get_safe_token(device);
|
||||
v->pci.init_enable = newval;
|
||||
if (LOG_REGISTERS)
|
||||
logerror("VOODOO.%d.REG:initEnable write = %08X\n", v->index, newval);
|
||||
device->logerror("VOODOO.%d.REG:initEnable write = %08X\n", v->index, newval);
|
||||
}
|
||||
|
||||
|
||||
@ -844,7 +844,7 @@ static void swap_buffers(voodoo_state *v)
|
||||
{
|
||||
int count;
|
||||
|
||||
if (LOG_VBLANK_SWAP) logerror("--- swap_buffers @ %d\n", v->screen->vpos());
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror("--- swap_buffers @ %d\n", v->screen->vpos());
|
||||
|
||||
/* force a partial update */
|
||||
v->screen->update_partial(v->screen->vpos());
|
||||
@ -968,7 +968,7 @@ static TIMER_CALLBACK( vblank_off_callback )
|
||||
{
|
||||
voodoo_state *v = (voodoo_state *)ptr;
|
||||
|
||||
if (LOG_VBLANK_SWAP) logerror("--- vblank end\n");
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror("--- vblank end\n");
|
||||
|
||||
/* set internal state and call the client */
|
||||
v->fbi.vblank = FALSE;
|
||||
@ -1000,24 +1000,24 @@ static TIMER_CALLBACK( vblank_callback )
|
||||
{
|
||||
voodoo_state *v = (voodoo_state *)ptr;
|
||||
|
||||
if (LOG_VBLANK_SWAP) logerror("--- vblank start\n");
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror("--- vblank start\n");
|
||||
|
||||
/* flush the pipes */
|
||||
if (v->pci.op_pending)
|
||||
{
|
||||
if (LOG_VBLANK_SWAP) logerror("---- vblank flush begin\n");
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror("---- vblank flush begin\n");
|
||||
flush_fifos(v, machine.time());
|
||||
if (LOG_VBLANK_SWAP) logerror("---- vblank flush end\n");
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror("---- vblank flush end\n");
|
||||
}
|
||||
|
||||
/* increment the count */
|
||||
v->fbi.vblank_count++;
|
||||
if (v->fbi.vblank_count > 250)
|
||||
v->fbi.vblank_count = 250;
|
||||
if (LOG_VBLANK_SWAP) logerror("---- vblank count = %d", v->fbi.vblank_count);
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror("---- vblank count = %d", v->fbi.vblank_count);
|
||||
if (v->fbi.vblank_swap_pending)
|
||||
if (LOG_VBLANK_SWAP) logerror(" (target=%d)", v->fbi.vblank_swap);
|
||||
if (LOG_VBLANK_SWAP) logerror("\n");
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror(" (target=%d)", v->fbi.vblank_swap);
|
||||
if (LOG_VBLANK_SWAP) v->device->logerror("\n");
|
||||
|
||||
/* if we're past the swap count, do the swap */
|
||||
if (v->fbi.vblank_swap_pending && v->fbi.vblank_count >= v->fbi.vblank_swap)
|
||||
@ -1119,7 +1119,7 @@ static void recompute_video_memory(voodoo_state *v)
|
||||
switch (memory_config)
|
||||
{
|
||||
case 3: /* reserved */
|
||||
logerror("VOODOO.%d.ERROR:Unexpected memory configuration in recompute_video_memory!\n", v->index);
|
||||
v->device->logerror("VOODOO.%d.ERROR:Unexpected memory configuration in recompute_video_memory!\n", v->index);
|
||||
|
||||
case 0: /* 2 color buffers, 1 aux buffer */
|
||||
v->fbi.rgboffs[2] = ~0;
|
||||
@ -1651,26 +1651,26 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
switch ((command >> 3) & 7)
|
||||
{
|
||||
case 0: /* NOP */
|
||||
if (LOG_CMDFIFO) logerror(" NOP\n");
|
||||
if (LOG_CMDFIFO) v->device->logerror(" NOP\n");
|
||||
break;
|
||||
|
||||
case 1: /* JSR */
|
||||
if (LOG_CMDFIFO) logerror(" JSR $%06X\n", target);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" JSR $%06X\n", target);
|
||||
osd_printf_debug("JSR in CMDFIFO!\n");
|
||||
src = &fifobase[target / 4];
|
||||
break;
|
||||
|
||||
case 2: /* RET */
|
||||
if (LOG_CMDFIFO) logerror(" RET $%06X\n", target);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" RET $%06X\n", target);
|
||||
fatalerror("RET in CMDFIFO!\n");
|
||||
|
||||
case 3: /* JMP LOCAL FRAME BUFFER */
|
||||
if (LOG_CMDFIFO) logerror(" JMP LOCAL FRAMEBUF $%06X\n", target);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" JMP LOCAL FRAMEBUF $%06X\n", target);
|
||||
src = &fifobase[target / 4];
|
||||
break;
|
||||
|
||||
case 4: /* JMP AGP */
|
||||
if (LOG_CMDFIFO) logerror(" JMP AGP $%06X\n", target);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" JMP AGP $%06X\n", target);
|
||||
fatalerror("JMP AGP in CMDFIFO!\n");
|
||||
src = &fifobase[target / 4];
|
||||
break;
|
||||
@ -1698,7 +1698,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
inc = (command >> 15) & 1;
|
||||
target = (command >> 3) & 0xfff;
|
||||
|
||||
if (LOG_CMDFIFO) logerror(" PACKET TYPE 1: count=%d inc=%d reg=%04X\n", count, inc, target);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" PACKET TYPE 1: count=%d inc=%d reg=%04X\n", count, inc, target);
|
||||
|
||||
if (v->type >= TYPE_VOODOO_BANSHEE && (target & 0x800))
|
||||
{
|
||||
@ -1729,7 +1729,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
1 31:0 = Data word
|
||||
*/
|
||||
case 2:
|
||||
if (LOG_CMDFIFO) logerror(" PACKET TYPE 2: mask=%X\n", (command >> 3) & 0x1ffffff);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" PACKET TYPE 2: mask=%X\n", (command >> 3) & 0x1ffffff);
|
||||
|
||||
/* loop over all registers and write them one at a time */
|
||||
for (i = 3; i <= 31; i++)
|
||||
@ -1766,7 +1766,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
count = (command >> 6) & 15;
|
||||
code = (command >> 3) & 7;
|
||||
|
||||
if (LOG_CMDFIFO) logerror(" PACKET TYPE 3: count=%d code=%d mask=%03X smode=%02X pc=%d\n", count, code, (command >> 10) & 0xfff, (command >> 22) & 0x3f, (command >> 28) & 1);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" PACKET TYPE 3: count=%d code=%d mask=%03X smode=%02X pc=%d\n", count, code, (command >> 10) & 0xfff, (command >> 22) & 0x3f, (command >> 28) & 1);
|
||||
|
||||
/* copy relevant bits into the setup mode register */
|
||||
v->reg[sSetupMode].u = ((command >> 10) & 0xff) | ((command >> 6) & 0xf0000);
|
||||
@ -1876,7 +1876,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
/* extract parameters */
|
||||
target = (command >> 3) & 0xfff;
|
||||
|
||||
if (LOG_CMDFIFO) logerror(" PACKET TYPE 4: mask=%X reg=%04X pad=%d\n", (command >> 15) & 0x3fff, target, command >> 29);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" PACKET TYPE 4: mask=%X reg=%04X pad=%d\n", (command >> 15) & 0x3fff, target, command >> 29);
|
||||
|
||||
if (v->type >= TYPE_VOODOO_BANSHEE && (target & 0x800))
|
||||
{
|
||||
@ -1930,7 +1930,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
{
|
||||
case 0: // Linear FB
|
||||
{
|
||||
if (LOG_CMDFIFO) logerror(" PACKET TYPE 5: FB count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" PACKET TYPE 5: FB count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
|
||||
|
||||
UINT32 addr = target * 4;
|
||||
for (i=0; i < count; i++)
|
||||
@ -1948,7 +1948,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
}
|
||||
case 2: // 3D LFB
|
||||
{
|
||||
if (LOG_CMDFIFO) logerror(" PACKET TYPE 5: 3D LFB count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" PACKET TYPE 5: 3D LFB count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
|
||||
|
||||
/* loop over words */
|
||||
for (i = 0; i < count; i++)
|
||||
@ -1973,7 +1973,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
|
||||
case 3: // Texture Port
|
||||
{
|
||||
if (LOG_CMDFIFO) logerror(" PACKET TYPE 5: textureRAM count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
|
||||
if (LOG_CMDFIFO) v->device->logerror(" PACKET TYPE 5: textureRAM count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
|
||||
|
||||
/* loop over words */
|
||||
for (i = 0; i < count; i++)
|
||||
@ -2036,7 +2036,7 @@ static void cmdfifo_w(voodoo_state *v, cmdfifo_info *f, offs_t offset, UINT32 da
|
||||
UINT32 addr = f->base + offset * 4;
|
||||
UINT32 *fifobase = (UINT32 *)v->fbi.ram;
|
||||
|
||||
if (LOG_CMDFIFO_VERBOSE) logerror("CMDFIFO_w(%04X) = %08X\n", offset, data);
|
||||
if (LOG_CMDFIFO_VERBOSE) v->device->logerror("CMDFIFO_w(%04X) = %08X\n", offset, data);
|
||||
|
||||
/* write the data */
|
||||
if (addr < f->end)
|
||||
@ -2056,7 +2056,7 @@ static void cmdfifo_w(voodoo_state *v, cmdfifo_info *f, offs_t offset, UINT32 da
|
||||
else if (addr < f->amin)
|
||||
{
|
||||
if (f->holes != 0)
|
||||
logerror("Unexpected CMDFIFO: AMin=%08X AMax=%08X Holes=%d WroteTo:%08X\n",
|
||||
v->device->logerror("Unexpected CMDFIFO: AMin=%08X AMax=%08X Holes=%d WroteTo:%08X\n",
|
||||
f->amin, f->amax, f->holes, addr);
|
||||
//f->amin = f->amax = addr;
|
||||
f->holes += (addr - f->base) / 4;
|
||||
@ -2094,7 +2094,7 @@ static void cmdfifo_w(voodoo_state *v, cmdfifo_info *f, offs_t offset, UINT32 da
|
||||
v->pci.op_pending = TRUE;
|
||||
v->pci.op_end_time = v->device->machine().time() + attotime(0, (attoseconds_t)cycles * v->attoseconds_per_cycle);
|
||||
|
||||
if (LOG_FIFO_VERBOSE) logerror("VOODOO.%d.FIFO:direct write start at %d.%08X%08X end at %d.%08X%08X\n", v->index,
|
||||
if (LOG_FIFO_VERBOSE) v->device->logerror("VOODOO.%d.FIFO:direct write start at %d.%08X%08X end at %d.%08X%08X\n", v->index,
|
||||
v->device->machine().time().seconds(), (UINT32)(v->device->machine().time().attoseconds() >> 32), (UINT32)v->device->machine().time().attoseconds(),
|
||||
v->pci.op_end_time.seconds(), (UINT32)(v->pci.op_end_time.attoseconds() >> 32), (UINT32)v->pci.op_end_time.attoseconds());
|
||||
}
|
||||
@ -2152,7 +2152,7 @@ static void check_stalled_cpu(voodoo_state *v, attotime current_time)
|
||||
/* resume if necessary */
|
||||
if (resume || !v->pci.op_pending)
|
||||
{
|
||||
if (LOG_FIFO) logerror("VOODOO.%d.FIFO:Stall condition cleared; resuming\n", v->index);
|
||||
if (LOG_FIFO) v->device->logerror("VOODOO.%d.FIFO:Stall condition cleared; resuming\n", v->index);
|
||||
v->pci.stall_state = NOT_STALLED;
|
||||
|
||||
/* either call the callback, or trigger the trigger */
|
||||
@ -2223,7 +2223,7 @@ static INT32 register_w(voodoo_state *v, offs_t offset, UINT32 data)
|
||||
/* first make sure this register is readable */
|
||||
if (!(v->regaccess[regnum] & REGISTER_WRITE))
|
||||
{
|
||||
logerror("VOODOO.%d.ERROR:Invalid attempt to write %s\n", v->index, v->regnames[regnum]);
|
||||
v->device->logerror("VOODOO.%d.ERROR:Invalid attempt to write %s\n", v->index, v->regnames[regnum]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -2557,7 +2557,7 @@ static INT32 register_w(voodoo_state *v, offs_t offset, UINT32 data)
|
||||
}
|
||||
}
|
||||
else
|
||||
logerror("clutData ignored because video timing reset = 1\n");
|
||||
v->device->logerror("clutData ignored because video timing reset = 1\n");
|
||||
}
|
||||
break;
|
||||
|
||||
@ -2925,9 +2925,9 @@ default_case:
|
||||
if (LOG_REGISTERS)
|
||||
{
|
||||
if (regnum < fvertexAx || regnum > fdWdY)
|
||||
logerror("VOODOO.%d.REG:%s(%d) write = %08X\n", v->index, (regnum < 0x384/4) ? v->regnames[regnum] : "oob", chips, origdata);
|
||||
v->device->logerror("VOODOO.%d.REG:%s(%d) write = %08X\n", v->index, (regnum < 0x384/4) ? v->regnames[regnum] : "oob", chips, origdata);
|
||||
else
|
||||
logerror("VOODOO.%d.REG:%s(%d) write = %f\n", v->index, (regnum < 0x384/4) ? v->regnames[regnum] : "oob", chips, (double) u2f(origdata));
|
||||
v->device->logerror("VOODOO.%d.REG:%s(%d) write = %f\n", v->index, (regnum < 0x384/4) ? v->regnames[regnum] : "oob", chips, (double) u2f(origdata));
|
||||
}
|
||||
|
||||
return cycles;
|
||||
@ -2974,14 +2974,14 @@ static INT32 lfb_direct_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 me
|
||||
destmax = (v->fbi.mask + 1 - v->fbi.lfb_base*4) / 2;
|
||||
bufoffs = y * v->fbi.rowpixels + x;
|
||||
if (bufoffs >= destmax) {
|
||||
logerror("lfb_direct_w: Buffer offset out of bounds x=%i y=%i offset=%08X bufoffs=%08X data=%08X\n", x, y, offset, (UINT32) bufoffs, data);
|
||||
v->device->logerror("lfb_direct_w: Buffer offset out of bounds x=%i y=%i offset=%08X bufoffs=%08X data=%08X\n", x, y, offset, (UINT32) bufoffs, data);
|
||||
return 0;
|
||||
}
|
||||
if (ACCESSING_BITS_0_15)
|
||||
dest[bufoffs + 0] = data&0xffff;
|
||||
if (ACCESSING_BITS_16_31)
|
||||
dest[bufoffs + 1] = data>>16;
|
||||
if (LOG_LFB) logerror("VOODOO.%d.LFB:write direct (%d,%d) = %08X & %08X\n", v->index, x, y, data, mem_mask);
|
||||
if (LOG_LFB) v->device->logerror("VOODOO.%d.LFB:write direct (%d,%d) = %08X & %08X\n", v->index, x, y, data, mem_mask);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -3182,7 +3182,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask)
|
||||
break;
|
||||
|
||||
default: /* reserved */
|
||||
logerror("lfb_w: Unknown format\n");
|
||||
v->device->logerror("lfb_w: Unknown format\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -3223,7 +3223,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask)
|
||||
DECLARE_DITHER_POINTERS_NO_DITHER_VAR;
|
||||
UINT32 bufoffs;
|
||||
|
||||
if (LOG_LFB) logerror("VOODOO.%d.LFB:write raw mode %X (%d,%d) = %08X & %08X\n", v->index, LFBMODE_WRITE_FORMAT(v->reg[lfbMode].u), x, y, data, mem_mask);
|
||||
if (LOG_LFB) v->device->logerror("VOODOO.%d.LFB:write raw mode %X (%d,%d) = %08X & %08X\n", v->index, LFBMODE_WRITE_FORMAT(v->reg[lfbMode].u), x, y, data, mem_mask);
|
||||
|
||||
/* determine the screen Y */
|
||||
scry = y;
|
||||
@ -3281,7 +3281,7 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
DECLARE_DITHER_POINTERS;
|
||||
|
||||
if (LOG_LFB) logerror("VOODOO.%d.LFB:write pipelined mode %X (%d,%d) = %08X & %08X\n", v->index, LFBMODE_WRITE_FORMAT(v->reg[lfbMode].u), x, y, data, mem_mask);
|
||||
if (LOG_LFB) v->device->logerror("VOODOO.%d.LFB:write pipelined mode %X (%d,%d) = %08X & %08X\n", v->index, LFBMODE_WRITE_FORMAT(v->reg[lfbMode].u), x, y, data, mem_mask);
|
||||
|
||||
/* determine the screen Y */
|
||||
scry = y;
|
||||
@ -3489,13 +3489,13 @@ static INT32 texture_w(voodoo_state *v, offs_t offset, UINT32 data)
|
||||
tbaseaddr = t->lodoffset[lod];
|
||||
tbaseaddr += tt * ((t->wmask >> lod) + 1) + ts;
|
||||
|
||||
if (LOG_TEXTURE_RAM) logerror("Texture 8-bit w: lod=%d s=%d t=%d data=%08X\n", lod, ts, tt, data);
|
||||
if (LOG_TEXTURE_RAM) v->device->logerror("Texture 8-bit w: lod=%d s=%d t=%d data=%08X\n", lod, ts, tt, data);
|
||||
}
|
||||
else
|
||||
{
|
||||
tbaseaddr = t->lodoffset[0] + offset*4;
|
||||
|
||||
if (LOG_TEXTURE_RAM) logerror("Texture 8-bit w: offset=%X data=%08X\n", offset*4, data);
|
||||
if (LOG_TEXTURE_RAM) v->device->logerror("Texture 8-bit w: offset=%X data=%08X\n", offset*4, data);
|
||||
}
|
||||
|
||||
/* write the four bytes in little-endian order */
|
||||
@ -3529,13 +3529,13 @@ static INT32 texture_w(voodoo_state *v, offs_t offset, UINT32 data)
|
||||
tbaseaddr = t->lodoffset[lod];
|
||||
tbaseaddr += 2 * (tt * ((t->wmask >> lod) + 1) + ts);
|
||||
|
||||
if (LOG_TEXTURE_RAM) logerror("Texture 16-bit w: lod=%d s=%d t=%d data=%08X\n", lod, ts, tt, data);
|
||||
if (LOG_TEXTURE_RAM) v->device->logerror("Texture 16-bit w: lod=%d s=%d t=%d data=%08X\n", lod, ts, tt, data);
|
||||
}
|
||||
else
|
||||
{
|
||||
tbaseaddr = t->lodoffset[0] + offset*4;
|
||||
|
||||
if (LOG_TEXTURE_RAM) logerror("Texture 16-bit w: offset=%X data=%08X\n", offset*4, data);
|
||||
if (LOG_TEXTURE_RAM) v->device->logerror("Texture 16-bit w: offset=%X data=%08X\n", offset*4, data);
|
||||
}
|
||||
|
||||
/* write the two words in little-endian order */
|
||||
@ -3568,7 +3568,7 @@ static void flush_fifos(voodoo_state *v, attotime current_time)
|
||||
|
||||
if (!v->pci.op_pending) fatalerror("flush_fifos called with no pending operation\n");
|
||||
|
||||
if (LOG_FIFO_VERBOSE) logerror("VOODOO.%d.FIFO:flush_fifos start -- pending=%d.%08X%08X cur=%d.%08X%08X\n", v->index,
|
||||
if (LOG_FIFO_VERBOSE) v->device->logerror("VOODOO.%d.FIFO:flush_fifos start -- pending=%d.%08X%08X cur=%d.%08X%08X\n", v->index,
|
||||
v->pci.op_end_time.seconds(), (UINT32)(v->pci.op_end_time.attoseconds() >> 32), (UINT32)v->pci.op_end_time.attoseconds(),
|
||||
current_time.seconds(), (UINT32)(current_time.attoseconds() >> 32), (UINT32)current_time.attoseconds());
|
||||
|
||||
@ -3594,7 +3594,7 @@ static void flush_fifos(voodoo_state *v, attotime current_time)
|
||||
{
|
||||
v->pci.op_pending = FALSE;
|
||||
in_flush = FALSE;
|
||||
if (LOG_FIFO_VERBOSE) logerror("VOODOO.%d.FIFO:flush_fifos end -- CMDFIFO empty\n", v->index);
|
||||
if (LOG_FIFO_VERBOSE) v->device->logerror("VOODOO.%d.FIFO:flush_fifos end -- CMDFIFO empty\n", v->index);
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -3606,7 +3606,7 @@ static void flush_fifos(voodoo_state *v, attotime current_time)
|
||||
{
|
||||
v->pci.op_pending = FALSE;
|
||||
in_flush = FALSE;
|
||||
if (LOG_FIFO_VERBOSE) logerror("VOODOO.%d.FIFO:flush_fifos end -- CMDFIFO empty\n", v->index);
|
||||
if (LOG_FIFO_VERBOSE) v->device->logerror("VOODOO.%d.FIFO:flush_fifos end -- CMDFIFO empty\n", v->index);
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -3623,7 +3623,7 @@ static void flush_fifos(voodoo_state *v, attotime current_time)
|
||||
{
|
||||
v->pci.op_pending = FALSE;
|
||||
in_flush = FALSE;
|
||||
if (LOG_FIFO_VERBOSE) logerror("VOODOO.%d.FIFO:flush_fifos end -- FIFOs empty\n", v->index);
|
||||
if (LOG_FIFO_VERBOSE) v->device->logerror("VOODOO.%d.FIFO:flush_fifos end -- FIFOs empty\n", v->index);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -3666,12 +3666,12 @@ static void flush_fifos(voodoo_state *v, attotime current_time)
|
||||
/* account for those cycles */
|
||||
v->pci.op_end_time += attotime(0, (attoseconds_t)cycles * v->attoseconds_per_cycle);
|
||||
|
||||
if (LOG_FIFO_VERBOSE) logerror("VOODOO.%d.FIFO:update -- pending=%d.%08X%08X cur=%d.%08X%08X\n", v->index,
|
||||
if (LOG_FIFO_VERBOSE) v->device->logerror("VOODOO.%d.FIFO:update -- pending=%d.%08X%08X cur=%d.%08X%08X\n", v->index,
|
||||
v->pci.op_end_time.seconds(), (UINT32)(v->pci.op_end_time.attoseconds() >> 32), (UINT32)v->pci.op_end_time.attoseconds(),
|
||||
current_time.seconds(), (UINT32)(current_time.attoseconds() >> 32), (UINT32)current_time.attoseconds());
|
||||
}
|
||||
|
||||
if (LOG_FIFO_VERBOSE) logerror("VOODOO.%d.FIFO:flush_fifos end -- pending command complete at %d.%08X%08X\n", v->index,
|
||||
if (LOG_FIFO_VERBOSE) v->device->logerror("VOODOO.%d.FIFO:flush_fifos end -- pending command complete at %d.%08X%08X\n", v->index,
|
||||
v->pci.op_end_time.seconds(), (UINT32)(v->pci.op_end_time.attoseconds() >> 32), (UINT32)v->pci.op_end_time.attoseconds());
|
||||
|
||||
in_flush = FALSE;
|
||||
@ -3873,7 +3873,7 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
|
||||
/* first make sure this register is readable */
|
||||
if (!(v->regaccess[regnum] & REGISTER_READ))
|
||||
{
|
||||
logerror("VOODOO.%d.ERROR:Invalid attempt to read %s\n", v->index, regnum < 225 ? v->regnames[regnum] : "unknown register");
|
||||
v->device->logerror("VOODOO.%d.ERROR:Invalid attempt to read %s\n", v->index, regnum < 225 ? v->regnames[regnum] : "unknown register");
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
@ -4029,7 +4029,7 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
|
||||
logit = FALSE;
|
||||
|
||||
if (logit)
|
||||
logerror("VOODOO.%d.REG:%s read = %08X\n", v->index, v->regnames[regnum], result);
|
||||
v->device->logerror("VOODOO.%d.REG:%s read = %08X\n", v->index, v->regnames[regnum], result);
|
||||
}
|
||||
|
||||
return result;
|
||||
@ -4100,7 +4100,7 @@ static UINT32 lfb_r(voodoo_state *v, offs_t offset, bool lfb_3d)
|
||||
/* advance pointers to the proper row */
|
||||
bufoffs = scry * v->fbi.rowpixels + x;
|
||||
if (bufoffs >= bufmax) {
|
||||
logerror("LFB_R: Buffer offset out of bounds x=%i y=%i lfb_3d=%i offset=%08X bufoffs=%08X\n", x, y, lfb_3d, offset, (UINT32) bufoffs);
|
||||
v->device->logerror("LFB_R: Buffer offset out of bounds x=%i y=%i lfb_3d=%i offset=%08X bufoffs=%08X\n", x, y, lfb_3d, offset, (UINT32) bufoffs);
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
@ -4118,7 +4118,7 @@ static UINT32 lfb_r(voodoo_state *v, offs_t offset, bool lfb_3d)
|
||||
if (LFBMODE_BYTE_SWIZZLE_READS(v->reg[lfbMode].u))
|
||||
data = FLIPENDIAN_INT32(data);
|
||||
|
||||
if (LOG_LFB) logerror("VOODOO.%d.LFB:read (%d,%d) = %08X\n", v->index, x, y, data);
|
||||
if (LOG_LFB) v->device->logerror("VOODOO.%d.LFB:read (%d,%d) = %08X\n", v->index, x, y, data);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -5396,7 +5396,7 @@ static INT32 triangle(voodoo_state *v)
|
||||
g_profiler.stop();
|
||||
|
||||
/* 1 pixel per clock, plus some setup time */
|
||||
if (LOG_REGISTERS) logerror("cycles = %d\n", TRIANGLE_SETUP_CLOCKS + pixels);
|
||||
if (LOG_REGISTERS) v->device->logerror("cycles = %d\n", TRIANGLE_SETUP_CLOCKS + pixels);
|
||||
return TRIANGLE_SETUP_CLOCKS + pixels;
|
||||
}
|
||||
|
||||
|
@ -834,7 +834,7 @@ bool cheat_entry::activate()
|
||||
{
|
||||
execute_on_script();
|
||||
changed = true;
|
||||
popmessage("Activated %s", m_description.c_str());
|
||||
manager().machine().popmessage("Activated %s", m_description.c_str());
|
||||
}
|
||||
|
||||
// if we're a oneshot parameter cheat and we're active, execute the "state change" script and indicate change
|
||||
@ -842,7 +842,7 @@ bool cheat_entry::activate()
|
||||
{
|
||||
execute_change_script();
|
||||
changed = true;
|
||||
popmessage("Activated\n %s = %s", m_description.c_str(), m_parameter->text());
|
||||
manager().machine().popmessage("Activated\n %s = %s", m_description.c_str(), m_parameter->text());
|
||||
}
|
||||
|
||||
return changed;
|
||||
@ -1097,7 +1097,7 @@ void cheat_manager::set_enable(bool enable)
|
||||
for (cheat_entry *cheat = m_cheatlist.first(); cheat != NULL; cheat = cheat->next())
|
||||
if (cheat->state() == SCRIPT_STATE_RUN)
|
||||
cheat->execute_off_script();
|
||||
popmessage("Cheats Disabled");
|
||||
machine().popmessage("Cheats Disabled");
|
||||
m_disabled = true;
|
||||
}
|
||||
|
||||
@ -1109,7 +1109,7 @@ void cheat_manager::set_enable(bool enable)
|
||||
for (cheat_entry *cheat = m_cheatlist.first(); cheat != NULL; cheat = cheat->next())
|
||||
if (cheat->state() == SCRIPT_STATE_RUN)
|
||||
cheat->execute_on_script();
|
||||
popmessage("Cheats Enabled");
|
||||
machine().popmessage("Cheats Enabled");
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -835,7 +835,7 @@ static void execute_logerror(running_machine &machine, int ref, int params, cons
|
||||
|
||||
/* then do a printf */
|
||||
if (mini_printf(machine, buffer, param[0], params - 1, &values[1]))
|
||||
logerror("%s", buffer);
|
||||
machine.logerror("%s", buffer);
|
||||
}
|
||||
|
||||
|
||||
|
@ -544,7 +544,7 @@ text_buffer *debug_console_get_textbuf(void)
|
||||
the errorlog ring buffer
|
||||
-------------------------------------------------*/
|
||||
|
||||
void debug_errorlog_write_line(running_machine &machine, const char *line)
|
||||
void debug_errorlog_write_line(const running_machine &machine, const char *line)
|
||||
{
|
||||
if (errorlog_textbuf)
|
||||
text_buffer_print(errorlog_textbuf, line);
|
||||
|
@ -89,7 +89,7 @@ void CLIB_DECL debug_console_printf_wrap(running_machine &machine, int wrap
|
||||
text_buffer * debug_console_get_textbuf(void);
|
||||
|
||||
/* errorlog management */
|
||||
void debug_errorlog_write_line(running_machine &machine, const char *line);
|
||||
void debug_errorlog_write_line(const running_machine &machine, const char *line);
|
||||
text_buffer * debug_errorlog_get_textbuf(void);
|
||||
|
||||
#endif
|
||||
|
@ -310,7 +310,7 @@ UINT64 devcb_read_base::read_ioport_adapter(address_space &space, offs_t offset,
|
||||
|
||||
UINT64 devcb_read_base::read_logged_adapter(address_space &space, offs_t offset, UINT64 mask)
|
||||
{
|
||||
logerror("%s: read %s\n", m_device.machine().describe_context(), m_target_tag);
|
||||
m_device.logerror("%s: read %s\n", m_device.machine().describe_context(), m_target_tag);
|
||||
return shift_mask_xor(m_target_int);
|
||||
}
|
||||
|
||||
@ -529,7 +529,7 @@ void devcb_write_base::write_ioport_adapter(address_space &space, offs_t offset,
|
||||
|
||||
void devcb_write_base::write_logged_adapter(address_space &space, offs_t offset, UINT64 data, UINT64 mask)
|
||||
{
|
||||
logerror("%s: unresolved devcb write\n", m_device.machine().describe_context());
|
||||
m_device.logerror("%s: unresolved devcb write\n", m_device.machine().describe_context());
|
||||
}
|
||||
|
||||
|
||||
|
@ -9,6 +9,8 @@
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "string.h"
|
||||
#include "ui/ui.h"
|
||||
#include "debug/debugcpu.h"
|
||||
|
||||
|
||||
@ -846,7 +848,41 @@ finder_base *device_t::register_auto_finder(finder_base &autodev)
|
||||
return old;
|
||||
}
|
||||
|
||||
void device_t::popmessage(const char *format, ...) const
|
||||
{
|
||||
// if the format is NULL, it is a signal to clear the popmessage
|
||||
if (format == NULL)
|
||||
machine().ui().popup_time(0, " ");
|
||||
|
||||
// otherwise, generate the buffer and call the UI to display the message
|
||||
else
|
||||
{
|
||||
std::string temp;
|
||||
va_list arg;
|
||||
|
||||
// dump to the buffer
|
||||
va_start(arg, format);
|
||||
strvprintf(temp, format, arg);
|
||||
va_end(arg);
|
||||
|
||||
// pop it in the UI
|
||||
machine().ui().popup_time(temp.length() / 40 + 2, "%s", temp.c_str());
|
||||
}
|
||||
}
|
||||
|
||||
void device_t::logerror(const char *format, ...) const
|
||||
{
|
||||
va_list arg;
|
||||
va_start(arg, format);
|
||||
vlogerror(format, arg);
|
||||
va_end(arg);
|
||||
}
|
||||
void device_t::vlogerror(const char *format, va_list args) const
|
||||
{
|
||||
std::string fmt("[");
|
||||
fmt += tag() + std::string("] ") + format;
|
||||
machine().vlogerror(fmt.c_str(), args);
|
||||
}
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE INTERFACES
|
||||
@ -1012,3 +1048,4 @@ void device_interface::interface_debug_setup()
|
||||
{
|
||||
// do nothing by default
|
||||
}
|
||||
|
||||
|
@ -205,6 +205,11 @@ public:
|
||||
void set_system_bios(UINT8 bios) { m_system_bios = bios; }
|
||||
bool findit(bool isvalidation = false) const;
|
||||
|
||||
// misc
|
||||
void popmessage(const char *format, ...) const;
|
||||
void logerror(const char *format, ...) const;
|
||||
void vlogerror(const char *format, va_list args) const;
|
||||
|
||||
protected:
|
||||
// miscellaneous helpers
|
||||
void set_machine(running_machine &machine);
|
||||
|
@ -18,7 +18,7 @@
|
||||
|
||||
#define VERBOSE 0
|
||||
|
||||
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
|
||||
#define LOG(x) do { if (VERBOSE) m_execute->device().logerror x; } while (0)
|
||||
|
||||
#define TEMPLOG 0
|
||||
|
||||
@ -615,7 +615,8 @@ int device_execute_interface::standard_irq_callback(int irqline)
|
||||
{
|
||||
// get the default vector and acknowledge the interrupt if needed
|
||||
int vector = m_input[irqline].default_irq_callback();
|
||||
LOG(("standard_irq_callback('%s', %d) $%04x\n", device().tag(), irqline, vector));
|
||||
|
||||
if (VERBOSE) device().logerror("standard_irq_callback('%s', %d) $%04x\n", device().tag(), irqline, vector);
|
||||
|
||||
// if there's a driver callback, run it to get the vector
|
||||
if (!m_driver_irq.isnull())
|
||||
@ -783,7 +784,7 @@ if (TEMPLOG) printf("setline(%s,%d,%d,%d)\n", m_execute->device().tag(), m_linen
|
||||
m_qindex--;
|
||||
empty_event_queue();
|
||||
event_index = m_qindex++;
|
||||
logerror("Exceeded pending input line event queue on device '%s'!\n", m_execute->device().tag());
|
||||
m_execute->device().logerror("Exceeded pending input line event queue on device '%s'!\n", m_execute->device().tag());
|
||||
}
|
||||
|
||||
// enqueue the event
|
||||
@ -867,7 +868,7 @@ if (TEMPLOG) printf(" (%d,%d)\n", m_curstate, m_curvector);
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("empty_event_queue device '%s', line %d, unknown state %d\n", m_execute->device().tag(), m_linenum, m_curstate);
|
||||
m_execute->device().logerror("empty_event_queue device '%s', line %d, unknown state %d\n", m_execute->device().tag(), m_linenum, m_curstate);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -970,7 +970,7 @@ done:
|
||||
if (!m_init_phase)
|
||||
{
|
||||
if (device().machine().phase() == MACHINE_PHASE_RUNNING)
|
||||
popmessage("Error: Unable to %s image '%s': %s", is_create ? "create" : "load", path, error());
|
||||
device().popmessage("Error: Unable to %s image '%s': %s", is_create ? "create" : "load", path, error());
|
||||
else
|
||||
osd_printf_error("Error: Unable to %s image '%s': %s\n", is_create ? "create" : "load", path, error());
|
||||
}
|
||||
@ -985,7 +985,7 @@ done:
|
||||
if (!m_init_phase)
|
||||
{
|
||||
if (device().machine().phase() == MACHINE_PHASE_RUNNING)
|
||||
popmessage("Image '%s' was successfully %s.", path, is_create ? "created" : "loaded");
|
||||
device().popmessage("Image '%s' was successfully %s.", path, is_create ? "created" : "loaded");
|
||||
else
|
||||
osd_printf_info("Image '%s' was successfully %s.\n", path, is_create ? "created" : "loaded");
|
||||
}
|
||||
|
@ -42,7 +42,7 @@ void device_network_interface::set_interface(int id)
|
||||
{
|
||||
m_dev.reset(open_netdev(id, this, (int)(m_bandwidth*1000000/8.0f/1500)));
|
||||
if(!m_dev) {
|
||||
logerror("Network interface %d not found\n", id);
|
||||
device().logerror("Network interface %d not found\n", id);
|
||||
id = -1;
|
||||
}
|
||||
m_intf = id;
|
||||
|
@ -408,7 +408,7 @@ void device_mixer_interface::interface_pre_start()
|
||||
// no inputs? that's weird
|
||||
if (m_auto_allocated_inputs == 0)
|
||||
{
|
||||
logerror("Warning: mixer \"%s\" has no inputs\n", device().tag());
|
||||
device().logerror("Warning: mixer \"%s\" has no inputs\n", device().tag());
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -898,7 +898,7 @@ void natural_keyboard::post(unicode_char ch)
|
||||
{
|
||||
const keycode_map_entry *code = find_code(ch);
|
||||
std::string tempstr;
|
||||
logerror("natural_keyboard::post(): code=%i (%s) field->name='%s'\n", int(ch), unicode_to_string(tempstr, ch), (code != NULL && code->field[0] != NULL) ? code->field[0]->name() : "<null>");
|
||||
machine().logerror("natural_keyboard::post(): code=%i (%s) field->name='%s'\n", int(ch), unicode_to_string(tempstr, ch), (code != NULL && code->field[0] != NULL) ? code->field[0]->name() : "<null>");
|
||||
}
|
||||
|
||||
// can we post this key in the queue directly?
|
||||
@ -1102,7 +1102,7 @@ void natural_keyboard::build_codes(ioport_manager &manager)
|
||||
if (LOG_NATURAL_KEYBOARD)
|
||||
{
|
||||
std::string tempstr;
|
||||
logerror("natural_keyboard: code=%i (%s) port=%p field->name='%s'\n", int(code), unicode_to_string(tempstr, code), (void *)port, field->name());
|
||||
machine().logerror("natural_keyboard: code=%i (%s) port=%p field->name='%s'\n", int(code), unicode_to_string(tempstr, code), (void *)port, field->name());
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -3421,7 +3421,7 @@ void ioport_manager::playback_end(const char *message)
|
||||
|
||||
// pop a message
|
||||
if (message != NULL)
|
||||
popmessage("Playback Ended\nReason: %s", message);
|
||||
machine().popmessage("Playback Ended\nReason: %s", message);
|
||||
|
||||
// display speed stats
|
||||
m_playback_accumulated_speed /= m_playback_accumulated_frames;
|
||||
@ -3567,7 +3567,7 @@ void ioport_manager::record_end(const char *message)
|
||||
|
||||
// pop a message
|
||||
if (message != NULL)
|
||||
popmessage("Recording Ended\nReason: %s", message);
|
||||
machine().popmessage("Recording Ended\nReason: %s", message);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -808,12 +808,52 @@ void running_machine::add_logerror_callback(logerror_callback callback)
|
||||
m_logerror_list.append(*global_alloc(logerror_callback_item(callback)));
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
popmessage - pop up a user-visible message
|
||||
-------------------------------------------------*/
|
||||
|
||||
void running_machine::popmessage(const char *format, ...) const
|
||||
{
|
||||
// if the format is NULL, it is a signal to clear the popmessage
|
||||
if (format == NULL)
|
||||
ui().popup_time(0, " ");
|
||||
|
||||
// otherwise, generate the buffer and call the UI to display the message
|
||||
else
|
||||
{
|
||||
std::string temp;
|
||||
va_list arg;
|
||||
|
||||
// dump to the buffer
|
||||
va_start(arg, format);
|
||||
strvprintf(temp,format, arg);
|
||||
va_end(arg);
|
||||
|
||||
// pop it in the UI
|
||||
ui().popup_time(temp.length() / 40 + 2, "%s", temp.c_str());
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
logerror - log to the debugger and any other
|
||||
OSD-defined output streams
|
||||
-------------------------------------------------*/
|
||||
|
||||
void running_machine::logerror(const char *format, ...) const
|
||||
{
|
||||
va_list arg;
|
||||
va_start(arg, format);
|
||||
vlogerror(format, arg);
|
||||
va_end(arg);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// vlogerror - vprintf-style error logging
|
||||
//-------------------------------------------------
|
||||
|
||||
void CLIB_DECL running_machine::vlogerror(const char *format, va_list args)
|
||||
void running_machine::vlogerror(const char *format, va_list args) const
|
||||
{
|
||||
// process only if there is a target
|
||||
if (m_logerror_list.first() != NULL)
|
||||
@ -1073,7 +1113,7 @@ void running_machine::watchdog_vblank(screen_device &screen, bool vblank_state)
|
||||
// logfile
|
||||
//-------------------------------------------------
|
||||
|
||||
void running_machine::logfile_callback(running_machine &machine, const char *buffer)
|
||||
void running_machine::logfile_callback(const running_machine &machine, const char *buffer)
|
||||
{
|
||||
if (machine.m_logfile != NULL)
|
||||
machine.m_logfile->puts(buffer);
|
||||
@ -1270,7 +1310,6 @@ void running_machine::nvram_save()
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//**************************************************************************
|
||||
// CALLBACK ITEMS
|
||||
//**************************************************************************
|
||||
|
@ -144,7 +144,7 @@ class running_machine
|
||||
friend void debugger_init(running_machine &machine);
|
||||
friend class sound_manager;
|
||||
|
||||
typedef void (*logerror_callback)(running_machine &machine, const char *string);
|
||||
typedef void (*logerror_callback)(const running_machine &machine, const char *string);
|
||||
|
||||
// must be at top of member variables
|
||||
resource_pool m_respool; // pool of resources for this machine
|
||||
@ -229,7 +229,9 @@ public:
|
||||
INT32 get_vblank_watchdog_counter() { return m_watchdog_counter; }
|
||||
|
||||
// misc
|
||||
void CLIB_DECL vlogerror(const char *format, va_list args);
|
||||
void popmessage(const char *format, ...) const;
|
||||
void logerror(const char *format, ...) const;
|
||||
void vlogerror(const char *format, va_list args) const;
|
||||
UINT32 rand();
|
||||
const char *describe_context();
|
||||
|
||||
@ -266,7 +268,7 @@ private:
|
||||
void nvram_save();
|
||||
|
||||
// internal callbacks
|
||||
static void logfile_callback(running_machine &machine, const char *buffer);
|
||||
static void logfile_callback(const running_machine &machine, const char *buffer);
|
||||
|
||||
// internal device helpers
|
||||
void start_all_devices();
|
||||
|
@ -253,72 +253,3 @@ int machine_manager::execute()
|
||||
// return an error
|
||||
return error;
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
MISCELLANEOUS
|
||||
***************************************************************************/
|
||||
|
||||
/*-------------------------------------------------
|
||||
popmessage - pop up a user-visible message
|
||||
-------------------------------------------------*/
|
||||
|
||||
void CLIB_DECL popmessage(const char *format, ...)
|
||||
{
|
||||
if (machine_manager::instance()==NULL || machine_manager::instance()->machine() == NULL) return;
|
||||
|
||||
// if the format is NULL, it is a signal to clear the popmessage
|
||||
if (format == NULL)
|
||||
machine_manager::instance()->machine()->ui().popup_time(0, " ");
|
||||
|
||||
// otherwise, generate the buffer and call the UI to display the message
|
||||
else
|
||||
{
|
||||
std::string temp;
|
||||
va_list arg;
|
||||
|
||||
// dump to the buffer
|
||||
va_start(arg, format);
|
||||
strvprintf(temp,format, arg);
|
||||
va_end(arg);
|
||||
|
||||
// pop it in the UI
|
||||
machine_manager::instance()->machine()->ui().popup_time(temp.length() / 40 + 2, "%s", temp.c_str());
|
||||
|
||||
/*
|
||||
// also write to error.log
|
||||
logerror("popmessage: %s\n", temp.c_str());
|
||||
|
||||
#ifdef MAME_DEBUG
|
||||
// and to command-line in a DEBUG build
|
||||
osd_printf_info("popmessage: %s\n", temp.c_str());
|
||||
#endif
|
||||
*/
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
logerror - log to the debugger and any other
|
||||
OSD-defined output streams
|
||||
-------------------------------------------------*/
|
||||
|
||||
void CLIB_DECL logerror(const char *format, ...)
|
||||
{
|
||||
va_list arg;
|
||||
va_start(arg, format);
|
||||
vlogerror(format, arg);
|
||||
va_end(arg);
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
vlogerror - log to the debugger and any other
|
||||
OSD-defined output streams
|
||||
-------------------------------------------------*/
|
||||
|
||||
void CLIB_DECL vlogerror(const char *format, va_list arg)
|
||||
{
|
||||
if (machine_manager::instance()!=NULL && machine_manager::instance()->machine() != NULL)
|
||||
machine_manager::instance()->machine()->vlogerror(format, arg);
|
||||
}
|
||||
|
@ -121,19 +121,4 @@ private:
|
||||
extern const char build_version[];
|
||||
extern const char bare_build_version[];
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
FUNCTION PROTOTYPES
|
||||
***************************************************************************/
|
||||
|
||||
/* ----- miscellaneous bits & pieces ----- */
|
||||
|
||||
// pop-up a user visible message
|
||||
void CLIB_DECL popmessage(const char *format, ...) ATTR_PRINTF(1,2);
|
||||
|
||||
// log to the standard error.log file
|
||||
void CLIB_DECL logerror(const char *format, ...) ATTR_PRINTF(1,2);
|
||||
void CLIB_DECL vlogerror(const char *format, va_list arg);
|
||||
|
||||
|
||||
#endif /* __MAME_H__ */
|
||||
|
@ -676,7 +676,7 @@ private:
|
||||
if (m_space.device().interface(intf))
|
||||
is_octal = intf->is_octal();
|
||||
|
||||
logerror("%s: unmapped %s memory read from %s & %s\n",
|
||||
m_space.device().logerror("%s: unmapped %s memory read from %s & %s\n",
|
||||
m_space.machine().describe_context(), m_space.name(),
|
||||
core_i64_format(m_space.byte_to_address(offset * sizeof(_UintType)), m_space.addrchars(),is_octal),
|
||||
core_i64_format(mask, 2 * sizeof(_UintType),is_octal));
|
||||
@ -749,7 +749,7 @@ private:
|
||||
if (m_space.device().interface(intf))
|
||||
is_octal = intf->is_octal();
|
||||
|
||||
logerror("%s: unmapped %s memory write to %s = %s & %s\n",
|
||||
m_space.device().logerror("%s: unmapped %s memory write to %s = %s & %s\n",
|
||||
m_space.machine().describe_context(), m_space.name(),
|
||||
core_i64_format(m_space.byte_to_address(offset * sizeof(_UintType)), m_space.addrchars(),is_octal),
|
||||
core_i64_format(data, 2 * sizeof(_UintType),is_octal),
|
||||
@ -2963,9 +2963,9 @@ void address_table::verify_reference_counts()
|
||||
|
||||
if (memcmp(actual_refcounts, handler_refcount, sizeof(handler_refcount)))
|
||||
{
|
||||
logerror("Refcount failure:\n");
|
||||
osd_printf_error("Refcount failure:\n");
|
||||
for(int i = STATIC_COUNT; i != SUBTABLE_BASE; i++)
|
||||
logerror("%02x: %4x .. %4x\n", i, handler_refcount[i-STATIC_COUNT], actual_refcounts[i-STATIC_COUNT]);
|
||||
osd_printf_error("%02x: %4x .. %4x\n", i, handler_refcount[i-STATIC_COUNT], actual_refcounts[i-STATIC_COUNT]);
|
||||
throw emu_fatalerror("memory.c: refcounts are fucked.\n");
|
||||
}
|
||||
}
|
||||
|
@ -554,19 +554,19 @@ bool render_load_png(bitmap_argb32 &bitmap, emu_file &file, const char *dirname,
|
||||
// verify we can handle this PNG
|
||||
if (png.bit_depth > 8)
|
||||
{
|
||||
logerror("%s: Unsupported bit depth %d (8 bit max)\n", filename, png.bit_depth);
|
||||
osd_printf_error("%s: Unsupported bit depth %d (8 bit max)\n", filename, png.bit_depth);
|
||||
png_free(&png);
|
||||
return false;
|
||||
}
|
||||
if (png.interlace_method != 0)
|
||||
{
|
||||
logerror("%s: Interlace unsupported\n", filename);
|
||||
osd_printf_error("%s: Interlace unsupported\n", filename);
|
||||
png_free(&png);
|
||||
return false;
|
||||
}
|
||||
if (png.color_type != 0 && png.color_type != 3 && png.color_type != 2 && png.color_type != 6)
|
||||
{
|
||||
logerror("%s: Unsupported color type %d\n", filename, png.color_type);
|
||||
osd_printf_error("%s: Unsupported color type %d\n", filename, png.color_type);
|
||||
png_free(&png);
|
||||
return false;
|
||||
}
|
||||
|
@ -32,7 +32,7 @@
|
||||
|
||||
#define VERBOSE 0
|
||||
|
||||
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
|
||||
#define LOG(x) do { if (VERBOSE) machine().logerror x; } while (0)
|
||||
|
||||
|
||||
|
||||
@ -153,7 +153,7 @@ void save_manager::save_memory(device_t *device, const char *module, const char
|
||||
// check for invalid timing
|
||||
if (!m_reg_allowed)
|
||||
{
|
||||
logerror("Attempt to register save state entry after state registration is closed!\nModule %s tag %s name %s\n", module, tag, name);
|
||||
machine().logerror("Attempt to register save state entry after state registration is closed!\nModule %s tag %s name %s\n", module, tag, name);
|
||||
if (machine().system().flags & MACHINE_SUPPORTS_SAVE)
|
||||
fatalerror("Attempt to register save state entry after state registration is closed!\nModule %s tag %s name %s\n", module, tag, name);
|
||||
m_illegal_regs++;
|
||||
@ -244,7 +244,7 @@ save_error save_manager::read_file(emu_file &file)
|
||||
|
||||
// verify the header and report an error if it doesn't match
|
||||
UINT32 sig = signature();
|
||||
if (validate_header(header, machine().system().name, sig, popmessage, "Error: ") != STATERR_NONE)
|
||||
if (validate_header(header, machine().system().name, sig, NULL, "Error: ") != STATERR_NONE)
|
||||
return STATERR_INVALID_HEADER;
|
||||
|
||||
// determine whether or not to flip the data when done
|
||||
|
@ -25,7 +25,7 @@
|
||||
|
||||
#define VERBOSE 0
|
||||
|
||||
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
|
||||
#define LOG(x) do { if (VERBOSE) machine().logerror x; } while (0)
|
||||
#define PRECISION
|
||||
|
||||
|
||||
@ -300,11 +300,11 @@ inline void emu_timer::schedule_next_period()
|
||||
|
||||
void emu_timer::dump() const
|
||||
{
|
||||
logerror("%p: en=%d temp=%d exp=%15s start=%15s per=%15s param=%d ptr=%p", this, m_enabled, m_temporary, m_expire.as_string(PRECISION), m_start.as_string(PRECISION), m_period.as_string(PRECISION), m_param, m_ptr);
|
||||
machine().logerror("%p: en=%d temp=%d exp=%15s start=%15s per=%15s param=%d ptr=%p", this, m_enabled, m_temporary, m_expire.as_string(PRECISION), m_start.as_string(PRECISION), m_period.as_string(PRECISION), m_param, m_ptr);
|
||||
if (m_device == NULL)
|
||||
logerror(" cb=%s\n", m_callback.name());
|
||||
machine().logerror(" cb=%s\n", m_callback.name());
|
||||
else
|
||||
logerror(" dev=%s id=%d\n", m_device->tag(), m_id);
|
||||
machine().logerror(" dev=%s id=%d\n", m_device->tag(), m_id);
|
||||
}
|
||||
|
||||
|
||||
@ -379,7 +379,7 @@ bool device_scheduler::can_save() const
|
||||
for (emu_timer *timer = m_timer_list; timer != NULL; timer = timer->next())
|
||||
if (timer->m_temporary && !timer->expire().is_never())
|
||||
{
|
||||
logerror("Failed save state attempt due to anonymous timers:\n");
|
||||
machine().logerror("Failed save state attempt due to anonymous timers:\n");
|
||||
dump_timers();
|
||||
return false;
|
||||
}
|
||||
@ -658,7 +658,7 @@ void device_scheduler::timed_trigger(void *ptr, INT32 param)
|
||||
void device_scheduler::presave()
|
||||
{
|
||||
// report the timer state after a log
|
||||
logerror("Prior to saving state:\n");
|
||||
machine().logerror("Prior to saving state:\n");
|
||||
dump_timers();
|
||||
}
|
||||
|
||||
@ -693,7 +693,7 @@ void device_scheduler::postload()
|
||||
rebuild_execute_list();
|
||||
|
||||
// report the timer state after a log
|
||||
logerror("After resetting/reordering timers:\n");
|
||||
machine().logerror("After resetting/reordering timers:\n");
|
||||
dump_timers();
|
||||
}
|
||||
|
||||
@ -984,11 +984,11 @@ void device_scheduler::add_scheduling_quantum(const attotime &quantum, const att
|
||||
|
||||
void device_scheduler::dump_timers() const
|
||||
{
|
||||
logerror("=============================================\n");
|
||||
logerror("Timer Dump: Time = %15s\n", time().as_string(PRECISION));
|
||||
machine().logerror("=============================================\n");
|
||||
machine().logerror("Timer Dump: Time = %15s\n", time().as_string(PRECISION));
|
||||
for (emu_timer *timer = first_timer(); timer != NULL; timer = timer->next())
|
||||
timer->dump();
|
||||
logerror("=============================================\n");
|
||||
machine().logerror("=============================================\n");
|
||||
}
|
||||
|
||||
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
|
||||
|
@ -169,7 +169,7 @@ void filter2_setup(device_t *device, int type, double fc, double d, double gain,
|
||||
filter2->b1 = -2.0*(filter2->b0);
|
||||
break;
|
||||
default:
|
||||
logerror("filter2_setup() - Invalid filter type for 2nd order filter.");
|
||||
device->logerror("filter2_setup() - Invalid filter type for 2nd order filter.");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -211,7 +211,7 @@ void filter_opamp_m_bandpass_setup(device_t *device, double r1, double r2, doubl
|
||||
|
||||
if (r1 == 0)
|
||||
{
|
||||
logerror("filter_opamp_m_bandpass_setup() - r1 can not be 0");
|
||||
device->logerror("filter_opamp_m_bandpass_setup() - r1 can not be 0");
|
||||
return; /* Filter can not be setup. Undefined results. */
|
||||
}
|
||||
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user