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m740: Restore T flag correctly during PLP and RTI. Previous emulation inherited from the 6502 base device caused these instructions to always set T in P and not affect instruction decoding at all.

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This commit is contained in:
AJR 2021-01-09 17:09:41 -05:00
parent c18d0b8a00
commit 185437bcd9
3 changed files with 33 additions and 11 deletions
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14
src/devices/cpu/m6502/dm740.lst
View File

@ -1,11 +1,11 @@
# license:BSD-3-Clause
# copyright-holders:Olivier Galibert
# m740 device
brk740_imp ora_idx jsr_zpi bbs_bar nop_zpg ora_zpg asl_zpg bbs_bzr php_imp ora_imm asl_acc seb_bac nop_aba ora_aba asl_aba seb_biz
brk_m_imp ora_idx jsr_zpi bbs_bar nop_zpg ora_zpg asl_zpg bbs_bzr php_imp ora_imm asl_acc seb_bac nop_aba ora_aba asl_aba seb_biz
bpl_rel ora_idy clt_imp bbc_bar nop_zpx ora_zpx asl_zpx bbc_bzr clc_imp ora_aby dec_acc clb_bac nop_abx ora_abx asl_abx clb_biz
jsr_adr and_idx jsr_spg bbs_bar bit_zpg and_zpg rol_zpg bbs_bzr plp_imp and_imm rol_acc seb_bac bit_aba and_aba rol_aba seb_biz
jsr_adr and_idx jsr_spg bbs_bar bit_zpg and_zpg rol_zpg bbs_bzr plp_m_imp and_imm rol_acc seb_bac bit_aba and_aba rol_aba seb_biz
bmi_rel and_idy set_imp bbc_bar nop_zpx and_zpx rol_zpx bbc_bzr sec_imp and_aby inc_acc clb_bac ldm_imz and_abx rol_abx clb_biz
rti_imp eor_idx kil_non bbs_bar com_zpg eor_zpg lsr_zpg bbs_bzr pha_imp eor_imm lsr_acc seb_bac jmp_adr eor_aba lsr_aba seb_biz
rti_m_imp eor_idx kil_non bbs_bar com_zpg eor_zpg lsr_zpg bbs_bzr pha_imp eor_imm lsr_acc seb_bac jmp_adr eor_aba lsr_aba seb_biz
bvc_rel eor_idy kil_non bbc_bar nop_zpx eor_zpx lsr_zpx bbc_bzr cli_imp eor_aby nop_imp clb_bac nop_abx eor_abx lsr_abx clb_biz
rts_imp adc_idx kil_non bbs_bar tst_zpg adc_zpg ror_zpg bbs_bzr pla_imp adc_imm ror_acc seb_bac jmp_ind adc_aba ror_aba seb_biz
bvs_rel adc_idy kil_non bbc_bar nop_zpx adc_zpx ror_zpx bbc_bzr sei_imp adc_aby nop_imp clb_bac nop_abx adc_abx ror_abx clb_biz
@ -17,11 +17,11 @@ cpy_imm cmp_idx nop_imm bbs_bar cpy_zpg cmp_zpg dec_zpg
bne_rel cmp_idy kil_non bbc_bar nop_zpx cmp_zpx dec_zpx bbc_bzr cld_imp cmp_aby nop_imp clb_bac nop_abx cmp_abx dec_abx clb_biz
cpx_imm sbc_idx nop_imm bbs_bar cpx_zpg sbc_zpg inc_zpg bbs_bzr inx_imp sbc_imm nop_imp seb_bac cpx_aba sbc_aba inc_aba seb_biz
beq_rel sbc_idy kil_non bbc_bar nop_zpx sbc_zpx inc_zpx bbc_bzr sed_imp sbc_aby nop_imp clb_bac nop_abx sbc_abx inc_abx clb_biz
brk740_imp ort_idx jsr_zpi bbs_bar nop_zpg ort_zpg asl_zpg bbs_bzr php_imp ort_imm asl_acc seb_bac nop_aba ort_aba asl_aba seb_biz
brk_m_imp ort_idx jsr_zpi bbs_bar nop_zpg ort_zpg asl_zpg bbs_bzr php_imp ort_imm asl_acc seb_bac nop_aba ort_aba asl_aba seb_biz
bpl_rel ort_idy clt_imp bbc_bar nop_zpx ort_zpx asl_zpx bbc_bzr clc_imp ort_aby dect_acc clb_bac nop_abx ort_abx asl_abx clb_biz
jsr_adr andt_idx jsr_spg bbs_bar bit_zpg andt_zpg rol_zpg bbs_bzr plp_imp andt_imm rol_acc seb_bac bit_aba andt_aba rol_aba seb_biz
jsr_adr andt_idx jsr_spg bbs_bar bit_zpg andt_zpg rol_zpg bbs_bzr plp_m_imp andt_imm rol_acc seb_bac bit_aba andt_aba rol_aba seb_biz
bmi_rel andt_idy set_imp bbc_bar nop_zpx andt_zpx rol_zpx bbc_bzr sec_imp andt_aby inct_acc clb_bac ldm_imz andt_abx rol_abx clb_biz
rti_imp eort_idx kil_non bbs_bar com_zpg eort_zpg lsr_zpg bbs_bzr pha_imp eort_imm lsr_acc seb_bac jmp_adr eort_aba lsr_aba seb_biz
rti_m_imp eort_idx kil_non bbs_bar com_zpg eort_zpg lsr_zpg bbs_bzr pha_imp eort_imm lsr_acc seb_bac jmp_adr eort_aba lsr_aba seb_biz
bvc_rel eort_idy kil_non bbc_bar nop_zpx eort_zpx lsr_zpx bbc_bzr cli_imp eort_aby nop_imp clb_bac nop_abx eort_abx lsr_abx clb_biz
rts_imp adct_idx kil_non bbs_bar tst_zpg adct_zpg ror_zpg bbs_bzr pla_imp adct_imm ror_acc seb_bac jmp_ind adct_aba ror_aba seb_biz
bvs_rel adct_idy kil_non bbc_bar nop_zpx adct_zpx ror_zpx bbc_bzr sei_imp adct_aby nop_imp clb_bac nop_abx adct_abx ror_abx clb_biz
@ -33,4 +33,4 @@ cpy_imm cmp_idx nop_imm bbs_bar cpy_zpg cmpt_zpg dec_zpg
bne_rel cmp_idy kil_non bbc_bar nop_zpx cmpt_zpx dec_zpx bbc_bzr cld_imp cmpt_aby nop_imp clb_bac nop_abx cmpt_abx dec_abx clb_biz
cpx_imm sbct_idx nop_imm bbs_bar cpx_zpg sbct_zpg inc_zpg bbs_bzr inx_imp sbc_imm nop_imp seb_bac cpx_aba sbct_aba inc_aba seb_biz
beq_rel sbct_idy kil_non bbc_bar nop_zpx sbct_zpx inc_zpx bbc_bzr sed_imp sbc_aby nop_imp clb_bac nop_abx sbct_abx inc_abx clb_biz
reset740
reset_m

5
src/devices/cpu/m6502/m740.h
View File

@ -66,12 +66,12 @@ protected:
void do_adct(uint8_t val);
// m740 opcodes
O(brk740_imp);
O(brk_m_imp);
O(clt_imp);
O(set_imp);
O(ldm_imz);
O(jsr_spg);
O(reset740);
O(reset_m);
O(seb_biz); O(seb_bac);
O(clb_biz); O(clb_bac);
O(bbc_bzr); O(bbc_bar);
@ -80,6 +80,7 @@ protected:
O(bra_rel);
O(jmp_zpi);
O(jsr_zpi);
O(plp_m_imp); O(rti_m_imp);
O(adct_aba); O(adct_abx); O(adct_aby); O(adct_idx); O(adct_idy); O(adct_imm); O(adct_zpg); O(adct_zpx);
O(andt_aba); O(andt_abx); O(andt_aby); O(andt_imm); O(andt_idx); O(andt_idy); O(andt_zpg); O(andt_zpx);

25
src/devices/cpu/m6502/om740.lst
View File

@ -152,13 +152,34 @@ jsr_zpi
PC = TMP;
prefetch();
reset740
plp_m_imp
read_pc_noinc();
read(SP);
inc_SP();
TMP = read(SP) | (F_B);
inst_state_base = (TMP & F_T) ? 0x100 : 0;
prefetch();
P = TMP; // Do *not* move it before the prefetch
rti_m_imp
read_pc_noinc();
read(SP);
inc_SP();
P = read(SP) | (F_B);
inst_state_base = (P & F_T) ? 0x100 : 0;
inc_SP();
PC = read(SP);
inc_SP();
PC = set_h(PC, read(SP));
prefetch();
reset_m
P |= F_I; PC = read_arg(0xfffe);
PC = set_h(PC, read_arg(0xffff));
prefetch();
inst_state = -1;
brk740_imp
brk_m_imp
// The 6502 bug when a nmi occurs in a brk is reproduced (case !irq_taken && nmi_pending)
if(irq_taken) {
read_pc_noinc();