Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-23 08:49:55 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

vp122: Add attribute RAM and buffers (nw)

Browse Source
This commit is contained in:
AJR 2018-07-16 13:58:10 -04:00
parent f18c7cd65f
commit 18eb2b394f
1 changed files with 33 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
src/mame/drivers/vp122.cpp
View File

@ -28,17 +28,26 @@ public:
void vp122(machine_config &config);
private:
virtual void machine_start() override;
SCN2674_DRAW_CHARACTER_MEMBER(draw_character);
void io_map(address_map &map);
void mem_map(address_map &map);
void vram_map(address_map &map);
void char_map(address_map &map);
void attr_map(address_map &map);
required_device<cpu_device> m_maincpu;
required_device<screen_device> m_screen;
required_region_ptr<u8> m_p_chargen;
};
void vp122_state::machine_start()
{
subdevice<i8251_device>("usart")->write_cts(0);
}
void vp122_state::mem_map(address_map &map)
{
map(0x0000, 0x9fff).rom().region("maincpu", 0);
@ -52,9 +61,9 @@ void vp122_state::io_map(address_map &map)
map(0x10, 0x1f).rw("duart", FUNC(scn2681_device::read), FUNC(scn2681_device::write));
map(0x20, 0x20).rw("usart", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
map(0x21, 0x21).rw("usart", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
map(0x50, 0x50).nopw();
map(0x60, 0x60).nopw();
map(0x70, 0x73).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write));
map(0x50, 0x50).rw("avdc", FUNC(scn2674_device::buffer_r), FUNC(scn2674_device::buffer_w));
map(0x60, 0x60).rw("avdc", FUNC(scn2674_device::attr_buffer_r), FUNC(scn2674_device::attr_buffer_w));
map(0x70, 0x73).w("pit", FUNC(pit8253_device::write));
}
@ -62,10 +71,16 @@ SCN2674_DRAW_CHARACTER_MEMBER(vp122_state::draw_character)
{
}
void vp122_state::vram_map(address_map &map)
void vp122_state::char_map(address_map &map)
{
map(0x0000, 0x07ff).noprw();
map(0x1800, 0x2fff).noprw();
map(0x0000, 0x07ff).ram();
map(0x1800, 0x2fff).ram();
}
void vp122_state::attr_map(address_map &map)
{
map(0x0000, 0x07ff).ram();
map(0x1800, 0x2fff).ram();
}
@ -73,30 +88,32 @@ static INPUT_PORTS_START( vp122 )
INPUT_PORTS_END
MACHINE_CONFIG_START(vp122_state::vp122)
MCFG_DEVICE_ADD("maincpu", I8085A, XTAL(8'000'000))
MCFG_DEVICE_ADD("maincpu", I8085A, 8_MHz_XTAL)
MCFG_DEVICE_PROGRAM_MAP(mem_map)
MCFG_DEVICE_IO_MAP(io_map)
MCFG_NVRAM_ADD_0FILL("nvram") // MK48Z02
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL(14'916'000), 960, 0, 800, 259, 0, 240)
//MCFG_SCREEN_RAW_PARAMS(XTAL(22'096'000), 1422, 0, 1188, 259, 0, 240)
MCFG_SCREEN_RAW_PARAMS(14.916_MHz_XTAL, 960, 0, 800, 259, 0, 240)
//MCFG_SCREEN_RAW_PARAMS(22.096_MHz_XTAL, 1422, 0, 1188, 259, 0, 240)
MCFG_SCREEN_UPDATE_DEVICE("avdc", scn2674_device, screen_update)
MCFG_DEVICE_ADD("avdc", SCN2674, XTAL(14'916'000) / 10)
MCFG_DEVICE_ADD("avdc", SCN2674, 14.916_MHz_XTAL / 10)
MCFG_SCN2674_INTR_CALLBACK(INPUTLINE("maincpu", I8085_RST65_LINE))
MCFG_SCN2674_CHARACTER_WIDTH(10) // 9 in 132-column modes
MCFG_SCN2674_DRAW_CHARACTER_CALLBACK_OWNER(vp122_state, draw_character)
MCFG_DEVICE_ADDRESS_MAP(0, vram_map)
MCFG_DEVICE_ADDRESS_MAP(0, char_map)
MCFG_DEVICE_ADDRESS_MAP(1, attr_map)
MCFG_VIDEO_SET_SCREEN("screen")
MCFG_DEVICE_ADD("duart", SCN2681, XTAL(3'686'400))
MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", I8085_RST55_LINE))
// OP3 timer output likely provides 8251 serial clocks
scn2681_device &duart(SCN2681(config, "duart", 3.6864_MHz_XTAL));
duart.irq_cb().set_inputline("maincpu", I8085_RST55_LINE);
duart.outport_cb().set("usart", FUNC(i8251_device::write_txc)).bit(3);
duart.outport_cb().append("usart", FUNC(i8251_device::write_rxc)).bit(3);
// OP7 = 0 for 80-column modes, 1 for 132-column modes
MCFG_DEVICE_ADD("usart", I8251, XTAL(8'000'000) / 4)
MCFG_DEVICE_ADD("usart", I8251, 8_MHz_XTAL / 2)
MCFG_DEVICE_ADD("pit", PIT8253, 0)
// Input clocks are video-related and should differ for 80-column and 132-column modes