mirror of
https://github.com/holub/mame
synced 2025-10-08 17:37:56 +03:00
Update dcs audio to get sf2049 closer to working.
This commit is contained in:
Ted Green
parent
d950e12c27
commit
18edbdcc71
@ -45,6 +45,9 @@ public:
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speaker_device &front_center() { set_position(0.0, 0.0, 1.0); return *this; }
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speaker_device &front_left() { set_position(-0.2, 0.0, 1.0); return *this; }
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speaker_device &front_right() { set_position(0.2, 0.0, 1.0); return *this; }
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speaker_device &rear_left() { set_position(-0.2, 0.0, -0.5); return *this; }
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speaker_device &rear_right() { set_position(0.2, 0.0, -0.5); return *this; }
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speaker_device &subwoofer() { set_position(0.0, 0.0, 0.0); return *this; }
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// internally for use by the sound system
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void mix(s32 *leftmix, s32 *rightmix, int &samples_this_update, bool suppress);
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@ -258,7 +258,8 @@ enum
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#define DENV_DM_PG ((m_dsio.reg[2] >> 0) & 0x1fff)
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#define DENV_BANK_END 0x3ff
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#define DENV_NUM_BANK 0x800
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/*************************************
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*
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@ -591,6 +592,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset )
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dcs_boot();
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/* reset timers */
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m_timer_ignore = false;
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m_timer_enable = 0;
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m_timer_scale = 1;
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m_internal_timer->reset();
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@ -829,7 +831,7 @@ void dcs2_audio_device::device_start()
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{
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m_cpu = subdevice<adsp21xx_device>("denver");
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m_rev = REV_DENV;
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soundbank_words = DENV_BANK_END + 1;
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soundbank_words = ((m_dram_in_mb << 20) / 2) / DENV_NUM_BANK;
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}
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if (m_cpu != nullptr && !m_cpu->started())
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throw device_missing_dependencies();
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@ -1263,6 +1265,7 @@ void dcs_audio_device::denver_reset()
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dmovlay_remap_memory();
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dmadac_enable(&m_dmadac[0], m_channels, 0);
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m_reg_timer->reset();
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m_sport0_timer->reset();
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}
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void dcs_audio_device::denver_alloc_dmadac()
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@ -1291,7 +1294,8 @@ READ16_MEMBER( dcs_audio_device::denver_r )
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// SDRC Revision
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result = 0x0003;
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}
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if (LOG_DCS_IO) logerror("%s denver_r %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, result);
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if (LOG_DCS_IO && offset != 0x2) logerror("%s denver_r %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, result);
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return result;
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}
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@ -1325,6 +1329,11 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
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if (m_channels < 6)
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dmadac_enable(&m_dmadac[m_channels], 6 - m_channels, false);
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}
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// Disable timer after DENV_RES_TFS
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if (!m_timer_ignore && DENV_RES_TFS && DENV_MUTE) {
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logerror("%s denver_w: Disabling timer\n", machine().describe_context());
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m_timer_ignore = true;
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}
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break;
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/* offset 2 controls RAM pages */
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@ -1338,7 +1347,7 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
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m_fifo_reset_w(1);
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break;
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}
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if (LOG_DCS_IO) logerror("%s denver_w %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, data);
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if (LOG_DCS_IO && offset != 0x2) logerror("%s denver_w %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, data);
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}
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@ -1351,12 +1360,11 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
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WRITE32_MEMBER( dcs_audio_device::dsio_idma_addr_w )
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{
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dsio_state &dsio = m_dsio;
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if (LOG_DCS_TRANSFERS)
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logerror("%s IDMA_addr = %04X\n", machine().describe_context(), data);
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downcast<adsp2181_device *>(m_cpu)->idma_addr_w(data);
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if (data == 0)
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dsio.start_on_next_write = 2;
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m_dsio.start_on_next_write = 2;
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}
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@ -1384,6 +1392,7 @@ WRITE32_MEMBER( dcs_audio_device::dsio_idma_data_w )
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}
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// Restore internal/external mapping
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m_ram_map->set_bank(m_dmovlay_val);
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}
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@ -1554,6 +1563,7 @@ WRITE16_MEMBER( dcs_audio_device::input_latch_ack_w )
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m_input_empty_cb(m_last_input_empty = 1);
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SET_INPUT_EMPTY();
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m_cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE);
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if (LOG_DCS_IO)
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logerror("%s input_latch_ack_w\n", machine().describe_context());
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}
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@ -1563,6 +1573,7 @@ READ16_MEMBER( dcs_audio_device::input_latch_r )
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{
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if (m_auto_ack)
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input_latch_ack_w(space,0,0,0xffff);
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if (LOG_DCS_IO)
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logerror("%s input_latch_r(%04X)\n", machine().describe_context(), m_input_data);
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return m_input_data;
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@ -1756,22 +1767,30 @@ void dcs_audio_device::reset_timer()
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/* if that's all the timer does, we don't really need to fire */
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if (!m_timer_ignore)
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{
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// Denver variants (mwskins and sf2049) use the timer as a scaler for another count so we can't disable here
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// Denver gets disabled when reset TFS in the adsp control written
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// Road Burners: Code gets moved after initial diagnostic checks
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/* Road Burners: @ 28: JMP $0032 18032F, same code at $32 */
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if (m_program->read_dword(0x18) == 0x0c0030 && /* ENA SEC_REG */
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/* Road Burners: @ 28: JMP $0030 18030F, same code at $30 */
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if (m_rev < REV_DSIO &&
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m_program->read_dword(0x18) == 0x0c0030 && /* ENA SEC_REG */
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m_program->read_dword(0x19) == 0x804828 && /* SI = DM($0482) */
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m_program->read_dword(0x1a) == 0x904828 && /* DM($0482) = SI */
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m_program->read_dword(0x1b) == 0x0C0020 && /* DIS SEC_REG */
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m_program->read_dword(0x1c) == 0x0A001F) /* RTI */
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{
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if (LOG_DCS_IO)
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logerror("reset_timer: Disabled timer %llu\n", m_timer_start_cycles);
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m_timer_ignore = true;
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} else if (
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// ADSP 2181 (DSIO and DENVER)
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m_program->read_dword(0x28) == 0x18032F && /* JUMP $0032 */
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m_program->read_dword(0x32) == 0x0c0030 && /* ENA SEC_REG */
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m_program->read_dword(0x33) == 0x014828 && /* SI = IO($482) */
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m_program->read_dword(0x34) == 0x01C828) /* IO($482) = SI */
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} else if (m_rev == REV_DSIO &&
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m_program->read_dword(0x30) == 0x0c0030 && /* ENA SEC_REG */
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m_program->read_dword(0x31) == 0x014828 && /* SI = IO($0482) */
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m_program->read_dword(0x32) == 0x01c828 && /* IO($0482) = SI */
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m_program->read_dword(0x33) == 0x0C0020 && /* DIS SEC_REG */
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m_program->read_dword(0x34) == 0x0A001F) /* RTI */
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{
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if (LOG_DCS_IO)
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logerror("reset_timer: Disabled timer %llu\n", m_timer_start_cycles);
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m_timer_ignore = true;
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}
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}
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@ -1788,7 +1807,6 @@ WRITE_LINE_MEMBER(dcs_audio_device::timer_enable_callback)
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{
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//logerror("Timer enabled @ %d cycles/int, or %f Hz\n", m_timer_scale * (m_timer_period + 1), 1.0 / m_cpu->cycles_to_attotime(m_timer_scale * (m_timer_period + 1)).as_double());
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m_timer_enable = state;
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m_timer_ignore = false;
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reset_timer();
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}
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else
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@ -1887,8 +1905,12 @@ WRITE16_MEMBER(dcs_audio_device:: adsp_control_w )
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if (m_sport0_timer != nullptr) {
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if (data & 0x1000) {
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// Start the SPORT0 timer
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// SPORT0 is used as a 1kHz timer
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m_sport0_timer->adjust(attotime::from_hz(1000), 0, attotime::from_hz(1000));
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// Hack to make sf2049 start to function
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if (m_rev == REV_DENV)
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m_sport0_timer->adjust(attotime::from_hz(1000), 0, attotime::from_hz(800));
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else
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// SPORT0 is used as a 1kHz timer
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m_sport0_timer->adjust(attotime::from_hz(1000), 0, attotime::from_hz(1000));
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if (LOG_DCS_IO)
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logerror("adsp_control_w: Setting SPORT0 freqency to 1kHz\n");
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}
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@ -1941,7 +1963,7 @@ WRITE16_MEMBER(dcs_audio_device:: adsp_control_w )
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case IDMA_CONTROL_REG:
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if (m_rev == REV_DSIO || m_rev == REV_DENV)
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downcast<adsp2181_device *>(m_cpu)->idma_addr_w(data);
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dsio_idma_addr_w(space, offset, data);
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break;
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}
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if (LOG_DCS_IO)
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@ -1958,7 +1980,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::dcs_irq )
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/* get the index register */
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int reg = m_cpu->state_int(ADSP2100_I0 + m_ireg);
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if (LOG_DCS_IO)
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logerror("dcs_irq: m_size: %x m_incs: %x m_channels: %d m_ireg_base: %x reg: %06x\n", m_size, m_incs, m_channels, m_ireg_base, reg);
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logerror("dcs_irq: m_ireg: %x m_size: %x m_incs: %x m_channels: %d m_ireg_base: %x reg: %06x\n", m_ireg, m_size, m_incs, m_channels, m_ireg_base, reg);
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/* copy the current data into the buffer */
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{
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@ -1998,11 +2020,13 @@ TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::dcs_irq )
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TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::sport0_irq )
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{
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/* this latches internally, so we just pulse */
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/* note that there is non-interrupt code that reads/modifies/writes the output_control */
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/* register; if we don't interlock it, we will eventually lose sound (see CarnEvil) */
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/* so we skip the SPORT interrupt if we read with output_control within the last 5 cycles */
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if ((m_cpu->total_cycles() - m_output_control_cycles) > 5)
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uint64_t diff = m_cpu->total_cycles() - m_output_control_cycles;
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if (diff > 5)
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{
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m_cpu->set_input_line(ADSP2115_SPORT0_RX, ASSERT_LINE);
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m_cpu->set_input_line(ADSP2115_SPORT0_RX, CLEAR_LINE);
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@ -2106,7 +2130,7 @@ WRITE32_MEMBER(dcs_audio_device::sound_tx_callback)
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READ16_MEMBER( dcs_audio_device::dcs_polling_r )
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{
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if (m_polling_count++ > 5)
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space.device().execute().eat_cycles(10000);
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space.device().execute().eat_cycles(2000);
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return m_polling_value;
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}
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@ -2673,14 +2697,11 @@ MACHINE_CONFIG_START(dcs2_audio_dsio_device::device_add_mconfig)
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MACHINE_CONFIG_END
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DEFINE_DEVICE_TYPE(DCS2_AUDIO_DENVER, dcs2_audio_denver_device, "dcs2_audio_denver", "DCS2 Audio Denver")
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//-------------------------------------------------
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// dcs2_audio_denver_device - constructor
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//-------------------------------------------------
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dcs2_audio_denver_device::dcs2_audio_denver_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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dcs2_audio_device(mconfig, DCS2_AUDIO_DENVER, tag, owner, clock)
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dcs2_audio_denver_device::dcs2_audio_denver_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
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dcs2_audio_device(mconfig, type, tag, owner, clock)
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{
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}
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@ -2704,6 +2725,49 @@ MACHINE_CONFIG_START(dcs2_audio_denver_device::device_add_mconfig)
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MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback)
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MCFG_TIMER_DEVICE_ADD("dcs_sport0_timer", DEVICE_SELF, dcs_audio_device, sport0_irq) // Atlantis driver waits for sport0 rx interrupts
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MACHINE_CONFIG_END
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dcs2_audio_denver_5ch_device::dcs2_audio_denver_5ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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dcs2_audio_denver_device(mconfig, DCS2_AUDIO_DENVER_5CH, tag, owner, clock)
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{
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}
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MACHINE_CONFIG_START(dcs2_audio_denver_5ch_device::device_add_mconfig)
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dcs2_audio_denver_device::device_add_mconfig(config);
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SPEAKER(config, "flspeaker").front_left();
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SPEAKER(config, "frspeaker").front_right();
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SPEAKER(config, "rlspeaker").rear_left();
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SPEAKER(config, "rrspeaker").rear_right();
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SPEAKER(config, "subwoofer").subwoofer();
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MCFG_DEVICE_ADD("dac1", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "flspeaker", 1.0)
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MCFG_DEVICE_ADD("dac2", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "frspeaker", 1.0)
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MCFG_DEVICE_ADD("dac3", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rlspeaker", 1.0)
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MCFG_DEVICE_ADD("dac4", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rrspeaker", 1.0)
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MCFG_DEVICE_ADD("dac5", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "subwoofer", 1.0)
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MCFG_DEVICE_ADD("dac6", DMADAC)
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// Does not produce sound
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MACHINE_CONFIG_END
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DEFINE_DEVICE_TYPE(DCS2_AUDIO_DENVER_5CH, dcs2_audio_denver_5ch_device, "dcs2_audio_denver_5ch", "DCS2 Audio Denver 5 Channel")
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dcs2_audio_denver_2ch_device::dcs2_audio_denver_2ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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dcs2_audio_denver_device(mconfig, DCS2_AUDIO_DENVER_2CH, tag, owner, clock)
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{
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}
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MACHINE_CONFIG_START(dcs2_audio_denver_2ch_device::device_add_mconfig)
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dcs2_audio_denver_device::device_add_mconfig(config);
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SPEAKER(config, "lspeaker").front_left();
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SPEAKER(config, "rspeaker").front_right();
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@ -2712,16 +2776,6 @@ MACHINE_CONFIG_START(dcs2_audio_denver_device::device_add_mconfig)
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MCFG_DEVICE_ADD("dac2", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
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MCFG_DEVICE_ADD("dac3", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
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MCFG_DEVICE_ADD("dac4", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
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MCFG_DEVICE_ADD("dac5", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
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MCFG_DEVICE_ADD("dac6", DMADAC)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
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MACHINE_CONFIG_END
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DEFINE_DEVICE_TYPE(DCS2_AUDIO_DENVER_2CH, dcs2_audio_denver_2ch_device, "dcs2_audio_denver_2ch", "DCS2 Audio Denver 2 Channel")
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@ -382,20 +382,40 @@ protected:
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// device type definition
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DECLARE_DEVICE_TYPE(DCS2_AUDIO_DSIO, dcs2_audio_dsio_device)
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// dcs2_audio_denver_device
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// dcs2_audio_denver_device types
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class dcs2_audio_denver_device : public dcs2_audio_device
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{
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public:
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// construction/destruction
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dcs2_audio_denver_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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dcs2_audio_denver_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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protected:
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// optional information overrides
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virtual void device_add_mconfig(machine_config &config) override;
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};
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class dcs2_audio_denver_5ch_device : public dcs2_audio_denver_device
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{
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public:
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// construction/destruction
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dcs2_audio_denver_5ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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protected:
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// optional information overrides
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virtual void device_add_mconfig(machine_config &config) override;
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};
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class dcs2_audio_denver_2ch_device : public dcs2_audio_denver_device
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{
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public:
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// construction/destruction
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dcs2_audio_denver_2ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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protected:
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// optional information overrides
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virtual void device_add_mconfig(machine_config &config) override;
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};
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// device type definition
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DECLARE_DEVICE_TYPE(DCS2_AUDIO_DENVER, dcs2_audio_denver_device)
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DECLARE_DEVICE_TYPE(DCS2_AUDIO_DENVER_5CH, dcs2_audio_denver_5ch_device)
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DECLARE_DEVICE_TYPE(DCS2_AUDIO_DENVER_2CH, dcs2_audio_denver_2ch_device)
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#endif // MAME_AUDIO_DCS_H
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@ -846,7 +846,7 @@ MACHINE_CONFIG_START(atlantis_state::mwskins)
|
||||
MCFG_SCREEN_UPDATE_DEVICE("zeus2", zeus2_device, screen_update)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_DEVICE_ADD(m_dcs, DCS2_AUDIO_DENVER, 0)
|
||||
MCFG_DEVICE_ADD(m_dcs, DCS2_AUDIO_DENVER_2CH, 0)
|
||||
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
|
||||
MCFG_DCS2_AUDIO_POLLING_OFFSET(0xe33)
|
||||
|
||||
@ -863,13 +863,13 @@ MACHINE_CONFIG_START(atlantis_state::mwskins)
|
||||
}
|
||||
|
||||
// TL16C552 UART
|
||||
MCFG_DEVICE_ADD(m_uart1, NS16550, XTAL(24'000'000))
|
||||
MCFG_DEVICE_ADD(m_uart1, NS16550, XTAL(1'843'200))
|
||||
MCFG_INS8250_OUT_TX_CB(WRITELINE("com1", rs232_port_device, write_txd))
|
||||
MCFG_INS8250_OUT_DTR_CB(WRITELINE("com1", rs232_port_device, write_dtr))
|
||||
MCFG_INS8250_OUT_RTS_CB(WRITELINE("com1", rs232_port_device, write_rts))
|
||||
MCFG_INS8250_OUT_INT_CB(WRITELINE(*this, atlantis_state, duart_irq_callback))
|
||||
|
||||
MCFG_DEVICE_ADD(m_uart2, NS16550, XTAL(24'000'000))
|
||||
MCFG_DEVICE_ADD(m_uart2, NS16550, XTAL(1'843'200))
|
||||
MCFG_INS8250_OUT_TX_CB(WRITELINE("com2", rs232_port_device, write_txd))
|
||||
MCFG_INS8250_OUT_DTR_CB(WRITELINE("com2", rs232_port_device, write_dtr))
|
||||
MCFG_INS8250_OUT_RTS_CB(WRITELINE("com2", rs232_port_device, write_rts))
|
||||
|
||||
@ -355,6 +355,7 @@ public:
|
||||
uint8_t m_sio_reset_ctrl;
|
||||
uint8_t m_sio_irq_enable;
|
||||
uint8_t m_sio_irq_state;
|
||||
uint8_t m_duart_irq_state;
|
||||
uint8_t m_sio_led_state;
|
||||
uint8_t m_pending_analog_read;
|
||||
uint8_t m_cmos_unlocked;
|
||||
@ -464,6 +465,7 @@ void vegas_state::machine_start()
|
||||
save_item(NAME(m_sio_reset_ctrl));
|
||||
save_item(NAME(m_sio_irq_enable));
|
||||
save_item(NAME(m_sio_irq_state));
|
||||
save_item(NAME(m_duart_irq_state));
|
||||
save_item(NAME(m_sio_led_state));
|
||||
save_item(NAME(m_pending_analog_read));
|
||||
save_item(NAME(m_cmos_unlocked));
|
||||
@ -500,6 +502,7 @@ void vegas_state::machine_reset()
|
||||
memset(m_cpuio_data, 0, ARRAY_LENGTH(m_cpuio_data));
|
||||
// Clear SIO registers
|
||||
reset_sio();
|
||||
m_duart_irq_state = 0;
|
||||
m_i40_data = 0;
|
||||
m_keypad_select = 0;
|
||||
m_gear = 1;
|
||||
@ -604,7 +607,8 @@ std::string vegas_state::sioIRQString(uint8_t data)
|
||||
|
||||
void vegas_state::update_sio_irqs()
|
||||
{
|
||||
if (m_sio_irq_state & m_sio_irq_enable) {
|
||||
// Duart shares IRQ with SIO
|
||||
if ((m_sio_irq_state & m_sio_irq_enable) || m_duart_irq_state) {
|
||||
m_nile->pci_intr_c(ASSERT_LINE);
|
||||
}
|
||||
else {
|
||||
@ -619,10 +623,11 @@ void vegas_state::update_sio_irqs()
|
||||
|
||||
WRITE_LINE_MEMBER(vegas_state::duart_irq_cb)
|
||||
{
|
||||
if (state)
|
||||
m_nile->pci_intr_c(ASSERT_LINE);
|
||||
else
|
||||
m_nile->pci_intr_c(CLEAR_LINE);
|
||||
// Duart shares IRQ with SIO
|
||||
if (state ^ m_duart_irq_state) {
|
||||
m_duart_irq_state = state;
|
||||
update_sio_irqs();
|
||||
}
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(vegas_state::vblank_assert)
|
||||
@ -1822,13 +1827,13 @@ MACHINE_CONFIG_START(vegas_state::denver)
|
||||
MCFG_VOODOO_VBLANK_CB(WRITELINE(*this, vegas_state, vblank_assert))
|
||||
|
||||
// TL16C552 UART
|
||||
MCFG_DEVICE_ADD(m_uart1, NS16550, vegas_state::SYSTEM_CLOCK / 12)
|
||||
MCFG_DEVICE_ADD(m_uart1, NS16550, XTAL(1'843'200))
|
||||
MCFG_INS8250_OUT_TX_CB(WRITELINE("ttys01", rs232_port_device, write_txd))
|
||||
MCFG_INS8250_OUT_DTR_CB(WRITELINE("ttys01", rs232_port_device, write_dtr))
|
||||
MCFG_INS8250_OUT_RTS_CB(WRITELINE("ttys01", rs232_port_device, write_rts))
|
||||
MCFG_INS8250_OUT_INT_CB(WRITELINE(*this, vegas_state, duart_irq_cb))
|
||||
|
||||
MCFG_DEVICE_ADD(m_uart2, NS16550, vegas_state::SYSTEM_CLOCK / 12)
|
||||
MCFG_DEVICE_ADD(m_uart2, NS16550, XTAL(1'843'200))
|
||||
MCFG_INS8250_OUT_TX_CB(WRITELINE("ttys02", rs232_port_device, write_txd))
|
||||
MCFG_INS8250_OUT_DTR_CB(WRITELINE("ttys02", rs232_port_device, write_dtr))
|
||||
MCFG_INS8250_OUT_RTS_CB(WRITELINE("ttys02", rs232_port_device, write_rts))
|
||||
@ -1969,7 +1974,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(vegas_state::sf2049)
|
||||
denver(config);
|
||||
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
|
||||
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER_5CH, 0)
|
||||
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
|
||||
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x872)
|
||||
|
||||
@ -1984,7 +1989,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(vegas_state::sf2049se)
|
||||
denver(config);
|
||||
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
|
||||
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER_5CH, 0)
|
||||
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
|
||||
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x872)
|
||||
|
||||
@ -1999,7 +2004,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(vegas_state::sf2049te)
|
||||
denver(config);
|
||||
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
|
||||
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER_5CH, 0)
|
||||
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
|
||||
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x872)
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user