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https://github.com/holub/mame
synced 2025-04-22 00:11:58 +03:00
(MESS) pet: Implemented write mode on the Commodore 8050/8250/SFD-1001 floppy drives. [Curt Coder]
(MESS) victor9k: Separated read/write modes in the floppy controller. (nw) fdc_pll: Removed write_next_bit_prev_cell hack. (nw)
This commit is contained in:
Curt Coder
parent
d4c67891c4
commit
19bbe2ac4d
@ -13,9 +13,7 @@
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TODO:
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- write mode
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- write protect
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- separate read/write methods
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*/
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@ -28,6 +26,8 @@
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//**************************************************************************
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#define LOG 0
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#define LOG_MORE 0
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#define LOG_BITS 0
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#define GCR_DECODE(_e, _i) \
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((BIT(_e, 6) << 7) | (BIT(_i, 7) << 6) | (_e & 0x33) | (BIT(_e, 2) << 3) | (_i & 0x04))
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@ -74,7 +74,7 @@ const rom_entry *c8050_fdc_t::device_rom_region() const
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//-------------------------------------------------
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c8050_fdc_t::c8050_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, C8050_FDC, "C8050 FDC", tag, owner, clock, "c8050fdc", __FILE__),
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device_t(mconfig, C8050_FDC, "Commodore 8050 FDC", tag, owner, clock, "c8050fdc", __FILE__),
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m_write_sync(*this),
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m_write_ready(*this),
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m_write_brdy(*this),
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@ -89,7 +89,7 @@ c8050_fdc_t::c8050_fdc_t(const machine_config &mconfig, const char *tag, device_
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m_ds(0),
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m_drv_sel(0),
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m_mode_sel(0),
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m_rw_sel(0)
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m_rw_sel(1)
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{
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cur_live.tm = attotime::never;
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cur_live.state = IDLE;
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@ -210,7 +210,8 @@ void c8050_fdc_t::ds_w(int ds)
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{
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live_sync();
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m_ds = cur_live.ds = ds;
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pll_reset(cur_live.tm, attotime::from_hz(clock() / (16 - m_ds)));
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pll_reset(cur_live.tm);
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if (LOG) logerror("%s %s DS %u\n", machine().time().as_string(), machine().describe_context(), ds);
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checkpoint();
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live_run();
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}
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@ -240,22 +241,23 @@ void c8050_fdc_t::live_start()
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cur_live.rw_sel = m_rw_sel;
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cur_live.pi = m_pi;
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pll_reset(cur_live.tm, attotime::from_hz(clock() / (16 - m_ds)));
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pll_reset(cur_live.tm);
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checkpoint_live = cur_live;
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pll_save_checkpoint();
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live_run();
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}
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void c8050_fdc_t::pll_reset(const attotime &when, const attotime &clock)
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void c8050_fdc_t::pll_reset(const attotime &when)
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{
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cur_pll.reset(when);
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cur_pll.set_clock(clock);
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cur_pll.set_clock(attotime::from_hz(clock() / (16 - m_ds)));
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}
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void c8050_fdc_t::pll_start_writing(const attotime &tm)
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{
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cur_pll.start_writing(tm);
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pll_reset(cur_live.tm);
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}
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void c8050_fdc_t::pll_commit(floppy_image_device *floppy, const attotime &tm)
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@ -266,6 +268,7 @@ void c8050_fdc_t::pll_commit(floppy_image_device *floppy, const attotime &tm)
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void c8050_fdc_t::pll_stop_writing(floppy_image_device *floppy, const attotime &tm)
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{
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cur_pll.stop_writing(floppy, tm);
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pll_reset(cur_live.tm);
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}
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void c8050_fdc_t::pll_save_checkpoint()
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@ -285,7 +288,7 @@ int c8050_fdc_t::pll_get_next_bit(attotime &tm, floppy_image_device *floppy, con
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bool c8050_fdc_t::pll_write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit)
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{
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return cur_pll.write_next_bit_prev_cell(bit, tm, floppy, limit);
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return cur_pll.write_next_bit(bit, tm, floppy, limit);
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}
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void c8050_fdc_t::checkpoint()
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@ -366,10 +369,33 @@ void c8050_fdc_t::live_run(const attotime &limit)
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return;
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// read bit
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int bit = pll_get_next_bit(cur_live.tm, get_floppy(), limit);
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if(bit < 0)
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return;
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int bit = 0;
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if (cur_live.rw_sel) {
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bit = pll_get_next_bit(cur_live.tm, get_floppy(), limit);
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if(bit < 0)
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return;
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}
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// write bit
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int write_bit = BIT(cur_live.shift_reg_write, 9);
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if (!cur_live.rw_sel) { // TODO WPS
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/*
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write precompensation
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UA5.A = UM6.Qc
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UA5.B = !(!(!BRDY && UM6.Qa) && !(BRDY && E7))
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UA5.C0 = UA4.Qb = bit clock delayed 333ns
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UA5.C1 = UA4.Qa = bit clock delayed 166ns
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UA5.C2 = UA4.Qc = bit clock delayed 499ns
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UA5.C3 = UA5.Qb = bit clock delayed 333ns
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DATA OUT = !(!BITCLK || !(UA5.Y && !(WRITE_ENABLE && !UM6.Qb)))
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*/
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if (pll_write_next_bit(write_bit, cur_live.tm, get_floppy(), limit))
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return;
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}
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// clock read shift register
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cur_live.shift_reg <<= 1;
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cur_live.shift_reg |= bit;
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cur_live.shift_reg &= 0x3ff;
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@ -378,16 +404,9 @@ void c8050_fdc_t::live_run(const attotime &limit)
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int sync = !((cur_live.shift_reg == 0x3ff) && cur_live.rw_sel);
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// bit counter
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if (cur_live.rw_sel) {
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if (!sync) {
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cur_live.bit_counter = 0;
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} else if (cur_live.sync) {
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cur_live.bit_counter++;
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if (cur_live.bit_counter == 10) {
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cur_live.bit_counter = 0;
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}
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}
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} else {
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if (!sync) {
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cur_live.bit_counter = 0;
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} else if (cur_live.sync) {
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cur_live.bit_counter++;
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if (cur_live.bit_counter == 10) {
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cur_live.bit_counter = 0;
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@ -403,8 +422,6 @@ void c8050_fdc_t::live_run(const attotime &limit)
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cur_live.e = m_gcr_rom->base()[cur_live.i];
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if (LOG) logerror("%s cyl %u bit %u sync %u bc %u sr %03x i %03x e %02x\n",cur_live.tm.as_string(),get_floppy()->get_cyl(),bit,sync,cur_live.bit_counter,cur_live.shift_reg,cur_live.i,cur_live.e);
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// byte ready
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int ready = !(cur_live.bit_counter == 9); // 74190 _RC, should be triggered on the falling edge of the clock
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int brdy = ready; // 74190 TC
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@ -412,18 +429,19 @@ void c8050_fdc_t::live_run(const attotime &limit)
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// GCR error
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int error = !(ready || BIT(cur_live.e, 3));
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// write bit
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if (!cur_live.rw_sel) { // TODO WPS
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int write_bit = BIT(cur_live.shift_reg_write, 9);
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if (LOG) logerror("%s writing bit %u sr %03x\n",cur_live.tm.as_string(),write_bit,cur_live.shift_reg_write);
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pll_write_next_bit(write_bit, cur_live.tm, get_floppy(), limit);
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if (LOG_BITS) {
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if (cur_live.rw_sel) {
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logerror("%s cyl %u bit %u sync %u bc %u sr %03x i %03x e %02x\n",cur_live.tm.as_string(),get_floppy()->get_cyl(),bit,sync,cur_live.bit_counter,cur_live.shift_reg,cur_live.i,cur_live.e);
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} else {
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logerror("%s cyl %u writing bit %u bc %u sr %03x i %03x e %02x\n",cur_live.tm.as_string(),get_floppy()->get_cyl(),write_bit,cur_live.bit_counter,cur_live.shift_reg_write,cur_live.i,cur_live.e);
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}
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}
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if (!ready) {
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// load write shift register
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cur_live.shift_reg_write = GCR_ENCODE(cur_live.e, cur_live.i);
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if (LOG) logerror("%s load write shift register %03x\n",cur_live.tm.as_string(),cur_live.shift_reg_write);
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if (LOG_BITS) logerror("%s load write shift register %03x\n",cur_live.tm.as_string(),cur_live.shift_reg_write);
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} else {
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// clock write shift register
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cur_live.shift_reg_write <<= 1;
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@ -431,13 +449,14 @@ void c8050_fdc_t::live_run(const attotime &limit)
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}
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if (ready != cur_live.ready) {
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if (LOG) logerror("%s READY %u : %02x\n", cur_live.tm.as_string(),ready,GCR_DECODE(cur_live.e, cur_live.i));
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if (cur_live.rw_sel && !ready)
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if (LOG) logerror("%s READY %u : %02x\n", cur_live.tm.as_string(),ready,GCR_DECODE(cur_live.e, cur_live.i));
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cur_live.ready = ready;
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syncpoint = true;
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}
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if (brdy != cur_live.brdy) {
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if (LOG) logerror("%s BRDY %u\n", cur_live.tm.as_string(), brdy);
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if (LOG_MORE) logerror("%s BRDY %u\n", cur_live.tm.as_string(), brdy);
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cur_live.brdy = brdy;
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syncpoint = true;
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}
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@ -449,7 +468,7 @@ void c8050_fdc_t::live_run(const attotime &limit)
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}
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if (error != cur_live.error) {
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if (LOG) logerror("%s ERROR %u\n", cur_live.tm.as_string(), error);
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if (LOG_MORE) logerror("%s ERROR %u\n", cur_live.tm.as_string(), error);
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cur_live.error = error;
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syncpoint = true;
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}
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@ -462,10 +481,6 @@ void c8050_fdc_t::live_run(const attotime &limit)
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}
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case RUNNING_SYNCPOINT: {
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if (LOG) {
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if (!cur_live.sync) logerror("%s SYNC\n",cur_live.tm.as_string());
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if (!cur_live.ready && cur_live.bit_counter == 9) logerror("%s DATA %02x\n",cur_live.tm.as_string(),GCR_DECODE(cur_live.e,cur_live.i));
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}
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m_write_ready(cur_live.ready);
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m_write_brdy(cur_live.brdy);
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m_write_sync(cur_live.sync);
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@ -484,21 +499,18 @@ READ8_MEMBER( c8050_fdc_t::read )
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UINT8 e = checkpoint_live.e;
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offs_t i = checkpoint_live.i;
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UINT8 data = GCR_DECODE(e, i);
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if (LOG)logerror("%s %s VIA reads data %02x (%03x)\n", machine().time().as_string(), machine().describe_context(), data, checkpoint_live.shift_reg);
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return data;
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return GCR_DECODE(e, i);
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}
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WRITE8_MEMBER( c8050_fdc_t::write )
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{
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if (LOG) logerror("%s %s PI %02x\n", machine().time().as_string(), machine().describe_context(), data);
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if (m_pi != data)
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{
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live_sync();
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m_pi = cur_live.pi = data;
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checkpoint();
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if (LOG) logerror("%s %s PI %02x\n", machine().time().as_string(), machine().describe_context(), data);
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live_run();
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}
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}
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@ -548,9 +560,9 @@ WRITE_LINE_MEMBER( c8050_fdc_t::rw_sel_w )
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checkpoint();
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if (LOG) logerror("%s %s RW SEL %u\n", machine().time().as_string(), machine().describe_context(), state);
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if (m_rw_sel) {
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pll_stop_writing(get_floppy(), machine().time());
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pll_stop_writing(get_floppy(), cur_live.tm);
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} else {
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pll_start_writing(machine().time());
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pll_start_writing(cur_live.tm);
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}
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live_run();
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}
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@ -616,5 +628,5 @@ WRITE_LINE_MEMBER( c8050_fdc_t::odd_hd_w )
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WRITE_LINE_MEMBER( c8050_fdc_t::pull_sync_w )
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{
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if (LOG) logerror("%s %s PULL SYNC %u\n", machine().time().as_string(), machine().describe_context(), state);
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if (LOG_MORE) logerror("%s %s PULL SYNC %u\n", machine().time().as_string(), machine().describe_context(), state);
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}
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@ -150,7 +150,7 @@ protected:
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void live_start();
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void checkpoint();
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void rollback();
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void pll_reset(const attotime &when, const attotime &clock);
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void pll_reset(const attotime &when);
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void pll_start_writing(const attotime &tm);
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void pll_commit(floppy_image_device *floppy, const attotime &tm);
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void pll_stop_writing(floppy_image_device *floppy, const attotime &tm);
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@ -22,7 +22,6 @@ void fdc_pll_t::set_clock(const attotime &_period)
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void fdc_pll_t::reset(const attotime &when)
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{
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ctime = when;
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write_ctime = when;
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phase_adjust = attotime::zero;
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freq_hist = 0;
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write_position = 0;
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@ -66,7 +65,6 @@ int fdc_pll_t::get_next_bit(attotime &tm, floppy_image_device *floppy, const att
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if(next > limit)
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return -1;
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write_ctime = ctime;
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ctime = next;
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tm = next;
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@ -132,20 +130,3 @@ bool fdc_pll_t::write_next_bit(bool bit, attotime &tm, floppy_image_device *flop
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ctime = etime;
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return false;
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}
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bool fdc_pll_t::write_next_bit_prev_cell(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit)
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{
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if(write_start_time.is_never()) {
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write_start_time = write_ctime;
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write_position = 0;
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}
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attotime etime = write_ctime + period;
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if(etime > limit)
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return true;
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if(bit && write_position < ARRAY_LENGTH(write_buffer))
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write_buffer[write_position++] = write_ctime + period/2;
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return false;
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}
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@ -12,7 +12,6 @@ class fdc_pll_t {
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public:
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attotime ctime, period, min_period, max_period, period_adjust_base, phase_adjust;
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attotime write_ctime;
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attotime write_start_time;
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attotime write_buffer[32];
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int write_position;
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@ -22,7 +21,6 @@ public:
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void reset(const attotime &when);
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int get_next_bit(attotime &tm, floppy_image_device *floppy, const attotime &limit);
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bool write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit);
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bool write_next_bit_prev_cell(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit);
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void start_writing(const attotime &tm);
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void commit(floppy_image_device *floppy, const attotime &tm);
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void stop_writing(floppy_image_device *floppy, const attotime &tm);
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@ -54,6 +54,7 @@
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#define LOG 0
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#define LOG_VIA 0
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#define LOG_SCP 0
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#define LOG_BITS 0
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#define I8048_TAG "5d"
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#define M6522_4_TAG "1f"
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@ -1069,22 +1070,23 @@ void victor_9000_fdc_t::live_start()
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cur_live.wrsync = m_wrsync;
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cur_live.erase = m_erase;
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pll_reset(cur_live.tm, attotime::from_nsec(2130));
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pll_reset(cur_live.tm);
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checkpoint_live = cur_live;
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pll_save_checkpoint();
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live_run();
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}
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void victor_9000_fdc_t::pll_reset(const attotime &when, const attotime &clock)
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void victor_9000_fdc_t::pll_reset(const attotime &when)
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{
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cur_pll.reset(when);
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cur_pll.set_clock(clock);
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cur_pll.set_clock(attotime::from_nsec(2130));
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}
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void victor_9000_fdc_t::pll_start_writing(const attotime &tm)
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{
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cur_pll.start_writing(tm);
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pll_reset(cur_live.tm);
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}
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void victor_9000_fdc_t::pll_commit(floppy_image_device *floppy, const attotime &tm)
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@ -1095,6 +1097,7 @@ void victor_9000_fdc_t::pll_commit(floppy_image_device *floppy, const attotime &
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void victor_9000_fdc_t::pll_stop_writing(floppy_image_device *floppy, const attotime &tm)
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{
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cur_pll.stop_writing(floppy, tm);
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pll_reset(cur_live.tm);
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}
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void victor_9000_fdc_t::pll_save_checkpoint()
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@ -1114,7 +1117,7 @@ int victor_9000_fdc_t::pll_get_next_bit(attotime &tm, floppy_image_device *flopp
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bool victor_9000_fdc_t::pll_write_next_bit(bool bit, attotime &tm, floppy_image_device *floppy, const attotime &limit)
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{
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return cur_pll.write_next_bit_prev_cell(bit, tm, floppy, limit);
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return cur_pll.write_next_bit(bit, tm, floppy, limit);
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}
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void victor_9000_fdc_t::checkpoint()
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@ -1197,10 +1200,22 @@ void victor_9000_fdc_t::live_run(const attotime &limit)
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||||
return;
|
||||
|
||||
// read bit
|
||||
int bit = pll_get_next_bit(cur_live.tm, get_floppy(), limit);
|
||||
if(bit < 0)
|
||||
return;
|
||||
int bit = 0;
|
||||
if (cur_live.drw) {
|
||||
bit = pll_get_next_bit(cur_live.tm, get_floppy(), limit);
|
||||
if(bit < 0)
|
||||
return;
|
||||
}
|
||||
|
||||
// write bit
|
||||
int write_bit = 0;
|
||||
if (!cur_live.drw) { // TODO WPS
|
||||
write_bit = BIT(cur_live.shift_reg_write, 9);
|
||||
if (pll_write_next_bit(write_bit, cur_live.tm, get_floppy(), limit))
|
||||
return;
|
||||
}
|
||||
|
||||
// clock read shift register
|
||||
cur_live.shift_reg <<= 1;
|
||||
cur_live.shift_reg |= bit;
|
||||
cur_live.shift_reg &= 0x3ff;
|
||||
@ -1261,11 +1276,12 @@ void victor_9000_fdc_t::live_run(const attotime &limit)
|
||||
// GCR error
|
||||
int gcr_err = !(brdy || BIT(cur_live.e, 3));
|
||||
|
||||
// write bit
|
||||
if (!cur_live.drw) { // TODO WPS
|
||||
int write_bit = BIT(cur_live.shift_reg_write, 9);
|
||||
if (LOG) logerror("%s writing bit %u sr %03x\n",cur_live.tm.as_string(),write_bit,cur_live.shift_reg_write);
|
||||
pll_write_next_bit(write_bit, cur_live.tm, get_floppy(), limit);
|
||||
if (LOG_BITS) {
|
||||
if (cur_live.drw) {
|
||||
logerror("%s cyl %u bit %u sync %u bc %u sr %03x i %03x e %02x\n",cur_live.tm.as_string(),get_floppy()->get_cyl(),bit,sync,cur_live.bit_counter,cur_live.shift_reg,cur_live.i,cur_live.e);
|
||||
} else {
|
||||
logerror("%s cyl %u writing bit %u bc %u sr %03x i %03x e %02x\n",cur_live.tm.as_string(),get_floppy()->get_cyl(),write_bit,cur_live.bit_counter,cur_live.shift_reg_write,cur_live.i,cur_live.e);
|
||||
}
|
||||
}
|
||||
|
||||
if (!brdy) {
|
||||
|
||||
@ -218,7 +218,7 @@ private:
|
||||
|
||||
floppy_image_device* get_floppy();
|
||||
void live_start();
|
||||
void pll_reset(const attotime &when, const attotime &clock);
|
||||
void pll_reset(const attotime &when);
|
||||
void pll_start_writing(const attotime &tm);
|
||||
void pll_commit(floppy_image_device *floppy, const attotime &tm);
|
||||
void pll_stop_writing(floppy_image_device *floppy, const attotime &tm);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user