mirror of
https://github.com/holub/mame
synced 2025-10-06 00:54:22 +03:00
ti99: Fixed stuck INT line in TMS9902; improve logging
This commit is contained in:
parent
871656c98c
commit
19ff2946c5
@ -203,6 +203,7 @@
|
|||||||
#define TRACE_CLOCK 0
|
#define TRACE_CLOCK 0
|
||||||
#define TRACE_LINES 0
|
#define TRACE_LINES 0
|
||||||
#define TRACE_SETTING 1
|
#define TRACE_SETTING 1
|
||||||
|
#define TRACE_VIDEOWS 0
|
||||||
#define TRACE_PFM 0
|
#define TRACE_PFM 0
|
||||||
|
|
||||||
geneve_mapper_device::geneve_mapper_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
geneve_mapper_device::geneve_mapper_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||||
@ -395,7 +396,7 @@ void geneve_mapper_device::set_cartridge_writable(int base, bool write)
|
|||||||
|
|
||||||
void geneve_mapper_device::set_video_waitstates(bool wait)
|
void geneve_mapper_device::set_video_waitstates(bool wait)
|
||||||
{
|
{
|
||||||
if (TRACE_SETTING) logerror("%s: Setting video waitstates = %d\n", tag(), wait);
|
if (TRACE_VIDEOWS) logerror("%s: Setting video waitstates = %d\n", tag(), wait);
|
||||||
m_video_waitstates = wait;
|
m_video_waitstates = wait;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -41,8 +41,12 @@
|
|||||||
#include <math.h>
|
#include <math.h>
|
||||||
#include "tms9902.h"
|
#include "tms9902.h"
|
||||||
|
|
||||||
#define VERBOSE 1
|
#define TRACE_LINES 0
|
||||||
#define LOG logerror
|
#define TRACE_CRU 0
|
||||||
|
#define TRACE_DETAIL 0
|
||||||
|
#define TRACE_BUFFER 0
|
||||||
|
#define TRACE_ERROR 1
|
||||||
|
#define TRACE_SETTING 0
|
||||||
|
|
||||||
enum
|
enum
|
||||||
{
|
{
|
||||||
@ -78,14 +82,14 @@ void tms9902_device::field_interrupts()
|
|||||||
|| (m_RBRL && m_RIENB)
|
|| (m_RBRL && m_RIENB)
|
||||||
|| (m_XBRE && m_XBIENB)
|
|| (m_XBRE && m_XBIENB)
|
||||||
|| (m_TIMELP && m_TIMENB);
|
|| (m_TIMELP && m_TIMENB);
|
||||||
if (VERBOSE>8) LOG("TMS9902: interrupt flags (DSCH = %02x, DSCENB = %02x), (RBRL = %02x, RIENB = %02x), (XBRE = %02x, XBIENB = %02x), (TIMELP = %02x, TIMENB = %02x)\n",
|
if (TRACE_DETAIL) logerror("interrupt flags (DSCH = %02x, DSCENB = %02x), (RBRL = %02x, RIENB = %02x), (XBRE = %02x, XBIENB = %02x), (TIMELP = %02x, TIMENB = %02x)\n",
|
||||||
m_DSCH, m_DSCENB, m_RBRL, m_RIENB, m_XBRE, m_XBIENB, m_TIMELP, m_TIMENB);
|
m_DSCH, m_DSCENB, m_RBRL, m_RIENB, m_XBRE, m_XBIENB, m_TIMELP, m_TIMENB);
|
||||||
|
|
||||||
if (new_int != m_INT)
|
if (new_int != m_INT)
|
||||||
{
|
{
|
||||||
// Only consider edges
|
// Only consider edges
|
||||||
m_INT = new_int;
|
m_INT = new_int;
|
||||||
if (VERBOSE>3) LOG("TMS9902: /INT = %s\n", (m_INT)? "asserted" : "cleared");
|
if (TRACE_LINES) logerror("/INT = %s\n", (m_INT)? "asserted" : "cleared");
|
||||||
m_int_cb(m_INT? ASSERT_LINE : CLEAR_LINE);
|
m_int_cb(m_INT? ASSERT_LINE : CLEAR_LINE);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -101,7 +105,7 @@ void tms9902_device::rcv_cts(line_state state)
|
|||||||
// CTSin is an internal register of the TMS9902 with positive logic
|
// CTSin is an internal register of the TMS9902 with positive logic
|
||||||
m_CTSin = (state==ASSERT_LINE);
|
m_CTSin = (state==ASSERT_LINE);
|
||||||
|
|
||||||
if (VERBOSE>3) LOG("TMS9902: CTS* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
|
if (TRACE_LINES) logerror("CTS* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
|
||||||
|
|
||||||
if (m_CTSin != previous)
|
if (m_CTSin != previous)
|
||||||
{
|
{
|
||||||
@ -131,7 +135,7 @@ void tms9902_device::rcv_cts(line_state state)
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
m_DSCH = false;
|
m_DSCH = false;
|
||||||
if (VERBOSE>4) LOG("TMS9902: no change in CTS line, no interrupt.");
|
if (TRACE_LINES) logerror("no change in CTS line, no interrupt.");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -150,7 +154,7 @@ void tms9902_device::set_clock(bool state)
|
|||||||
void tms9902_device::rcv_dsr(line_state state)
|
void tms9902_device::rcv_dsr(line_state state)
|
||||||
{
|
{
|
||||||
bool previous = m_DSRin;
|
bool previous = m_DSRin;
|
||||||
if (VERBOSE>3) LOG("TMS9902: DSR* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
|
if (TRACE_LINES) logerror("DSR* = %s\n", (state==ASSERT_LINE)? "asserted" : "cleared");
|
||||||
m_DSRin = (state==ASSERT_LINE);
|
m_DSRin = (state==ASSERT_LINE);
|
||||||
|
|
||||||
if (m_DSRin != previous)
|
if (m_DSRin != previous)
|
||||||
@ -161,7 +165,7 @@ void tms9902_device::rcv_dsr(line_state state)
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
m_DSCH = false;
|
m_DSCH = false;
|
||||||
if (VERBOSE>4) LOG("TMS9902: no change in DSR line, no interrupt.");
|
if (TRACE_LINES) logerror("no change in DSR line, no interrupt.");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -184,14 +188,14 @@ void tms9902_device::rcv_data(UINT8 data)
|
|||||||
// Receive buffer was empty
|
// Receive buffer was empty
|
||||||
m_RBRL = true;
|
m_RBRL = true;
|
||||||
m_ROVER = false;
|
m_ROVER = false;
|
||||||
if (VERBOSE>3) LOG("TMS9902: Receive buffer loaded with byte %02x\n", data);
|
if (TRACE_BUFFER) logerror("Receive buffer loaded with byte %02x\n", data);
|
||||||
field_interrupts();
|
field_interrupts();
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// Receive buffer was full
|
// Receive buffer was full
|
||||||
m_ROVER = true;
|
m_ROVER = true;
|
||||||
if (VERBOSE>1) LOG("TMS9902: Receive buffer still loaded; overflow error\n");
|
if (TRACE_ERROR) logerror("Receive buffer still loaded; overflow error\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -205,7 +209,7 @@ void tms9902_device::rcv_data(UINT8 data)
|
|||||||
*/
|
*/
|
||||||
void tms9902_device::rcv_framing_error()
|
void tms9902_device::rcv_framing_error()
|
||||||
{
|
{
|
||||||
if (VERBOSE>2) LOG("TMS9902: Detected framing error\n");
|
if (TRACE_ERROR) logerror("Detected framing error\n");
|
||||||
m_RFER = true;
|
m_RFER = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -217,7 +221,7 @@ void tms9902_device::rcv_framing_error()
|
|||||||
*/
|
*/
|
||||||
void tms9902_device::rcv_parity_error()
|
void tms9902_device::rcv_parity_error()
|
||||||
{
|
{
|
||||||
if (VERBOSE>2) LOG("TMS9902: Detected parity error\n");
|
if (TRACE_ERROR) logerror("Detected parity error\n");
|
||||||
m_RPER = true;
|
m_RPER = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -229,7 +233,7 @@ void tms9902_device::rcv_parity_error()
|
|||||||
*/
|
*/
|
||||||
void tms9902_device::rcv_break(bool value)
|
void tms9902_device::rcv_break(bool value)
|
||||||
{
|
{
|
||||||
if (VERBOSE>2) LOG("TMS9902: Receive BREAK=%d (no effect)\n", value? 1:0);
|
if (TRACE_ERROR) logerror("Receive BREAK=%d (no effect)\n", value? 1:0);
|
||||||
}
|
}
|
||||||
|
|
||||||
//------------------------------------------------
|
//------------------------------------------------
|
||||||
@ -292,7 +296,7 @@ void tms9902_device::send_break(bool state)
|
|||||||
if (state != m_BRKout)
|
if (state != m_BRKout)
|
||||||
{
|
{
|
||||||
m_BRKout = state;
|
m_BRKout = state;
|
||||||
if (VERBOSE>2) LOG("TMS9902: Sending BREAK=%d\n", state? 1:0);
|
if (TRACE_LINES) logerror("Sending BREAK=%d\n", state? 1:0);
|
||||||
|
|
||||||
// Signal BRK (on/off) to the remote site
|
// Signal BRK (on/off) to the remote site
|
||||||
m_ctrl_cb((offs_t)(EXCEPT | BRK), state? 1:0);
|
m_ctrl_cb((offs_t)(EXCEPT | BRK), state? 1:0);
|
||||||
@ -324,7 +328,7 @@ double tms9902_device::get_baudpoll()
|
|||||||
void tms9902_device::set_receive_data_rate()
|
void tms9902_device::set_receive_data_rate()
|
||||||
{
|
{
|
||||||
int value = (m_CLK4M? 0x800 : 0) | (m_RDV8? 0x400 : 0) | m_RDR;
|
int value = (m_CLK4M? 0x800 : 0) | (m_RDV8? 0x400 : 0) | m_RDR;
|
||||||
if (VERBOSE>3) LOG("TMS9902: receive rate = %04x\n", value);
|
if (TRACE_SETTING) logerror("receive rate = %04x\n", value);
|
||||||
|
|
||||||
// Calculate the ratio between receive baud rate and polling frequency
|
// Calculate the ratio between receive baud rate and polling frequency
|
||||||
double fint = m_clock_rate / ((m_CLK4M) ? 4.0 : 3.0);
|
double fint = m_clock_rate / ((m_CLK4M) ? 4.0 : 3.0);
|
||||||
@ -335,7 +339,7 @@ void tms9902_device::set_receive_data_rate()
|
|||||||
// Thus the callback function should add up this value on each poll
|
// Thus the callback function should add up this value on each poll
|
||||||
// and deliver a data input not before it sums up to 1.
|
// and deliver a data input not before it sums up to 1.
|
||||||
m_baudpoll = (double)(baud / (10*POLLING_FREQ));
|
m_baudpoll = (double)(baud / (10*POLLING_FREQ));
|
||||||
if (VERBOSE>3) LOG ("TMS9902: baudpoll = %f\n", m_baudpoll);
|
if (TRACE_SETTING) logerror ("baudpoll = %f\n", m_baudpoll);
|
||||||
|
|
||||||
m_last_config_value = value;
|
m_last_config_value = value;
|
||||||
m_ctrl_cb((offs_t)CONFIG, RATERECV);
|
m_ctrl_cb((offs_t)CONFIG, RATERECV);
|
||||||
@ -348,7 +352,7 @@ void tms9902_device::set_receive_data_rate()
|
|||||||
void tms9902_device::set_transmit_data_rate()
|
void tms9902_device::set_transmit_data_rate()
|
||||||
{
|
{
|
||||||
int value = (m_CLK4M? 0x800 : 0) | (m_XDV8? 0x400 : 0) | m_XDR;
|
int value = (m_CLK4M? 0x800 : 0) | (m_XDV8? 0x400 : 0) | m_XDR;
|
||||||
if (VERBOSE>3) LOG("TMS9902: set transmit rate = %04x\n", value);
|
if (TRACE_SETTING) logerror("set transmit rate = %04x\n", value);
|
||||||
m_last_config_value = value;
|
m_last_config_value = value;
|
||||||
m_ctrl_cb((offs_t)CONFIG, RATEXMIT);
|
m_ctrl_cb((offs_t)CONFIG, RATEXMIT);
|
||||||
}
|
}
|
||||||
@ -356,7 +360,7 @@ void tms9902_device::set_transmit_data_rate()
|
|||||||
void tms9902_device::set_stop_bits()
|
void tms9902_device::set_stop_bits()
|
||||||
{
|
{
|
||||||
int value = m_STOPB;
|
int value = m_STOPB;
|
||||||
if (VERBOSE>3) LOG("TMS9902: set stop bits = %02x\n", value);
|
if (TRACE_SETTING) logerror("set stop bits = %02x\n", value);
|
||||||
m_last_config_value = value;
|
m_last_config_value = value;
|
||||||
m_ctrl_cb((offs_t)CONFIG, STOPBITS);
|
m_ctrl_cb((offs_t)CONFIG, STOPBITS);
|
||||||
}
|
}
|
||||||
@ -364,7 +368,7 @@ void tms9902_device::set_stop_bits()
|
|||||||
void tms9902_device::set_data_bits()
|
void tms9902_device::set_data_bits()
|
||||||
{
|
{
|
||||||
int value = m_RCL;
|
int value = m_RCL;
|
||||||
if (VERBOSE>3) LOG("TMS9902: set data bits = %02x\n", value);
|
if (TRACE_SETTING) logerror("set data bits = %02x\n", value);
|
||||||
m_last_config_value = value;
|
m_last_config_value = value;
|
||||||
m_ctrl_cb((offs_t)CONFIG, DATABITS);
|
m_ctrl_cb((offs_t)CONFIG, DATABITS);
|
||||||
}
|
}
|
||||||
@ -372,7 +376,7 @@ void tms9902_device::set_data_bits()
|
|||||||
void tms9902_device::set_parity()
|
void tms9902_device::set_parity()
|
||||||
{
|
{
|
||||||
int value = (m_PENB? 2:0) | (m_ODDP? 1:0);
|
int value = (m_PENB? 2:0) | (m_ODDP? 1:0);
|
||||||
if (VERBOSE>3) LOG("TMS9902: set parity = %02x\n", value);
|
if (TRACE_SETTING) logerror("set parity = %02x\n", value);
|
||||||
m_last_config_value = value;
|
m_last_config_value = value;
|
||||||
m_ctrl_cb((offs_t)CONFIG, PARITY);
|
m_ctrl_cb((offs_t)CONFIG, PARITY);
|
||||||
}
|
}
|
||||||
@ -381,7 +385,7 @@ void tms9902_device::transmit_line_state()
|
|||||||
{
|
{
|
||||||
// 00ab cdef = setting line RTS=a, CTS=b, DSR=c, DCD=d, DTR=e, RI=f
|
// 00ab cdef = setting line RTS=a, CTS=b, DSR=c, DCD=d, DTR=e, RI=f
|
||||||
// The 9902 only outputs RTS and BRK
|
// The 9902 only outputs RTS and BRK
|
||||||
if (VERBOSE>3) LOG("TMS9902: transmitting line state (only RTS) = %02x\n", (m_RTSout)? 1:0);
|
if (TRACE_SETTING) logerror("transmitting line state (only RTS) = %02x\n", (m_RTSout)? 1:0);
|
||||||
m_last_config_value = (m_RTSout)? RTS : 0;
|
m_last_config_value = (m_RTSout)? RTS : 0;
|
||||||
m_ctrl_cb((offs_t)LINES, RTS);
|
m_ctrl_cb((offs_t)LINES, RTS);
|
||||||
}
|
}
|
||||||
@ -393,7 +397,7 @@ void tms9902_device::set_rts(line_state state)
|
|||||||
if (lstate != m_RTSout)
|
if (lstate != m_RTSout)
|
||||||
{
|
{
|
||||||
// Signal RTS to the modem
|
// Signal RTS to the modem
|
||||||
if (VERBOSE>3) LOG("TMS9902: Set RTS=%d\n", lstate? 1:0);
|
if (TRACE_SETTING) logerror("Set RTS=%d\n", lstate? 1:0);
|
||||||
m_RTSout = lstate;
|
m_RTSout = lstate;
|
||||||
transmit_line_state();
|
transmit_line_state();
|
||||||
}
|
}
|
||||||
@ -418,14 +422,14 @@ void tms9902_device::initiate_transmit()
|
|||||||
set_rts(CLEAR_LINE);
|
set_rts(CLEAR_LINE);
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if (VERBOSE>5) LOG("TMS9902: transferring XBR to XSR; XSRE=false, XBRE=true\n");
|
if (TRACE_BUFFER) logerror("transferring XBR to XSR; XSRE=false, XBRE=true\n");
|
||||||
m_XSR = m_XBR;
|
m_XSR = m_XBR;
|
||||||
m_XSRE = false;
|
m_XSRE = false;
|
||||||
m_XBRE = true;
|
m_XBRE = true;
|
||||||
|
|
||||||
field_interrupts();
|
field_interrupts();
|
||||||
|
|
||||||
if (VERBOSE>4) LOG("TMS9902: transmit XSR=%02x, RCL=%02x\n", m_XSR, m_RCL);
|
if (TRACE_BUFFER) logerror("transmit XSR=%02x, RCL=%02x\n", m_XSR, m_RCL);
|
||||||
|
|
||||||
m_xmit_cb((offs_t)0, m_XSR & (0xff >> (3-m_RCL)));
|
m_xmit_cb((offs_t)0, m_XSR & (0xff >> (3-m_RCL)));
|
||||||
|
|
||||||
@ -501,7 +505,7 @@ READ8_MEMBER( tms9902_device::cruread )
|
|||||||
answer = m_RBR;
|
answer = m_RBR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (VERBOSE>7) LOG("TMS9902: Reading flag bits %d - %d = %02x\n", ((offset+1)*8-1), offset*8, answer);
|
if (TRACE_CRU) logerror("Reading flag bits %d - %d = %02x\n", ((offset+1)*8-1), offset*8, answer);
|
||||||
return answer;
|
return answer;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -523,7 +527,7 @@ static inline void set_bits16(UINT16 *reg, UINT16 bits, bool set)
|
|||||||
|
|
||||||
void tms9902_device::reset_uart()
|
void tms9902_device::reset_uart()
|
||||||
{
|
{
|
||||||
if (VERBOSE>1) LOG("TMS9902: resetting\n");
|
logerror("resetting UART\n");
|
||||||
|
|
||||||
/* disable all interrupts */
|
/* disable all interrupts */
|
||||||
m_DSCENB = false; // Data Set Change Interrupt Enable
|
m_DSCENB = false; // Data Set Change Interrupt Enable
|
||||||
@ -556,7 +560,6 @@ void tms9902_device::reset_uart()
|
|||||||
|
|
||||||
m_DSCH = false;
|
m_DSCH = false;
|
||||||
m_TIMELP = false;
|
m_TIMELP = false;
|
||||||
m_INT = false;
|
|
||||||
m_CTSin = false;
|
m_CTSin = false;
|
||||||
|
|
||||||
m_TMR = 0;
|
m_TMR = 0;
|
||||||
@ -568,7 +571,9 @@ void tms9902_device::reset_uart()
|
|||||||
m_XBR = 0;
|
m_XBR = 0;
|
||||||
m_XSR = 0;
|
m_XSR = 0;
|
||||||
|
|
||||||
// m_INT will be cleared in field_interrupts
|
// m_INT will be cleared in field_interrupts; setting to true is required
|
||||||
|
// to trigger the INT line update
|
||||||
|
m_INT = true;
|
||||||
field_interrupts();
|
field_interrupts();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -580,7 +585,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
|
|||||||
data &= 1; /* clear extra bits */
|
data &= 1; /* clear extra bits */
|
||||||
|
|
||||||
offset &= 0x1F;
|
offset &= 0x1F;
|
||||||
if (VERBOSE>5) LOG("TMS9902: Setting bit %d = %02x\n", offset, data);
|
if (TRACE_CRU) logerror("Setting bit %d = %02x\n", offset, data);
|
||||||
|
|
||||||
if (offset <= 10)
|
if (offset <= 10)
|
||||||
{
|
{
|
||||||
@ -624,7 +629,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
|
|||||||
set_stop_bits();
|
set_stop_bits();
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
if (VERBOSE>1) LOG("tms9902: Invalid control register address %d\n", offset);
|
logerror("tms9902: Invalid control register address %d\n", offset);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if (m_LDIR)
|
else if (m_LDIR)
|
||||||
@ -744,7 +749,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
|
|||||||
}
|
}
|
||||||
return;
|
return;
|
||||||
case 17:
|
case 17:
|
||||||
if (VERBOSE>3) LOG("TMS9902: set BRKON=%d; BRK=%d\n", data, m_BRKout? 1:0);
|
if (TRACE_CRU) logerror("set BRKON=%d; BRK=%d\n", data, m_BRKout? 1:0);
|
||||||
m_BRKON = (data!=0);
|
m_BRKON = (data!=0);
|
||||||
if (m_BRKout && data==0)
|
if (m_BRKout && data==0)
|
||||||
{
|
{
|
||||||
@ -772,13 +777,13 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
|
|||||||
// (the only way to clear the flag!)
|
// (the only way to clear the flag!)
|
||||||
m_RIENB = (data!=0);
|
m_RIENB = (data!=0);
|
||||||
m_RBRL = false;
|
m_RBRL = false;
|
||||||
if (VERBOSE>4) LOG("TMS9902: set RBRL=0, set RIENB=%d\n", data);
|
if (TRACE_CRU) logerror("set RBRL=0, set RIENB=%d\n", data);
|
||||||
field_interrupts();
|
field_interrupts();
|
||||||
return;
|
return;
|
||||||
case 19:
|
case 19:
|
||||||
/* Transmit Buffer Interrupt Enable */
|
/* Transmit Buffer Interrupt Enable */
|
||||||
m_XBIENB = (data!=0);
|
m_XBIENB = (data!=0);
|
||||||
if (VERBOSE>4) LOG("TMS9902: set XBIENB=%d\n", data);
|
if (TRACE_CRU) logerror("set XBIENB=%d\n", data);
|
||||||
field_interrupts();
|
field_interrupts();
|
||||||
return;
|
return;
|
||||||
case 20:
|
case 20:
|
||||||
@ -792,7 +797,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
|
|||||||
/* Data Set Change Interrupt Enable */
|
/* Data Set Change Interrupt Enable */
|
||||||
m_DSCENB = (data!=0);
|
m_DSCENB = (data!=0);
|
||||||
m_DSCH = false;
|
m_DSCH = false;
|
||||||
if (VERBOSE>4) LOG("TMS9902: set DSCH=0, set DSCENB=%d\n", data);
|
if (TRACE_CRU) logerror("set DSCH=0, set DSCENB=%d\n", data);
|
||||||
field_interrupts();
|
field_interrupts();
|
||||||
return;
|
return;
|
||||||
case 31:
|
case 31:
|
||||||
@ -800,7 +805,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
|
|||||||
reset_uart();
|
reset_uart();
|
||||||
return;
|
return;
|
||||||
default:
|
default:
|
||||||
if (VERBOSE>1) LOG("TMS9902: Writing to undefined flag bit position %d = %01x\n", offset, data);
|
logerror("Writing to undefined flag bit position %d = %01x\n", offset, data);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user