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i386: display cr0 and x87 status registers as before plus more usages for the crx bits constants

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This commit is contained in:
yz70s 2024-01-17 18:21:37 +01:00
parent da1f02ad18
commit 1a0c00d16d
8 changed files with 30 additions and 86 deletions
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72
src/devices/cpu/i386/i386.cpp
View File

@ -203,7 +203,7 @@ bool i386_device::i386_translate_address(int intention, bool debug, offs_t *addr
bool user = (intention & TR_USER) ? true : false; bool user = (intention & TR_USER) ? true : false;
bool write = (intention & TR_WRITE) ? true : false; bool write = (intention & TR_WRITE) ? true : false;
if (!(m_cr[0] & 0x80000000)) if (!(m_cr[0] & CR0_PG))
{ {
if (entry) if (entry)
*entry = 0x77; *entry = 0x77;
@ -213,7 +213,7 @@ bool i386_device::i386_translate_address(int intention, bool debug, offs_t *addr
uint32_t page_dir = m_program->read_dword(pdbr + directory * 4); uint32_t page_dir = m_program->read_dword(pdbr + directory * 4);
if (page_dir & 1) if (page_dir & 1)
{ {
if ((page_dir & 0x80) && (m_cr[4] & 0x10)) if ((page_dir & 0x80) && (m_cr[4] & CR4_PSE))
{ {
a = (page_dir & 0xffc00000) | (a & 0x003fffff); a = (page_dir & 0xffc00000) | (a & 0x003fffff);
if (debug) if (debug)
@ -283,7 +283,7 @@ bool i386_device::i386_translate_address(int intention, bool debug, offs_t *addr
bool i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t *error) bool i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t *error)
{ {
if (!(m_cr[0] & 0x80000000)) // Some (very few) old OS's won't work with this if (!(m_cr[0] & CR0_PG)) // Some (very few) old OS's won't work with this
return true; return true;
const vtlb_entry *table = vtlb_table(); const vtlb_entry *table = vtlb_table();
@ -2114,7 +2114,7 @@ void i386_device::register_state_i386()
state_add( I386_GS_BASE, "GSBASE", m_sreg[GS].base).formatstr("%08X"); state_add( I386_GS_BASE, "GSBASE", m_sreg[GS].base).formatstr("%08X");
state_add( I386_GS_LIMIT, "GSLIMIT", m_sreg[GS].limit).formatstr("%08X"); state_add( I386_GS_LIMIT, "GSLIMIT", m_sreg[GS].limit).formatstr("%08X");
state_add( I386_GS_FLAGS, "GSFLAGS", m_sreg[GS].flags).mask(0xf0ff).formatstr("%04X"); state_add( I386_GS_FLAGS, "GSFLAGS", m_sreg[GS].flags).mask(0xf0ff).formatstr("%04X");
state_add( I386_CR0, "CR0", m_debugger_temp).formatstr("%32s"); state_add( I386_CR0, "CR0", m_cr[0]).formatstr("%08X");
state_add( I386_CR1, "CR1", m_cr[1]).formatstr("%08X"); state_add( I386_CR1, "CR1", m_cr[1]).formatstr("%08X");
state_add( I386_CR2, "CR2", m_cr[2]).formatstr("%08X"); state_add( I386_CR2, "CR2", m_cr[2]).formatstr("%08X");
state_add( I386_CR3, "CR3", m_cr[3]).formatstr("%08X"); state_add( I386_CR3, "CR3", m_cr[3]).formatstr("%08X");
@ -2152,9 +2152,9 @@ void i386_device::register_state_i386_x87()
{ {
register_state_i386(); register_state_i386();
state_add( X87_CTRL, "x87_CW", m_debugger_temp).formatstr("%32s"); state_add(X87_CTRL, "x87_CW", m_x87_cw).formatstr("%04X");
state_add( X87_STATUS, "x87_SW", m_debugger_temp).formatstr("%32s"); state_add(X87_STATUS,"x87_SW", m_x87_sw).formatstr("%04X");
state_add( X87_TAG, "x87_TAG", m_debugger_temp).formatstr("%32s"); state_add(X87_TAG, "x87_TAG", m_x87_tw).formatstr("%04X");
state_add( X87_ST0, "ST0", m_debugger_temp ).callexport().formatstr("%15s"); state_add( X87_ST0, "ST0", m_debugger_temp ).callexport().formatstr("%15s");
state_add( X87_ST1, "ST1", m_debugger_temp ).callexport().formatstr("%15s"); state_add( X87_ST1, "ST1", m_debugger_temp ).callexport().formatstr("%15s");
state_add( X87_ST2, "ST2", m_debugger_temp ).callexport().formatstr("%15s"); state_add( X87_ST2, "ST2", m_debugger_temp ).callexport().formatstr("%15s");
@ -2248,8 +2248,6 @@ void i386_device::state_export(const device_state_entry &entry)
void i386_device::state_string_export(const device_state_entry &entry, std::string &str) const void i386_device::state_string_export(const device_state_entry &entry, std::string &str) const
{ {
static const char tf[] = { 'V', '0', 'S', 'E' };
switch (entry.index()) switch (entry.index())
{ {
case STATE_GENFLAGS: case STATE_GENFLAGS:
@ -2268,60 +2266,6 @@ void i386_device::state_string_export(const device_state_entry &entry, std::stri
m_PF ? " P" : " p", m_PF ? " P" : " p",
m_CF ? " C" : " c"); m_CF ? " C" : " c");
break; break;
case I386_CR0:
str = string_format("%08X %s%s%s%s%s%s%s%s",
m_cr[0],
m_cr[0] & CR0_PG ? "PG" : "pg",
m_cr[0] & CR0_WP ? " WP" : " wp",
m_cr[0] & CR0_NE ? " NE" : " ne",
m_cr[0] & CR0_ET ? " ET" : " et",
m_cr[0] & CR0_TS ? " TS" : " ts",
m_cr[0] & CR0_EM ? " EM" : " em",
m_cr[0] & CR0_MP ? " MP" : " mp",
m_cr[0] & CR0_PE ? " PE" : " pe");
break;
case X87_CTRL:
str = string_format("%04X %d %d %s%s%s%s%s%s",
m_x87_cw,
(m_x87_cw >> X87_CW_RC_SHIFT) & X87_CW_PC_MASK,
(m_x87_cw >> X87_CW_PC_SHIFT) & X87_CW_RC_MASK,
m_x87_cw & X87_CW_PM ? "P" : "p",
m_x87_cw & X87_CW_UM ? " U" : " u",
m_x87_cw & X87_CW_OM ? " O" : " o",
m_x87_cw & X87_CW_ZM ? " Z" : " z",
m_x87_cw & X87_CW_DM ? " D" : " d",
m_x87_cw & X87_CW_IM ? " I" : " i");
break;
case X87_STATUS:
str = string_format("%04X %s %d %s%s%s%s%s%s%s%s",
m_x87_sw,
m_x87_sw & X87_SW_BUSY ? "B" : "b",
(m_x87_sw >> X87_SW_TOP_SHIFT) & X87_SW_TOP_MASK,
m_x87_sw &X87_SW_C3 ? "1" : "0",
m_x87_sw &X87_SW_C2 ? "1" : "0",
m_x87_sw &X87_SW_C1 ? "1" : "0",
m_x87_sw &X87_SW_C0 ? "1" : "0",
m_x87_sw & X87_SW_ES ? " E" : " e",
m_x87_sw & X87_SW_SF ? " S" : " s",
m_x87_sw & X87_SW_PE ? " P" : " p",
m_x87_sw & X87_SW_UE ? " U" : " u",
m_x87_sw & X87_SW_OE ? " O" : " o",
m_x87_sw & X87_SW_ZE ? " Z" : " z",
m_x87_sw & X87_SW_DE ? " D" : " d",
m_x87_sw & X87_SW_IE ? " I" : " i");
break;
case X87_TAG:
str = string_format("%04X %c %c %c %c %c %c %c %c",
m_x87_tw,
tf[(m_x87_tw >> 0) & 3],
tf[(m_x87_tw >> 2) & 3],
tf[(m_x87_tw >> 4) & 3],
tf[(m_x87_tw >> 6) & 3],
tf[(m_x87_tw >> 8) & 3],
tf[(m_x87_tw >> 10) & 3],
tf[(m_x87_tw >> 12) & 3],
tf[(m_x87_tw >> 14) & 3]);
break;
case X87_ST0: case X87_ST0:
str = string_format("%f", fx80_to_double(ST(0))); str = string_format("%f", fx80_to_double(ST(0)));
break; break;
@ -2856,7 +2800,7 @@ void i386_device::execute_run()
{ {
uint32_t phys_addr = 0; uint32_t phys_addr = 0;
uint32_t error; uint32_t error;
phys_addr = (m_cr[0] & (1 << 31)) ? translate_address(m_CPL, TR_FETCH, &m_dr[i], &error) : m_dr[i]; phys_addr = (m_cr[0] & CR0_PG) ? translate_address(m_CPL, TR_FETCH, &m_dr[i], &error) : m_dr[i];
if(breakpoint_length != 0) // Not one byte in length? logerror it, I have no idea how this works on real processors. if(breakpoint_length != 0) // Not one byte in length? logerror it, I have no idea how this works on real processors.
{ {
LOGMASKED(LOG_INVALID_OPCODE, "i386: Breakpoint length not 1 byte on an instruction breakpoint\n"); LOGMASKED(LOG_INVALID_OPCODE, "i386: Breakpoint length not 1 byte on an instruction breakpoint\n");

2
src/devices/cpu/i386/i386.h
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@ -237,7 +237,7 @@ protected:
CR0_ET = 1 << 4, // Extension type CR0_ET = 1 << 4, // Extension type
CR0_TS = 1 << 3, // Task switched CR0_TS = 1 << 3, // Task switched
CR0_EM = 1 << 2, // Emulation CR0_EM = 1 << 2, // Emulation
CR0_MP = 1 << 1, // Monitor copreocessor CR0_MP = 1 << 1, // Monitor coprocessor
CR0_PE = 1 << 0, // Protection enabled CR0_PE = 1 << 0, // Protection enabled
}; };

2
src/devices/cpu/i386/i386ops.hxx
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@ -2493,7 +2493,7 @@ void i386_device::i386_clts() // Opcode 0x0f 0x06
// Privileged instruction, CPL must be zero. Can be used in real or v86 mode. // Privileged instruction, CPL must be zero. Can be used in real or v86 mode.
if(PROTECTED_MODE && m_CPL != 0) if(PROTECTED_MODE && m_CPL != 0)
FAULT(FAULT_GP,0) FAULT(FAULT_GP,0)
m_cr[0] &= ~0x08; /* clear TS bit */ m_cr[0] &= ~CR0_TS; /* clear TS bit */
CYCLES(CYCLES_CLTS); CYCLES(CYCLES_CLTS);
} }

4
src/devices/cpu/i386/i386priv.h
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@ -297,11 +297,11 @@ extern int i386_parity_table[256];
#define FAULT_THROW(fault,error) { throw (uint64_t)(fault | (uint64_t)error << 32); } #define FAULT_THROW(fault,error) { throw (uint64_t)(fault | (uint64_t)error << 32); }
#define PF_THROW(error) { m_cr[2] = address; FAULT_THROW(FAULT_PF,error); } #define PF_THROW(error) { m_cr[2] = address; FAULT_THROW(FAULT_PF,error); }
#define PROTECTED_MODE (m_cr[0] & 0x1) #define PROTECTED_MODE (m_cr[0] & CR0_PE)
#define STACK_32BIT (m_sreg[SS].d) #define STACK_32BIT (m_sreg[SS].d)
#define V8086_MODE (m_VM) #define V8086_MODE (m_VM)
#define NESTED_TASK (m_NT) #define NESTED_TASK (m_NT)
#define WP (m_cr[0] & 0x10000) #define WP (m_cr[0] & CR0_WP)
#define SetOF_Add32(r,s,d) (m_OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x80000000) ? 1: 0) #define SetOF_Add32(r,s,d) (m_OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x80000000) ? 1: 0)
#define SetOF_Add16(r,s,d) (m_OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x8000) ? 1 : 0) #define SetOF_Add16(r,s,d) (m_OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x8000) ? 1 : 0)

4
src/devices/cpu/i386/i386segs.hxx
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@ -859,7 +859,7 @@ void i386_device::i286_task_switch(uint16_t selector, uint8_t nested)
m_task.flags = seg.flags; m_task.flags = seg.flags;
/* Set TS bit in CR0 */ /* Set TS bit in CR0 */
m_cr[0] |= 0x08; m_cr[0] |= CR0_TS;
/* Load incoming task state from the new task's TSS */ /* Load incoming task state from the new task's TSS */
tss = m_task.base; tss = m_task.base;
@ -972,7 +972,7 @@ void i386_device::i386_task_switch(uint16_t selector, uint8_t nested)
m_task.flags = seg.flags; m_task.flags = seg.flags;
/* Set TS bit in CR0 */ /* Set TS bit in CR0 */
m_cr[0] |= 0x08; m_cr[0] |= CR0_TS;
/* Load incoming task state from the new task's TSS */ /* Load incoming task state from the new task's TSS */
tss = m_task.base; tss = m_task.base;

2
src/devices/cpu/i386/i486ops.hxx
View File

@ -516,7 +516,7 @@ void i386_device::i486_mov_cr_r32() // Opcode 0x0f 22
{ {
case 0: case 0:
CYCLES(CYCLES_MOV_REG_CR0); CYCLES(CYCLES_MOV_REG_CR0);
if((oldcr ^ m_cr[cr]) & 0x80010000) if((oldcr ^ m_cr[cr]) & (CR0_PG | CR0_WP))
vtlb_flush_dynamic(); vtlb_flush_dynamic();
if (PROTECTED_MODE != BIT(data, 0)) if (PROTECTED_MODE != BIT(data, 0))
debugger_privilege_hook(); debugger_privilege_hook();

4
src/devices/cpu/i386/pentops.hxx
View File

@ -7,7 +7,7 @@ extern flag float64_is_nan( float64 a ); // since its not defined in softfloat.h
void i386_device::MMXPROLOG() void i386_device::MMXPROLOG()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -1912,7 +1912,7 @@ void i386_device::mmx_paddd_r64_rm64() // Opcode 0f fe
void i386_device::mmx_emms() // Opcode 0f 77 void i386_device::mmx_emms() // Opcode 0f 77
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;

26
src/devices/cpu/i386/x87ops.hxx
View File

@ -143,7 +143,7 @@ int i386_device::x87_ck_over_stack()
int i386_device::x87_mf_fault() int i386_device::x87_mf_fault()
{ {
if ((m_x87_sw & X87_SW_ES) && (m_cr[0] & 0x20)) // FIXME: 486 and up only if ((m_x87_sw & X87_SW_ES) && (m_cr[0] & CR0_NE)) // FIXME: 486 and up only
{ {
m_ext = 1; m_ext = 1;
i386_trap(FAULT_MF, 0, 0); i386_trap(FAULT_MF, 0, 0);
@ -4809,7 +4809,7 @@ void i386_device::x87_fldenv(uint8_t modrm)
x87_check_exceptions(); x87_check_exceptions();
CYCLES((m_cr[0] & 1) ? 34 : 44); CYCLES((m_cr[0] & CR0_PE) ? 34 : 44);
} }
void i386_device::x87_fstenv(uint8_t modrm) void i386_device::x87_fstenv(uint8_t modrm)
@ -4857,7 +4857,7 @@ void i386_device::x87_fstenv(uint8_t modrm)
} }
m_x87_cw |= 0x3f; // set all masks m_x87_cw |= 0x3f; // set all masks
CYCLES((m_cr[0] & 1) ? 56 : 67); CYCLES((m_cr[0] & CR0_PE) ? 56 : 67);
} }
void i386_device::x87_fsave(uint8_t modrm) void i386_device::x87_fsave(uint8_t modrm)
@ -4912,7 +4912,7 @@ void i386_device::x87_fsave(uint8_t modrm)
WRITE80(ea + i*10, ST(i)); WRITE80(ea + i*10, ST(i));
x87_reset(); x87_reset();
CYCLES((m_cr[0] & 1) ? 56 : 67); CYCLES((m_cr[0] & CR0_PE) ? 56 : 67);
} }
void i386_device::x87_frstor(uint8_t modrm) void i386_device::x87_frstor(uint8_t modrm)
@ -4978,7 +4978,7 @@ void i386_device::x87_frstor(uint8_t modrm)
for (int i = 0; i < 8; ++i) for (int i = 0; i < 8; ++i)
x87_write_stack(i, READ80(ea + i*10), false); x87_write_stack(i, READ80(ea + i*10), false);
CYCLES((m_cr[0] & 1) ? 34 : 44); CYCLES((m_cr[0] & CR0_PE) ? 34 : 44);
} }
void i386_device::x87_fxch(uint8_t modrm) void i386_device::x87_fxch(uint8_t modrm)
@ -5070,7 +5070,7 @@ void i386_device::x87_invalid(uint8_t modrm)
void i386_device::i386_x87_group_d8() void i386_device::i386_x87_group_d8()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -5081,7 +5081,7 @@ void i386_device::i386_x87_group_d8()
void i386_device::i386_x87_group_d9() void i386_device::i386_x87_group_d9()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -5092,7 +5092,7 @@ void i386_device::i386_x87_group_d9()
void i386_device::i386_x87_group_da() void i386_device::i386_x87_group_da()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -5103,7 +5103,7 @@ void i386_device::i386_x87_group_da()
void i386_device::i386_x87_group_db() void i386_device::i386_x87_group_db()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -5114,7 +5114,7 @@ void i386_device::i386_x87_group_db()
void i386_device::i386_x87_group_dc() void i386_device::i386_x87_group_dc()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -5125,7 +5125,7 @@ void i386_device::i386_x87_group_dc()
void i386_device::i386_x87_group_dd() void i386_device::i386_x87_group_dd()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -5136,7 +5136,7 @@ void i386_device::i386_x87_group_dd()
void i386_device::i386_x87_group_de() void i386_device::i386_x87_group_de()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;
@ -5147,7 +5147,7 @@ void i386_device::i386_x87_group_de()
void i386_device::i386_x87_group_df() void i386_device::i386_x87_group_df()
{ {
if (m_cr[0] & 0xc) if (m_cr[0] & (CR0_TS | CR0_EM))
{ {
i386_trap(FAULT_NM, 0, 0); i386_trap(FAULT_NM, 0, 0);
return; return;