mirror of
https://github.com/holub/mame
synced 2025-04-20 23:42:22 +03:00
opus100pm: add opus 108pm isa bus card
This commit is contained in:
Patrick Mackinlay
parent
27f2febd81
commit
1a6147aeb9
@ -1753,6 +1753,8 @@ if (BUSES["ISA"]~=null) then
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MAME_DIR .. "src/devices/bus/isa/3xtwin.h",
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MAME_DIR .. "src/devices/bus/isa/lrk330.cpp",
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MAME_DIR .. "src/devices/bus/isa/lrk330.h",
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MAME_DIR .. "src/devices/bus/isa/opus100pm.cpp",
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MAME_DIR .. "src/devices/bus/isa/opus100pm.h",
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}
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end
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@ -158,6 +158,10 @@ public:
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{
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install_space(AS_ISA_MEM, start, end, rhandler, whandler);
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}
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template<typename T> void install_memory(offs_t addrstart, offs_t addrend, T &device, void (T:: *map)(class address_map &map), uint64_t unitmask = ~u64(0))
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{
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m_memspace->install_device(addrstart, addrend, device, map, unitmask);
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}
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void unmap_device(offs_t start, offs_t end) const { m_iospace->unmap_readwrite(start, end); }
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void unmap_bank(offs_t start, offs_t end);
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@ -85,6 +85,7 @@
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#include "chessmsr.h"
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#include "finalchs.h"
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#include "bblue2.h"
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#include "opus100pm.h"
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void pc_isa8_cards(device_slot_interface &device)
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@ -141,6 +142,7 @@ void pc_isa8_cards(device_slot_interface &device)
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device.option_add("babyblue2", ISA8_BABYBLUE2);
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device.option_add("acb2072", ACB2072);
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device.option_add("3xtwin", ISA8_3XTWIN);
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device.option_add("opus108pm", ISA8_OPUS108PM);
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}
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void pc_isa16_cards(device_slot_interface &device)
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@ -187,6 +189,7 @@ void pc_isa16_cards(device_slot_interface &device)
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device.option_add("babyblue2", ISA8_BABYBLUE2);
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device.option_add("acb2072", ACB2072);
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device.option_add("3xtwin", ISA8_3XTWIN);
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device.option_add("opus108pm", ISA8_OPUS108PM);
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// 16-bit
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device.option_add("ide", ISA16_IDE);
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device.option_add("ne2000", NE2000);
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352
src/devices/bus/isa/opus100pm.cpp
Normal file
352
src/devices/bus/isa/opus100pm.cpp
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@ -0,0 +1,352 @@
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// license:BSD-3-Clause
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// copyright-holders:Patrick Mackinlay
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/*
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* Opus 100PM (Personal Mainframe) UNIX processor subsystem
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*
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* Sources:
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* - http://bitsavers.org/pdf/opusSystems/32k/800-00237-000_Opus_100pm_User_Manual_1987.pdf
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*
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* TODO
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* - 32032-based 110PM
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*/
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/*
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* WIP
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* ---
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* Using IBM 5160 as host avoids boot problem with 5170 and issues with
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* shadowing in ct486.
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*
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* - opus ibm5160 -window -nomax -hard1 opus_c.chd -hard2 opus_d.chd -isa5 opus108pm
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*
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* System configuration and software installation from boot and kernel floppies
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* appears successful. Valid Systems hard disk images appear to expect a card
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* with different registers?
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*
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* Booting Opus5 from swap hangs with WAIT instruction at 0xf0087c, presume
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* requires an interrupt from PC which never arrives. Maybe clock device isn't
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* working properly?
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*/
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#include "emu.h"
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#include "opus100pm.h"
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#define LOG_GENERAL (1U << 0)
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#define LOG_STAT (1U << 1)
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#define LOG_REG (1U << 2)
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//#define VERBOSE (LOG_GENERAL|LOG_REG)
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#include "logmacro.h"
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DEFINE_DEVICE_TYPE(ISA8_OPUS108PM, isa8_opus108pm_device, "opus108pm", "Opus 108PM")
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// CPU bit definition here matches software, but differs from documentation
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enum card_stat_mask : u8
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{
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CARD_STAT_CPU = 0x01, // CPU type (0=32016, 1=32032)
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CARD_STAT_EIRQ = 0x04, // IRQ enabled
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CARD_STAT_OPT = 0x08, // option switch open
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CARD_STAT_DMA = 0x10, // DMA abort
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CARD_STAT_PAR = 0x20, // parity error
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CARD_STAT_IRQ = 0x40, // interrupt to host active
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CARD_STAT_INT = 0x80, // interrupt to card active
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};
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// the three low bits in the host status register probably correspond to
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// unemulated CTTL, /TSO and /CWAIT signals from the TCU
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enum host_stat_mask : u8
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{
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HOST_STAT_CTTL = 0x01, // CTTL (diagnostic only)
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HOST_STAT_TSO = 0x02, // TSO* (diagnostic only)
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HOST_STAT_CWT = 0x04, // CWT* (diagnostic only)
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HOST_STAT_RUN = 0x08, // RUN* (diagnostic only)
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HOST_STAT_DMA = 0x10, // DMA abort
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HOST_STAT_PAR = 0x20, // parity error
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HOST_STAT_IRQ = 0x40, // interrupt to host active
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HOST_STAT_INT = 0x80, // interrupt to card active
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};
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static INPUT_PORTS_START(opus108pm)
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PORT_START("BASE")
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PORT_DIPNAME(0xf0000, 0xa0000, "Base Address")
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PORT_DIPSETTING( 0x00000, "00000")
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PORT_DIPSETTING( 0x10000, "10000")
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PORT_DIPSETTING( 0x20000, "20000")
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PORT_DIPSETTING( 0x30000, "30000")
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PORT_DIPSETTING( 0x40000, "40000")
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PORT_DIPSETTING( 0x50000, "50000")
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PORT_DIPSETTING( 0x60000, "60000")
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PORT_DIPSETTING( 0x70000, "70000")
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PORT_DIPSETTING( 0x80000, "80000")
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PORT_DIPSETTING( 0x90000, "90000")
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PORT_DIPSETTING( 0xa0000, "A0000")
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PORT_DIPSETTING( 0xb0000, "B0000")
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PORT_DIPSETTING( 0xc0000, "C0000")
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PORT_DIPSETTING( 0xd0000, "D0000")
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PORT_DIPSETTING( 0xe0000, "E0000")
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PORT_DIPSETTING( 0xf0000, "F0000")
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PORT_START("IRQ")
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PORT_DIPNAME(0x0f, 0x07, "IRQ")
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PORT_DIPSETTING( 0x02, "IRQ 2")
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PORT_DIPSETTING( 0x03, "IRQ 3")
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PORT_DIPSETTING( 0x07, "IRQ 7")
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INPUT_PORTS_END
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isa8_opus108pm_device::isa8_opus108pm_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
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: device_t(mconfig, ISA8_OPUS108PM, tag, owner, clock)
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, device_isa8_card_interface(mconfig, *this)
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, m_cpu(*this, "cpu")
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, m_fpu(*this, "fpu")
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, m_mmu(*this, "mmu")
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, m_ram(*this, "ram")
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, m_base(*this, "BASE")
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, m_irq(*this, "IRQ")
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, m_installed(false)
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{
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}
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void isa8_opus108pm_device::device_add_mconfig(machine_config &config)
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{
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NS32016(config, m_cpu, 20_MHz_XTAL / 2);
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m_cpu->set_addrmap(0, &isa8_opus108pm_device::map_cpu);
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NS32081(config, m_fpu, 20_MHz_XTAL / 2);
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m_cpu->set_fpu(m_fpu);
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NS32082(config, m_mmu, 20_MHz_XTAL / 2);
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m_cpu->set_mmu(m_mmu);
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RAM(config, m_ram);
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m_ram->set_default_size("1MiB");
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m_ram->set_extra_options("2MiB");
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}
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ioport_constructor isa8_opus108pm_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(opus108pm);
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}
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void isa8_opus108pm_device::device_start()
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{
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set_isa_device();
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if (!m_ram->started())
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throw device_missing_dependencies();
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save_item(NAME(m_card_stat));
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save_item(NAME(m_host_stat));
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m_cpu->space(0).install_ram(0, m_ram->mask(), m_ram->pointer());
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}
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void isa8_opus108pm_device::device_reset()
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{
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if (!m_installed)
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{
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u32 const base = m_base->read();
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m_isa->install_memory(base, base | 0xffff, *this, &isa8_opus108pm_device::map_isa);
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m_installed = true;
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}
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m_card_stat = CARD_STAT_OPT;
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m_host_stat = HOST_STAT_RUN;
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}
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void isa8_opus108pm_device::device_reset_after_children()
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{
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m_cpu->suspend(SUSPEND_REASON_HALT, true);
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m_cpu->suspend(SUSPEND_REASON_RESET, false);
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}
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void isa8_opus108pm_device::map_cpu(address_map &map)
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{
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// TODO: should unmapped memory accesses cause parity errors and NMI?
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// silence double-word access to byte-sized registers
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map(0x800000, 0x800003).noprw().mirror(0x030000);
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map(0x800000, 0x800000).r(FUNC(isa8_opus108pm_device::card_wait_r));
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map(0x810000, 0x810000).r(FUNC(isa8_opus108pm_device::card_stat_r));
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map(0x810000, 0x810000).w(FUNC(isa8_opus108pm_device::card_rste_w));
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map(0x820000, 0x820000).w(FUNC(isa8_opus108pm_device::card_ack_w));
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map(0x830000, 0x830000).w(FUNC(isa8_opus108pm_device::card_irq_w));
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}
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void isa8_opus108pm_device::map_isa(address_map &map)
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{
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map(0x0000, 0xefff).lrw8(
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[this](offs_t offset)
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{
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if (!(m_host_stat & HOST_STAT_RUN))
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offset |= 0xff0000;
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// FIXME: invalid translation probably triggers "DMA abort" status
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// and generates an NMI; unsure what else is reported to the host
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if (m_mmu->translate(m_cpu->space(0), 0xa, offset, false, false) != ns32000_mmu_interface::COMPLETE)
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fatalerror("%s: host address translation failed (%s)\n", tag(), machine().describe_context());
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return m_ram->read(offset);
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}, "ram_r",
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[this](offs_t offset, u8 data)
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{
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if (!(m_host_stat & HOST_STAT_RUN))
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offset |= 0xff0000;
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// FIXME: invalid translation probably triggers "DMA abort" status
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// and generates an NMI; unsure what else is reported to the host
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if (m_mmu->translate(m_cpu->space(0), 0xa, offset, false, true) != ns32000_mmu_interface::COMPLETE)
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fatalerror("%s: host address translation failed (%s)\n", tag(), machine().describe_context());
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m_ram->write(offset, data);
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}, "ram_w");
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// software expects these registers at 0xfffN, not 0xf00N per documentation,
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// assume they are mirrored throughout the whole 4k range
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map(0xf000, 0xf000).mirror(0x0ff0).r(FUNC(isa8_opus108pm_device::host_stat_r));
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map(0xf001, 0xf001).mirror(0x0ff0).w(FUNC(isa8_opus108pm_device::host_eirq_w));
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map(0xf002, 0xf002).mirror(0x0ff0).w(FUNC(isa8_opus108pm_device::host_ack_w));
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map(0xf003, 0xf003).mirror(0x0ff0).w(FUNC(isa8_opus108pm_device::host_int_w));
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map(0xf004, 0xf004).mirror(0x0ff0).w(FUNC(isa8_opus108pm_device::host_nmi_w));
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map(0xf005, 0xf005).mirror(0x0ff0).w(FUNC(isa8_opus108pm_device::host_go_w));
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map(0xf006, 0xf006).mirror(0x0ff0).w(FUNC(isa8_opus108pm_device::host_run_w));
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map(0xf007, 0xf007).mirror(0x0ff0).w(FUNC(isa8_opus108pm_device::host_rst_w));
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}
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void isa8_opus108pm_device::update_isa_irq(int state)
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{
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LOG("update_isa_irq %d\n", state);
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switch (m_irq->read())
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{
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case 2: m_isa->irq2_w(state); break;
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case 3: m_isa->irq3_w(state); break;
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case 7: m_isa->irq7_w(state); break;
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default:
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fatalerror("%s: invalid isa irq %d\n", tag(), m_irq->read());
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}
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}
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u8 isa8_opus108pm_device::card_stat_r()
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{
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LOGMASKED(LOG_STAT, "card_stat_r 0x%02x (%s)\n", m_card_stat, machine().describe_context());
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return m_card_stat;
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}
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void isa8_opus108pm_device::card_rste_w(u8 data)
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{
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LOG("card_rste_w (%s)\n", machine().describe_context());
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m_card_stat &= ~(CARD_STAT_PAR | CARD_STAT_DMA);
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m_host_stat &= ~(HOST_STAT_PAR | HOST_STAT_DMA);
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}
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void isa8_opus108pm_device::card_ack_w(u8 data)
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{
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if (m_card_stat & CARD_STAT_INT)
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{
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LOG("card_ack_w (%s)\n", machine().describe_context());
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m_card_stat &= ~CARD_STAT_INT;
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m_host_stat &= ~HOST_STAT_INT;
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m_cpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
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}
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}
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void isa8_opus108pm_device::card_irq_w(u8 data)
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{
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if (!(m_card_stat & CARD_STAT_IRQ))
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{
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LOG("card_irq_w (%s)\n", machine().describe_context());
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m_card_stat |= CARD_STAT_IRQ;
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m_host_stat |= HOST_STAT_IRQ;
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if (m_card_stat & CARD_STAT_EIRQ)
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update_isa_irq(1);
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}
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}
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u8 isa8_opus108pm_device::host_stat_r()
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{
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// HACK: diagnostic test requires changes in this host status bit, this
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// arbitrary toggle satisfies the test but is not accurate
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m_host_stat ^= HOST_STAT_CWT;
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LOGMASKED(LOG_STAT, "host_stat_r 0x%02x (%s)\n", m_host_stat, machine().describe_context());
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return m_host_stat;
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}
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void isa8_opus108pm_device::host_eirq_w(u8 data)
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{
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if (!(m_card_stat & CARD_STAT_EIRQ))
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{
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LOG("host_eirq_w (%s)\n", machine().describe_context());
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m_card_stat |= CARD_STAT_EIRQ;
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if (m_card_stat & CARD_STAT_IRQ)
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update_isa_irq(1);
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}
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}
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void isa8_opus108pm_device::host_ack_w(u8 data)
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{
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if (m_host_stat & HOST_STAT_IRQ)
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{
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LOG("host_ack_w (%s)\n", machine().describe_context());
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m_card_stat &= ~CARD_STAT_IRQ;
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m_host_stat &= ~HOST_STAT_IRQ;
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update_isa_irq(0);
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}
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}
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void isa8_opus108pm_device::host_int_w(u8 data)
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{
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if (!(m_host_stat & HOST_STAT_INT))
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{
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LOG("host_int_w (%s)\n", machine().describe_context());
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m_card_stat |= CARD_STAT_INT;
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m_host_stat |= HOST_STAT_INT;
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m_cpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
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}
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}
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void isa8_opus108pm_device::host_nmi_w(u8 data)
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{
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LOG("host_nmi_w (%s)\n", machine().describe_context());
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m_cpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
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m_cpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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}
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void isa8_opus108pm_device::host_go_w(u8 data)
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{
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LOG("host_go_w (%s)\n", machine().describe_context());
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m_cpu->resume(SUSPEND_REASON_RESET);
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}
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void isa8_opus108pm_device::host_run_w(u8 data)
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{
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LOG("host_run_w (%s)\n", machine().describe_context());
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m_host_stat &= ~HOST_STAT_RUN;
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m_cpu->resume(SUSPEND_REASON_HALT);
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}
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void isa8_opus108pm_device::host_rst_w(u8 data)
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{
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LOG("host_rst_w (%s)\n", machine().describe_context());
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m_card_stat &= (CARD_STAT_OPT | CARD_STAT_CPU);
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m_host_stat = HOST_STAT_RUN;
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m_cpu->reset();
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m_fpu->reset();
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m_mmu->reset();
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m_cpu->suspend(SUSPEND_REASON_HALT, true);
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m_cpu->suspend(SUSPEND_REASON_RESET, false);
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}
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71
src/devices/bus/isa/opus100pm.h
Normal file
71
src/devices/bus/isa/opus100pm.h
Normal file
@ -0,0 +1,71 @@
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// license:BSD-3-Clause
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// copyright-holders:Patrick Mackinlay
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#ifndef MAME_BUS_ISA_OPUS100PM_H
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#define MAME_BUS_ISA_OPUS100PM_H
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#pragma once
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#include "cpu/ns32000/ns32000.h"
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#include "machine/ns32081.h"
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||||
#include "machine/ns32082.h"
|
||||
#include "machine/ram.h"
|
||||
|
||||
#include "bus/isa/isa.h"
|
||||
|
||||
class isa8_opus108pm_device
|
||||
: public device_t
|
||||
, public device_isa8_card_interface
|
||||
{
|
||||
public:
|
||||
isa8_opus108pm_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
|
||||
|
||||
protected:
|
||||
// device_t overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
virtual void device_reset_after_children() override;
|
||||
|
||||
void map_cpu(address_map &map);
|
||||
void map_isa(address_map &map);
|
||||
|
||||
// adapter register helpers
|
||||
u8 card_wait_r() { return 0xb2; }
|
||||
u8 card_stat_r();
|
||||
void card_rste_w(u8 data);
|
||||
void card_ack_w(u8 data);
|
||||
void card_irq_w(u8 data);
|
||||
|
||||
// host register helpers
|
||||
u8 host_stat_r();
|
||||
void host_eirq_w(u8 data);
|
||||
void host_ack_w(u8 data);
|
||||
void host_int_w(u8 data);
|
||||
void host_nmi_w(u8 data);
|
||||
void host_go_w(u8 data);
|
||||
void host_run_w(u8 data);
|
||||
void host_rst_w(u8 data);
|
||||
|
||||
void update_isa_irq(int state);
|
||||
|
||||
private:
|
||||
required_device<ns32016_device> m_cpu;
|
||||
required_device<ns32081_device> m_fpu;
|
||||
required_device<ns32082_device> m_mmu;
|
||||
required_device<ram_device> m_ram;
|
||||
|
||||
required_ioport m_base;
|
||||
required_ioport m_irq;
|
||||
|
||||
bool m_installed;
|
||||
|
||||
u8 m_card_stat;
|
||||
u8 m_host_stat;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
DECLARE_DEVICE_TYPE(ISA8_OPUS108PM, isa8_opus108pm_device)
|
||||
|
||||
#endif // MAME_BUS_ISA_OPUS100PM_H
|
||||
Loading…
Reference in New Issue
Block a user