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excal: update notes
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@ -12,7 +12,7 @@ Hardware notes:
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Motherboard:
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- PCB label: FORCE COMPUTERS
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- HD68000-8, 16MHz XTAL
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- HD68000-8 @ 8 MHz (16MHz XTAL)
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- 128KB DRAM (16*MB8264-20), half unused
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- 4 EPROM sockets are unpopulated
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- HD6840 PTM @ 800kHz, HD6821P PIA
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@ -34,13 +34,19 @@ except the interface is more similar to Mephisto Exclusive.
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The motherboard is a 1983 Force Computers 68000 kit with lots of patches and wire
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mods. It's an older version of the VME in src/devices/bus/vme/sys68k_cpu1.cpp.
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The CPU appears to run at 5MHz? This matches both piezo frequency and position
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calculation speed. How it derives this from a 16MHz XTAL is unknown. Or maybe
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it uses wait states? If so, how and why? The program copies itself to 280ns DRAM,
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which should be fast enough to run at 8MHz (500ns per memory cycle).
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The 68000 is clocked at 8MHz, but due to wait states and bus requests, it runs
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much slower, closer to around 5MHz.
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There's a 555 timer (R1=11K, R2=22K, C=1nf: ~26kHz) that clocks 68000 BR. Tests
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on real hardware showed that the chess computer is about 30% faster if the timer
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interval is reduced by a factor 100. It still worked fine, so it's probably a
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leftover for VME comms, not the DRAM refresh circuit.
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Other possible sources of wait states are periodic DRAM refresh and user/system
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area access time.
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See glasgow.cpp on how to verify CPU speed. On the real thing after 6 minutes,
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number of positions 2026 for excal, and 2028 for excaltm.
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number of positions is 2026 for excal, and 2028 for excaltm.
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TODO:
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- verify CPU speed, see notes above
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@ -102,7 +108,7 @@ private:
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void excal_state::machine_start()
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{
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// HACK: slow down CPU to account for suspected wait states
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// HACK: slow down CPU to account for bus arbiter and wait states
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m_maincpu->set_clock_scale(5.0 / 8.0);
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}
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