diff --git a/src/emu/drivers/xtal.h b/src/emu/drivers/xtal.h index 07e7e6fe271..60874290988 100644 --- a/src/emu/drivers/xtal.h +++ b/src/emu/drivers/xtal.h @@ -198,6 +198,7 @@ enum XTAL_48_66MHz = 48660000, /* Zaxxon */ XTAL_49_152MHz = 49152000, /* Used on some Namco PCBs, Baraduke h/w, System 21, Super System 22 */ XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */ + XTAL_50_113MHz = 50113000, /* Namco NA-1 */ XTAL_52MHz = 52000000, /* Cojag */ XTAL_52_832MHz = 52832000, /* Wang PC TIG video controller */ XTAL_53_693175MHz = 53693175, /* PSX-based h/w, Sony ZN1-2-based (15x NTSC subcarrier) */ diff --git a/src/mame/drivers/namcona1.c b/src/mame/drivers/namcona1.c index dda0fdff540..5644f49f102 100644 --- a/src/mame/drivers/namcona1.c +++ b/src/mame/drivers/namcona1.c @@ -1,4 +1,5 @@ /*************************************************************************** + Namco NA-1 / NA-2 System NA-1 Games: @@ -20,6 +21,10 @@ NA-2 Games: To Do: - Remove remaining MCU simulation hacks - View area / screen resolution controlled by registers? +- Canned EEPROM data for [see below*] oughtn't be necessary; when their EEPROM + area is uninitialized, the game software automatically writes these values there, + but then hangs. + *cgangpzl, cgangpzlj, exvania, exvaniaj, knckheadjp, quiztou - X-Day 2: Rom board M112 @@ -163,94 +168,12 @@ Notes: #include "includes/namcona1.h" #include "sound/c140.h" #include "cpu/m37710/m37710.h" -#include "mcfglgcy.h" + +#define MASTER_CLOCK XTAL_50_113MHz /*************************************************************************/ -static const UINT8 ExvaniaDefaultNvMem[] = -{ -/* This data oughtn't be necessary; when Exbania's EPROM area is uninitialized, - * the game software automatically writes these values there, but then jumps - * to an unmapped (bogus) address, causing MAME to crash. - */ - 0x30,0x32,0x4f,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4f,0x4e,0x35, - 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01, - 0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x02 -}; /* ExvaniaDefaultNvMem */ - -static const UINT8 QuiztouDefaultNvMem[] = -{ -/* This data oughtn't be necessary; when QuiztouDefaultNvMem's EPROM area is uninitialized, - * the game software automatically writes these values there, but then jumps - * to an unmapped (bogus) address, causing MAME to crash. - */ - 0x30,0x32,0x4F,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4F,0x4E,0x35, - 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01, - 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02 -}; /* QuiztouDefaultNvMem */ - -static const UINT8 CgangpzlDefaultNvMem[] = -{ -/* This data oughtn't be necessary; when Cgangpzl's EPROM area is uninitialized, - * the game software automatically writes these values there, but then hangs. - */ - 0x30,0x32,0x4F,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4F,0x4E,0x35, - 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01, - 0x00,0x02,0x00,0x00,0x00,0x01 -}; /* CgangpzlDefaultNvMem */ - - -static NVRAM_HANDLER( namcosna1 ) -{ - namcona1_state *state = machine.driver_data(); - if( read_or_write ) - { - file->write( state->m_nvmem, NA1_NVRAM_SIZE ); - } - else - { - if (file) - { - file->read( state->m_nvmem, NA1_NVRAM_SIZE ); - } - else - { - memset( state->m_nvmem, 0x00, NA1_NVRAM_SIZE ); - - switch( state->m_gametype ) - { - case NAMCO_EXBANIA: - memcpy( state->m_nvmem, ExvaniaDefaultNvMem, sizeof(ExvaniaDefaultNvMem) ); - break; - - case NAMCO_QUIZTOU: - memcpy( state->m_nvmem, QuiztouDefaultNvMem, sizeof(QuiztouDefaultNvMem) ); - break; - - case NAMCO_CGANGPZL: - memcpy( state->m_nvmem, CgangpzlDefaultNvMem, sizeof(CgangpzlDefaultNvMem) ); - break; - } - } - } -} /* namcosna1_nvram_handler */ - -READ16_MEMBER(namcona1_state::namcona1_nvram_r) -{ - return m_nvmem[offset]; -} /* namcona1_nvram_r */ - -WRITE16_MEMBER(namcona1_state::namcona1_nvram_w) -{ - if( ACCESSING_BITS_0_7 ) - { - m_nvmem[offset] = data&0xff; - } -} /* namcona1_nvram_w */ - -/***************************************************************************/ - static INPUT_PORTS_START( namcona1_joy ) PORT_START("P1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY @@ -743,12 +666,12 @@ static ADDRESS_MAP_START( namcona1_main_map, AS_PROGRAM, 16, namcona1_state ) AM_RANGE(0x3f8000, 0x3fffff) AM_READWRITE(mcu_mailbox_r, mcu_mailbox_w_68k) AM_RANGE(0x400000, 0xbfffff) AM_ROM AM_REGION("maincpu", 0x280000) /* data */ AM_RANGE(0xc00000, 0xdfffff) AM_ROM AM_REGION("maincpu", 0x080000) /* code */ - AM_RANGE(0xe00000, 0xe00fff) AM_READWRITE(namcona1_nvram_r, namcona1_nvram_w) + AM_RANGE(0xe00000, 0xe00fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff) AM_RANGE(0xe40000, 0xe4000f) AM_READWRITE(custom_key_r, custom_key_w) AM_RANGE(0xefff00, 0xefffff) AM_READWRITE(namcona1_vreg_r, namcona1_vreg_w) AM_SHARE("vreg") AM_RANGE(0xf00000, 0xf01fff) AM_READWRITE(namcona1_paletteram_r, namcona1_paletteram_w) AM_SHARE("paletteram") AM_RANGE(0xf40000, 0xf7ffff) AM_READWRITE(namcona1_gfxram_r, namcona1_gfxram_w) - AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram") + AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram") AM_RANGE(0xffd000, 0xffdfff) AM_RAM /* unknown */ AM_RANGE(0xffe000, 0xffefff) AM_RAM AM_SHARE("scroll") /* scroll registers */ AM_RANGE(0xfff000, 0xffffff) AM_RAM AM_SHARE("spriteram") /* spriteram */ @@ -764,13 +687,13 @@ static ADDRESS_MAP_START( namcona2_main_map, AS_PROGRAM, 16, namcona1_state ) AM_RANGE(0xd80000, 0xd80001) AM_WRITENOP /* xday: serial out? */ AM_RANGE(0xdc0000, 0xdc001f) AM_WRITENOP /* xday: serial config? */ AM_RANGE(0xc00000, 0xdfffff) AM_ROM AM_REGION("maincpu", 0x080000) /* code */ - AM_RANGE(0xe00000, 0xe00fff) AM_READWRITE(namcona1_nvram_r, namcona1_nvram_w) + AM_RANGE(0xe00000, 0xe00fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff) /* xday: additional battery-backed ram at 00E024FA? */ AM_RANGE(0xe40000, 0xe4000f) AM_READWRITE(custom_key_r, custom_key_w) AM_RANGE(0xefff00, 0xefffff) AM_READWRITE(namcona1_vreg_r, namcona1_vreg_w) AM_SHARE("vreg") AM_RANGE(0xf00000, 0xf01fff) AM_READWRITE(namcona1_paletteram_r, namcona1_paletteram_w) AM_SHARE("paletteram") AM_RANGE(0xf40000, 0xf7ffff) AM_READWRITE(namcona1_gfxram_r, namcona1_gfxram_w) - AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram") + AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram") AM_RANGE(0xffd000, 0xffdfff) AM_RAM /* unknown */ AM_RANGE(0xffe000, 0xffefff) AM_RAM AM_SHARE("scroll") /* scroll registers */ AM_RANGE(0xfff000, 0xffffff) AM_RAM AM_SHARE("spriteram") /* spriteram */ @@ -1004,17 +927,18 @@ static const c140_interface C140_interface_typeA = /* cropped at sides */ static MACHINE_CONFIG_START( namcona1, namcona1_state ) + /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M68000, 50113000/4) + MCFG_CPU_ADD("maincpu", M68000, MASTER_CLOCK/4) MCFG_CPU_PROGRAM_MAP(namcona1_main_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scan_main", namcona1_state, namcona1_interrupt, "screen", 0, 1) - MCFG_CPU_ADD("mcu", M37702, 50113000/4) + MCFG_CPU_ADD("mcu", M37702, MASTER_CLOCK/4) MCFG_CPU_PROGRAM_MAP(namcona1_mcu_map) MCFG_CPU_IO_MAP( namcona1_mcu_io_map) MCFG_TIMER_DRIVER_ADD_SCANLINE("scan_mcu", namcona1_state, mcu_interrupt, "screen", 0, 1) - MCFG_NVRAM_HANDLER(namcosna1) + MCFG_EEPROM_2816_ADD("eeprom") MCFG_QUANTUM_TIME(attotime::from_hz(2400)) /* video hardware */ @@ -1029,7 +953,6 @@ static MACHINE_CONFIG_START( namcona1, namcona1_state ) MCFG_PALETTE_LENGTH(0x2000) - /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -1043,8 +966,6 @@ MACHINE_CONFIG_END /* full-width */ static MACHINE_CONFIG_DERIVED( namcona1w, namcona1 ) - /* basic machine hardware */ - /* video hardware */ MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_VISIBLE_AREA(0, 38*8-1-0, 4*8, 32*8-1) @@ -1054,7 +975,6 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( namcona2, namcona1 ) /* basic machine hardware */ - MCFG_CPU_MODIFY("maincpu") MCFG_CPU_PROGRAM_MAP(namcona2_main_map) MACHINE_CONFIG_END @@ -1110,6 +1030,9 @@ ROM_START( cgangpzl ) /* M37702 BIOS - labeled as Namco custom C69 */ ROM_REGION16_LE( 0x4000, "mcu", 0 ) ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) ) + + ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot + ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(5f8dfe9e) SHA1(81cc9cdbd8b5d6092a292309f78e3037233078f9) ) ROM_END ROM_START( cgangpzlj ) @@ -1120,6 +1043,9 @@ ROM_START( cgangpzlj ) /* M37702 BIOS - labeled as Namco custom C69 */ ROM_REGION16_LE( 0x4000, "mcu", 0 ) ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) ) + + ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot + ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(ef5ddff2) SHA1(ea3f8e4da119e27c27f66f169bbf19bc37499048) ) ROM_END ROM_START( emeraldaj ) /* NA-1 Game PCB, parent is NA-2 version listed below */ @@ -1159,6 +1085,9 @@ ROM_START( exvania ) /* M37702 BIOS - labeled as Namco custom C69 */ ROM_REGION16_LE( 0x4000, "mcu", 0 ) ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) ) + + ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot + ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(0f46389d) SHA1(5706a46b02a667f5bddaa3842bb009ea07d23603) ) ROM_END ROM_START( exvaniaj ) @@ -1174,6 +1103,9 @@ ROM_START( exvaniaj ) /* M37702 BIOS - labeled as Namco custom C69 */ ROM_REGION16_LE( 0x4000, "mcu", 0 ) ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) ) + + ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot + ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(0f46389d) SHA1(5706a46b02a667f5bddaa3842bb009ea07d23603) ) ROM_END ROM_START( fghtatck ) @@ -1342,6 +1274,9 @@ ROM_START( knckheadjp ) /* Older or possible prototype. Doesn't show rom test at /* M37702 BIOS - labeled as Namco custom C70 */ ROM_REGION16_LE( 0x4000, "mcu", 0 ) ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) ) + + ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot + ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(98875a23) SHA1(2256cd231587351a0768faaedafbd1f80e3fd7c4) ) ROM_END ROM_START( numanath ) @@ -1405,6 +1340,9 @@ ROM_START( quiztou ) /* M37702 BIOS - labeled as Namco custom C70 */ ROM_REGION16_LE( 0x4000, "mcu", 0 ) ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) ) + + ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot + ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(57a478a6) SHA1(b6d66610690f2fdf6643b2de91e2345d15d839b1) ) ROM_END ROM_START( xday2 ) diff --git a/src/mame/includes/namcona1.h b/src/mame/includes/namcona1.h index b1f3dc0441a..f2d0464a62b 100644 --- a/src/mame/includes/namcona1.h +++ b/src/mame/includes/namcona1.h @@ -1,3 +1,11 @@ +/*************************************************************************** + + Namco NA-1 System hardware + +***************************************************************************/ + +#include "machine/eeprompar.h" + enum { NAMCO_CGANGPZL, @@ -13,9 +21,9 @@ enum NAMCO_XDAY2 }; -#define NA1_NVRAM_SIZE (0x800) #define NAMCONA1_NUM_TILEMAPS 4 + class namcona1_state : public driver_device { public: @@ -23,25 +31,27 @@ public: : driver_device(mconfig, type, tag), m_maincpu(*this,"maincpu"), m_mcu(*this,"mcu"), + m_eeprom(*this, "eeprom"), m_videoram(*this,"videoram"), m_spriteram(*this,"spriteram"), m_workram(*this,"workram"), m_vreg(*this,"vreg"), m_scroll(*this,"scroll") - { } + { } required_device m_maincpu; required_device m_mcu; + required_device m_eeprom; required_shared_ptr m_videoram; required_shared_ptr m_spriteram; required_shared_ptr m_workram; required_shared_ptr m_vreg; required_shared_ptr m_scroll; + UINT16 *m_mpBank0; UINT16 *m_mpBank1; int m_mEnableInterrupts; int m_gametype; - UINT8 m_nvmem[NA1_NVRAM_SIZE]; UINT16 m_count; UINT32 m_keyval; UINT16 m_mcu_mailbox[8]; @@ -59,8 +69,6 @@ public: UINT8 m_mask_data[8]; UINT8 m_conv_data[9]; - DECLARE_READ16_MEMBER(namcona1_nvram_r); - DECLARE_WRITE16_MEMBER(namcona1_nvram_w); DECLARE_READ16_MEMBER(custom_key_r); DECLARE_WRITE16_MEMBER(custom_key_w); DECLARE_READ16_MEMBER(namcona1_vreg_r);