mirror of
https://github.com/holub/mame
synced 2025-07-04 17:38:08 +03:00
(nw) more cleanups
This commit is contained in:
Robbbert
parent
72397ac725
commit
1ae6bbdb4f
@ -127,4 +127,4 @@ ROM_END
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/* Driver */
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/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
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COMP( 1981, cm1800, 0, 0, cm1800, cm1800, cm1800_state, empty_init, "<unknown>", "CM-1800", MACHINE_NO_SOUND_HW)
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COMP( 1981, cm1800, 0, 0, cm1800, cm1800, cm1800_state, empty_init, "<unknown>", "CM-1800", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
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@ -60,12 +60,13 @@ public:
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cortex_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_rom(*this, "maincpu")
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, m_ram(*this, "mainram")
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, m_beep(*this, "beeper")
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, m_io_dsw(*this, "DSW")
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{ }
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void cortex(machine_config &config);
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void init_init();
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private:
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void kbd_put(u8 data);
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@ -76,18 +77,22 @@ private:
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u8 keyboard_r(offs_t offset);
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void io_map(address_map &map);
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void mem_map(address_map &map);
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bool m_rom_in_map;
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bool m_kbd_ack;
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bool m_vdp_int;
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u8 m_term_data;
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virtual void machine_reset() override;
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void machine_reset() override;
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void machine_start() override;
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required_device<tms9995_device> m_maincpu;
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required_region_ptr<u8> m_rom;
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required_shared_ptr<u8> m_ram;
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required_device<beep_device> m_beep;
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required_ioport m_io_dsw;
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};
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void cortex_state::mem_map(address_map &map)
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{
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map(0x0000, 0x7fff).bankr("bankr0").bankw("bankw0");
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map(0x0000, 0x7fff).ram().share("mainram").lr8(NAME([this] (offs_t offset) { if(m_rom_in_map) return m_rom[offset]; else return m_ram[offset]; }));
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map(0x8000, 0xefff).ram();
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map(0xf100, 0xf11f).ram(); // memory mapping unit
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map(0xf120, 0xf121).rw("crtc", FUNC(tms9928a_device::read), FUNC(tms9928a_device::write));
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@ -154,7 +159,7 @@ WRITE_LINE_MEMBER( cortex_state::keyboard_ack_w )
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WRITE_LINE_MEMBER( cortex_state::romsw_w )
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{
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membank("bankr0")->set_entry(state ? 0 : 1);
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m_rom_in_map = state ? 0 : 1;
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}
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WRITE_LINE_MEMBER( cortex_state::vdp_int_w )
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@ -169,26 +174,24 @@ void cortex_state::kbd_put(u8 data)
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m_maincpu->set_input_line(INT_9995_INT4, ASSERT_LINE);
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}
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void cortex_state::machine_start()
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{
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save_item(NAME(m_rom_in_map));
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save_item(NAME(m_kbd_ack));
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save_item(NAME(m_vdp_int));
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save_item(NAME(m_term_data));
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}
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void cortex_state::machine_reset()
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{
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m_kbd_ack = 1;
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m_vdp_int = 0;
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m_beep->set_state(0);
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membank("bankr0")->set_entry(1); // point at rom
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membank("bankw0")->set_entry(0); // always write to ram
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m_rom_in_map = true;
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m_maincpu->ready_line(ASSERT_LINE);
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m_maincpu->reset_line(ASSERT_LINE);
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}
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void cortex_state::init_init()
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{
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u8 *main = memregion("maincpu")->base();
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membank("bankr0")->configure_entry(1, &main[0x10000]);
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membank("bankr0")->configure_entry(0, &main[0x00000]);
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membank("bankw0")->configure_entry(0, &main[0x00000]);
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}
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void cortex_state::cortex(machine_config &config)
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{
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/* basic machine hardware */
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@ -230,17 +233,17 @@ void cortex_state::cortex(machine_config &config)
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/* ROM definition */
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ROM_START( cortex )
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ROM_REGION( 0x18000, "maincpu", ROMREGION_ERASEFF )
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ROM_REGION( 0x8000, "maincpu", ROMREGION_ERASEFF )
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ROM_SYSTEM_BIOS(0, "basic", "Cortex Bios")
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ROMX_LOAD( "cortex.ic47", 0x10000, 0x2000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f), ROM_BIOS(0))
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ROMX_LOAD( "cortex.ic46", 0x12000, 0x2000, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9), ROM_BIOS(0))
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ROMX_LOAD( "cortex.ic45", 0x14000, 0x2000, CRC(b0c9b6e8) SHA1(4e20c3f0b7546b803da4805cd3b8616f96c3d923), ROM_BIOS(0))
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ROMX_LOAD( "cortex.ic47", 0x0000, 0x2000, CRC(bdb8c7bd) SHA1(340829dcb7a65f2e830fd5aff82a312e3ed7918f), ROM_BIOS(0))
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ROMX_LOAD( "cortex.ic46", 0x2000, 0x2000, CRC(4de459ea) SHA1(00a42fe556d4ffe1f85b2ce369f544b07fbd06d9), ROM_BIOS(0))
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ROMX_LOAD( "cortex.ic45", 0x4000, 0x2000, CRC(b0c9b6e8) SHA1(4e20c3f0b7546b803da4805cd3b8616f96c3d923), ROM_BIOS(0))
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ROM_SYSTEM_BIOS(1, "forth", "FIG-Forth")
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ROMX_LOAD( "forth.ic47", 0x10000, 0x2000, CRC(999034be) SHA1(0dcc7404c38aa0ae913101eb0aa98da82104b5d4), ROM_BIOS(1))
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ROMX_LOAD( "forth.ic46", 0x12000, 0x2000, CRC(8eca54cc) SHA1(0f1680e941ef60bb9bde9a4b843b78f30dff3202), ROM_BIOS(1))
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ROMX_LOAD( "forth.ic47", 0x0000, 0x2000, CRC(999034be) SHA1(0dcc7404c38aa0ae913101eb0aa98da82104b5d4), ROM_BIOS(1))
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ROMX_LOAD( "forth.ic46", 0x2000, 0x2000, CRC(8eca54cc) SHA1(0f1680e941ef60bb9bde9a4b843b78f30dff3202), ROM_BIOS(1))
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ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1982, cortex, 0, 0, cortex, cortex, cortex_state, init_init, "Powertran Cybernetics", "Cortex", MACHINE_NOT_WORKING )
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1982, cortex, 0, 0, cortex, cortex, cortex_state, empty_init, "Powertran Cybernetics", "Cortex", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
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@ -128,7 +128,8 @@ private:
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void mem_map(address_map &map);
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u8 m_term_data;
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virtual void machine_reset() override;
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void machine_start() override;
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void machine_reset() override;
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required_device<cpu_device> m_maincpu;
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required_device<generic_terminal_device> m_terminal;
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required_device<upd765a_device> m_fdc;
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@ -174,6 +175,11 @@ void d6809_state::kbd_put(u8 data)
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m_term_data = data;
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}
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void d6809_state::machine_start()
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{
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save_item(NAME(m_term_data));
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}
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void d6809_state::machine_reset()
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{
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m_fdc->set_ready_line_connected(1);
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@ -217,4 +223,4 @@ ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1983, d6809, 0, 0, d6809, d6809, d6809_state, empty_init, "Dunfield", "6809 Portable", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
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COMP( 1983, d6809, 0, 0, d6809, d6809, d6809_state, empty_init, "Dunfield", "6809 Portable", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
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@ -93,22 +93,22 @@ private:
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void portb_w(u8 data);
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u8 port08_r();
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void port08_w(u8 data);
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u8 mem_r(offs_t offset);
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void mem_w(offs_t offset, u8 data);
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DECLARE_WRITE_LINE_MEMBER(kansas_w);
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TIMER_DEVICE_CALLBACK_MEMBER(kansas_r);
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void kbd_put(u8 data);
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void dg680_io(address_map &map);
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void dg680_mem(address_map &map);
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void io_map(address_map &map);
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void mem_map(address_map &map);
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void machine_reset() override;
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void machine_start() override;
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u8 m_pio_b;
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u8 m_term_data;
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u8 m_protection[0x100];
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virtual void machine_reset() override;
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u8 m_cass_data[4];
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bool m_cassold, m_cassinbit, m_cassoutbit;
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u8 mem_r(offs_t offset);
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void mem_w(offs_t offset, u8 data);
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required_device<cpu_device> m_maincpu;
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required_device<cassette_image_device> m_cass;
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@ -175,16 +175,16 @@ void dg680_state::mem_w(offs_t offset, u8 data)
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}
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void dg680_state::dg680_mem(address_map &map)
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void dg680_state::mem_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0xcfff).ram();
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map(0xd000, 0xd7ff).rom();
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map(0xd000, 0xd7ff).rom().region("maincpu", 0);
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map(0xd800, 0xefff).ram();
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map(0xf000, 0xffff).rw(FUNC(dg680_state::mem_r),FUNC(dg680_state::mem_w));
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}
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void dg680_state::dg680_io(address_map &map)
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void dg680_state::io_map(address_map &map)
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{
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map.unmap_value_high();
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map.global_mask(0xff);
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@ -196,6 +196,17 @@ void dg680_state::dg680_io(address_map &map)
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//map(0x0c,0x0d).rw("am9519", FUNC(am9519_device::read), FUNC(am9519_device::write));
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}
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void dg680_state::machine_start()
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{
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save_item(NAME(m_pio_b));
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save_item(NAME(m_term_data));
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save_item(NAME(m_protection));
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save_item(NAME(m_cass_data));
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save_item(NAME(m_cassold));
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save_item(NAME(m_cassinbit));
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save_item(NAME(m_cassoutbit));
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}
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void dg680_state::machine_reset()
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{
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m_maincpu->set_pc(0xd000);
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@ -285,8 +296,8 @@ void dg680_state::dg680(machine_config &config)
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/* basic machine hardware */
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z80_device& maincpu(Z80(config, m_maincpu, XTAL(8'000'000) / 4));
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maincpu.set_addrmap(AS_PROGRAM, &dg680_state::dg680_mem);
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maincpu.set_addrmap(AS_IO, &dg680_state::dg680_io);
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maincpu.set_addrmap(AS_PROGRAM, &dg680_state::mem_map);
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maincpu.set_addrmap(AS_IO, &dg680_state::io_map);
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maincpu.set_daisy_config(dg680_daisy_chain);
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/* Keyboard */
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@ -313,8 +324,8 @@ void dg680_state::dg680(machine_config &config)
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/* ROM definition */
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ROM_START( dg680 )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD( "dg680.rom", 0xd000, 0x0800, BAD_DUMP CRC(c1aaef6a) SHA1(1508ca8315452edfb984718e795ccbe79a0c0b58) )
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ROM_REGION( 0x0800, "maincpu", 0 )
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ROM_LOAD( "dg680.rom", 0x0000, 0x0800, BAD_DUMP CRC(c1aaef6a) SHA1(1508ca8315452edfb984718e795ccbe79a0c0b58) )
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ROM_REGION( 0x0020, "proms", 0 )
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ROM_LOAD( "82s123.bin", 0x0000, 0x0020, NO_DUMP )
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@ -323,4 +334,4 @@ ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1980, dg680, 0, 0, dg680, dg680, dg680_state, empty_init, "David Griffiths", "DG680 with DGOS-Z80 1.4", MACHINE_NO_SOUND_HW )
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COMP( 1980, dg680, 0, 0, dg680, dg680, dg680_state, empty_init, "David Griffiths", "DG680 with DGOS-Z80 1.4", MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
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@ -77,12 +77,13 @@ private:
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void kbd_put(u8 data);
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MC6845_UPDATE_ROW(crtc_update_row);
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void dim68k_mem(address_map &map);
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void mem_map(address_map &map);
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bool m_speaker_bit;
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u8 m_video_control;
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u8 m_term_data;
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virtual void machine_reset() override;
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void machine_reset() override;
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void machine_start() override;
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required_device<cpu_device> m_maincpu;
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required_device<mc6845_device> m_crtc;
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required_device<speaker_sound_device> m_speaker;
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@ -189,7 +190,7 @@ void dim68k_state::dim68k_banksw_w(u16 data)
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{
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}
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void dim68k_state::dim68k_mem(address_map &map)
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void dim68k_state::mem_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x00000000, 0x00feffff).ram().share("ram"); // 16MB RAM / ROM at boot
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@ -310,11 +311,18 @@ void dim68k_state::kbd_put(u8 data)
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m_term_data = data;
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}
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void dim68k_state::machine_start()
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{
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save_item(NAME(m_speaker_bit));
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save_item(NAME(m_video_control));
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save_item(NAME(m_term_data));
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}
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void dim68k_state::dim68k(machine_config &config)
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{
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/* basic machine hardware */
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M68000(config, m_maincpu, XTAL(10'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &dim68k_state::dim68k_mem);
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m_maincpu->set_addrmap(AS_PROGRAM, &dim68k_state::mem_map);
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/* video hardware */
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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@ -406,4 +414,4 @@ ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1984, dim68k, 0, 0, dim68k, dim68k, dim68k_state, empty_init, "Micro Craft", "Dimension 68000", MACHINE_NOT_WORKING)
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COMP( 1984, dim68k, 0, 0, dim68k, dim68k, dim68k_state, empty_init, "Micro Craft", "Dimension 68000", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
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@ -110,8 +110,9 @@ private:
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void port00_w(offs_t offset, u8 data);
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void port06_w(u8 data);
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TIMER_DEVICE_CALLBACK_MEMBER(kansas_w);
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void dauphin_io(address_map &map);
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void dauphin_mem(address_map &map);
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void io_map(address_map &map);
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void mem_map(address_map &map);
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void machine_start() override;
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u8 m_cass_data;
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u8 m_last_key;
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@ -182,7 +183,16 @@ TIMER_DEVICE_CALLBACK_MEMBER(dauphin_state::kansas_w)
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m_cass->output(BIT(m_cass_data, 0) ? -1.0 : +1.0); // 2000Hz
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}
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void dauphin_state::dauphin_mem(address_map &map)
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void dauphin_state::machine_start()
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{
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save_item(NAME(m_cass_data));
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save_item(NAME(m_last_key));
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save_item(NAME(m_cassbit));
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save_item(NAME(m_cassold));
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save_item(NAME(m_speaker_state));
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}
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void dauphin_state::mem_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0x01ff).rom();
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@ -190,7 +200,7 @@ void dauphin_state::dauphin_mem(address_map &map)
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map(0x0c00, 0x0fff).rom();
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}
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void dauphin_state::dauphin_io(address_map &map)
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void dauphin_state::io_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x00, 0x03).w(FUNC(dauphin_state::port00_w)); // 4-led display
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@ -230,8 +240,8 @@ void dauphin_state::dauphin(machine_config &config)
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{
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/* basic machine hardware */
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S2650(config, m_maincpu, XTAL(1'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &dauphin_state::dauphin_mem);
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m_maincpu->set_addrmap(AS_IO, &dauphin_state::dauphin_io);
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m_maincpu->set_addrmap(AS_PROGRAM, &dauphin_state::mem_map);
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m_maincpu->set_addrmap(AS_IO, &dauphin_state::io_map);
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m_maincpu->sense_handler().set(FUNC(dauphin_state::cass_r));
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m_maincpu->flag_handler().set([this] (bool state) { m_cassbit = state; });
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@ -269,4 +279,4 @@ ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1979, dauphin, 0, 0, dauphin, dauphin, dauphin_state, empty_init, "LCD EPFL Stoppani", "Dauphin", 0 )
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COMP( 1979, dauphin, 0, 0, dauphin, dauphin, dauphin_state, empty_init, "LCD EPFL Stoppani", "Dauphin", MACHINE_SUPPORTS_SAVE )
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@ -29,16 +29,18 @@ public:
|
||||
dps1_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_rom(*this, "maincpu")
|
||||
, m_ram(*this, "mainram")
|
||||
, m_fdc(*this, "fdc")
|
||||
, m_floppy0(*this, "fdc:0")
|
||||
//, m_floppy1(*this, "fdc:1")
|
||||
{ }
|
||||
|
||||
void dps1(machine_config &config);
|
||||
void init_dps1();
|
||||
|
||||
private:
|
||||
virtual void machine_reset() override;
|
||||
void machine_reset() override;
|
||||
void machine_start() override;
|
||||
void portb2_w(u8 data);
|
||||
void portb4_w(u8 data);
|
||||
void portb6_w(u8 data);
|
||||
@ -52,9 +54,12 @@ private:
|
||||
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
bool m_rom_in_map;
|
||||
bool m_dma_dir;
|
||||
u16 m_dma_adr;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_region_ptr<u8> m_rom;
|
||||
required_shared_ptr<u8> m_ram;
|
||||
required_device<upd765_family_device> m_fdc;
|
||||
required_device<floppy_connector> m_floppy0;
|
||||
//required_device<floppy_connector> m_floppy1;
|
||||
@ -62,7 +67,7 @@ private:
|
||||
|
||||
void dps1_state::mem_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x03ff).bankr("bankr0").bankw("bankw0");
|
||||
map(0x0000, 0x03ff).ram().share("mainram").lr8(NAME([this] (offs_t offset) { if(m_rom_in_map) return m_rom[offset]; else return m_ram[offset]; }));
|
||||
map(0x0400, 0xffff).ram();
|
||||
}
|
||||
|
||||
@ -108,7 +113,7 @@ void dps1_state::portb4_w(u8 data)
|
||||
// enable eprom
|
||||
void dps1_state::portb6_w(u8 data)
|
||||
{
|
||||
membank("bankr0")->set_entry(1); // point at rom
|
||||
m_rom_in_map = true;
|
||||
}
|
||||
|
||||
// set A16-23
|
||||
@ -131,7 +136,7 @@ void dps1_state::portbc_w(u8 data)
|
||||
// disable eprom
|
||||
void dps1_state::portbe_w(u8 data)
|
||||
{
|
||||
membank("bankr0")->set_entry(0); // point at ram
|
||||
m_rom_in_map = false;
|
||||
}
|
||||
|
||||
// read 8 front-panel switches
|
||||
@ -166,10 +171,16 @@ WRITE_LINE_MEMBER( dps1_state::fdc_drq_w )
|
||||
// else take /dack high (unsupported)
|
||||
}
|
||||
|
||||
void dps1_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_rom_in_map));
|
||||
save_item(NAME(m_dma_dir));
|
||||
save_item(NAME(m_dma_adr));
|
||||
}
|
||||
|
||||
void dps1_state::machine_reset()
|
||||
{
|
||||
membank("bankr0")->set_entry(1); // point at rom
|
||||
membank("bankw0")->set_entry(0); // always write to ram
|
||||
m_rom_in_map = true;
|
||||
// set fdc for 8 inch floppies
|
||||
m_fdc->set_rate(500000);
|
||||
// turn on the motor
|
||||
@ -178,15 +189,6 @@ void dps1_state::machine_reset()
|
||||
floppy->mon_w(0);
|
||||
}
|
||||
|
||||
void dps1_state::init_dps1()
|
||||
{
|
||||
u8 *main = memregion("maincpu")->base();
|
||||
|
||||
membank("bankr0")->configure_entry(1, &main[0x0000]);
|
||||
membank("bankr0")->configure_entry(0, &main[0x0400]);
|
||||
membank("bankw0")->configure_entry(0, &main[0x0400]);
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( dps1 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
@ -228,8 +230,8 @@ void dps1_state::dps1(machine_config &config)
|
||||
}
|
||||
|
||||
ROM_START( dps1 )
|
||||
ROM_REGION( 0x800, "maincpu", 0 )
|
||||
ROM_LOAD( "boot 1280", 0x000, 0x400, CRC(9c2e98fa) SHA1(78e6c9d00aa6e8f6c4d3c65984cfdf4e99434c66) ) // actually on the FDC-2 board
|
||||
ROM_REGION( 0x0400, "maincpu", 0 )
|
||||
ROM_LOAD( "boot 1280", 0x0000, 0x0400, CRC(9c2e98fa) SHA1(78e6c9d00aa6e8f6c4d3c65984cfdf4e99434c66) ) // actually on the FDC-2 board
|
||||
ROM_END
|
||||
|
||||
COMP( 1979, dps1, 0, 0, dps1, dps1, dps1_state, init_dps1, "Ithaca InterSystems", "DPS-1", MACHINE_NO_SOUND_HW )
|
||||
COMP( 1979, dps1, 0, 0, dps1, dps1, dps1_state, empty_init, "Ithaca InterSystems", "DPS-1", MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -40,26 +40,31 @@ public:
|
||||
dsb46_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_rom(*this, "maincpu")
|
||||
, m_ram(*this, "mainram")
|
||||
{ }
|
||||
|
||||
void dsb46(machine_config &config);
|
||||
void init_dsb46();
|
||||
|
||||
private:
|
||||
virtual void machine_reset() override;
|
||||
void machine_reset() override;
|
||||
void machine_start() override;
|
||||
void port1a_w(u8 data);
|
||||
void dsb46_io(address_map &map);
|
||||
void dsb46_mem(address_map &map);
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
bool m_rom_in_map;
|
||||
required_device<z80_device> m_maincpu;
|
||||
required_region_ptr<u8> m_rom;
|
||||
required_shared_ptr<u8> m_ram;
|
||||
};
|
||||
|
||||
void dsb46_state::dsb46_mem(address_map &map)
|
||||
void dsb46_state::mem_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x07ff).bankr("read").bankw("write");
|
||||
map(0x0000, 0x07ff).ram().share("mainram").lr8(NAME([this] (offs_t offset) { if(m_rom_in_map) return m_rom[offset]; else return m_ram[offset]; }));
|
||||
map(0x0800, 0xffff).ram();
|
||||
}
|
||||
|
||||
void dsb46_state::dsb46_io(address_map &map)
|
||||
void dsb46_state::io_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0xff);
|
||||
map.unmap_value_high();
|
||||
@ -76,24 +81,19 @@ void dsb46_state::dsb46_io(address_map &map)
|
||||
static INPUT_PORTS_START( dsb46 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
void dsb46_state::init_dsb46()
|
||||
void dsb46_state::machine_start()
|
||||
{
|
||||
u8 *RAM = memregion("maincpu")->base();
|
||||
membank("read")->configure_entry(0, &RAM[0x10000]);
|
||||
membank("read")->configure_entry(1, &RAM[0x00000]);
|
||||
membank("write")->configure_entry(0, &RAM[0x00000]);
|
||||
save_item(NAME(m_rom_in_map));
|
||||
}
|
||||
|
||||
void dsb46_state::machine_reset()
|
||||
{
|
||||
membank("read")->set_entry(0);
|
||||
membank("write")->set_entry(0);
|
||||
m_maincpu->reset();
|
||||
m_rom_in_map = true;
|
||||
}
|
||||
|
||||
void dsb46_state::port1a_w(u8 data)
|
||||
{
|
||||
membank("read")->set_entry(data & 1);
|
||||
m_rom_in_map = BIT(~data, 0);
|
||||
}
|
||||
|
||||
static const z80_daisy_config daisy_chain[] =
|
||||
@ -108,8 +108,8 @@ void dsb46_state::dsb46(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
Z80(config, m_maincpu, 24_MHz_XTAL / 6);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &dsb46_state::dsb46_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &dsb46_state::dsb46_io);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &dsb46_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &dsb46_state::io_map);
|
||||
m_maincpu->set_daisy_config(daisy_chain);
|
||||
|
||||
/* Devices */
|
||||
@ -134,11 +134,11 @@ void dsb46_state::dsb46(machine_config &config)
|
||||
}
|
||||
|
||||
ROM_START( dsb46 )
|
||||
ROM_REGION( 0x10800, "maincpu", 0 )
|
||||
ROM_LOAD( "1538a.bin", 0x10000, 0x800, CRC(65b3e26e) SHA1(afe1f03f266b7d13fdb1f1bc6762df5e0aa5c764) )
|
||||
ROM_REGION( 0x0800, "maincpu", 0 )
|
||||
ROM_LOAD( "1538a.bin", 0x0000, 0x0800, CRC(65b3e26e) SHA1(afe1f03f266b7d13fdb1f1bc6762df5e0aa5c764) )
|
||||
|
||||
ROM_REGION( 0x4000, "ades", 0 )
|
||||
ROM_LOAD( "ades.bin", 0x0000, 0x4000, CRC(d374abf0) SHA1(331f51a2bb81375aeffbe63c1ebc1d7cd779b9c3) )
|
||||
ROM_END
|
||||
|
||||
COMP( 198?, dsb46, 0, 0, dsb46, dsb46, dsb46_state, init_dsb46, "Davidge", "DSB-4/6", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
|
||||
COMP( 198?, dsb46, 0, 0, dsb46, dsb46, dsb46_state, empty_init, "Davidge", "DSB-4/6", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -41,13 +41,14 @@ private:
|
||||
u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void kbd_put(u8 data);
|
||||
|
||||
void jonos_mem(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
|
||||
u8 m_framecnt;
|
||||
u8 m_term_data;
|
||||
u8 m_curs_ctrl;
|
||||
u16 m_curs_pos;
|
||||
virtual void machine_reset() override;
|
||||
void machine_reset() override;
|
||||
void machine_start() override;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_shared_ptr<u8> m_p_videoram;
|
||||
required_region_ptr<u8> m_p_chargen;
|
||||
@ -55,7 +56,7 @@ private:
|
||||
|
||||
|
||||
|
||||
void jonos_state::jonos_mem(address_map &map)
|
||||
void jonos_state::mem_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(0x0000, 0x0fff).rom().region("roms", 0);
|
||||
@ -105,6 +106,14 @@ void jonos_state::cursor_w(offs_t offset, u8 data)
|
||||
m_curs_pos = (m_curs_pos & 0xff) | (data << 8);
|
||||
}
|
||||
|
||||
void jonos_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_term_data));
|
||||
save_item(NAME(m_curs_ctrl));
|
||||
save_item(NAME(m_curs_pos));
|
||||
save_item(NAME(m_framecnt));
|
||||
}
|
||||
|
||||
void jonos_state::machine_reset()
|
||||
{
|
||||
m_curs_ctrl = 0;
|
||||
@ -179,7 +188,7 @@ void jonos_state::jonos(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
I8085A(config, m_maincpu, XTAL(16'000'000) / 4);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &jonos_state::jonos_mem);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &jonos_state::mem_map);
|
||||
|
||||
/* video hardware */
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
@ -213,4 +222,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 198?, jonos, 0, 0, jonos, jonos, jonos_state, empty_init, "Jonos", "Escort", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
|
||||
COMP( 198?, jonos, 0, 0, jonos, jonos, jonos_state, empty_init, "Jonos", "Escort", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -167,6 +167,8 @@ INPUT_PORTS_END
|
||||
|
||||
void microdec_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_portf8));
|
||||
save_item(NAME(m_fdc_rdy));
|
||||
}
|
||||
|
||||
void microdec_state::machine_reset()
|
||||
@ -263,5 +265,5 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1982, md2, 0, 0, microdec, microdec, microdec_state, init_microdec, "Morrow Designs", "Micro Decision MD-2", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
|
||||
COMP( 1982, md3, md2, 0, microdec, microdec, microdec_state, init_microdec, "Morrow Designs", "Micro Decision MD-3", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
|
||||
COMP( 1982, md2, 0, 0, microdec, microdec, microdec_state, init_microdec, "Morrow Designs", "Micro Decision MD-2", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
COMP( 1982, md3, md2, 0, microdec, microdec, microdec_state, init_microdec, "Morrow Designs", "Micro Decision MD-3", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -20,30 +20,31 @@ class mz6500_state : public driver_device
|
||||
{
|
||||
public:
|
||||
mz6500_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_hgdc(*this, "upd7220"),
|
||||
m_fdc(*this, "upd765"),
|
||||
m_video_ram(*this, "video_ram"),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_palette(*this, "palette") { }
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_hgdc(*this, "upd7220")
|
||||
, m_fdc(*this, "upd765")
|
||||
, m_vram(*this, "videoram")
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_palette(*this, "palette")
|
||||
{ }
|
||||
|
||||
void mz6500(machine_config &config);
|
||||
|
||||
private:
|
||||
required_device<upd7220_device> m_hgdc;
|
||||
required_device<upd765a_device> m_fdc;
|
||||
uint8_t mz6500_vram_r(offs_t offset);
|
||||
void mz6500_vram_w(offs_t offset, uint8_t data);
|
||||
u8 vram_r(offs_t offset);
|
||||
void vram_w(offs_t offset, u8 data);
|
||||
void fdc_irq(bool state);
|
||||
void fdc_drq(bool state);
|
||||
required_shared_ptr<uint16_t> m_video_ram;
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
required_shared_ptr<u16> m_vram;
|
||||
void machine_reset() override;
|
||||
void machine_start() override;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<palette_device> m_palette;
|
||||
UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
|
||||
void mz6500_io(address_map &map);
|
||||
void mz6500_map(address_map &map);
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
void upd7220_map(address_map &map);
|
||||
};
|
||||
|
||||
@ -51,11 +52,11 @@ UPD7220_DISPLAY_PIXELS_MEMBER( mz6500_state::hgdc_display_pixels )
|
||||
{
|
||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
||||
int gfx[3];
|
||||
uint8_t i,pen;
|
||||
u8 i,pen;
|
||||
|
||||
gfx[0] = m_video_ram[(address + 0x00000) >> 1];
|
||||
gfx[1] = m_video_ram[(address + 0x10000) >> 1];
|
||||
gfx[2] = m_video_ram[(address + 0x20000) >> 1];
|
||||
gfx[0] = m_vram[(address + 0x00000) >> 1];
|
||||
gfx[1] = m_vram[(address + 0x10000) >> 1];
|
||||
gfx[2] = m_vram[(address + 0x20000) >> 1];
|
||||
|
||||
for(i=0; i<16; i++)
|
||||
{
|
||||
@ -66,34 +67,29 @@ UPD7220_DISPLAY_PIXELS_MEMBER( mz6500_state::hgdc_display_pixels )
|
||||
}
|
||||
|
||||
|
||||
void mz6500_state::video_start()
|
||||
u8 mz6500_state::vram_r(offs_t offset)
|
||||
{
|
||||
return m_vram[offset >> 1] >> ((offset & 1) ? 8 : 0);
|
||||
}
|
||||
|
||||
|
||||
uint8_t mz6500_state::mz6500_vram_r(offs_t offset)
|
||||
{
|
||||
return m_video_ram[offset >> 1] >> ((offset & 1) ? 8 : 0);
|
||||
}
|
||||
|
||||
void mz6500_state::mz6500_vram_w(offs_t offset, uint8_t data)
|
||||
void mz6500_state::vram_w(offs_t offset, u8 data)
|
||||
{
|
||||
int mask = (offset & 1) ? 8 : 0;
|
||||
offset >>= 1;
|
||||
m_video_ram[offset] &= 0xff00 >> mask;
|
||||
m_video_ram[offset] |= data << mask;
|
||||
m_vram[offset] &= 0xff00 >> mask;
|
||||
m_vram[offset] |= data << mask;
|
||||
}
|
||||
|
||||
void mz6500_state::mz6500_map(address_map &map)
|
||||
void mz6500_state::mem_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(0x00000, 0x9ffff).ram();
|
||||
// map(0xa0000,0xbffff) kanji/dictionary ROM
|
||||
map(0xc0000, 0xeffff).rw(FUNC(mz6500_state::mz6500_vram_r), FUNC(mz6500_state::mz6500_vram_w));
|
||||
map(0xc0000, 0xeffff).rw(FUNC(mz6500_state::vram_r), FUNC(mz6500_state::vram_w));
|
||||
map(0xfc000, 0xfffff).rom().region("ipl", 0);
|
||||
}
|
||||
|
||||
void mz6500_state::mz6500_io(address_map &map)
|
||||
void mz6500_state::io_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
// map(0x0000, 0x000f) i8237 dma
|
||||
@ -124,6 +120,10 @@ static INPUT_PORTS_START( mz6500 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
void mz6500_state::machine_start()
|
||||
{
|
||||
}
|
||||
|
||||
void mz6500_state::machine_reset()
|
||||
{
|
||||
}
|
||||
@ -145,7 +145,7 @@ static void mz6500_floppies(device_slot_interface &device)
|
||||
|
||||
void mz6500_state::upd7220_map(address_map &map)
|
||||
{
|
||||
map(0x00000, 0x3ffff).ram().share("video_ram");
|
||||
map(0x00000, 0x3ffff).ram().share("videoram");
|
||||
}
|
||||
|
||||
|
||||
@ -153,9 +153,8 @@ void mz6500_state::mz6500(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
I8086(config, m_maincpu, 8000000); //unk clock
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &mz6500_state::mz6500_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &mz6500_state::mz6500_io);
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &mz6500_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &mz6500_state::io_map);
|
||||
|
||||
/* video hardware */
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
@ -191,4 +190,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 198?, mz6500, 0, 0, mz6500, mz6500, mz6500_state, empty_init, "Sharp", "MZ-6500", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
|
||||
COMP( 198?, mz6500, 0, 0, mz6500, mz6500, mz6500_state, empty_init, "Sharp", "MZ-6500", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user