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drivers/d*: macro removal (nw)

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This commit is contained in:
Ivan Vangelista 2020-05-26 22:21:29 +02:00
parent c0841133d6
commit 1b10fb1432
55 changed files with 895 additions and 903 deletions
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8
src/mame/drivers/d400.cpp
View File

@ -26,8 +26,8 @@ public:
private:
u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_READ8_MEMBER(novram_recall_r);
DECLARE_READ8_MEMBER(novram_store_r);
u8 novram_recall_r();
u8 novram_store_r();
void mem_map(address_map &map);
required_device<cpu_device> m_maincpu;
@ -39,7 +39,7 @@ u32 d400_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const
return 0;
}
READ8_MEMBER(d400_state::novram_recall_r)
u8 d400_state::novram_recall_r()
{
if (!machine().side_effects_disabled())
{
@ -49,7 +49,7 @@ READ8_MEMBER(d400_state::novram_recall_r)
return 0xff;
}
READ8_MEMBER(d400_state::novram_store_r)
u8 d400_state::novram_store_r()
{
if (!machine().side_effects_disabled())
{

8
src/mame/drivers/d6809.cpp
View File

@ -121,8 +121,8 @@ public:
void d6809(machine_config &config);
private:
DECLARE_READ8_MEMBER( term_r );
DECLARE_WRITE8_MEMBER( term_w );
uint8_t term_r();
void term_w(uint8_t data);
void kbd_put(u8 data);
void mem_map(address_map &map);
@ -135,14 +135,14 @@ private:
required_device<floppy_connector> m_floppy0;
};
READ8_MEMBER( d6809_state::term_r )
uint8_t d6809_state::term_r()
{
uint8_t ret = m_term_data;
m_term_data = 0;
return ret;
}
WRITE8_MEMBER( d6809_state::term_w )
void d6809_state::term_w(uint8_t data)
{
if ((data > 0) && (data < 0x80))
m_terminal->write(data);

20
src/mame/drivers/d9final.cpp
View File

@ -59,11 +59,11 @@ private:
tilemap_t *m_sc0_tilemap;
DECLARE_WRITE8_MEMBER(sc0_lovram);
DECLARE_WRITE8_MEMBER(sc0_hivram);
DECLARE_WRITE8_MEMBER(sc0_cram);
DECLARE_WRITE8_MEMBER(bank_w);
DECLARE_READ8_MEMBER(prot_latch_r);
void sc0_lovram(offs_t offset, uint8_t data);
void sc0_hivram(offs_t offset, uint8_t data);
void sc0_cram(offs_t offset, uint8_t data);
void bank_w(uint8_t data);
uint8_t prot_latch_r();
TILE_GET_INFO_MEMBER(get_sc0_tile_info);
@ -99,31 +99,31 @@ uint32_t d9final_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
return 0;
}
WRITE8_MEMBER(d9final_state::sc0_lovram)
void d9final_state::sc0_lovram(offs_t offset, uint8_t data)
{
m_lo_vram[offset] = data;
m_sc0_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(d9final_state::sc0_hivram)
void d9final_state::sc0_hivram(offs_t offset, uint8_t data)
{
m_hi_vram[offset] = data;
m_sc0_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(d9final_state::sc0_cram)
void d9final_state::sc0_cram(offs_t offset, uint8_t data)
{
m_cram[offset] = data;
m_sc0_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(d9final_state::bank_w)
void d9final_state::bank_w(uint8_t data)
{
membank("bank1")->set_entry(data & 0x7);
}
/* game checks this after three attract cycles, otherwise coin inputs stop to work. */
READ8_MEMBER(d9final_state::prot_latch_r)
uint8_t d9final_state::prot_latch_r()
{
// printf("PC=%06x\n",m_maincpu->pc());

44
src/mame/drivers/dacholer.cpp
View File

@ -65,17 +65,17 @@ public:
DECLARE_READ_LINE_MEMBER(snd_ack_r);
private:
DECLARE_WRITE8_MEMBER(bg_scroll_x_w);
DECLARE_WRITE8_MEMBER(bg_scroll_y_w);
DECLARE_WRITE8_MEMBER(background_w);
DECLARE_WRITE8_MEMBER(foreground_w);
DECLARE_WRITE8_MEMBER(bg_bank_w);
DECLARE_WRITE8_MEMBER(coins_w);
DECLARE_WRITE8_MEMBER(main_irq_ack_w);
DECLARE_WRITE8_MEMBER(adpcm_w);
DECLARE_WRITE8_MEMBER(snd_ack_w);
DECLARE_WRITE8_MEMBER(snd_irq_w);
DECLARE_WRITE8_MEMBER(music_irq_w);
void bg_scroll_x_w(uint8_t data);
void bg_scroll_y_w(uint8_t data);
void background_w(offs_t offset, uint8_t data);
void foreground_w(offs_t offset, uint8_t data);
void bg_bank_w(uint8_t data);
void coins_w(uint8_t data);
void main_irq_ack_w(uint8_t data);
void adpcm_w(uint8_t data);
void snd_ack_w(uint8_t data);
void snd_irq_w(uint8_t data);
void music_irq_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
TILE_GET_INFO_MEMBER(get_fg_tile_info);
void dacholer_palette(palette_device &palette) const;
@ -144,12 +144,12 @@ void dacholer_state::video_start()
m_fg_tilemap->set_transparent_pen(0);
}
WRITE8_MEMBER(dacholer_state::bg_scroll_x_w)
void dacholer_state::bg_scroll_x_w(uint8_t data)
{
m_scroll_x = data;
}
WRITE8_MEMBER(dacholer_state::bg_scroll_y_w)
void dacholer_state::bg_scroll_y_w(uint8_t data)
{
m_scroll_y = data;
}
@ -204,19 +204,19 @@ uint32_t dacholer_state::screen_update_dacholer(screen_device &screen, bitmap_in
return 0;
}
WRITE8_MEMBER(dacholer_state::background_w)
void dacholer_state::background_w(offs_t offset, uint8_t data)
{
m_bgvideoram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(dacholer_state::foreground_w)
void dacholer_state::foreground_w(offs_t offset, uint8_t data)
{
m_fgvideoram[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(dacholer_state::bg_bank_w)
void dacholer_state::bg_bank_w(uint8_t data)
{
if ((data & 3) != m_bg_bank)
{
@ -228,7 +228,7 @@ WRITE8_MEMBER(dacholer_state::bg_bank_w)
}
WRITE8_MEMBER(dacholer_state::coins_w)
void dacholer_state::coins_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data & 1);
machine().bookkeeping().coin_counter_w(1, data & 2);
@ -237,7 +237,7 @@ WRITE8_MEMBER(dacholer_state::coins_w)
m_leds[1] = BIT(data, 3);
}
WRITE8_MEMBER(dacholer_state::main_irq_ack_w)
void dacholer_state::main_irq_ack_w(uint8_t data)
{
m_maincpu->set_input_line(0, CLEAR_LINE);
}
@ -291,13 +291,13 @@ void dacholer_state::itaten_snd_map(address_map &map)
}
WRITE8_MEMBER(dacholer_state::adpcm_w)
void dacholer_state::adpcm_w(uint8_t data)
{
m_msm_data = data;
m_msm_toggle = 0;
}
WRITE8_MEMBER(dacholer_state::snd_ack_w)
void dacholer_state::snd_ack_w(uint8_t data)
{
m_snd_ack = data;
}
@ -307,12 +307,12 @@ READ_LINE_MEMBER(dacholer_state::snd_ack_r)
return m_snd_ack; //guess ...
}
WRITE8_MEMBER(dacholer_state::snd_irq_w)
void dacholer_state::snd_irq_w(uint8_t data)
{
m_snd_interrupt_enable = data;
}
WRITE8_MEMBER(dacholer_state::music_irq_w)
void dacholer_state::music_irq_w(uint8_t data)
{
m_music_interrupt_enable = data;
}

18
src/mame/drivers/dai3wksi.cpp
View File

@ -93,9 +93,9 @@ private:
uint8_t m_port_last2;
int m_enabled_sound;
int m_sound3_counter;
DECLARE_WRITE8_MEMBER(dai3wksi_audio_1_w);
DECLARE_WRITE8_MEMBER(dai3wksi_audio_2_w);
DECLARE_WRITE8_MEMBER(dai3wksi_audio_3_w);
void dai3wksi_audio_1_w(uint8_t data);
void dai3wksi_audio_2_w(uint8_t data);
void dai3wksi_audio_3_w(uint8_t data);
/* i/o ports */
required_ioport m_in2;
@ -215,7 +215,7 @@ uint32_t dai3wksi_state::screen_update_dai3wksi(screen_device &screen, bitmap_rg
#if (USE_SAMPLES)
WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_1_w)
void dai3wksi_state::dai3wksi_audio_1_w(uint8_t data)
{
uint8_t rising_bits = data & ~m_port_last1;
@ -234,7 +234,7 @@ WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_1_w)
m_port_last1 = data;
}
WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_2_w)
void dai3wksi_state::dai3wksi_audio_2_w(uint8_t data)
{
uint8_t rising_bits = data & ~m_port_last2;
@ -261,7 +261,7 @@ WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_2_w)
m_port_last2 = data;
}
WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_3_w)
void dai3wksi_state::dai3wksi_audio_3_w(uint8_t data)
{
if (m_enabled_sound)
{
@ -290,7 +290,7 @@ static const char *const dai3wksi_sample_names[] =
#else
WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_1_w)
void dai3wksi_state::dai3wksi_audio_1_w(uint8_t data)
{
machine().sound().system_enable(data & 0x80);
@ -298,7 +298,7 @@ WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_1_w)
m_ic79->envelope_1_w((~data >> 2) & 0x01); /* invader movement envelope control*/
}
WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_2_w)
void dai3wksi_state::dai3wksi_audio_2_w(uint8_t data)
{
m_dai3wksi_flipscreen = data & 0x10;
m_dai3wksi_redscreen = ~data & 0x20;
@ -310,7 +310,7 @@ WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_2_w)
m_ic80->enable_w((~data >> 3) & 0x01); /* planet explosion */
}
WRITE8_MEMBER(dai3wksi_state::dai3wksi_audio_3_w)
void dai3wksi_state::dai3wksi_audio_3_w(uint8_t data)
{
m_ic81->enable_w((~data >> 2) & 0x01); /* player shoot enable */
m_ic81->vco_w((~data >> 3) & 0x01); /* player shoot vco control */

4
src/mame/drivers/dambustr.cpp
View File

@ -75,14 +75,14 @@ private:
required_device<galaxian_sound_device> m_custom;
int m_noise_data;
DECLARE_WRITE8_MEMBER(dambustr_noise_enable_w);
void dambustr_noise_enable_w(uint8_t data);
void dambustr_map(address_map &map);
};
/* FIXME: Really needed? - Should be handled by either interface */
WRITE8_MEMBER(dambustr_state::dambustr_noise_enable_w)
void dambustr_state::dambustr_noise_enable_w(uint8_t data)
{
if (data != m_noise_data) {
m_noise_data = data;

16
src/mame/drivers/daruma.cpp
View File

@ -32,27 +32,27 @@ public:
void daruma(machine_config &config);
private:
DECLARE_READ8_MEMBER(dev0_r);
DECLARE_WRITE8_MEMBER(dev1_w);
DECLARE_WRITE8_MEMBER(dev2_w);
DECLARE_READ8_MEMBER(dev4_r);
uint8_t dev0_r();
void dev1_w(uint8_t data);
void dev2_w(uint8_t data);
uint8_t dev4_r();
required_device<cpu_device> m_maincpu;
required_device<speaker_sound_device> m_speaker;
void mem_io(address_map &map);
void mem_prg(address_map &map);
};
READ8_MEMBER(daruma_state::dev0_r)
uint8_t daruma_state::dev0_r()
{
return 0xFF;
}
READ8_MEMBER(daruma_state::dev4_r)
uint8_t daruma_state::dev4_r()
{
return ioport("switches")->read();
}
WRITE8_MEMBER(daruma_state::dev1_w)
void daruma_state::dev1_w(uint8_t data)
{
//while attempting to identify which bit is used for
//controlling the buzzer, here's what I heard from each of
@ -68,7 +68,7 @@ WRITE8_MEMBER(daruma_state::dev1_w)
m_speaker->level_w(data & 0x02);
}
WRITE8_MEMBER(daruma_state::dev2_w)
void daruma_state::dev2_w(uint8_t data)
{
//while attempting to identify which bit is used for
//controlling the buzzer, here's what I heard from each of

62
src/mame/drivers/dblcrown.cpp
View File

@ -84,20 +84,20 @@ private:
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void bank_w(uint8_t data);
DECLARE_READ8_MEMBER(irq_source_r);
DECLARE_WRITE8_MEMBER(irq_source_w);
DECLARE_READ8_MEMBER(palette_r);
DECLARE_WRITE8_MEMBER(palette_w);
DECLARE_READ8_MEMBER(vram_r);
DECLARE_WRITE8_MEMBER(vram_w);
DECLARE_READ8_MEMBER(vram_bank_r);
DECLARE_WRITE8_MEMBER(vram_bank_w);
uint8_t irq_source_r();
void irq_source_w(uint8_t data);
uint8_t palette_r(offs_t offset);
void palette_w(offs_t offset, uint8_t data);
uint8_t vram_r(offs_t offset);
void vram_w(offs_t offset, uint8_t data);
uint8_t vram_bank_r(offs_t offset);
void vram_bank_w(offs_t offset, uint8_t data);
void mux_w(uint8_t data);
DECLARE_READ8_MEMBER(in_mux_r);
DECLARE_READ8_MEMBER(in_mux_type_r);
DECLARE_WRITE8_MEMBER(output_w);
uint8_t in_mux_r();
uint8_t in_mux_type_r();
void output_w(uint8_t data);
void lamps_w(uint8_t data);
DECLARE_WRITE8_MEMBER(watchdog_w);
void watchdog_w(uint8_t data);
TIMER_DEVICE_CALLBACK_MEMBER(dblcrown_irq_scanline);
void dblcrown_palette(palette_device &palette) const;
@ -175,17 +175,17 @@ void dblcrown_state::bank_w(uint8_t data)
membank("rom_bank")->set_entry(m_bank & 0x1f);
}
READ8_MEMBER( dblcrown_state::irq_source_r)
uint8_t dblcrown_state::irq_source_r()
{
return m_irq_src;
}
WRITE8_MEMBER( dblcrown_state::irq_source_w)
void dblcrown_state::irq_source_w(uint8_t data)
{
m_irq_src = data; // this effectively acks the irq, by writing 0
}
READ8_MEMBER( dblcrown_state::palette_r)
uint8_t dblcrown_state::palette_r(offs_t offset)
{
//if(m_bank & 8) /* TODO: verify this */
// offset+=0x200;
@ -193,7 +193,7 @@ READ8_MEMBER( dblcrown_state::palette_r)
return m_pal_ram[offset];
}
WRITE8_MEMBER( dblcrown_state::palette_w)
void dblcrown_state::palette_w(offs_t offset, uint8_t data)
{
int r,g,b,datax;
@ -213,7 +213,7 @@ WRITE8_MEMBER( dblcrown_state::palette_w)
}
READ8_MEMBER( dblcrown_state::vram_r)
uint8_t dblcrown_state::vram_r(offs_t offset)
{
uint32_t hi_offs;
hi_offs = m_vram_bank[(offset & 0x1000) >> 12] << 12;
@ -221,7 +221,7 @@ READ8_MEMBER( dblcrown_state::vram_r)
return m_vram[(offset & 0xfff) | hi_offs];
}
WRITE8_MEMBER( dblcrown_state::vram_w)
void dblcrown_state::vram_w(offs_t offset, uint8_t data)
{
uint32_t hi_offs;
hi_offs = m_vram_bank[(offset & 0x1000) >> 12] << 12;
@ -238,12 +238,12 @@ WRITE8_MEMBER( dblcrown_state::vram_w)
#endif
}
READ8_MEMBER( dblcrown_state::vram_bank_r)
uint8_t dblcrown_state::vram_bank_r(offs_t offset)
{
return m_vram_bank[offset];
}
WRITE8_MEMBER( dblcrown_state::vram_bank_w)
void dblcrown_state::vram_bank_w(offs_t offset, uint8_t data)
{
m_vram_bank[offset] = data & 0xf;
@ -256,14 +256,11 @@ void dblcrown_state::mux_w(uint8_t data)
m_mux_data = data;
}
READ8_MEMBER( dblcrown_state::in_mux_r )
uint8_t dblcrown_state::in_mux_r()
{
int i;
uint8_t res;
uint8_t res = 0;
res = 0;
for(i = 0; i < 4; i++)
for(int i = 0; i < 4; i++)
{
if(m_mux_data & 1 << i)
res |= m_inputs[i]->read();
@ -272,14 +269,11 @@ READ8_MEMBER( dblcrown_state::in_mux_r )
return res;
}
READ8_MEMBER( dblcrown_state::in_mux_type_r )
uint8_t dblcrown_state::in_mux_type_r()
{
int i;
uint8_t res;
uint8_t res = 0xff;
res = 0xff;
for(i = 0; i < 4; i++)
for(int i = 0; i < 4; i++)
{
if (m_inputs[i]->read() != 0xff)
res &= ~(1 << i);
@ -288,7 +282,7 @@ READ8_MEMBER( dblcrown_state::in_mux_type_r )
return res;
}
WRITE8_MEMBER( dblcrown_state::output_w )
void dblcrown_state::output_w(uint8_t data)
{
/* bits
7654 3210
@ -323,7 +317,7 @@ void dblcrown_state::lamps_w(uint8_t data)
m_lamps[n] = BIT(data, n);
}
WRITE8_MEMBER(dblcrown_state::watchdog_w)
void dblcrown_state::watchdog_w(uint8_t data)
/*
Always 0x01...
*/

12
src/mame/drivers/dblewing.cpp
View File

@ -118,15 +118,15 @@ private:
required_device<deco104_device> m_deco104;
required_device<decospr_device> m_sprgen;
DECLARE_READ8_MEMBER(irq_latch_r);
uint8_t irq_latch_r();
DECLARE_WRITE_LINE_MEMBER(soundlatch_irq_w);
uint32_t screen_update_dblewing(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECO16IC_BANK_CB_MEMBER(bank_callback);
DECOSPR_PRIORITY_CB_MEMBER(pri_callback);
READ16_MEMBER( wf_protection_region_0_104_r );
WRITE16_MEMBER( wf_protection_region_0_104_w );
uint16_t wf_protection_region_0_104_r(offs_t offset);
void wf_protection_region_0_104_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void dblewing_map(address_map &map);
void decrypted_opcodes_map(address_map &map);
@ -153,7 +153,7 @@ uint32_t dblewing_state::screen_update_dblewing(screen_device &screen, bitmap_in
return 0;
}
READ16_MEMBER( dblewing_state::wf_protection_region_0_104_r )
uint16_t dblewing_state::wf_protection_region_0_104_r(offs_t offset)
{
int real_address = 0 + (offset *2);
int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff;
@ -162,7 +162,7 @@ READ16_MEMBER( dblewing_state::wf_protection_region_0_104_r )
return data;
}
WRITE16_MEMBER( dblewing_state::wf_protection_region_0_104_w )
void dblewing_state::wf_protection_region_0_104_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
int real_address = 0 + (offset *2);
int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff;
@ -201,7 +201,7 @@ void dblewing_state::decrypted_opcodes_map(address_map &map)
map(0x000000, 0x07ffff).rom().share("decrypted_opcodes");
}
READ8_MEMBER(dblewing_state::irq_latch_r)
uint8_t dblewing_state::irq_latch_r()
{
// bit 0: irq type (0 = latch, 1 = ym)
return m_soundlatch_pending ? 0 : 1;

16
src/mame/drivers/dbox.cpp
View File

@ -456,15 +456,15 @@ private:
virtual void machine_reset() override;
virtual void machine_start() override;
DECLARE_WRITE8_MEMBER(sda5708_reset);
DECLARE_WRITE8_MEMBER(sda5708_clk);
void sda5708_reset(uint8_t data);
void sda5708_clk(uint8_t data);
void write_pa(uint8_t data);
void dbox_map(address_map &map);
#if LOCALFLASH
DECLARE_READ16_MEMBER(sysflash_r);
DECLARE_WRITE16_MEMBER(sysflash_w);
uint16_t sysflash_r(offs_t offset);
void sysflash_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
private:
uint16_t * m_sysflash;
uint32_t m_sf_mode;
@ -492,11 +492,11 @@ void dbox_state::machine_reset()
}
// TODO: Hookup the reset latch correctly
WRITE8_MEMBER (dbox_state::sda5708_reset){
void dbox_state::sda5708_reset(uint8_t data) {
LOGDISPLAY("%s - not implemented\n", FUNCNAME);
}
WRITE8_MEMBER (dbox_state::sda5708_clk){
void dbox_state::sda5708_clk(uint8_t data) {
LOGDISPLAY("%s\n", FUNCNAME);
m_display->sdclk_w(CLEAR_LINE);
m_display->data_w((0x80 & data) != 0 ? ASSERT_LINE : CLEAR_LINE);
@ -511,7 +511,7 @@ void dbox_state::write_pa(uint8_t data) {
#if LOCALFLASH
/* Local emulation of the 29F800B 8Mbit flashes if the intelflsh bugs, relies on a complete command cycle is done per device, not in parallel */
/* TODO: Make a flash device of this and support programming per sector and persistance, as settings etc may be stored in a 8Kb sector */
WRITE16_MEMBER (dbox_state::sysflash_w){
void dbox_state::sysflash_w(offs_t offset, uint16_t data, uint16_t mem_mask) {
LOGFLASH("%s pc:%08x offset:%08x data:%08x mask:%08x\n", FUNCNAME, m_maincpu->pc(), offset, data, mem_mask);
/*Data bits DQ15–DQ8 are don’t cares for unlock and command cycles.*/
@ -549,7 +549,7 @@ WRITE16_MEMBER (dbox_state::sysflash_w){
}
}
READ16_MEMBER (dbox_state::sysflash_r){
uint16_t dbox_state::sysflash_r(offs_t offset) {
if (m_sf_mode == 0)
{

52
src/mame/drivers/ddayjlc.cpp
View File

@ -93,19 +93,19 @@ public:
private:
DECLARE_WRITE8_MEMBER(prot_w);
DECLARE_WRITE8_MEMBER(char_bank_w);
DECLARE_WRITE8_MEMBER(bgvram_w);
DECLARE_WRITE8_MEMBER(vram_w);
DECLARE_WRITE8_MEMBER(sound_nmi_w);
DECLARE_WRITE8_MEMBER(main_nmi_w);
DECLARE_WRITE8_MEMBER(bg0_w);
DECLARE_WRITE8_MEMBER(bg1_w);
DECLARE_WRITE8_MEMBER(bg2_w);
DECLARE_WRITE8_MEMBER(sound_w);
DECLARE_WRITE8_MEMBER(flip_screen_w);
DECLARE_WRITE8_MEMBER(i8257_CH0_w);
DECLARE_WRITE8_MEMBER(i8257_LMSR_w);
void prot_w(offs_t offset, uint8_t data);
void char_bank_w(uint8_t data);
void bgvram_w(offs_t offset, uint8_t data);
void vram_w(offs_t offset, uint8_t data);
void sound_nmi_w(uint8_t data);
void main_nmi_w(uint8_t data);
void bg0_w(uint8_t data);
void bg1_w(uint8_t data);
void bg2_w(uint8_t data);
void sound_w(uint8_t data);
void flip_screen_w(uint8_t data);
void i8257_CH0_w(offs_t offset, uint8_t data);
void i8257_LMSR_w(address_space &space, uint8_t data);
TILE_GET_INFO_MEMBER(get_tile_info_bg);
TILE_GET_INFO_MEMBER(get_tile_info_fg);
void ddayjlc_palette(palette_device &palette) const;
@ -286,12 +286,12 @@ CUSTOM_INPUT_MEMBER(ddayjlc_state::prot_r)
return prot_data[m_prot_addr];
}
WRITE8_MEMBER(ddayjlc_state::prot_w)
void ddayjlc_state::prot_w(offs_t offset, uint8_t data)
{
m_prot_addr = (m_prot_addr & (~(1 << offset))) | ((data & 1) << offset);
}
WRITE8_MEMBER(ddayjlc_state::char_bank_w)
void ddayjlc_state::char_bank_w(uint8_t data)
{
m_char_bank = BIT(data,0);
m_fg_tilemap->mark_all_dirty();
@ -299,7 +299,7 @@ WRITE8_MEMBER(ddayjlc_state::char_bank_w)
logerror("Warning: char_bank_w with %02x\n",data);
}
WRITE8_MEMBER(ddayjlc_state::bgvram_w)
void ddayjlc_state::bgvram_w(offs_t offset, uint8_t data)
{
if (!offset)
m_bg_tilemap->set_scrollx(0, data + 8);
@ -308,38 +308,38 @@ WRITE8_MEMBER(ddayjlc_state::bgvram_w)
m_bg_tilemap->mark_tile_dirty(offset & 0x3ff);
}
WRITE8_MEMBER(ddayjlc_state::vram_w)
void ddayjlc_state::vram_w(offs_t offset, uint8_t data)
{
m_videoram[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset & 0x3ff);
}
WRITE8_MEMBER(ddayjlc_state::sound_nmi_w)
void ddayjlc_state::sound_nmi_w(uint8_t data)
{
m_sound_nmi_enable = BIT(data, 0);
if (!m_sound_nmi_enable)
m_audiocpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
WRITE8_MEMBER(ddayjlc_state::main_nmi_w)
void ddayjlc_state::main_nmi_w(uint8_t data)
{
m_main_nmi_enable = BIT(data, 0);
if (!m_main_nmi_enable)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
WRITE8_MEMBER(ddayjlc_state::bg0_w)
void ddayjlc_state::bg0_w(uint8_t data)
{
m_bgadr = (m_bgadr & 0xfe) | (data & 1);
}
WRITE8_MEMBER(ddayjlc_state::bg1_w)
void ddayjlc_state::bg1_w(uint8_t data)
{
m_bgadr = (m_bgadr & 0xfd) | ((data & 1) << 1);
}
WRITE8_MEMBER(ddayjlc_state::bg2_w)
void ddayjlc_state::bg2_w(uint8_t data)
{
m_bgadr = (m_bgadr & 0xfb) | ((data & 1) << 2);
if (m_bgadr > 2)
@ -348,24 +348,24 @@ WRITE8_MEMBER(ddayjlc_state::bg2_w)
membank("bank1")->set_entry(m_bgadr);
}
WRITE8_MEMBER(ddayjlc_state::sound_w)
void ddayjlc_state::sound_w(uint8_t data)
{
m_soundlatch->write(data);
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
}
WRITE8_MEMBER(ddayjlc_state::flip_screen_w)
void ddayjlc_state::flip_screen_w(uint8_t data)
{
flip_screen_set(data & 1);
}
WRITE8_MEMBER(ddayjlc_state::i8257_CH0_w)
void ddayjlc_state::i8257_CH0_w(offs_t offset, uint8_t data)
{
m_e00x_d[offset][m_e00x_l[offset]] = data;
m_e00x_l[offset] ^= 1;
}
WRITE8_MEMBER(ddayjlc_state::i8257_LMSR_w)
void ddayjlc_state::i8257_LMSR_w(address_space &space, uint8_t data)
{
if (!data)
{

18
src/mame/drivers/ddealer.cpp
View File

@ -145,10 +145,10 @@ public:
void init_ddealer();
private:
DECLARE_WRITE16_MEMBER(flipscreen_w);
DECLARE_WRITE16_MEMBER(back_vram_w);
DECLARE_WRITE16_MEMBER(mcu_shared_w);
DECLARE_READ16_MEMBER(mcu_r);
void flipscreen_w(uint16_t data);
void back_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void mcu_shared_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t mcu_r();
TILE_GET_INFO_MEMBER(get_back_tile_info);
void draw_video_layer(uint16_t* vreg_base, uint16_t* top, uint16_t* bottom, bitmap_ind16 &bitmap, const rectangle &cliprect, int flipy);
@ -188,7 +188,7 @@ private:
WRITE16_MEMBER(ddealer_state::flipscreen_w)
void ddealer_state::flipscreen_w(uint16_t data)
{
flip_screen_set(data & 0x01);
}
@ -401,7 +401,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(ddealer_state::mcu_sim)
WRITE16_MEMBER(ddealer_state::back_vram_w)
void ddealer_state::back_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_back_vram[offset]);
m_back_tilemap->mark_tile_dirty(offset);
@ -429,7 +429,7 @@ Protection handling, identical to Hacha Mecha Fighter / Thunder Dragon with diff
m_mcu_shared_ram[_protinput_+1] = (_input_ & 0x0000ffff);\
}
WRITE16_MEMBER(ddealer_state::mcu_shared_w)
void ddealer_state::mcu_shared_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_mcu_shared_ram[offset]);
@ -634,7 +634,7 @@ void ddealer_state::ddealer(machine_config &config)
READ16_MEMBER(ddealer_state::mcu_r)
uint16_t ddealer_state::mcu_r()
{
static const int resp[] =
{
@ -657,7 +657,7 @@ READ16_MEMBER(ddealer_state::mcu_r)
void ddealer_state::init_ddealer()
{
m_maincpu->space(AS_PROGRAM).install_read_handler(0xfe01c, 0xfe01d, read16_delegate(*this, FUNC(ddealer_state::mcu_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xfe01c, 0xfe01d, read16smo_delegate(*this, FUNC(ddealer_state::mcu_r)));
}
ROM_START( ddealer )

530
src/mame/drivers/ddenlovr.cpp
View File

File diff suppressed because it is too large Load Diff

18
src/mame/drivers/de_2.cpp
View File

@ -58,7 +58,7 @@ private:
void de_2_map(address_map &map);
void de_2_audio_map(address_map &map);
DECLARE_WRITE8_MEMBER(sample_w);
void sample_w(uint8_t data);
void pia34_pa_w(uint8_t data);
void type2alpha3_pia34_pa_w(uint8_t data);
void alpha3_pia34_pa_w(uint8_t data);
@ -77,13 +77,13 @@ private:
void lamp1_w(uint8_t data) { }
DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
DECLARE_WRITE_LINE_MEMBER(msm5205_irq_w);
DECLARE_WRITE8_MEMBER(sol2_w) { } // solenoids 8-15
DECLARE_WRITE8_MEMBER(sol3_w);
void sol2_w(uint8_t data) { } // solenoids 8-15
void sol3_w(uint8_t data);
void sound_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w);
DECLARE_READ8_MEMBER(sound_latch_r);
DECLARE_WRITE8_MEMBER(sample_bank_w);
uint8_t sound_latch_r();
void sample_bank_w(uint8_t data);
// devcb callbacks
uint8_t display_r(offs_t offset);
@ -259,7 +259,7 @@ WRITE_LINE_MEMBER(de_2_state::msm5205_irq_w)
}
// 6821 PIA at 0x2100
WRITE8_MEMBER( de_2_state::sol3_w )
void de_2_state::sol3_w(uint8_t data)
{
}
@ -410,18 +410,18 @@ void de_2_state::alpha3_pia34_pa_w(uint8_t data)
// Sound board
WRITE8_MEMBER(de_2_state::sample_w)
void de_2_state::sample_w(uint8_t data)
{
m_sample_data = data;
}
READ8_MEMBER( de_2_state::sound_latch_r )
uint8_t de_2_state::sound_latch_r()
{
m_audiocpu->set_input_line(M6809_FIRQ_LINE, CLEAR_LINE);
return m_sound_data;
}
WRITE8_MEMBER( de_2_state::sample_bank_w )
void de_2_state::sample_bank_w(uint8_t data)
{
static constexpr uint8_t prescale[4] = { msm5205_device::S96_4B, msm5205_device::S48_4B, msm5205_device::S64_4B, 0 };

12
src/mame/drivers/de_3.cpp
View File

@ -57,15 +57,15 @@ private:
void lamp1_w(uint8_t data) { }
//DECLARE_WRITE_LINE_MEMBER(ym2151_irq_w);
//DECLARE_WRITE_LINE_MEMBER(msm5205_irq_w);
DECLARE_WRITE8_MEMBER(sol2_w) { } // solenoids 8-15
DECLARE_WRITE8_MEMBER(sol3_w);
void sol2_w(uint8_t data) { } // solenoids 8-15
void sol3_w(uint8_t data);
void sound_w(uint8_t data);
DECLARE_WRITE8_MEMBER(dac_w) { }
void dac_w(uint8_t data) { }
DECLARE_WRITE_LINE_MEMBER(pia21_ca2_w);
uint8_t dmd_status_r();
// DECLARE_READ8_MEMBER(sound_latch_r);
// DECLARE_WRITE8_MEMBER(sample_bank_w);
// uint8_t sound_latch_r();
// void sample_bank_w(uint8_t data);
// devcb callbacks
uint8_t display_r(offs_t offset);
@ -166,7 +166,7 @@ static INPUT_PORTS_START( de_3 )
INPUT_PORTS_END
// 6821 PIA at 0x2000
WRITE8_MEMBER( de_3_state::sol3_w )
void de_3_state::sol3_w(uint8_t data)
{
}

8
src/mame/drivers/debut.cpp
View File

@ -94,8 +94,8 @@ private:
// I/O handlers
INTERRUPT_GEN_MEMBER(interrupt);
DECLARE_READ8_MEMBER(input_r);
DECLARE_WRITE8_MEMBER(latch_w);
u8 input_r(offs_t offset);
void latch_w(offs_t offset, u8 data);
DECLARE_WRITE_LINE_MEMBER(lcd_update_w);
u8 m_latch[5];
@ -130,7 +130,7 @@ INTERRUPT_GEN_MEMBER(debut_state::interrupt)
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // I8086
}
READ8_MEMBER(debut_state::input_r)
u8 debut_state::input_r(offs_t offset)
{
u8 data = 0;
u8 sel = m_latch[0] & 0xf;
@ -147,7 +147,7 @@ READ8_MEMBER(debut_state::input_r)
return ~data;
}
WRITE8_MEMBER(debut_state::latch_w)
void debut_state::latch_w(offs_t offset, u8 data)
{
u8 mask = 1 << offset;
u8 prev = m_latch[0];

32
src/mame/drivers/deco156.cpp
View File

@ -48,14 +48,14 @@ public:
void wcvol95(machine_config &config);
private:
DECLARE_WRITE32_MEMBER(hvysmsh_eeprom_w);
DECLARE_READ32_MEMBER(pf1_rowscroll_r);
DECLARE_READ32_MEMBER(pf2_rowscroll_r);
DECLARE_READ32_MEMBER(spriteram_r);
DECLARE_WRITE32_MEMBER(pf1_rowscroll_w);
DECLARE_WRITE32_MEMBER(pf2_rowscroll_w);
DECLARE_WRITE32_MEMBER(spriteram_w);
DECLARE_WRITE32_MEMBER(hvysmsh_oki_0_bank_w);
void hvysmsh_eeprom_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t pf1_rowscroll_r(offs_t offset);
uint32_t pf2_rowscroll_r(offs_t offset);
uint32_t spriteram_r(offs_t offset);
void pf1_rowscroll_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void pf2_rowscroll_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void spriteram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void hvysmsh_oki_0_bank_w(uint32_t data);
virtual void video_start() override;
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(vblank_interrupt);
@ -110,7 +110,7 @@ uint32_t deco156_state::screen_update(screen_device &screen, bitmap_rgb32 &bitma
/***************************************************************************/
WRITE32_MEMBER(deco156_state::hvysmsh_eeprom_w)
void deco156_state::hvysmsh_eeprom_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (ACCESSING_BITS_0_7)
{
@ -119,17 +119,17 @@ WRITE32_MEMBER(deco156_state::hvysmsh_eeprom_w)
}
}
WRITE32_MEMBER(deco156_state::hvysmsh_oki_0_bank_w)
void deco156_state::hvysmsh_oki_0_bank_w(uint32_t data)
{
m_oki1->set_rom_bank(data & 1);
}
READ32_MEMBER(deco156_state::pf1_rowscroll_r){ return m_pf1_rowscroll[offset] ^ 0xffff0000; }
READ32_MEMBER(deco156_state::pf2_rowscroll_r){ return m_pf2_rowscroll[offset] ^ 0xffff0000; }
READ32_MEMBER(deco156_state::spriteram_r){ return m_spriteram[offset] ^ 0xffff0000; }
WRITE32_MEMBER(deco156_state::pf1_rowscroll_w){ data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf1_rowscroll[offset]); }
WRITE32_MEMBER(deco156_state::pf2_rowscroll_w){ data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf2_rowscroll[offset]); }
WRITE32_MEMBER(deco156_state::spriteram_w){ data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_spriteram[offset]); }
uint32_t deco156_state::pf1_rowscroll_r(offs_t offset) { return m_pf1_rowscroll[offset] ^ 0xffff0000; }
uint32_t deco156_state::pf2_rowscroll_r(offs_t offset) { return m_pf2_rowscroll[offset] ^ 0xffff0000; }
uint32_t deco156_state::spriteram_r(offs_t offset) { return m_spriteram[offset] ^ 0xffff0000; }
void deco156_state::pf1_rowscroll_w(offs_t offset, uint32_t data, uint32_t mem_mask) { data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf1_rowscroll[offset]); }
void deco156_state::pf2_rowscroll_w(offs_t offset, uint32_t data, uint32_t mem_mask) { data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_pf2_rowscroll[offset]); }
void deco156_state::spriteram_w(offs_t offset, uint32_t data, uint32_t mem_mask) { data &= 0x0000ffff; mem_mask &= 0x0000ffff; COMBINE_DATA(&m_spriteram[offset]); }
void deco156_state::hvysmsh_map(address_map &map)

16
src/mame/drivers/deco_ld.cpp
View File

@ -159,9 +159,9 @@ private:
required_shared_ptr<uint8_t> m_attr1;
int m_nmimask;
DECLARE_READ8_MEMBER(acia_status_hack_r);
DECLARE_READ8_MEMBER(sound_status_r);
DECLARE_WRITE8_MEMBER(decold_sound_cmd_w);
uint8_t acia_status_hack_r();
uint8_t sound_status_r();
void decold_sound_cmd_w(uint8_t data);
virtual void machine_start() override;
uint32_t screen_update_rblaster(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(sound_interrupt);
@ -251,20 +251,20 @@ uint32_t deco_ld_state::screen_update_rblaster(screen_device &screen, bitmap_rgb
}
WRITE8_MEMBER(deco_ld_state::decold_sound_cmd_w)
void deco_ld_state::decold_sound_cmd_w(uint8_t data)
{
m_soundlatch->write(data);
m_audiocpu->set_input_line(0, HOLD_LINE);
}
/* unknown, but certainly related to audiocpu somehow */
READ8_MEMBER(deco_ld_state::sound_status_r)
uint8_t deco_ld_state::sound_status_r()
{
return 0xff ^ 0x40;
}
// TODO: needs LD BIOS dumped
READ8_MEMBER(deco_ld_state::acia_status_hack_r)
uint8_t deco_ld_state::acia_status_hack_r()
{
return 0xff;
}
@ -292,10 +292,10 @@ void deco_ld_state::rblaster_map(address_map &map)
}
/* sound arrangement is pratically identical to Zero Target. */
/* sound arrangement is practically identical to Zero Target. */
#ifdef UNUSED_FUNCTION
WRITE8_MEMBER(deco_ld_state::nmimask_w)
void deco_ld_state::nmimask_w(uint8_t data)
{
m_nmimask = data & 0x80;
}

44
src/mame/drivers/decstation.cpp
View File

@ -107,19 +107,19 @@ protected:
DECLARE_WRITE_LINE_MEMBER(ioga_irq_w);
DECLARE_WRITE_LINE_MEMBER(dz_irq_w);
DECLARE_READ32_MEMBER(cfb_r);
DECLARE_WRITE32_MEMBER(cfb_w);
uint32_t cfb_r(offs_t offset);
void cfb_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
DECLARE_READ32_MEMBER(kn01_status_r);
DECLARE_WRITE32_MEMBER(kn01_control_w);
DECLARE_READ32_MEMBER(bt478_palette_r);
DECLARE_WRITE32_MEMBER(bt478_palette_w);
DECLARE_READ32_MEMBER(pcc_r);
DECLARE_WRITE32_MEMBER(pcc_w);
DECLARE_WRITE32_MEMBER(planemask_w);
DECLARE_WRITE32_MEMBER(vram_w);
uint32_t kn01_status_r();
void kn01_control_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t bt478_palette_r(offs_t offset);
void bt478_palette_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t pcc_r(offs_t offset);
void pcc_w(offs_t offset, uint32_t data);
void planemask_w(uint32_t data);
void vram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
DECLARE_READ32_MEMBER(dz_r);
uint32_t dz_r();
TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer);
@ -195,7 +195,7 @@ uint32_t decstation_state::screen_update(screen_device &screen, bitmap_rgb32 &bi
return 0;
}
READ32_MEMBER(decstation_state::cfb_r)
uint32_t decstation_state::cfb_r(offs_t offset)
{
uint32_t addr = offset << 2;
@ -217,7 +217,7 @@ READ32_MEMBER(decstation_state::cfb_r)
return 0xffffffff;
}
WRITE32_MEMBER(decstation_state::cfb_w)
void decstation_state::cfb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
uint32_t addr = offset << 2;
@ -257,24 +257,24 @@ enum
PCC_MEMORY // 3c
};
READ32_MEMBER(decstation_state::pcc_r)
uint32_t decstation_state::pcc_r(offs_t offset)
{
return m_pcc_regs[offset];
}
WRITE32_MEMBER(decstation_state::pcc_w)
void decstation_state::pcc_w(offs_t offset, uint32_t data)
{
m_pcc_regs[offset] = data & 0xffff;
}
WRITE32_MEMBER(decstation_state::planemask_w)
void decstation_state::planemask_w(uint32_t data)
{
// value written is smeared across all 4 byte lanes
data &= 0xff;
m_planemask = (data) || (data << 8) || (data << 16) || (data << 24);
}
WRITE32_MEMBER(decstation_state::vram_w)
void decstation_state::vram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
u32 *vram = (u32 *)m_kn01vram.target();
// u32 effective_planemask = (m_planemask & mem_mask);
@ -316,7 +316,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(decstation_state::scanline_timer)
}
}
READ32_MEMBER(decstation_state::bt478_palette_r)
uint32_t decstation_state::bt478_palette_r(offs_t offset)
{
u8 rv = 0;
@ -366,7 +366,7 @@ READ32_MEMBER(decstation_state::bt478_palette_r)
return rv;
}
WRITE32_MEMBER(decstation_state::bt478_palette_w)
void decstation_state::bt478_palette_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
//printf("VDAC_w: %08x at %08x (mask %08x)\n", data, offset, mem_mask);
@ -463,13 +463,13 @@ void decstation_state::machine_reset()
m_kn01_status = 0;
}
READ32_MEMBER(decstation_state::kn01_status_r)
uint32_t decstation_state::kn01_status_r()
{
//m_kn01_status ^= 0x200; // fake vint for now
return m_kn01_status;
}
WRITE32_MEMBER(decstation_state::kn01_control_w)
void decstation_state::kn01_control_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_kn01_control);
@ -480,7 +480,7 @@ WRITE32_MEMBER(decstation_state::kn01_control_w)
}
}
READ32_MEMBER(decstation_state::dz_r)
uint32_t decstation_state::dz_r()
{
return 0x8000;
}

48
src/mame/drivers/dectalk.cpp
View File

@ -301,18 +301,18 @@ private:
DECLARE_WRITE_LINE_MEMBER(duart_txa);
uint8_t duart_input();
void duart_output(uint8_t data);
DECLARE_READ8_MEMBER(nvram_recall);
DECLARE_WRITE8_MEMBER(led_write);
DECLARE_WRITE8_MEMBER(nvram_store);
DECLARE_WRITE16_MEMBER(m68k_infifo_w);
DECLARE_READ16_MEMBER(m68k_spcflags_r);
DECLARE_WRITE16_MEMBER(m68k_spcflags_w);
DECLARE_READ16_MEMBER(m68k_tlcflags_r);
DECLARE_WRITE16_MEMBER(m68k_tlcflags_w);
DECLARE_READ16_MEMBER(m68k_tlc_dtmf_r);
DECLARE_WRITE16_MEMBER(spc_latch_outfifo_error_stats);
DECLARE_READ16_MEMBER(spc_infifo_data_r);
DECLARE_WRITE16_MEMBER(spc_outfifo_data_w);
uint8_t nvram_recall(offs_t offset);
void led_write(uint8_t data);
void nvram_store(offs_t offset, uint8_t data);
void m68k_infifo_w(uint16_t data);
uint16_t m68k_spcflags_r();
void m68k_spcflags_w(uint16_t data);
uint16_t m68k_tlcflags_r();
void m68k_tlcflags_w(uint16_t data);
uint16_t m68k_tlc_dtmf_r();
void spc_latch_outfifo_error_stats(uint16_t data);
uint16_t spc_infifo_data_r();
void spc_outfifo_data_w(uint16_t data);
DECLARE_READ_LINE_MEMBER(spc_semaphore_r);
virtual void machine_reset() override;
virtual void machine_start() override;
@ -489,7 +489,7 @@ void dectalk_state::machine_reset()
/* Begin 68k i/o handlers */
READ8_MEMBER(dectalk_state::nvram_recall)// recall from x2212 nvram chip
uint8_t dectalk_state::nvram_recall(offs_t offset)// recall from x2212 nvram chip
{
#ifdef NVRAM_LOG
fprintf(stderr,"NVRAM RECALL executed: offset %03x\n", offset);
@ -500,7 +500,7 @@ READ8_MEMBER(dectalk_state::nvram_recall)// recall from x2212 nvram chip
return 0xff;
}
WRITE8_MEMBER(dectalk_state::led_write)
void dectalk_state::led_write(uint8_t data)
{
popmessage("LED status: %02X\n", data&0xff);
#ifdef VERBOSE
@ -509,7 +509,7 @@ WRITE8_MEMBER(dectalk_state::led_write)
//popmessage("LED status: %x %x %x %x %x %x %x %x\n", data&0x80, data&0x40, data&0x20, data&0x10, data&0x8, data&0x4, data&0x2, data&0x1);
}
WRITE8_MEMBER(dectalk_state::nvram_store) // store to X2212 NVRAM chip
void dectalk_state::nvram_store(offs_t offset, uint8_t data) // store to X2212 NVRAM chip
{
#ifdef NVRAM_LOG
fprintf(stderr,"NVRAM STORE executed: offset %03x, data written (and ignored) is %02x\n", offset, data);
@ -519,7 +519,7 @@ WRITE8_MEMBER(dectalk_state::nvram_store) // store to X2212 NVRAM chip
m_nvram->store(0);
}
WRITE16_MEMBER(dectalk_state::m68k_infifo_w)// 68k write to the speech input fifo
void dectalk_state::m68k_infifo_w(uint16_t data)// 68k write to the speech input fifo
{
#ifdef USE_LOOSE_TIMING
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(25));
@ -541,7 +541,7 @@ WRITE16_MEMBER(dectalk_state::m68k_infifo_w)// 68k write to the speech input fif
m_infifo_head_ptr&=0x1f;
}
READ16_MEMBER(dectalk_state::m68k_spcflags_r)// 68k read from the speech flags
uint16_t dectalk_state::m68k_spcflags_r()// 68k read from the speech flags
{
uint8_t data = 0;
data |= m_m68k_spcflags_latch; // bits 0 and 6
@ -553,7 +553,7 @@ READ16_MEMBER(dectalk_state::m68k_spcflags_r)// 68k read from the speech flags
return data;
}
WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (only 3 bits do anything)
void dectalk_state::m68k_spcflags_w(uint16_t data)// 68k write to the speech flags (only 3 bits do anything)
{
#ifdef USE_LOOSE_TIMING
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(25));
@ -612,7 +612,7 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
}
}
READ16_MEMBER(dectalk_state::m68k_tlcflags_r)// dtmf flags read
uint16_t dectalk_state::m68k_tlcflags_r()// dtmf flags read
{
uint16_t data = 0;
data |= m_m68k_tlcflags_latch; // bits 6, 8, 14: tone detected int enable, answer phone relay enable, and ring int enable respectively
@ -624,7 +624,7 @@ READ16_MEMBER(dectalk_state::m68k_tlcflags_r)// dtmf flags read
return data;
}
WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
void dectalk_state::m68k_tlcflags_w(uint16_t data)// dtmf flags write
{
#ifdef TLC_LOG
logerror("m68k: TLC flags written with %04X, only storing %04X\n",data, data&0x4140);
@ -686,7 +686,7 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
}
}
READ16_MEMBER(dectalk_state::m68k_tlc_dtmf_r)// dtmf chip read
uint16_t dectalk_state::m68k_tlc_dtmf_r()// dtmf chip read
{
#ifdef TLC_LOG
uint16_t data = 0xffff;
@ -698,7 +698,7 @@ READ16_MEMBER(dectalk_state::m68k_tlc_dtmf_r)// dtmf chip read
/* End 68k i/o handlers */
/* Begin tms32010 i/o handlers */
WRITE16_MEMBER(dectalk_state::spc_latch_outfifo_error_stats)// latch 74ls74 @ E64 upper and lower halves with d0 and 1 respectively
void dectalk_state::spc_latch_outfifo_error_stats(uint16_t data)// latch 74ls74 @ E64 upper and lower halves with d0 and 1 respectively
{
#ifdef USE_LOOSE_TIMING
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(25));
@ -710,7 +710,7 @@ WRITE16_MEMBER(dectalk_state::spc_latch_outfifo_error_stats)// latch 74ls74 @ E6
m_spc_error_latch = (data&1); // latch the dsp 'soft error' state aka "ERROR DETECTED D5 H" on schematics (different from the outfifo error state above!)
}
READ16_MEMBER(dectalk_state::spc_infifo_data_r)
uint16_t dectalk_state::spc_infifo_data_r()
{
uint16_t data = 0xffff;
data = m_infifo[m_infifo_tail_ptr];
@ -727,7 +727,7 @@ READ16_MEMBER(dectalk_state::spc_infifo_data_r)
return data;
}
WRITE16_MEMBER(dectalk_state::spc_outfifo_data_w)
void dectalk_state::spc_outfifo_data_w(uint16_t data)
{
// the low 4 data bits are thrown out on the real unit due to use of a 12 bit dac (and to save use of another 16x4 fifo chip), though technically they're probably valid, and with suitable hacking a dtc-01 could probably output full 16 bit samples at 10khz.
#ifdef SPC_LOG_DSP

24
src/mame/drivers/decwritr.cpp
View File

@ -56,12 +56,12 @@ private:
IRQ_CALLBACK_MEMBER(inta_cb);
DECLARE_READ8_MEMBER(la120_KBD_r);
DECLARE_WRITE8_MEMBER(la120_LED_w);
DECLARE_READ8_MEMBER(la120_NVR_r);
DECLARE_WRITE8_MEMBER(la120_NVR_w);
DECLARE_READ8_MEMBER(la120_DC305_r);
DECLARE_WRITE8_MEMBER(la120_DC305_w);
uint8_t la120_KBD_r(offs_t offset);
void la120_LED_w(offs_t offset, uint8_t data);
uint8_t la120_NVR_r();
void la120_NVR_w(offs_t offset, uint8_t data);
uint8_t la120_DC305_r(offs_t offset);
void la120_DC305_w(offs_t offset, uint8_t data);
void la120_io(address_map &map);
void la120_mem(address_map &map);
@ -90,7 +90,7 @@ IRQ_CALLBACK_MEMBER( decwriter_state::inta_cb )
return m_prtlsi->inta();
}
READ8_MEMBER( decwriter_state::la120_KBD_r )
uint8_t decwriter_state::la120_KBD_r(offs_t offset)
{
/* for reading the keyboard array, addr bits 5-11 are ignored.
* a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
@ -111,7 +111,7 @@ READ8_MEMBER( decwriter_state::la120_KBD_r )
return code;
}
WRITE8_MEMBER( decwriter_state::la120_LED_w )
void decwriter_state::la120_LED_w(offs_t offset, uint8_t data)
{
/* for writing the keyboard array, addr bits 5-11 are ignored.
* a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
@ -161,7 +161,7 @@ WRITE8_MEMBER( decwriter_state::la120_LED_w )
1 1 0 Accept address
1 1 1 Accept data
*/
READ8_MEMBER( decwriter_state::la120_NVR_r )
uint8_t decwriter_state::la120_NVR_r()
{
// one wait state inserted
if (!machine().side_effects_disabled())
@ -170,7 +170,7 @@ READ8_MEMBER( decwriter_state::la120_NVR_r )
return (!m_nvm->data_r() << 7) | 0x7f;
}
WRITE8_MEMBER( decwriter_state::la120_NVR_w )
void decwriter_state::la120_NVR_w(offs_t offset, uint8_t data)
{
// one wait state inserted
if (!machine().side_effects_disabled())
@ -203,7 +203,7 @@ WRITE8_MEMBER( decwriter_state::la120_NVR_w )
|\------- ?
\-------- ?
*/
READ8_MEMBER( decwriter_state::la120_DC305_r )
uint8_t decwriter_state::la120_DC305_r(offs_t offset)
{
// one wait state inserted
if (!machine().side_effects_disabled())
@ -224,7 +224,7 @@ READ8_MEMBER( decwriter_state::la120_DC305_r )
at least 3 bits control the speaker/buzzer which can be on or off, at least two volume levels, and at least two frequencies, 400hz or 2400hz
two quadrature lines from the head servomotor connect here to allow the dc305 to determine motor position; one pulses when the motor turns clockwise and one when it turns counterclockwise. the head stop is found when the pulses stop, which firmware uses to find the zero position.
*/
WRITE8_MEMBER( decwriter_state::la120_DC305_w )
void decwriter_state::la120_DC305_w(offs_t offset, uint8_t data)
{
// one wait state inserted
if (!machine().side_effects_disabled())

28
src/mame/drivers/deshoros.cpp
View File

@ -55,14 +55,14 @@ private:
char m_led_array[21];
DECLARE_WRITE8_MEMBER(firq_ack_w);
DECLARE_WRITE8_MEMBER(nmi_ack_w);
DECLARE_READ8_MEMBER(printer_status_r);
DECLARE_READ8_MEMBER(display_ready_r);
DECLARE_WRITE8_MEMBER(display_w);
DECLARE_WRITE8_MEMBER(out_w);
void firq_ack_w(uint8_t data);
void nmi_ack_w(uint8_t data);
uint8_t printer_status_r();
uint8_t display_ready_r();
void display_w(uint8_t data);
void out_w(uint8_t data);
void bank_select_w(uint8_t data);
DECLARE_WRITE8_MEMBER(sound_w);
void sound_w(offs_t offset, uint8_t data);
void main_map(address_map &map);
protected:
@ -99,17 +99,17 @@ uint32_t destiny_state::screen_update_destiny(screen_device &screen, bitmap_ind1
***************************************************************************/
WRITE8_MEMBER(destiny_state::firq_ack_w)
void destiny_state::firq_ack_w(uint8_t data)
{
m_maincpu->set_input_line(M6809_FIRQ_LINE, CLEAR_LINE);
}
WRITE8_MEMBER(destiny_state::nmi_ack_w)
void destiny_state::nmi_ack_w(uint8_t data)
{
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
READ8_MEMBER(destiny_state::printer_status_r)
uint8_t destiny_state::printer_status_r()
{
// d2: mark sensor
// d3: motor stop
@ -120,14 +120,14 @@ READ8_MEMBER(destiny_state::printer_status_r)
return 0xff;
}
READ8_MEMBER(destiny_state::display_ready_r)
uint8_t destiny_state::display_ready_r()
{
// d7: /display ready
// other bits: N/C
return 0;
}
WRITE8_MEMBER(destiny_state::display_w)
void destiny_state::display_w(uint8_t data)
{
/* this is preliminary, just fills a string and doesn't support control codes etc. */
@ -139,7 +139,7 @@ WRITE8_MEMBER(destiny_state::display_w)
m_led_array[19] = data;
}
WRITE8_MEMBER(destiny_state::out_w)
void destiny_state::out_w(uint8_t data)
{
// d0: coin blocker
machine().bookkeeping().coin_lockout_w(0, ~data & 1);
@ -166,7 +166,7 @@ INPUT_CHANGED_MEMBER(destiny_state::coin_inserted)
machine().bookkeeping().coin_counter_w(0, newval);
}
WRITE8_MEMBER(destiny_state::sound_w)
void destiny_state::sound_w(offs_t offset, uint8_t data)
{
// a0: sound on/off
m_beeper->set_state(~offset & 1);

20
src/mame/drivers/destroyr.cpp
View File

@ -47,11 +47,11 @@ private:
TIMER_DESTROYR_FRAME
};
DECLARE_WRITE8_MEMBER(misc_w);
DECLARE_WRITE8_MEMBER(cursor_load_w);
DECLARE_WRITE8_MEMBER(interrupt_ack_w);
DECLARE_READ8_MEMBER(input_r);
DECLARE_READ8_MEMBER(scanline_r);
void misc_w(uint8_t data);
void cursor_load_w(uint8_t data);
void interrupt_ack_w(uint8_t data);
uint8_t input_r(offs_t offset);
uint8_t scanline_r();
void destroyr_palette(palette_device &palette) const;
@ -222,7 +222,7 @@ void destroyr_state::machine_reset()
}
WRITE8_MEMBER(destroyr_state::misc_w)
void destroyr_state::misc_w(uint8_t data)
{
/* bits 0 to 2 connect to the sound circuits */
m_attract = data & 0x01;
@ -237,20 +237,20 @@ WRITE8_MEMBER(destroyr_state::misc_w)
}
WRITE8_MEMBER(destroyr_state::cursor_load_w)
void destroyr_state::cursor_load_w(uint8_t data)
{
m_cursor = data;
m_watchdog->watchdog_reset();
}
WRITE8_MEMBER(destroyr_state::interrupt_ack_w)
void destroyr_state::interrupt_ack_w(uint8_t data)
{
m_maincpu->set_input_line(0, CLEAR_LINE);
}
READ8_MEMBER(destroyr_state::input_r)
uint8_t destroyr_state::input_r(offs_t offset)
{
if (offset & 1)
{
@ -271,7 +271,7 @@ READ8_MEMBER(destroyr_state::input_r)
}
READ8_MEMBER(destroyr_state::scanline_r)
uint8_t destroyr_state::scanline_r()
{
return m_screen->vpos();
}

30
src/mame/drivers/dg680.cpp
View File

@ -91,8 +91,8 @@ private:
u8 porta_r();
u8 portb_r();
void portb_w(u8 data);
DECLARE_READ8_MEMBER(port08_r);
DECLARE_WRITE8_MEMBER(port08_w);
u8 port08_r();
void port08_w(u8 data);
DECLARE_WRITE_LINE_MEMBER(kansas_w);
TIMER_DEVICE_CALLBACK_MEMBER(kansas_r);
void kbd_put(u8 data);
@ -100,15 +100,15 @@ private:
void dg680_io(address_map &map);
void dg680_mem(address_map &map);
uint8_t m_pio_b;
uint8_t m_term_data;
uint8_t m_protection[0x100];
u8 m_pio_b;
u8 m_term_data;
u8 m_protection[0x100];
virtual void machine_reset() override;
u8 m_cass_data[4];
bool m_cassold, m_cassinbit, m_cassoutbit;
DECLARE_READ8_MEMBER(mem_r);
DECLARE_WRITE8_MEMBER(mem_w);
u8 mem_r(offs_t offset);
void mem_w(offs_t offset, u8 data);
required_device<cpu_device> m_maincpu;
required_device<cassette_image_device> m_cass;
@ -153,7 +153,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( dg680_state::kansas_r )
return;
/* cassette - turn 1200/2400Hz to a bit */
uint8_t cass_ws = (m_cass->input() > +0.04) ? 1 : 0;
u8 cass_ws = (m_cass->input() > +0.04) ? 1 : 0;
if (cass_ws != m_cass_data[0])
{
@ -164,12 +164,12 @@ TIMER_DEVICE_CALLBACK_MEMBER( dg680_state::kansas_r )
}
}
READ8_MEMBER( dg680_state::mem_r )
u8 dg680_state::mem_r(offs_t offset)
{
return m_s100->smemr_r(offset + 0xf000);
}
WRITE8_MEMBER( dg680_state::mem_w )
void dg680_state::mem_w(offs_t offset, u8 data)
{
m_s100->mwrt_w(offset + 0xf000, data);
}
@ -227,7 +227,7 @@ void dg680_state::kbd_put(u8 data)
u8 dg680_state::porta_r()
{
uint8_t data = m_term_data;
u8 data = m_term_data;
m_term_data = 0;
return data;
}
@ -246,15 +246,15 @@ void dg680_state::portb_w(u8 data)
m_cassoutbit = BIT(data, 1);
}
READ8_MEMBER( dg680_state::port08_r )
u8 dg680_state::port08_r()
{
uint8_t breg = m_maincpu->state_int(Z80_B);
u8 breg = m_maincpu->state_int(Z80_B);
return m_protection[breg];
}
WRITE8_MEMBER( dg680_state::port08_w )
void dg680_state::port08_w(u8 data)
{
uint8_t breg = m_maincpu->state_int(Z80_B);
u8 breg = m_maincpu->state_int(Z80_B);
m_protection[breg] = data;
}

8
src/mame/drivers/didact.cpp
View File

@ -551,8 +551,8 @@ class modulab_state : public didact_state
virtual void machine_start() override;
void modulab(machine_config &config);
protected:
DECLARE_READ8_MEMBER( io_r );
DECLARE_WRITE8_MEMBER( io_w );
uint8_t io_r(offs_t offset);
void io_w(offs_t offset, u8 data);
DECLARE_WRITE_LINE_MEMBER( da_w );
private:
void modulab_map(address_map &map);
@ -585,7 +585,7 @@ WRITE_LINE_MEMBER( modulab_state::da_w )
m_da = state == CLEAR_LINE ? 0 : 1; // Capture data available signal
}
READ8_MEMBER(modulab_state::io_r)
uint8_t modulab_state::io_r(offs_t offset)
{
switch (offset)
{
@ -603,7 +603,7 @@ READ8_MEMBER(modulab_state::io_r)
return 0;
}
WRITE8_MEMBER(modulab_state::io_w)
void modulab_state::io_w(offs_t offset, u8 data)
{
LOG("--->%s()\n", FUNCNAME);
uint8_t b = data & 1;

84
src/mame/drivers/digel804.cpp
View File

@ -91,27 +91,27 @@ protected:
virtual void machine_start() override;
virtual void machine_reset() override;
DECLARE_WRITE8_MEMBER( op00 );
DECLARE_READ8_MEMBER( ip40 );
DECLARE_WRITE8_MEMBER( op40 );
DECLARE_WRITE8_MEMBER( op41 );
DECLARE_WRITE8_MEMBER( op42 );
DECLARE_READ8_MEMBER( ip43 );
DECLARE_WRITE8_MEMBER( op43 );
DECLARE_WRITE8_MEMBER( op43_1_4 );
DECLARE_WRITE8_MEMBER( op44 );
DECLARE_WRITE8_MEMBER( op45 );
DECLARE_READ8_MEMBER( ip46 );
DECLARE_WRITE8_MEMBER( op46 );
DECLARE_WRITE8_MEMBER( op47 );
DECLARE_READ8_MEMBER( acia_rxd_r );
DECLARE_WRITE8_MEMBER( acia_txd_w );
DECLARE_READ8_MEMBER( acia_status_r );
DECLARE_WRITE8_MEMBER( acia_reset_w );
DECLARE_READ8_MEMBER( acia_command_r );
DECLARE_WRITE8_MEMBER( acia_command_w );
DECLARE_READ8_MEMBER( acia_control_r );
DECLARE_WRITE8_MEMBER( acia_control_w );
void op00(uint8_t data);
uint8_t ip40();
void op40(uint8_t data);
void op41(uint8_t data);
void op42(uint8_t data);
uint8_t ip43();
void op43(uint8_t data);
void op43_1_4(uint8_t data);
void op44(uint8_t data);
void op45(uint8_t data);
uint8_t ip46();
void op46(uint8_t data);
void op47(uint8_t data);
uint8_t acia_rxd_r();
void acia_txd_w(uint8_t data);
uint8_t acia_status_r();
void acia_reset_w(uint8_t data);
uint8_t acia_command_r();
void acia_command_w(uint8_t data);
uint8_t acia_control_r();
void acia_control_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER( acia_irq_w );
DECLARE_WRITE_LINE_MEMBER( da_w );
@ -205,19 +205,19 @@ void digel804_state::machine_reset()
m_vfd->reset();
}
READ8_MEMBER( digel804_state::ip40 ) // eprom data bus read
uint8_t digel804_state::ip40() // eprom data bus read
{
// TODO: would be nice to have a 'fake eprom' here
return 0xFF;
}
WRITE8_MEMBER( digel804_state::op40 ) // eprom data bus write
void digel804_state::op40(uint8_t data) // eprom data bus write
{
// TODO: would be nice to have a 'fake eprom' here
logerror("Digel804: port 40, eprom databus had %02X written to it!\n", data);
}
WRITE8_MEMBER( digel804_state::op41 ) // eprom address low write AND SIM write, d6 also controls memory map somehow
void digel804_state::op41(uint8_t data) // eprom address low write AND SIM write, d6 also controls memory map somehow
{
// TODO: would be nice to have a 'fake eprom' here
logerror("Digel804: port 41, eprom address low/sim/memorybank had %02X written to it!\n", data);
@ -225,13 +225,13 @@ WRITE8_MEMBER( digel804_state::op41 ) // eprom address low write AND SIM write,
m_op41 = data;
}
WRITE8_MEMBER( digel804_state::op42 ) // eprom address hi and control write
void digel804_state::op42(uint8_t data) // eprom address hi and control write
{
// TODO: would be nice to have a 'fake eprom' here
logerror("Digel804: port 42, eprom address hi/control had %02X written to it!\n", data);
}
READ8_MEMBER( digel804_state::ip43 )
uint8_t digel804_state::ip43()
{
/* Register 0x43: status/mode register read
bits 76543210
@ -274,13 +274,13 @@ READ8_MEMBER( digel804_state::ip43 )
}
WRITE8_MEMBER( digel804_state::op00 )
void digel804_state::op00(uint8_t data)
{
m_ram_bank = data;
m_rambank->set_base(m_ram->pointer() + ((m_ram_bank * 0x8000) & m_ram->mask()));
}
WRITE8_MEMBER( digel804_state::op43 )
void digel804_state::op43(uint8_t data)
{
/* writes to 0x43 control the ram banking on firmware which supports it
* bits:76543210
@ -301,12 +301,12 @@ WRITE8_MEMBER( digel804_state::op43 )
m_rambank->set_base(m_ram->pointer() + ((m_ram_bank * 0x8000) & m_ram->mask()));
}
WRITE8_MEMBER( digel804_state::op43_1_4 )
void digel804_state::op43_1_4(uint8_t data)
{
m_overload_state = 0; // writes to port 43 clear overload state
}
WRITE8_MEMBER( digel804_state::op44 ) // state write
void digel804_state::op44(uint8_t data) // state write
{
/* writes to 0x44 control the 10937 vfd chip, z80 power/busrq, eprom driving and some eprom power ctl lines
* bits:76543210
@ -331,7 +331,7 @@ WRITE8_MEMBER( digel804_state::op44 ) // state write
m_vfd->sclk(data&1);
}
WRITE8_MEMBER( digel804_state::op45 ) // speaker write
void digel804_state::op45(uint8_t data) // speaker write
{
// all writes to here invert the speaker state, verified from schematics
#ifdef PORT45_W_VERBOSE
@ -341,7 +341,7 @@ WRITE8_MEMBER( digel804_state::op45 ) // speaker write
m_speaker->level_w(m_speaker_state);
}
READ8_MEMBER( digel804_state::ip46 ) // keypad read
uint8_t digel804_state::ip46() // keypad read
{
/* reads E* for a keypad number 0-F
* reads F0 for enter
@ -361,7 +361,7 @@ READ8_MEMBER( digel804_state::ip46 ) // keypad read
return bitswap<8>(kbd,7,6,5,4,1,0,3,2); // verified from schematics
}
WRITE8_MEMBER( digel804_state::op46 )
void digel804_state::op46(uint8_t data)
{
/* writes to 0x46 control the LEDS on the front panel
* bits:76543210
@ -385,7 +385,7 @@ WRITE8_MEMBER( digel804_state::op46 )
m_func_leds[i] = (!(data & 0x10) && ((~data & 0x0f) == i)) ? 1 : 0;
}
WRITE8_MEMBER( digel804_state::op47 ) // eprom timing/power and control write
void digel804_state::op47(uint8_t data) // eprom timing/power and control write
{
// TODO: would be nice to have a 'fake eprom' here
logerror("Digel804: port 47, eprom timing/power and control had %02X written to it!\n", data);
@ -422,44 +422,44 @@ INPUT_CHANGED_MEMBER( digel804_state::mode_change )
}
/* ACIA Trampolines */
READ8_MEMBER( digel804_state::acia_rxd_r )
uint8_t digel804_state::acia_rxd_r()
{
return m_acia->read(0);
}
WRITE8_MEMBER( digel804_state::acia_txd_w )
void digel804_state::acia_txd_w(uint8_t data)
{
m_acia->write(0, data);
}
READ8_MEMBER( digel804_state::acia_status_r )
uint8_t digel804_state::acia_status_r()
{
return m_acia->read(1);
}
WRITE8_MEMBER( digel804_state::acia_reset_w )
void digel804_state::acia_reset_w(uint8_t data)
{
m_acia->write(1, data);
}
READ8_MEMBER( digel804_state::acia_command_r )
uint8_t digel804_state::acia_command_r()
{
return m_acia->read(2);
}
WRITE8_MEMBER( digel804_state::acia_command_w )
void digel804_state::acia_command_w(uint8_t data)
{
data |= 0x08; // HACK for ep804 remote mode
m_acia->write(2, data);
}
READ8_MEMBER( digel804_state::acia_control_r )
uint8_t digel804_state::acia_control_r()
{
return m_acia->read(3);
}
WRITE8_MEMBER( digel804_state::acia_control_w )
void digel804_state::acia_control_w(uint8_t data)
{
m_acia->write(3, data);
}

52
src/mame/drivers/dim68k.cpp
View File

@ -61,19 +61,19 @@ public:
void dim68k(machine_config &config);
private:
DECLARE_READ16_MEMBER( dim68k_duart_r );
DECLARE_READ16_MEMBER( dim68k_fdc_r );
DECLARE_READ16_MEMBER( dim68k_game_switches_r );
DECLARE_READ16_MEMBER( dim68k_speaker_r );
DECLARE_WRITE16_MEMBER( dim68k_banksw_w );
DECLARE_WRITE16_MEMBER( dim68k_duart_w );
DECLARE_WRITE16_MEMBER( dim68k_fdc_w );
DECLARE_WRITE16_MEMBER( dim68k_printer_strobe_w );
DECLARE_WRITE16_MEMBER( dim68k_reset_timers_w );
DECLARE_WRITE16_MEMBER( dim68k_speaker_w );
DECLARE_WRITE16_MEMBER( dim68k_video_control_w );
DECLARE_WRITE16_MEMBER( dim68k_video_high_w );
DECLARE_WRITE16_MEMBER( dim68k_video_reset_w );
u16 dim68k_duart_r(offs_t offset);
u16 dim68k_fdc_r();
u16 dim68k_game_switches_r();
u16 dim68k_speaker_r();
void dim68k_banksw_w(u16 data);
void dim68k_duart_w(u16 data);
void dim68k_fdc_w(u16 data);
void dim68k_printer_strobe_w(u16 data);
void dim68k_reset_timers_w(u16 data);
void dim68k_speaker_w(u16 data);
void dim68k_video_control_w(u16 data);
void dim68k_video_high_w(u16 data);
void dim68k_video_reset_w(u16 data);
void kbd_put(u8 data);
MC6845_UPDATE_ROW(crtc_update_row);
@ -91,7 +91,7 @@ private:
required_region_ptr<u8> m_p_chargen;
};
READ16_MEMBER( dim68k_state::dim68k_duart_r )
u16 dim68k_state::dim68k_duart_r(offs_t offset)
// Port A is for the keyboard : 300 baud, no parity, 8 bits, 1 stop bit. Port B is for RS232.
// The device also controls the parallel printer (except the strobe) and the RTC.
// Device = SCN2681, not emulated. The keyboard is standard ASCII, so we can use the terminal
@ -103,12 +103,12 @@ READ16_MEMBER( dim68k_state::dim68k_duart_r )
return 0;
}
READ16_MEMBER( dim68k_state::dim68k_fdc_r )
u16 dim68k_state::dim68k_fdc_r()
{
return 0;
}
READ16_MEMBER( dim68k_state::dim68k_game_switches_r )
u16 dim68k_state::dim68k_game_switches_r()
// Reading the game port switches
// FFCC11 = switch 0; FFCC13 = switch 1, etc to switch 3
// FFCC19 = paddle 0; FFCC1B = paddle 1, etc to paddle 3
@ -116,7 +116,7 @@ READ16_MEMBER( dim68k_state::dim68k_game_switches_r )
return 0xffff;
}
READ16_MEMBER( dim68k_state::dim68k_speaker_r )
u16 dim68k_state::dim68k_speaker_r()
// Any read or write of this address will toggle the position of the speaker cone
{
m_speaker_bit ^= 1;
@ -124,22 +124,22 @@ READ16_MEMBER( dim68k_state::dim68k_speaker_r )
return 0;
}
WRITE16_MEMBER( dim68k_state::dim68k_speaker_w )
void dim68k_state::dim68k_speaker_w(u16 data)
{
m_speaker_bit ^= 1;
m_speaker->level_w(m_speaker_bit);
}
WRITE16_MEMBER( dim68k_state::dim68k_fdc_w )
void dim68k_state::dim68k_fdc_w(u16 data)
{
}
WRITE16_MEMBER( dim68k_state::dim68k_video_high_w )
void dim68k_state::dim68k_video_high_w(u16 data)
// "write high byte of address in memory of start of display buffer"
{
}
WRITE16_MEMBER( dim68k_state::dim68k_video_control_w )
void dim68k_state::dim68k_video_control_w(u16 data)
{
/* D7 0 = Hires/Graphics; 1= Lores/Text [not emulated yet]
D6 0 = 8 dots per character; 1 = 7 dots [emulated]
@ -166,25 +166,25 @@ WRITE16_MEMBER( dim68k_state::dim68k_video_control_w )
}
}
WRITE16_MEMBER( dim68k_state::dim68k_video_reset_w )
void dim68k_state::dim68k_video_reset_w(u16 data)
{
}
WRITE16_MEMBER( dim68k_state::dim68k_duart_w )
void dim68k_state::dim68k_duart_w(u16 data)
{
}
WRITE16_MEMBER( dim68k_state::dim68k_reset_timers_w )
void dim68k_state::dim68k_reset_timers_w(u16 data)
// reset game port timer before reading paddles
{
}
WRITE16_MEMBER( dim68k_state::dim68k_printer_strobe_w )
void dim68k_state::dim68k_printer_strobe_w(u16 data)
// anything sent here will trigger a one-shot for a strobe pulse
{
}
WRITE16_MEMBER( dim68k_state::dim68k_banksw_w )
void dim68k_state::dim68k_banksw_w(u16 data)
// At boot time, the rom and IO occupy 0-FFFF, this moves it to the proper place
{
}

34
src/mame/drivers/discoboy.cpp
View File

@ -97,16 +97,14 @@ private:
required_shared_ptr<uint8_t> m_ram_2;
uint8_t m_ram_3[0x1000];
uint8_t m_ram_4[0x1000];
DECLARE_WRITE8_MEMBER(rambank_select_w);
DECLARE_WRITE8_MEMBER(port_00_w);
DECLARE_WRITE8_MEMBER(port_01_w);
DECLARE_WRITE8_MEMBER(port_06_w);
DECLARE_WRITE8_MEMBER(rambank_w);
DECLARE_READ8_MEMBER(rambank_r);
DECLARE_READ8_MEMBER(rambank2_r);
DECLARE_WRITE8_MEMBER(rambank2_w);
DECLARE_READ8_MEMBER(port_06_r);
DECLARE_WRITE8_MEMBER(yunsung8_sound_bankswitch_w);
void rambank_select_w(uint8_t data);
void port_00_w(uint8_t data);
void port_01_w(uint8_t data);
void port_06_w(uint8_t data);
uint8_t rambank2_r(offs_t offset);
void rambank2_w(offs_t offset, uint8_t data);
uint8_t port_06_r();
void yunsung8_sound_bankswitch_w(uint8_t data);
virtual void machine_start() override;
virtual void machine_reset() override;
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -223,7 +221,7 @@ uint32_t discoboy_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
return 0;
}
WRITE8_MEMBER(discoboy_state::rambank_select_w)
void discoboy_state::rambank_select_w(uint8_t data)
{
if (data & 0x20)
m_rambank1->set_bank(1);
@ -233,13 +231,13 @@ WRITE8_MEMBER(discoboy_state::rambank_select_w)
if (data &= 0x83) logerror("rambank_select_w !!!!!");
}
WRITE8_MEMBER(discoboy_state::port_00_w)
void discoboy_state::port_00_w(uint8_t data)
{
if (data & 0xfe) logerror("unk port_00_w %02x\n",data);
m_port_00 = data;
}
WRITE8_MEMBER(discoboy_state::port_01_w)
void discoboy_state::port_01_w(uint8_t data)
{
// 00 10 20 30 during gameplay 1,2,3 other times?? title screen bit 0x40 toggle
//printf("unk port_01_w %02x\n",data);
@ -249,13 +247,13 @@ WRITE8_MEMBER(discoboy_state::port_01_w)
membank("mainbank")->set_entry(data & 0x07);
}
WRITE8_MEMBER(discoboy_state::port_06_w)
void discoboy_state::port_06_w(uint8_t data)
{
//printf("unk discoboy_port_06_w %02x\n",data);
if (data != 0) logerror("port 06!!!! %02x\n",data);
}
READ8_MEMBER(discoboy_state::rambank2_r)
uint8_t discoboy_state::rambank2_r(offs_t offset)
{
if (m_port_00 == 0x00)
return m_ram_3[offset];
@ -267,7 +265,7 @@ READ8_MEMBER(discoboy_state::rambank2_r)
return machine().rand();
}
WRITE8_MEMBER(discoboy_state::rambank2_w)
void discoboy_state::rambank2_w(offs_t offset, uint8_t data)
{
if (m_port_00 == 0x00)
m_ram_3[offset] = data;
@ -295,7 +293,7 @@ void discoboy_state::rambank1_map(address_map &map)
}
READ8_MEMBER(discoboy_state::port_06_r)
uint8_t discoboy_state::port_06_r()
{
return 0x00;
}
@ -314,7 +312,7 @@ void discoboy_state::io_map(address_map &map)
/* Sound */
WRITE8_MEMBER(discoboy_state::yunsung8_sound_bankswitch_w)
void discoboy_state::yunsung8_sound_bankswitch_w(uint8_t data)
{
/* Note: this is bit 5 on yunsung8.cpp */
m_msm->reset_w((data & 0x08) >> 3);

8
src/mame/drivers/diverboy.cpp
View File

@ -89,8 +89,8 @@ private:
required_device<palette_device> m_palette;
required_device<generic_latch_8_device> m_soundlatch;
DECLARE_WRITE16_MEMBER(soundcmd_w);
DECLARE_WRITE8_MEMBER(okibank_w);
void soundcmd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void okibank_w(uint8_t data);
virtual void machine_start() override;
virtual void video_start() override;
uint32_t screen_update_diverboy(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -147,7 +147,7 @@ uint32_t diverboy_state::screen_update_diverboy(screen_device &screen, bitmap_in
}
WRITE16_MEMBER(diverboy_state::soundcmd_w)
void diverboy_state::soundcmd_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if (ACCESSING_BITS_0_7)
{
@ -156,7 +156,7 @@ WRITE16_MEMBER(diverboy_state::soundcmd_w)
}
}
WRITE8_MEMBER(diverboy_state::okibank_w)
void diverboy_state::okibank_w(uint8_t data)
{
/* bit 2 might be reset */
// popmessage("%02x",data);

8
src/mame/drivers/dkmb.cpp
View File

@ -42,8 +42,8 @@ public:
void dkmb(machine_config &config);
DECLARE_READ64_MEMBER(unk_2060000_r);
DECLARE_READ64_MEMBER(unk_20c0010_r);
u64 unk_2060000_r();
u64 unk_20c0010_r();
protected:
virtual void machine_start() override;
@ -84,12 +84,12 @@ uint32_t dkmb_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
}
READ64_MEMBER(dkmb_state::unk_2060000_r)
u64 dkmb_state::unk_2060000_r()
{
return ((u64)machine().rand()) << 56;
}
READ64_MEMBER(dkmb_state::unk_20c0010_r)
u64 dkmb_state::unk_20c0010_r()
{
return ((u64)machine().rand()) << 56;
}

24
src/mame/drivers/dlair.cpp
View File

@ -119,12 +119,12 @@ private:
return CLEAR_LINE;
}
DECLARE_WRITE8_MEMBER(misc_w);
DECLARE_WRITE8_MEMBER(dleuro_misc_w);
DECLARE_WRITE8_MEMBER(led_den1_w);
DECLARE_WRITE8_MEMBER(led_den2_w);
DECLARE_READ8_MEMBER(laserdisc_r);
DECLARE_WRITE8_MEMBER(laserdisc_w);
void misc_w(uint8_t data);
void dleuro_misc_w(uint8_t data);
void led_den1_w(offs_t offset, uint8_t data);
void led_den2_w(offs_t offset, uint8_t data);
uint8_t laserdisc_r();
void laserdisc_w(uint8_t data);
virtual void machine_start() override;
virtual void machine_reset() override;
void dleuro_palette(palette_device &palette) const;
@ -274,7 +274,7 @@ void dlair_state::machine_reset()
*
*************************************/
WRITE8_MEMBER(dlair_state::misc_w)
void dlair_state::misc_w(uint8_t data)
{
/*
D0-D3 = B0-B3
@ -297,7 +297,7 @@ WRITE8_MEMBER(dlair_state::misc_w)
}
WRITE8_MEMBER(dlair_state::dleuro_misc_w)
void dlair_state::dleuro_misc_w(uint8_t data)
{
/*
D0 = CHAR GEN ON+
@ -324,13 +324,13 @@ WRITE8_MEMBER(dlair_state::dleuro_misc_w)
}
WRITE8_MEMBER(dlair_state::led_den1_w)
void dlair_state::led_den1_w(offs_t offset, uint8_t data)
{
m_digits[0 | (offset & 7)] = led_map[data & 0x0f];
}
WRITE8_MEMBER(dlair_state::led_den2_w)
void dlair_state::led_den2_w(offs_t offset, uint8_t data)
{
m_digits[8 | (offset & 7)] = led_map[data & 0x0f];
}
@ -355,7 +355,7 @@ READ_LINE_MEMBER(dlair_state::laserdisc_command_r)
}
READ8_MEMBER(dlair_state::laserdisc_r)
uint8_t dlair_state::laserdisc_r()
{
uint8_t result = laserdisc_data_r();
osd_printf_debug("laserdisc_r = %02X\n", result);
@ -363,7 +363,7 @@ READ8_MEMBER(dlair_state::laserdisc_r)
}
WRITE8_MEMBER(dlair_state::laserdisc_w)
void dlair_state::laserdisc_w(uint8_t data)
{
m_laserdisc_data = data;
}

12
src/mame/drivers/dmndrby.cpp
View File

@ -100,9 +100,9 @@ private:
required_device<palette_device> m_palette;
required_device<generic_latch_8_device> m_soundlatch;
DECLARE_WRITE8_MEMBER(dderby_sound_w);
DECLARE_READ8_MEMBER(input_r);
DECLARE_WRITE8_MEMBER(output_w);
void dderby_sound_w(uint8_t data);
uint8_t input_r(offs_t offset);
void output_w(offs_t offset, uint8_t data);
TILE_GET_INFO_MEMBER(get_dmndrby_tile_info);
void dmndrby_palette(palette_device &palette) const;
uint32_t screen_update_dderby(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -114,14 +114,14 @@ private:
};
WRITE8_MEMBER(dmndrby_state::dderby_sound_w)
void dmndrby_state::dderby_sound_w(uint8_t data)
{
m_soundlatch->write(data);
m_audiocpu->set_input_line(0, HOLD_LINE);
}
READ8_MEMBER(dmndrby_state::input_r)
uint8_t dmndrby_state::input_r(offs_t offset)
{
switch(offset & 7)
{
@ -138,7 +138,7 @@ READ8_MEMBER(dmndrby_state::input_r)
return 0xff;
}
WRITE8_MEMBER(dmndrby_state::output_w)
void dmndrby_state::output_w(offs_t offset, uint8_t data)
{
/*
---- x--- refill meter [4]

8
src/mame/drivers/dms5000.cpp
View File

@ -28,8 +28,8 @@ public:
void dms5000(machine_config &config);
private:
DECLARE_READ8_MEMBER(status_r);
DECLARE_WRITE8_MEMBER(brightness_w);
uint8_t status_r(offs_t offset);
void brightness_w(uint8_t data);
virtual void machine_reset() override;
virtual void video_start() override;
uint32_t screen_update_dms5000(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -41,7 +41,7 @@ private:
};
READ8_MEMBER(dms5000_state::status_r)
uint8_t dms5000_state::status_r(offs_t offset)
{
switch (offset)
{
@ -56,7 +56,7 @@ READ8_MEMBER(dms5000_state::status_r)
}
}
WRITE8_MEMBER(dms5000_state::brightness_w)
void dms5000_state::brightness_w(uint8_t data)
{
}

14
src/mame/drivers/dms86.cpp
View File

@ -54,10 +54,10 @@ public:
DECLARE_WRITE_LINE_MEMBER(nmi_w);
private:
DECLARE_WRITE8_MEMBER(m1_ack_w);
void m1_ack_w(u8 data);
DECLARE_READ16_MEMBER(port9a_r);
DECLARE_READ16_MEMBER(port9c_r);
u16 port9a_r();
u16 port9c_r();
void kbd_put(u8 data);
void io_map(address_map &map);
@ -78,7 +78,7 @@ WRITE_LINE_MEMBER(dms86_state::nmi_w)
}
WRITE8_MEMBER(dms86_state::m1_ack_w)
void dms86_state::m1_ack_w(u8 data)
{
m_sio[0]->z80daisy_decode(data);
m_sio[1]->z80daisy_decode(data);
@ -86,14 +86,14 @@ WRITE8_MEMBER(dms86_state::m1_ack_w)
}
READ16_MEMBER(dms86_state::port9a_r)
u16 dms86_state::port9a_r()
{
return m_term_data ? 0x40 : 0;
}
READ16_MEMBER(dms86_state::port9c_r)
u16 dms86_state::port9c_r()
{
uint8_t ret = m_term_data;
u8 ret = m_term_data;
m_term_data = 0;
return ret;
}

60
src/mame/drivers/dmv.cpp
View File

@ -81,25 +81,25 @@ public:
private:
void update_halt_line();
DECLARE_WRITE8_MEMBER(leds_w);
void leds_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(dma_hrq_changed);
DECLARE_WRITE_LINE_MEMBER(dmac_eop);
DECLARE_WRITE_LINE_MEMBER(dmac_dack3);
DECLARE_WRITE_LINE_MEMBER(fdc_irq);
DECLARE_WRITE_LINE_MEMBER(pit_out0);
DECLARE_WRITE_LINE_MEMBER(timint_w);
DECLARE_WRITE8_MEMBER(fdd_motor_w);
DECLARE_READ8_MEMBER(sys_status_r);
DECLARE_WRITE8_MEMBER(tc_set_w);
DECLARE_WRITE8_MEMBER(switch16_w);
DECLARE_READ8_MEMBER(ramsel_r);
DECLARE_READ8_MEMBER(romsel_r);
DECLARE_WRITE8_MEMBER(ramsel_w);
DECLARE_WRITE8_MEMBER(romsel_w);
void fdd_motor_w(uint8_t data);
uint8_t sys_status_r();
void tc_set_w(uint8_t data);
void switch16_w(uint8_t data);
uint8_t ramsel_r();
uint8_t romsel_r();
void ramsel_w(uint8_t data);
void romsel_w(uint8_t data);
uint8_t kb_mcu_port1_r();
void kb_mcu_port1_w(uint8_t data);
void kb_mcu_port2_w(uint8_t data);
DECLARE_WRITE8_MEMBER(rambank_w);
void rambank_w(offs_t offset, uint8_t data);
uint8_t program_r(offs_t offset);
void program_w(offs_t offset, uint8_t data);
uint8_t exp_program_r(offs_t offset);
@ -134,16 +134,16 @@ private:
void ifsel_r(int ifsel, offs_t offset, uint8_t &data);
void ifsel_w(int ifsel, offs_t offset, uint8_t data);
DECLARE_READ8_MEMBER(ifsel0_r) { uint8_t data = 0xff; ifsel_r(0, offset, data); return data; }
DECLARE_READ8_MEMBER(ifsel1_r) { uint8_t data = 0xff; ifsel_r(1, offset, data); return data; }
DECLARE_READ8_MEMBER(ifsel2_r) { uint8_t data = 0xff; ifsel_r(2, offset, data); return data; }
DECLARE_READ8_MEMBER(ifsel3_r) { uint8_t data = 0xff; ifsel_r(3, offset, data); return data; }
DECLARE_READ8_MEMBER(ifsel4_r) { uint8_t data = 0xff; ifsel_r(4, offset, data); return data; }
DECLARE_WRITE8_MEMBER(ifsel0_w) { ifsel_w(0, offset, data); }
DECLARE_WRITE8_MEMBER(ifsel1_w) { ifsel_w(1, offset, data); }
DECLARE_WRITE8_MEMBER(ifsel2_w) { ifsel_w(2, offset, data); }
DECLARE_WRITE8_MEMBER(ifsel3_w) { ifsel_w(3, offset, data); }
DECLARE_WRITE8_MEMBER(ifsel4_w) { ifsel_w(4, offset, data); }
uint8_t ifsel0_r(offs_t offset) { uint8_t data = 0xff; ifsel_r(0, offset, data); return data; }
uint8_t ifsel1_r(offs_t offset) { uint8_t data = 0xff; ifsel_r(1, offset, data); return data; }
uint8_t ifsel2_r(offs_t offset) { uint8_t data = 0xff; ifsel_r(2, offset, data); return data; }
uint8_t ifsel3_r(offs_t offset) { uint8_t data = 0xff; ifsel_r(3, offset, data); return data; }
uint8_t ifsel4_r(offs_t offset) { uint8_t data = 0xff; ifsel_r(4, offset, data); return data; }
void ifsel0_w(offs_t offset, uint8_t data) { ifsel_w(0, offset, data); }
void ifsel1_w(offs_t offset, uint8_t data) { ifsel_w(1, offset, data); }
void ifsel2_w(offs_t offset, uint8_t data) { ifsel_w(2, offset, data); }
void ifsel3_w(offs_t offset, uint8_t data) { ifsel_w(3, offset, data); }
void ifsel4_w(offs_t offset, uint8_t data) { ifsel_w(4, offset, data); }
UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
UPD7220_DRAW_TEXT_LINE_MEMBER( hgdc_draw_text );
@ -196,18 +196,18 @@ private:
int m_irqs[8];
};
WRITE8_MEMBER(dmv_state::tc_set_w)
void dmv_state::tc_set_w(uint8_t data)
{
m_fdc->tc_w(true);
}
WRITE8_MEMBER(dmv_state::switch16_w)
void dmv_state::switch16_w(uint8_t data)
{
m_switch16 = !m_switch16;
update_halt_line();
}
WRITE8_MEMBER(dmv_state::leds_w)
void dmv_state::leds_w(uint8_t data)
{
/*
LEDs Value Significance
@ -227,34 +227,34 @@ WRITE8_MEMBER(dmv_state::leds_w)
m_leds[7-i] = BIT(data, i);
}
READ8_MEMBER(dmv_state::ramsel_r)
uint8_t dmv_state::ramsel_r()
{
m_ramoutdis = false;
return 0;
}
READ8_MEMBER(dmv_state::romsel_r)
uint8_t dmv_state::romsel_r()
{
m_ramoutdis = true;
return 0;
}
WRITE8_MEMBER(dmv_state::ramsel_w)
void dmv_state::ramsel_w(uint8_t data)
{
m_ramoutdis = false;
}
WRITE8_MEMBER(dmv_state::romsel_w)
void dmv_state::romsel_w(uint8_t data)
{
m_ramoutdis = true;
}
WRITE8_MEMBER(dmv_state::rambank_w)
void dmv_state::rambank_w(offs_t offset, uint8_t data)
{
m_ram_bank = offset;
}
WRITE8_MEMBER(dmv_state::fdd_motor_w)
void dmv_state::fdd_motor_w(uint8_t data)
{
m_pit->write_gate0(1);
m_pit->write_gate0(0);
@ -264,7 +264,7 @@ WRITE8_MEMBER(dmv_state::fdd_motor_w)
if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(m_floppy_motor);
}
READ8_MEMBER(dmv_state::sys_status_r)
uint8_t dmv_state::sys_status_r()
{
/*
Main system status

12
src/mame/drivers/dolphunk.cpp
View File

@ -106,9 +106,9 @@ public:
private:
DECLARE_READ_LINE_MEMBER(cass_r);
DECLARE_READ8_MEMBER(port07_r);
DECLARE_WRITE8_MEMBER(port00_w);
DECLARE_WRITE8_MEMBER(port06_w);
uint8_t port07_r();
void port00_w(offs_t offset, uint8_t data);
void port06_w(uint8_t data);
TIMER_DEVICE_CALLBACK_MEMBER(kansas_w);
void dauphin_io(address_map &map);
void dauphin_mem(address_map &map);
@ -129,18 +129,18 @@ READ_LINE_MEMBER( dauphin_state::cass_r )
return (m_cass->input() > 0.03) ? 1 : 0;
}
WRITE8_MEMBER( dauphin_state::port00_w )
void dauphin_state::port00_w(offs_t offset, uint8_t data)
{
m_display->matrix(1<<offset, data);
}
WRITE8_MEMBER( dauphin_state::port06_w )
void dauphin_state::port06_w(uint8_t data)
{
m_speaker_state ^=1;
m_speaker->level_w(m_speaker_state);
}
READ8_MEMBER( dauphin_state::port07_r )
uint8_t dauphin_state::port07_r()
{
uint8_t keyin, i, data = 0x40;

8
src/mame/drivers/dominob.cpp
View File

@ -101,8 +101,8 @@ private:
//uint8_t m_paddle_select;
//uint8_t m_paddle_value;
DECLARE_WRITE8_MEMBER(dominob_d008_w);
DECLARE_READ8_MEMBER(dominob_unk_port02_r);
void dominob_d008_w(uint8_t data);
uint8_t dominob_unk_port02_r();
uint32_t screen_update_dominob(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect );
void memmap(address_map &map);
@ -182,7 +182,7 @@ uint32_t dominob_state::screen_update_dominob(screen_device &screen, bitmap_ind1
}
WRITE8_MEMBER(dominob_state::dominob_d008_w)
void dominob_state::dominob_d008_w(uint8_t data)
{
/* is there a purpose on this ? always set to 0x00 (read from 0xc47b in RAM) */
}
@ -209,7 +209,7 @@ void dominob_state::memmap(address_map &map)
}
/* I don't know if this has a purpose - also read in 'arkatayt' but not handled */
READ8_MEMBER(dominob_state::dominob_unk_port02_r)
uint8_t dominob_state::dominob_unk_port02_r()
{
return 0xff;
}

16
src/mame/drivers/dorachan.cpp
View File

@ -38,10 +38,10 @@ public:
void dorachan(machine_config &config);
private:
DECLARE_WRITE8_MEMBER(control_w);
DECLARE_WRITE8_MEMBER(protection_w);
DECLARE_READ8_MEMBER(protection_r);
DECLARE_READ8_MEMBER(v128_r);
void control_w(uint8_t data);
void protection_w(uint8_t data);
uint8_t protection_r();
uint8_t v128_r();
uint32_t screen_update_dorachan(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void dorachan_io_map(address_map &map);
void dorachan_map(address_map &map);
@ -107,7 +107,7 @@ uint32_t dorachan_state::screen_update_dorachan(screen_device &screen, bitmap_rg
*
*************************************/
WRITE8_MEMBER(dorachan_state::protection_w)
void dorachan_state::protection_w(uint8_t data)
{
// e0 seems like some sort of control byte?
// ignore f3 writes, written after every command?
@ -118,7 +118,7 @@ WRITE8_MEMBER(dorachan_state::protection_w)
}
}
READ8_MEMBER(dorachan_state::protection_r)
uint8_t dorachan_state::protection_r()
{
switch (m_prot_value)
{
@ -135,13 +135,13 @@ READ8_MEMBER(dorachan_state::protection_r)
return 0;
}
READ8_MEMBER(dorachan_state::v128_r)
uint8_t dorachan_state::v128_r()
{
// to avoid resetting (when player 2 starts) bit 0 need to be inverted when screen is flipped
return 0xfe | (BIT(m_screen->vpos(), 7) ^ m_flip_screen);
}
WRITE8_MEMBER(dorachan_state::control_w)
void dorachan_state::control_w(uint8_t data)
{
// d6: flip screen
// other: ?

8
src/mame/drivers/dotrikun.cpp
View File

@ -62,8 +62,8 @@ protected:
uint8_t m_vram_latch;
uint8_t m_color;
DECLARE_WRITE8_MEMBER(vram_w);
DECLARE_WRITE8_MEMBER(color_w);
void vram_w(offs_t offset, uint8_t data);
void color_w(uint8_t data);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
TIMER_DEVICE_CALLBACK_MEMBER(interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(scanline_off);
@ -106,13 +106,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(dotrikun_state::scanline_on)
*
*************************************/
WRITE8_MEMBER(dotrikun_state::vram_w)
void dotrikun_state::vram_w(offs_t offset, uint8_t data)
{
m_screen->update_now();
m_vram[offset] = data;
}
WRITE8_MEMBER(dotrikun_state::color_w)
void dotrikun_state::color_w(uint8_t data)
{
// d0-d2: fg palette
// d3-d5: bg palette

40
src/mame/drivers/dpb7000.cpp
View File

@ -100,21 +100,21 @@ private:
void main_map(address_map &map);
void fddcpu_map(address_map &map);
DECLARE_READ16_MEMBER(bus_error_r);
DECLARE_WRITE16_MEMBER(bus_error_w);
uint16_t bus_error_r(offs_t offset);
void bus_error_w(offs_t offset, uint16_t data);
DECLARE_WRITE8_MEMBER(csr_w);
DECLARE_READ8_MEMBER(csr_r);
void csr_w(uint8_t data);
uint8_t csr_r();
DECLARE_READ16_MEMBER(cpu_ctrlbus_r);
DECLARE_WRITE16_MEMBER(cpu_ctrlbus_w);
uint16_t cpu_ctrlbus_r();
void cpu_ctrlbus_w(uint16_t data);
DECLARE_WRITE_LINE_MEMBER(req_a_w);
DECLARE_WRITE_LINE_MEMBER(req_b_w);
void fdd_index_callback(floppy_image_device *floppy, int state);
DECLARE_READ8_MEMBER(fdd_ctrl_r);
DECLARE_READ8_MEMBER(fdd_cmd_r);
uint8_t fdd_ctrl_r();
uint8_t fdd_cmd_r();
void fddcpu_p1_w(uint8_t data);
uint8_t fddcpu_p2_r();
void fddcpu_p2_w(uint8_t data);
@ -133,8 +133,8 @@ private:
SYSCTRL_REQ_B_IN = 0x8000
};
DECLARE_READ16_MEMBER(cpu_sysctrl_r);
DECLARE_WRITE16_MEMBER(cpu_sysctrl_w);
uint16_t cpu_sysctrl_r();
void cpu_sysctrl_w(uint16_t data);
void update_req_irqs();
MC6845_UPDATE_ROW(crtc_update_row);
@ -934,7 +934,7 @@ void dpb7000_state::diskseq_tick()
}
}
READ16_MEMBER(dpb7000_state::bus_error_r)
uint16_t dpb7000_state::bus_error_r(offs_t offset)
{
if(!machine().side_effects_disabled())
{
@ -945,7 +945,7 @@ READ16_MEMBER(dpb7000_state::bus_error_r)
return 0xff;
}
WRITE16_MEMBER(dpb7000_state::bus_error_w)
void dpb7000_state::bus_error_w(offs_t offset, uint16_t data)
{
if(!machine().side_effects_disabled())
{
@ -955,19 +955,19 @@ WRITE16_MEMBER(dpb7000_state::bus_error_w)
}
}
WRITE8_MEMBER(dpb7000_state::csr_w)
void dpb7000_state::csr_w(uint8_t data)
{
LOGMASKED(LOG_CSR, "%s: Card Select write: %02x\n", machine().describe_context(), data & 0x0f);
m_csr = data & 0x0f;
}
READ8_MEMBER(dpb7000_state::csr_r)
uint8_t dpb7000_state::csr_r()
{
LOGMASKED(LOG_CSR, "%s: Card Select read(?): %02x\n", machine().describe_context(), m_csr);
return m_csr;
}
READ16_MEMBER(dpb7000_state::cpu_ctrlbus_r)
uint16_t dpb7000_state::cpu_ctrlbus_r()
{
uint16_t ret = 0;
switch (m_csr)
@ -1175,7 +1175,7 @@ void dpb7000_state::handle_command(uint16_t data)
}
}
WRITE16_MEMBER(dpb7000_state::cpu_ctrlbus_w)
void dpb7000_state::cpu_ctrlbus_w(uint16_t data)
{
switch (m_csr)
{
@ -1491,7 +1491,7 @@ WRITE_LINE_MEMBER(dpb7000_state::req_b_w)
update_req_irqs();
}
READ16_MEMBER(dpb7000_state::cpu_sysctrl_r)
uint16_t dpb7000_state::cpu_sysctrl_r()
{
const uint16_t ctrl = m_sys_ctrl &~ SYSCTRL_AUTO_START;
const uint16_t auto_start = m_auto_start->read() ? SYSCTRL_AUTO_START : 0;
@ -1500,7 +1500,7 @@ READ16_MEMBER(dpb7000_state::cpu_sysctrl_r)
return ret;
}
WRITE16_MEMBER(dpb7000_state::cpu_sysctrl_w)
void dpb7000_state::cpu_sysctrl_w(uint16_t data)
{
const uint16_t mask = (SYSCTRL_REQ_A_EN | SYSCTRL_REQ_B_EN);
LOGMASKED(LOG_SYS_CTRL, "%s: CPU to Control Bus write: %04x\n", machine().describe_context(), data);
@ -1516,7 +1516,7 @@ void dpb7000_state::update_req_irqs()
m_maincpu->set_input_line(4, (m_sys_ctrl & SYSCTRL_REQ_B_IN) && (m_sys_ctrl & SYSCTRL_REQ_B_EN) ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER(dpb7000_state::fdd_ctrl_r)
uint8_t dpb7000_state::fdd_ctrl_r()
{
// D4: Command Tag Flag
// D5: Restore Flag
@ -1687,7 +1687,7 @@ uint8_t dpb7000_state::fddcpu_p2_r()
return ret;
}
READ8_MEMBER(dpb7000_state::fdd_cmd_r)
uint8_t dpb7000_state::fdd_cmd_r()
{
LOGMASKED(LOG_FDC_CMD, "%s: Floppy CPU command read: %02x\n", m_diskseq_cmd_to_ctrl);
return m_diskseq_cmd_to_ctrl;

36
src/mame/drivers/dps1.cpp
View File

@ -42,15 +42,15 @@ protected:
virtual void machine_reset() override;
private:
DECLARE_WRITE8_MEMBER(portb2_w);
DECLARE_WRITE8_MEMBER(portb4_w);
DECLARE_WRITE8_MEMBER(portb6_w);
DECLARE_WRITE8_MEMBER(portb8_w);
DECLARE_WRITE8_MEMBER(portba_w);
DECLARE_WRITE8_MEMBER(portbc_w);
DECLARE_WRITE8_MEMBER(portbe_w);
DECLARE_READ8_MEMBER(portff_r);
DECLARE_WRITE8_MEMBER(portff_w);
void portb2_w(uint8_t data);
void portb4_w(uint8_t data);
void portb6_w(uint8_t data);
void portb8_w(uint8_t data);
void portba_w(uint8_t data);
void portbc_w(uint8_t data);
void portbe_w(uint8_t data);
uint8_t portff_r();
void portff_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
void io_map(address_map &map);
@ -97,54 +97,54 @@ void dps1_state::io_map(address_map &map)
// read from disk, to memory
WRITE8_MEMBER( dps1_state::portb2_w )
void dps1_state::portb2_w(uint8_t data)
{
m_dma_dir = 1;
}
// write to disk, from memory
WRITE8_MEMBER( dps1_state::portb4_w )
void dps1_state::portb4_w(uint8_t data)
{
m_dma_dir = 0;
}
// enable eprom
WRITE8_MEMBER( dps1_state::portb6_w )
void dps1_state::portb6_w(uint8_t data)
{
membank("bankr0")->set_entry(1); // point at rom
}
// set A16-23
WRITE8_MEMBER( dps1_state::portb8_w )
void dps1_state::portb8_w(uint8_t data)
{
}
// set A8-15
WRITE8_MEMBER( dps1_state::portba_w )
void dps1_state::portba_w(uint8_t data)
{
m_dma_adr = (data << 8) | (m_dma_adr & 0xff);
}
// set A0-7
WRITE8_MEMBER( dps1_state::portbc_w )
void dps1_state::portbc_w(uint8_t data)
{
m_dma_adr = (m_dma_adr & 0xff00) | data;
}
// disable eprom
WRITE8_MEMBER( dps1_state::portbe_w )
void dps1_state::portbe_w(uint8_t data)
{
membank("bankr0")->set_entry(0); // point at ram
}
// read 8 front-panel switches
READ8_MEMBER( dps1_state::portff_r )
uint8_t dps1_state::portff_r()
{
return 0x0e;
}
// write to 8 leds
WRITE8_MEMBER( dps1_state::portff_w )
void dps1_state::portff_w(uint8_t data)
{
}

10
src/mame/drivers/dreambal.cpp
View File

@ -60,10 +60,10 @@ private:
uint32_t screen_update_dreambal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECO16IC_BANK_CB_MEMBER(bank_callback);
DECLARE_READ16_MEMBER( dreambal_protection_region_0_104_r );
DECLARE_WRITE16_MEMBER( dreambal_protection_region_0_104_w );
uint16_t dreambal_protection_region_0_104_r(offs_t offset);
void dreambal_protection_region_0_104_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
DECLARE_WRITE16_MEMBER( dreambal_eeprom_w )
void dreambal_eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0)
{
if (data&0xfff8)
{
@ -97,7 +97,7 @@ uint32_t dreambal_state::screen_update_dreambal(screen_device &screen, bitmap_in
}
READ16_MEMBER( dreambal_state::dreambal_protection_region_0_104_r )
uint16_t dreambal_state::dreambal_protection_region_0_104_r(offs_t offset)
{
int real_address = 0 + (offset *2);
int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff;
@ -106,7 +106,7 @@ READ16_MEMBER( dreambal_state::dreambal_protection_region_0_104_r )
return data;
}
WRITE16_MEMBER( dreambal_state::dreambal_protection_region_0_104_w )
void dreambal_state::dreambal_protection_region_0_104_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
int real_address = 0 + (offset *2);
int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff;

4
src/mame/drivers/dreamwld.cpp
View File

@ -179,7 +179,7 @@ private:
void prot_p2_w(uint8_t data);
uint8_t prot_p2_r();
DECLARE_WRITE32_MEMBER(to_prot_w);
void to_prot_w(uint32_t data);
template<int Layer> u16 vram_r(offs_t offset);
@ -786,7 +786,7 @@ uint8_t dreamwld_state::prot_p2_r()
return m_port2_data;
}
WRITE32_MEMBER(dreamwld_state::to_prot_w)
void dreamwld_state::to_prot_w(uint32_t data)
{
m_port2_data &= 0xfb; // lower bit 0x04 to indicate data sent?
logerror("%s:to_prot_w %08x\n", machine().describe_context(), data);

12
src/mame/drivers/drtomy.cpp
View File

@ -45,9 +45,9 @@ private:
/* misc */
int m_oki_bank;
DECLARE_WRITE16_MEMBER(drtomy_vram_fg_w);
DECLARE_WRITE16_MEMBER(drtomy_vram_bg_w);
DECLARE_WRITE16_MEMBER(drtomy_okibank_w);
void drtomy_vram_fg_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void drtomy_vram_bg_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void drtomy_okibank_w(uint16_t data);
TILE_GET_INFO_MEMBER(get_tile_info_fg);
TILE_GET_INFO_MEMBER(get_tile_info_bg);
virtual void machine_start() override;
@ -156,19 +156,19 @@ uint32_t drtomy_state::screen_update_drtomy(screen_device &screen, bitmap_ind16
return 0;
}
WRITE16_MEMBER(drtomy_state::drtomy_vram_fg_w)
void drtomy_state::drtomy_vram_fg_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_videoram_fg[offset]);
m_tilemap_fg->mark_tile_dirty(offset);
}
WRITE16_MEMBER(drtomy_state::drtomy_vram_bg_w)
void drtomy_state::drtomy_vram_bg_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_videoram_bg[offset]);
m_tilemap_bg->mark_tile_dirty(offset);
}
WRITE16_MEMBER(drtomy_state::drtomy_okibank_w)
void drtomy_state::drtomy_okibank_w(uint16_t data)
{
if (m_oki_bank != (data & 3))
{

8
src/mame/drivers/drw80pkr.cpp
View File

@ -82,13 +82,13 @@ private:
void p2_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(prog_w);
void bus_w(uint8_t data);
DECLARE_WRITE8_MEMBER(io_w);
void io_w(offs_t offset, uint8_t data);
DECLARE_READ_LINE_MEMBER(t0_r);
DECLARE_READ_LINE_MEMBER(t1_r);
uint8_t p1_r();
uint8_t p2_r();
uint8_t bus_r();
DECLARE_READ8_MEMBER(io_r);
uint8_t io_r(offs_t offset);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
void drw80pkr_palette(palette_device &palette) const;
@ -139,7 +139,7 @@ void drw80pkr_state::bus_w(uint8_t data)
m_bus = data;
}
WRITE8_MEMBER(drw80pkr_state::io_w)
void drw80pkr_state::io_w(offs_t offset, uint8_t data)
{
uint16_t n_offs;
@ -219,7 +219,7 @@ uint8_t drw80pkr_state::bus_r()
return m_bus;
}
READ8_MEMBER(drw80pkr_state::io_r)
uint8_t drw80pkr_state::io_r(offs_t offset)
{
uint8_t ret;
uint16_t kbdin;

4
src/mame/drivers/dsb46.cpp
View File

@ -50,7 +50,7 @@ protected:
virtual void machine_reset() override;
private:
DECLARE_WRITE8_MEMBER(port1a_w);
void port1a_w(uint8_t data);
void dsb46_io(address_map &map);
void dsb46_mem(address_map &map);
required_device<z80_device> m_maincpu;
@ -94,7 +94,7 @@ void dsb46_state::machine_reset()
m_maincpu->reset();
}
WRITE8_MEMBER( dsb46_state::port1a_w )
void dsb46_state::port1a_w(uint8_t data)
{
membank("read")->set_entry(data & 1);
}

56
src/mame/drivers/duet16.cpp
View File

@ -46,21 +46,21 @@ public:
protected:
void machine_reset() override;
private:
DECLARE_READ8_MEMBER(pic_r);
DECLARE_WRITE8_MEMBER(pic_w);
uint8_t dma_mem_r(offs_t offset);
void dma_mem_w(offs_t offset, uint8_t data);
DECLARE_READ8_MEMBER(dmapg_r);
DECLARE_WRITE8_MEMBER(dmapg_w);
DECLARE_WRITE8_MEMBER(fdcctrl_w);
DECLARE_WRITE8_MEMBER(dispctrl_w);
DECLARE_WRITE8_MEMBER(pal_w);
u8 pic_r(offs_t offset);
void pic_w(offs_t offset, u8 data);
u8 dma_mem_r(offs_t offset);
void dma_mem_w(offs_t offset, u8 data);
u8 dmapg_r();
void dmapg_w(u8 data);
void fdcctrl_w(u8 data);
void dispctrl_w(u8 data);
void pal_w(offs_t offset, u8 data);
DECLARE_WRITE_LINE_MEMBER(hrq_w);
DECLARE_READ8_MEMBER(rtc_r);
DECLARE_WRITE8_MEMBER(rtc_w);
DECLARE_READ8_MEMBER(rtc_stat_r);
DECLARE_WRITE8_MEMBER(rtc_addr_w);
DECLARE_READ16_MEMBER(sysstat_r);
u8 rtc_r();
void rtc_w(u8 data);
u8 rtc_stat_r();
void rtc_addr_w(u8 data);
u16 sysstat_r();
DECLARE_WRITE_LINE_MEMBER(rtc_d0_w);
DECLARE_WRITE_LINE_MEMBER(rtc_d1_w);
DECLARE_WRITE_LINE_MEMBER(rtc_d2_w);
@ -94,17 +94,17 @@ void duet16_state::machine_reset()
rtc_irq_reset();
}
READ8_MEMBER(duet16_state::pic_r)
u8 duet16_state::pic_r(offs_t offset)
{
return m_pic->read(offset ^ 1);
}
WRITE8_MEMBER(duet16_state::pic_w)
void duet16_state::pic_w(offs_t offset, u8 data)
{
m_pic->write(offset ^ 1, data);
}
WRITE8_MEMBER(duet16_state::fdcctrl_w)
void duet16_state::fdcctrl_w(u8 data)
{
floppy_image_device *f = m_fd[BIT(data, 2) ? 1 : 0]->get_device();
m_fdc->set_floppy(f);
@ -117,22 +117,22 @@ WRITE8_MEMBER(duet16_state::fdcctrl_w)
// TODO: bit 3 = LSPD
}
uint8_t duet16_state::dma_mem_r(offs_t offset)
u8 duet16_state::dma_mem_r(offs_t offset)
{
return m_maincpu->space(AS_PROGRAM).read_byte((m_dmapg << 16) | offset);
}
void duet16_state::dma_mem_w(offs_t offset, uint8_t data)
void duet16_state::dma_mem_w(offs_t offset, u8 data)
{
m_maincpu->space(AS_PROGRAM).write_byte((m_dmapg << 16) | offset, data);
}
READ8_MEMBER(duet16_state::dmapg_r)
u8 duet16_state::dmapg_r()
{
return m_dmapg;
}
WRITE8_MEMBER(duet16_state::dmapg_w)
void duet16_state::dmapg_w(u8 data)
{
m_dmapg = data & 0xf;
}
@ -143,7 +143,7 @@ WRITE_LINE_MEMBER(duet16_state::hrq_w)
m_dmac->hack_w(state);
}
READ16_MEMBER(duet16_state::sysstat_r)
u16 duet16_state::sysstat_r()
{
return 0xb484;
}
@ -178,14 +178,14 @@ void duet16_state::duet16_io(address_map &map)
{
}
WRITE8_MEMBER(duet16_state::pal_w)
void duet16_state::pal_w(offs_t offset, u8 data)
{
int entry = (BIT(offset, 0) ? 2 : 0) | (BIT(offset, 5) ? 0 : 4);
m_pal->set_pen_color(entry, pal1bit(BIT(data, 1)), pal1bit(BIT(data, 2)), pal1bit(BIT(data, 0)));
m_pal->set_pen_color(entry + 1, pal1bit(BIT(data, 5)), pal1bit(BIT(data, 6)), pal1bit(BIT(data, 4)));
}
WRITE8_MEMBER(duet16_state::dispctrl_w)
void duet16_state::dispctrl_w(u8 data)
{
m_dispctrl = data;
}
@ -276,7 +276,7 @@ void duet16_state::rtc_irq_reset()
m_tmint->in_w<1>(0);
}
READ8_MEMBER(duet16_state::rtc_r)
u8 duet16_state::rtc_r()
{
u8 ret;
m_rtc->cs2_w(ASSERT_LINE);
@ -287,7 +287,7 @@ READ8_MEMBER(duet16_state::rtc_r)
return ret;
}
WRITE8_MEMBER(duet16_state::rtc_w)
void duet16_state::rtc_w(u8 data)
{
m_rtc->d0_w(BIT(data, 0));
m_rtc->d1_w(BIT(data, 1));
@ -299,7 +299,7 @@ WRITE8_MEMBER(duet16_state::rtc_w)
m_rtc->cs2_w(CLEAR_LINE);
}
READ8_MEMBER(duet16_state::rtc_stat_r)
u8 duet16_state::rtc_stat_r()
{
u8 status = m_rtc_irq ? 0x80 : 0;
if (!machine().side_effects_disabled())
@ -307,7 +307,7 @@ READ8_MEMBER(duet16_state::rtc_stat_r)
return status;
}
WRITE8_MEMBER(duet16_state::rtc_addr_w)
void duet16_state::rtc_addr_w(u8 data)
{
m_rtc->d0_w(BIT(data, 0));
m_rtc->d1_w(BIT(data, 1));

76
src/mame/drivers/dunhuang.cpp
View File

@ -84,26 +84,26 @@ public:
void dunhuang(machine_config &config);
private:
DECLARE_WRITE8_MEMBER(pos_x_w);
DECLARE_WRITE8_MEMBER(pos_y_w);
DECLARE_WRITE8_MEMBER(tile_w);
DECLARE_WRITE8_MEMBER(tile2_w);
DECLARE_WRITE8_MEMBER(clear_y_w);
DECLARE_WRITE8_MEMBER(horiz_clear_w);
DECLARE_WRITE8_MEMBER(vert_clear_w);
DECLARE_WRITE8_MEMBER(block_dest_w);
DECLARE_WRITE8_MEMBER(block_x_w);
DECLARE_WRITE8_MEMBER(block_y_w);
DECLARE_WRITE8_MEMBER(block_w_w);
DECLARE_WRITE8_MEMBER(block_c_w);
DECLARE_WRITE8_MEMBER(block_addr_lo_w);
DECLARE_WRITE8_MEMBER(block_addr_hi_w);
DECLARE_WRITE8_MEMBER(block_h_w);
DECLARE_WRITE8_MEMBER(layers_w);
void pos_x_w(uint8_t data);
void pos_y_w(uint8_t data);
void tile_w(offs_t offset, uint8_t data);
void tile2_w(offs_t offset, uint8_t data);
void clear_y_w(uint8_t data);
void horiz_clear_w(uint8_t data);
void vert_clear_w(uint8_t data);
void block_dest_w(uint8_t data);
void block_x_w(uint8_t data);
void block_y_w(uint8_t data);
void block_w_w(uint8_t data);
void block_c_w(uint8_t data);
void block_addr_lo_w(uint8_t data);
void block_addr_hi_w(uint8_t data);
void block_h_w(uint8_t data);
void layers_w(uint8_t data);
void input_w(uint8_t data);
DECLARE_READ8_MEMBER(service_r);
DECLARE_READ8_MEMBER(input_r);
DECLARE_WRITE8_MEMBER(rombank_w);
uint8_t service_r();
uint8_t input_r();
void rombank_w(uint8_t data);
uint8_t dsw_r();
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -226,21 +226,21 @@ if (machine().input().code_pressed(KEYCODE_Z))
// Tilemaps access
WRITE8_MEMBER(dunhuang_state::pos_x_w)
void dunhuang_state::pos_x_w(uint8_t data)
{
m_pos_x = data & 0x3f;
m_written = 0;
m_written2 = 0;
}
WRITE8_MEMBER(dunhuang_state::pos_y_w)
void dunhuang_state::pos_y_w(uint8_t data)
{
m_pos_y = data;
m_written = 0;
m_written2 = 0;
}
WRITE8_MEMBER(dunhuang_state::tile_w)
void dunhuang_state::tile_w(offs_t offset, uint8_t data)
{
int addr;
@ -266,7 +266,7 @@ WRITE8_MEMBER(dunhuang_state::tile_w)
m_tmap->mark_tile_dirty(addr);
}
WRITE8_MEMBER(dunhuang_state::tile2_w)
void dunhuang_state::tile2_w(offs_t offset, uint8_t data)
{
int addr;
@ -294,11 +294,11 @@ WRITE8_MEMBER(dunhuang_state::tile2_w)
// Clear a row of tiles (videoram)
WRITE8_MEMBER(dunhuang_state::clear_y_w)
void dunhuang_state::clear_y_w(uint8_t data)
{
m_clear_y = data;
}
WRITE8_MEMBER(dunhuang_state::horiz_clear_w)
void dunhuang_state::horiz_clear_w(uint8_t data)
{
int i;
// logerror("%06x: horiz clear, y = %02x, data = %02d\n", m_maincpu->pc(), m_clear_y,data);
@ -314,7 +314,7 @@ WRITE8_MEMBER(dunhuang_state::horiz_clear_w)
// Clear a column of tiles (videoram2)
WRITE8_MEMBER(dunhuang_state::vert_clear_w)
void dunhuang_state::vert_clear_w(uint8_t data)
{
int i;
// logerror("%06x: vert clear, x = %02x, y = %02x, data = %02x\n", m_maincpu->pc(), m_pos_x,m_pos_y,data);
@ -334,43 +334,43 @@ WRITE8_MEMBER(dunhuang_state::vert_clear_w)
// The tiles codes are read from the graphics roms too!
//
WRITE8_MEMBER(dunhuang_state::block_dest_w)
void dunhuang_state::block_dest_w(uint8_t data)
{
m_block_dest = data;
}
WRITE8_MEMBER(dunhuang_state::block_x_w)
void dunhuang_state::block_x_w(uint8_t data)
{
m_block_x = data;
}
WRITE8_MEMBER(dunhuang_state::block_y_w)
void dunhuang_state::block_y_w(uint8_t data)
{
m_block_y = data;
}
WRITE8_MEMBER(dunhuang_state::block_w_w)
void dunhuang_state::block_w_w(uint8_t data)
{
m_block_w = data;
}
WRITE8_MEMBER(dunhuang_state::block_c_w)
void dunhuang_state::block_c_w(uint8_t data)
{
m_block_c = data;
}
WRITE8_MEMBER(dunhuang_state::block_addr_lo_w)
void dunhuang_state::block_addr_lo_w(uint8_t data)
{
m_block_addr_lo = data;
}
WRITE8_MEMBER(dunhuang_state::block_addr_hi_w)
void dunhuang_state::block_addr_hi_w(uint8_t data)
{
m_block_addr_hi = data;
}
WRITE8_MEMBER(dunhuang_state::block_h_w)
void dunhuang_state::block_h_w(uint8_t data)
{
int i,j, addr;
uint8_t *tile_addr;
@ -420,7 +420,7 @@ WRITE8_MEMBER(dunhuang_state::block_h_w)
// Layers control (not understood)
WRITE8_MEMBER(dunhuang_state::layers_w)
void dunhuang_state::layers_w(uint8_t data)
{
// popmessage("layers %02x",data);
m_layers = data;
@ -444,7 +444,7 @@ void dunhuang_state::input_w(uint8_t data)
m_input = data;
}
READ8_MEMBER(dunhuang_state::service_r)
uint8_t dunhuang_state::service_r()
{
return m_service->read()
| ((m_hopper && !(m_screen->frame_number() % 10)) ? 0x00 : 0x08) // bit 3: hopper sensor
@ -462,7 +462,7 @@ uint8_t dunhuang_state::dsw_r()
logerror("%s: warning, unknown dsw bits read, input = %02x\n", machine().describe_context(), m_input);
return 0xff;
}
READ8_MEMBER(dunhuang_state::input_r)
uint8_t dunhuang_state::input_r()
{
if (!(m_input & 0x01)) return m_inputs[0]->read();
if (!(m_input & 0x02)) return m_inputs[1]->read();
@ -473,7 +473,7 @@ READ8_MEMBER(dunhuang_state::input_r)
return 0xff;
}
WRITE8_MEMBER(dunhuang_state::rombank_w)
void dunhuang_state::rombank_w(uint8_t data)
{
// ? data & 0x01
// ? data & 0x02

48
src/mame/drivers/dvk_kcgd.cpp
View File

@ -85,18 +85,18 @@ private:
};
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
DECLARE_READ16_MEMBER(vram_addr_r);
DECLARE_READ16_MEMBER(vram_data_r);
DECLARE_READ16_MEMBER(vram_mmap_r);
DECLARE_WRITE16_MEMBER(vram_addr_w);
DECLARE_WRITE16_MEMBER(vram_data_w);
DECLARE_WRITE16_MEMBER(vram_mmap_w);
DECLARE_READ16_MEMBER(status_r);
DECLARE_WRITE16_MEMBER(status_w);
DECLARE_READ8_MEMBER(palette_index_r);
DECLARE_READ8_MEMBER(palette_data_r);
DECLARE_WRITE8_MEMBER(palette_index_w);
DECLARE_WRITE8_MEMBER(palette_data_w);
uint16_t vram_addr_r();
uint16_t vram_data_r();
uint16_t vram_mmap_r(offs_t offset);
void vram_addr_w(uint16_t data);
void vram_data_w(uint16_t data);
void vram_mmap_w(offs_t offset, uint16_t data);
uint16_t status_r();
void status_w(uint16_t data);
uint8_t palette_index_r();
uint8_t palette_data_r();
void palette_index_w(uint8_t data);
void palette_data_w(uint8_t data);
//emu_timer *m_vsync_on_timer;
//emu_timer *m_vsync_off_timer;
@ -190,65 +190,65 @@ void kcgd_state::kcgd_palette(palette_device &palette) const
VRAM is 128K and is word-addressable, so address fits into 16 bits.
Low 32K of VRAM are not used to store pixel data -- XXX.
*/
WRITE16_MEMBER(kcgd_state::vram_addr_w)
void kcgd_state::vram_addr_w(uint16_t data)
{
DBG_LOG(3,"VRAM WA", ("%06o\n", data));
m_video.vram_addr = data;
}
READ16_MEMBER(kcgd_state::vram_addr_r)
uint16_t kcgd_state::vram_addr_r()
{
DBG_LOG(3,"VRAM RA", ("\n"));
return m_video.vram_addr;
}
WRITE16_MEMBER(kcgd_state::vram_data_w)
void kcgd_state::vram_data_w(uint16_t data)
{
DBG_LOG(1,"VRAM W2", ("%06o <- %04XH\n", m_video.vram_addr, data));
m_videoram[m_video.vram_addr] = data | (BIT(m_video.control, 7) << 16);
}
READ16_MEMBER(kcgd_state::vram_data_r)
uint16_t kcgd_state::vram_data_r()
{
DBG_LOG(2,"VRAM R2", ("%06o\n", m_video.vram_addr));
m_video.status = (m_video.status & 0xff7f) | (BIT(m_videoram[m_video.vram_addr], 16) << 7);
return (uint16_t) (m_videoram[m_video.vram_addr] & 0xffff);
}
WRITE16_MEMBER(kcgd_state::vram_mmap_w)
void kcgd_state::vram_mmap_w(offs_t offset, uint16_t data)
{
DBG_LOG(3,"VRAM W1", ("%06o <- %04XH\n", offset, data));
m_videoram[offset] = data | (BIT(m_video.control, 7) << 16);
}
READ16_MEMBER(kcgd_state::vram_mmap_r)
uint16_t kcgd_state::vram_mmap_r(offs_t offset)
{
DBG_LOG(3,"VRAM R1", ("%06o\n", offset));
return (uint16_t) (m_videoram[offset] & 0xffff);
}
WRITE16_MEMBER(kcgd_state::status_w)
void kcgd_state::status_w(uint16_t data)
{
DBG_LOG(1,"Status W", ("data %04XH (useful %02XH)\n", data, data & 0x63));
// bits 7 and 15 are read-only
m_video.status = (m_video.status & 0x8080) | (data & 0x7f7f);
}
READ16_MEMBER(kcgd_state::status_r)
uint16_t kcgd_state::status_r()
{
uint16_t data = m_video.status ^ (BIT(m_video.control, 6) << 7);
DBG_LOG(1,"Status R", ("data %04X index %d\n", data, m_video.palette_index));
return data;
}
WRITE8_MEMBER(kcgd_state::palette_index_w)
void kcgd_state::palette_index_w(uint8_t data)
{
m_video.control = data;
m_video.palette_index = ((data >> 2) & 15);
DBG_LOG(1,"Palette index, Control W", ("data %02XH index %d\n", data, m_video.palette_index));
}
WRITE8_MEMBER(kcgd_state::palette_data_w)
void kcgd_state::palette_data_w(uint8_t data)
{
DBG_LOG(1,"Palette data W", ("data %02XH index %d\n", data, m_video.palette_index));
m_video.palette[m_video.palette_index] = data;
@ -256,12 +256,12 @@ WRITE8_MEMBER(kcgd_state::palette_data_w)
85*(data & 3), 85*((data >> 2) & 3), 85*((data >> 4) & 3));
}
READ8_MEMBER(kcgd_state::palette_index_r)
uint8_t kcgd_state::palette_index_r()
{
return 0;
}
READ8_MEMBER(kcgd_state::palette_data_r)
uint8_t kcgd_state::palette_data_r()
{
DBG_LOG(1,"Palette data R", ("index %d\n", m_video.palette_index));
return m_video.palette[m_video.palette_index];

20
src/mame/drivers/dwarfd.cpp
View File

@ -342,11 +342,11 @@ private:
required_region_ptr<uint16_t> m_charmap;
required_ioport m_dsw2;
DECLARE_READ8_MEMBER(dwarfd_ram_r);
DECLARE_WRITE8_MEMBER(dwarfd_ram_w);
DECLARE_WRITE8_MEMBER(output1_w);
DECLARE_WRITE8_MEMBER(output2_w);
DECLARE_READ8_MEMBER(qc_b8_r);
uint8_t dwarfd_ram_r(offs_t offset);
void dwarfd_ram_w(offs_t offset, uint8_t data);
void output1_w(uint8_t data);
void output2_w(uint8_t data);
uint8_t qc_b8_r();
DECLARE_WRITE_LINE_MEMBER(dwarfd_sod_callback);
DECLARE_WRITE_LINE_MEMBER(drq_w);
void dwarfd_palette(palette_device &palette) const;
@ -361,7 +361,7 @@ private:
};
READ8_MEMBER(dwarfd_state::dwarfd_ram_r)
uint8_t dwarfd_state::dwarfd_ram_r(offs_t offset)
{
if (m_crt_access == 0)
{
@ -374,12 +374,12 @@ READ8_MEMBER(dwarfd_state::dwarfd_ram_r)
}
}
WRITE8_MEMBER(dwarfd_state::dwarfd_ram_w)
void dwarfd_state::dwarfd_ram_w(offs_t offset, uint8_t data)
{
m_dw_ram[offset] = data;
}
WRITE8_MEMBER(dwarfd_state::output1_w)
void dwarfd_state::output1_w(uint8_t data)
{
/*
bits:
@ -394,7 +394,7 @@ WRITE8_MEMBER(dwarfd_state::output1_w)
*/
}
WRITE8_MEMBER(dwarfd_state::output2_w)
void dwarfd_state::output2_w(uint8_t data)
{
/*
bits:
@ -410,7 +410,7 @@ WRITE8_MEMBER(dwarfd_state::output2_w)
}
READ8_MEMBER(dwarfd_state::qc_b8_r)
uint8_t dwarfd_state::qc_b8_r()
{
return machine().rand();
}

12
src/mame/drivers/dynadice.cpp
View File

@ -81,9 +81,9 @@ private:
/* misc */
int m_ay_data;
DECLARE_WRITE8_MEMBER(videoram_w);
DECLARE_WRITE8_MEMBER(sound_data_w);
DECLARE_WRITE8_MEMBER(sound_control_w);
void videoram_w(offs_t offset, uint8_t data);
void sound_data_w(uint8_t data);
void sound_control_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_tile_info);
@ -96,19 +96,19 @@ private:
};
WRITE8_MEMBER(dynadice_state::videoram_w)
void dynadice_state::videoram_w(offs_t offset, uint8_t data)
{
m_videoram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
m_top_tilemap->mark_all_dirty();
}
WRITE8_MEMBER(dynadice_state::sound_data_w)
void dynadice_state::sound_data_w(uint8_t data)
{
m_ay_data = data;
}
WRITE8_MEMBER(dynadice_state::sound_control_w)
void dynadice_state::sound_control_w(uint8_t data)
{
/*
AY 3-8910 :

8
src/mame/drivers/dynamoah.cpp
View File

@ -33,8 +33,8 @@ public:
private:
void p1_w(uint8_t data);
void p3_w(uint8_t data);
DECLARE_READ8_MEMBER(ext_r);
DECLARE_WRITE8_MEMBER(ext_w);
uint8_t ext_r(offs_t offset);
void ext_w(offs_t offset, uint8_t data);
void i8031_mem(address_map &map);
void i8031_ext_mem(address_map &map);
@ -51,14 +51,14 @@ void dynamoah_state::p3_w(uint8_t data)
LOG("%s: P3 = %02X\n", machine().describe_context(), data);
}
READ8_MEMBER(dynamoah_state::ext_r)
uint8_t dynamoah_state::ext_r(offs_t offset)
{
if (!machine().side_effects_disabled())
LOG("%s: RD(%04X)\n", machine().describe_context(), offset);
return 0xff;
}
WRITE8_MEMBER(dynamoah_state::ext_w)
void dynamoah_state::ext_w(offs_t offset, uint8_t data)
{
LOG("%s: WR(%04X, %02X)\n", machine().describe_context(), offset, data);
}

16
src/mame/drivers/dynax.cpp
View File

@ -713,11 +713,11 @@ WRITE8_MEMBER(dynax_state::yarunara_blit_romregion_w)
{
switch(data)
{
case 0x00: dynax_blit_romregion_w(space, 0, 0); return;
case 0x01: dynax_blit_romregion_w(space, 0, 1); return;
case 0x80: dynax_blit_romregion_w(space, 0, 2); return;
case 0x81: dynax_blit_romregion_w(space, 0, 3); return;
case 0x82: dynax_blit_romregion_w(space, 0, 4); return; // mjcomv1
case 0x00: dynax_blit_romregion_w(0); return;
case 0x01: dynax_blit_romregion_w(1); return;
case 0x80: dynax_blit_romregion_w(2); return;
case 0x81: dynax_blit_romregion_w(3); return;
case 0x82: dynax_blit_romregion_w(4); return; // mjcomv1
}
logerror("%s: unmapped romregion=%02X\n", machine().describe_context(), data);
}
@ -1220,9 +1220,9 @@ WRITE8_MEMBER(dynax_state::tenkai_blit_romregion_w)
{
switch (data)
{
case 0x00: dynax_blit_romregion_w(space, 0, 0); return;
case 0x83: dynax_blit_romregion_w(space, 0, 1); return;
case 0x80: dynax_blit_romregion_w(space, 0, 2); return;
case 0x00: dynax_blit_romregion_w(0); return;
case 0x83: dynax_blit_romregion_w(1); return;
case 0x80: dynax_blit_romregion_w(2); return;
}
logerror("%04x: unmapped romregion=%02X\n", m_maincpu->pc(), data);
}

2
src/mame/includes/dynax.h
View File

@ -104,7 +104,7 @@ protected:
DECLARE_WRITE8_MEMBER(dynax_vblank_ack_w);
void dynax_blit_dest_w(uint8_t data);
DECLARE_WRITE8_MEMBER(dynax_blit_romregion_w);
void dynax_blit_romregion_w(uint8_t data);
DECLARE_WRITE8_MEMBER(dynax_extra_scrollx_w);
DECLARE_WRITE8_MEMBER(dynax_extra_scrolly_w);

2
src/mame/video/dynax.cpp
View File

@ -276,7 +276,7 @@ WRITE_LINE_MEMBER(dynax_state::flipscreen_w)
WRITE8_MEMBER(dynax_state::dynax_blit_romregion_w)
void dynax_state::dynax_blit_romregion_w(uint8_t data)
{
if (data < 8)
m_blitter->set_rom_bank(data);