mirror of
https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
Merge remote-tracking branch 'refs/remotes/mamedev/master' into shootout
This commit is contained in:
darq
commit
1b29fe0a3d
@ -1317,6 +1317,13 @@ configuration { "Debug", "gmake" }
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configuration { }
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if (_OPTIONS["SOURCES"] ~= nil) then
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local str = _OPTIONS["SOURCES"]
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for word in string.gmatch(str, '([^,]+)') do
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if (not os.isfile(path.join(MAME_DIR ,word))) then
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print("File " .. word.. " does not exist")
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os.exit()
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end
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end
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OUT_STR = os.outputof( PYTHON .. " " .. MAME_DIR .. "scripts/build/makedep.py " .. MAME_DIR .. " " .. _OPTIONS["SOURCES"] .. " target " .. _OPTIONS["subtarget"])
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load(OUT_STR)()
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os.outputof( PYTHON .. " " .. MAME_DIR .. "scripts/build/makedep.py " .. MAME_DIR .. " " .. _OPTIONS["SOURCES"] .. " drivers " .. _OPTIONS["subtarget"] .. " > ".. GEN_DIR .. _OPTIONS["target"] .. "/" .. _OPTIONS["subtarget"]..".flt")
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@ -1884,6 +1884,7 @@ files {
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MAME_DIR .. "src/mame/machine/pgmprot_orlegend.cpp",
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MAME_DIR .. "src/mame/machine/pgmprot_orlegend.h",
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MAME_DIR .. "src/mame/drivers/pgm2.cpp",
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MAME_DIR .. "src/mame/drivers/pgm3.cpp",
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MAME_DIR .. "src/mame/drivers/spoker.cpp",
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MAME_DIR .. "src/mame/machine/igs036crypt.cpp",
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MAME_DIR .. "src/mame/machine/igs036crypt.h",
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@ -16,7 +16,7 @@
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*
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* Todo
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* - Complete support for clock and timers
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* - Add interrupt support
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* - Complete interrupt support
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* - Add DMA support
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* - Add appropriate buffering for each submode
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**********************************************************************/
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@ -28,6 +28,7 @@
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#define LOGPRINT(x) { do { if (VERBOSE) logerror x; } while (0); }
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#define LOG(x) {} LOGPRINT(x)
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#define LOGR(x) {} LOGPRINT(x)
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#define LOGBIT(x) {} LOGPRINT(x)
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#define LOGDR(x) {} LOGPRINT(x)
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#define LOGINT(x) {} LOGPRINT(x)
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#define LOGSETUP(x) {} LOGPRINT(x)
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@ -64,6 +65,8 @@ pit68230_device::pit68230_device(const machine_config &mconfig, device_type type
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, m_h2_out_cb (*this)
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, m_h3_out_cb (*this)
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, m_h4_out_cb (*this)
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, m_tirq_out_cb (*this)
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, m_pirq_out_cb (*this)
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, m_pgcr(0)
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, m_psrr(0)
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, m_paddr(0)
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@ -100,6 +103,8 @@ pit68230_device::pit68230_device(const machine_config &mconfig, const char *tag,
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, m_h2_out_cb(*this)
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, m_h3_out_cb(*this)
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, m_h4_out_cb(*this)
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, m_tirq_out_cb (*this)
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, m_pirq_out_cb (*this)
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, m_pgcr(0)
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, m_psrr(0)
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, m_paddr(0)
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@ -141,6 +146,8 @@ void pit68230_device::device_start ()
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m_h2_out_cb.resolve_safe();
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m_h3_out_cb.resolve_safe();
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m_h4_out_cb.resolve_safe();
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m_tirq_out_cb.resolve_safe();
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m_pirq_out_cb.resolve_safe();
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// Timers
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pit_timer = timer_alloc(TIMER_ID_PIT);
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@ -177,7 +184,7 @@ void pit68230_device::device_reset ()
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m_paddr = 0;
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m_pbddr = 0;
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m_pcddr = 0;
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m_pivr = 0x0f;
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m_pivr = 0x0f; m_pirq_out_cb(CLEAR_LINE);
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m_pacr = 0; m_h2_out_cb(CLEAR_LINE);
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m_pbcr = 0; m_h4_out_cb(CLEAR_LINE);
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m_padr = 0; m_pa_out_cb((offs_t)0, m_padr);
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@ -185,23 +192,65 @@ void pit68230_device::device_reset ()
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m_pcdr = 0; m_pc_out_cb((offs_t)0, m_pcdr);
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m_psr = 0;
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m_tcr = 0;
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m_tivr = 0x0f;
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m_tivr = 0x0f; m_tirq_out_cb(CLEAR_LINE);
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m_tsr = 0;
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}
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/*
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* PIACK* provides the Port vector in an iack cycle modified by source H1-H4
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*/
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uint8_t pit68230_device::irq_piack()
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{
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LOGINT(("%s %s <- %02x\n",tag(), FUNCNAME, m_pivr));
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return m_pivr;
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}
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/*
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* TIACK* provides the Timer vector in an iack cycle
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*/
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uint8_t pit68230_device::irq_tiack()
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{
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LOGINT(("%s %s <- %02x\n",tag(), FUNCNAME, m_tivr));
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return m_tivr;
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}
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/*
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* trigger_interrupt - called when a potential interrupt condition occurs
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* but will only generate an interrupt when the PIT is programmed to do so.
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*/
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void pit68230_device::trigger_interrupt(int source)
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{
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LOGINT(("%s %s Source: %02x\n",tag(), FUNCNAME, source));
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if (source == INT_TIMER)
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{
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// TODO: implement priorities and support nested interrupts
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if ( (m_tcr & REG_TCR_TOUT_TIACK_MASK) == REG_TCR_TOUT_TIACK_INT ||
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(m_tcr & REG_TCR_TOUT_TIACK_MASK) == REG_TCR_TOUT_PC7_INT )
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{
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m_tirq_out_cb(ASSERT_LINE);
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}
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}
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else
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{
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// TODO: implement priorities and support nested interrupts for the H1-H4 sources
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m_pirq_out_cb(ASSERT_LINE);
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}
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}
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void pit68230_device::tick_clock()
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{
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if (m_tcr & REG_TCR_TIMER_ENABLE)
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{
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if (m_cntr-- == 0) // Zero detect
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{
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LOG(("Timer reached zero!\n"));
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/* TODO: Check mode and use preload value if required or just rollover 24 bit */
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LOGINT(("Timer reached zero!\n"));
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if ((m_tcr & REG_TCR_ZD) == 0)
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m_cntr = m_cpr;
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else // mask off to 24 bit on rollover
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m_cntr &= 0xffffff;
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m_tsr = 1;
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trigger_interrupt(INT_TIMER);
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}
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}
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}
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@ -217,7 +266,7 @@ void pit68230_device::device_timer (emu_timer &timer, device_timer_id id, int32_
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tick_clock();
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break;
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default:
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LOGINT(("Unhandled Timer ID %d\n", id));
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LOG(("Unhandled Timer ID %d\n", id));
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break;
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}
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}
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@ -235,7 +284,7 @@ void pit68230_device::portb_setbit(uint8_t bit, uint8_t state)
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void pit68230_device::pa_update_bit(uint8_t bit, uint8_t state)
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{
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LOG(("%s %s bit %d to %d\n",tag(), FUNCNAME, bit, state));
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LOGBIT(("%s %s bit %d to %d\n",tag(), FUNCNAME, bit, state));
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// Check if requested bit is an output bit and can't be affected
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if (m_paddr & (1 << bit))
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{
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@ -250,7 +299,7 @@ void pit68230_device::pa_update_bit(uint8_t bit, uint8_t state)
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void pit68230_device::pb_update_bit(uint8_t bit, uint8_t state)
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{
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LOG(("%s %s bit %d to %d\n",tag(), FUNCNAME, bit, state));
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LOGBIT(("%s %s bit %d to %d\n",tag(), FUNCNAME, bit, state));
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// Check if requested bit is an output bit and can't be affected
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if (m_pbddr & (1 << bit))
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{
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@ -266,7 +315,7 @@ void pit68230_device::pb_update_bit(uint8_t bit, uint8_t state)
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// TODO: Make sure port C is in the right alternate mode
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void pit68230_device::pc_update_bit(uint8_t bit, uint8_t state)
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{
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LOG(("%s %s bit %d to %d\n",tag(), FUNCNAME, bit, state));
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LOGBIT(("%s %s bit %d to %d\n",tag(), FUNCNAME, bit, state));
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// Check if requested bit is an output bit and can't be affected
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if (m_pcddr & (1 << bit))
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{
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@ -541,19 +590,19 @@ void pit68230_device::wr_pitreg_tcr(uint8_t data)
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case REG_TCR_PC3_PC7:
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case REG_TCR_PC3_PC7_DC: LOG(("- PC3 and PC7 used as I/O pins\n")); break;
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case REG_TCR_TOUT_PC7_SQ:
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case REG_TCR_TOUT_PC7_SQ_DC: LOG(("- PC3 used as SQuare wave TOUT and PC7 used as I/O pin - not supported yet\n")); sqr = 1; break;
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case REG_TCR_TOUT_TIACK: LOG(("- PC3 used as TOUT and PC7 used as TIACK - not supported yet\n")); tout = 1; tiack = 1; break;
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case REG_TCR_TOUT_TIACK_INT: LOG(("- PC3 used as TOUT and PC7 used as TIACK, Interrupts enabled - not supported yet\n")); tout = 1; tiack = 1; irq = 1; break;
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case REG_TCR_TOUT_PC7: LOG(("- PC3 used as TOUT and PC7 used as I/O pin - not supported yet\n")); break;
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case REG_TCR_TOUT_PC7_INT: LOG(("- PC3 used as TOUT and PC7 used as I/O pin, Interrupts enabled - not supported yet\n")); break;
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case REG_TCR_TOUT_PC7_SQ_DC: LOG(("- PC3 used as SQuare wave TOUT and PC7 used as I/O pin - not implemented yet\n")); sqr = 1; break;
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case REG_TCR_TOUT_TIACK: LOG(("- PC3 used as TOUT and PC7 used as TIACK - not implemented yet\n")); tout = 1; tiack = 1; break;
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case REG_TCR_TOUT_TIACK_INT: LOG(("- PC3 used as TOUT and PC7 used as TIACK, Interrupts enabled\n")); tout = 1; tiack = 1; irq = 1; break;
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case REG_TCR_TOUT_PC7: LOG(("- PC3 used as TOUT and PC7 used as I/O pin - not implemented yet\n")); break;
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case REG_TCR_TOUT_PC7_INT: LOG(("- PC3 used as TOUT and PC7 used as I/O pin, Interrupts enabled\n")); tout = 1; irq = 1; break;
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}
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switch (m_tcr & REG_TCR_CC_MASK)
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{
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case REG_TCR_CC_PC2_CLK_PSC: LOG(("- PC2 used as I/O pin,CLK and x32 prescaler are used\n")); clk = 1; psc = 1; break;
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case REG_TCR_CC_TEN_CLK_PSC: LOG(("- PC2 used as Timer enable/disable, CLK and presacaler are used\n")); pen = 1; clk = 1; psc = 1; break;
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case REG_TCR_CC_TIN_PSC: LOG(("- PC2 used as Timer clock and the presacaler is used - not supported yet\n")); psc = 1; break;
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case REG_TCR_CC_TIN_RAW: LOG(("- PC2 used as Timer clock and the presacaler is NOT used - not supported yet\n")); break;
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case REG_TCR_CC_PC2_CLK_PSC: LOG(("- PC2 used as I/O pin,CLK and x32 prescaler are used\n")); clk = 1; psc = 1; break;
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case REG_TCR_CC_TEN_CLK_PSC: LOG(("- PC2 used as Timer enable/disable, CLK and presacaler are used - not implemented\n")); pen = 1; clk = 1; psc = 1; break;
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case REG_TCR_CC_TIN_PSC: LOG(("- PC2 used as Timer clock and the presacaler is used - not implemented\n")); psc = 1; break;
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case REG_TCR_CC_TIN_RAW: LOG(("- PC2 used as Timer clock and the presacaler is NOT used\n")); break;
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}
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LOG(("%s", m_tcr & REG_TCR_ZR ? "- Spec violation, should always be 0!\n" : ""));
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LOG(("- Timer %s when reaching 0 (zero)\n", m_tcr & REG_TCR_ZD ? "rolls over" : "reload the preload values"));
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@ -562,7 +611,10 @@ void pit68230_device::wr_pitreg_tcr(uint8_t data)
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if (m_tcr & REG_TCR_ENABLE)
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{
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m_cntr = 0;
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if (pen == 1){ LOG(("PC2 enable/disable TBD\n")); }
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if (pen == 1)
|
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{
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LOG(("PC2 enable/disable TBD\n"));
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}
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if (clk == 1)
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{
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int rate = clock() / (psc == 1 ? 32 : 1);
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@ -607,7 +659,11 @@ void pit68230_device::wr_pitreg_cprl(uint8_t data)
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void pit68230_device::wr_pitreg_tsr(uint8_t data)
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{
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LOG(("%s(%02x) \"%s\": \n", FUNCNAME, data, tag()));
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if (data & 1) m_tsr = 0; // A write resets the TSR;
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||||
if (data & 1)
|
||||
{
|
||||
m_tsr = 0; // A write resets the TSR;
|
||||
m_tirq_out_cb(CLEAR_LINE);
|
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}
|
||||
}
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||||
|
||||
WRITE8_MEMBER (pit68230_device::write)
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||||
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||||
@ -44,34 +44,40 @@
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||||
//**************************************************************************
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||||
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||||
#define MCFG_PIT68230_PA_INPUT_CB(_devcb) \
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devcb = &pit68230_device::set_pa_in_callback (*device, DEVCB_##_devcb);
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devcb = &pit68230_device::set_pa_in_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_PA_OUTPUT_CB(_devcb) \
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||||
devcb = &pit68230_device::set_pa_out_callback (*device, DEVCB_##_devcb);
|
||||
devcb = &pit68230_device::set_pa_out_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_PB_INPUT_CB(_devcb) \
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devcb = &pit68230_device::set_pb_in_callback (*device, DEVCB_##_devcb);
|
||||
devcb = &pit68230_device::set_pb_in_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_PB_OUTPUT_CB(_devcb) \
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||||
devcb = &pit68230_device::set_pb_out_callback (*device, DEVCB_##_devcb);
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||||
devcb = &pit68230_device::set_pb_out_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_PC_INPUT_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_pc_in_callback (*device, DEVCB_##_devcb);
|
||||
devcb = &pit68230_device::set_pc_in_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_PC_OUTPUT_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_pc_out_callback (*device, DEVCB_##_devcb);
|
||||
devcb = &pit68230_device::set_pc_out_callback (*device, DEVCB_##_devcb);
|
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|
||||
#define MCFG_PIT68230_H1_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_h1_out_callback (*device, DEVCB_##_devcb);
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||||
devcb = &pit68230_device::set_h1_out_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_H2_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_h2_out_callback (*device, DEVCB_##_devcb);
|
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devcb = &pit68230_device::set_h2_out_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_H3_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_h3_out_callback (*device, DEVCB_##_devcb);
|
||||
devcb = &pit68230_device::set_h3_out_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_H4_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_h4_out_callback (*device, DEVCB_##_devcb);
|
||||
devcb = &pit68230_device::set_h4_out_callback (*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_TIMER_IRQ_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_tirq_out_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_PIT68230_PORT_IRQ_CB(_devcb) \
|
||||
devcb = &pit68230_device::set_pirq_out_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Registers RS1-RS5 R/W Description
|
||||
@ -119,13 +125,14 @@ class pit68230_device : public device_t//, public device_execute_interface
|
||||
template<class _Object> static devcb_base &set_h2_out_callback (device_t &device, _Object object){ return downcast<pit68230_device &>(device).m_h2_out_cb.set_callback (object); }
|
||||
template<class _Object> static devcb_base &set_h3_out_callback (device_t &device, _Object object){ return downcast<pit68230_device &>(device).m_h3_out_cb.set_callback (object); }
|
||||
template<class _Object> static devcb_base &set_h4_out_callback (device_t &device, _Object object){ return downcast<pit68230_device &>(device).m_h4_out_cb.set_callback (object); }
|
||||
template<class _Object> static devcb_base &set_tirq_out_callback (device_t &device, _Object object){ return downcast<pit68230_device &>(device).m_tirq_out_cb.set_callback (object); }
|
||||
template<class _Object> static devcb_base &set_pirq_out_callback (device_t &device, _Object object){ return downcast<pit68230_device &>(device).m_pirq_out_cb.set_callback (object); }
|
||||
|
||||
DECLARE_WRITE8_MEMBER (write);
|
||||
DECLARE_READ8_MEMBER (read);
|
||||
|
||||
void h1_set (uint8_t state);
|
||||
void portb_setbit (uint8_t bit, uint8_t state);
|
||||
void tick_clock();
|
||||
|
||||
// Bit updaters
|
||||
void pa_update_bit(uint8_t bit, uint8_t state);
|
||||
@ -286,11 +293,18 @@ protected:
|
||||
REG_TCR_TOUT_PC7_INT = 0xe0, // 1 1 1
|
||||
};
|
||||
|
||||
void tick_clock();
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start () override;
|
||||
virtual void device_reset () override;
|
||||
virtual void device_timer (emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
|
||||
// Interrupt methods
|
||||
void trigger_interrupt(int source);
|
||||
uint8_t irq_tiack();
|
||||
uint8_t irq_piack();
|
||||
|
||||
int m_icount;
|
||||
|
||||
devcb_write8 m_pa_out_cb;
|
||||
@ -303,8 +317,10 @@ protected:
|
||||
devcb_write_line m_h2_out_cb;
|
||||
devcb_write_line m_h3_out_cb;
|
||||
devcb_write_line m_h4_out_cb;
|
||||
devcb_write_line m_tirq_out_cb;
|
||||
devcb_write_line m_pirq_out_cb;
|
||||
|
||||
// peripheral ports
|
||||
// registers
|
||||
uint8_t m_pgcr; // Port General Control register
|
||||
uint8_t m_psrr; // Port Service Request register
|
||||
uint8_t m_paddr; // Port A Data Direction register
|
||||
@ -323,6 +339,13 @@ protected:
|
||||
int m_cntr; // - The 24 bit Counter
|
||||
uint8_t m_tsr; // Timer Status Register
|
||||
|
||||
|
||||
// Interrupt sources
|
||||
enum
|
||||
{
|
||||
INT_TIMER
|
||||
};
|
||||
|
||||
// Timers
|
||||
emu_timer *pit_timer;
|
||||
|
||||
|
||||
@ -284,7 +284,7 @@ void pci_device::map_device(uint64_t memory_window_start, uint64_t memory_window
|
||||
case 5: space->install_readwrite_handler(start, end, read32_delegate(FUNC(pci_device::unmapped5_r), this), write32_delegate(FUNC(pci_device::unmapped5_w), this)); break;
|
||||
}
|
||||
|
||||
space->install_device_delegate(start, end, *this, bi.map);
|
||||
space->install_device_delegate(start, end, *bi.device, bi.map);
|
||||
logerror("map %s at %0*x-%0*x\n", bi.map.name(), bi.flags & M_IO ? 4 : 8, uint32_t(start), bi.flags & M_IO ? 4 : 8, uint32_t(end));
|
||||
}
|
||||
|
||||
@ -317,11 +317,12 @@ void pci_device::skip_map_regs(int count)
|
||||
assert(bank_reg_count <= 6);
|
||||
}
|
||||
|
||||
void pci_device::add_map(uint64_t size, int flags, address_map_delegate &map)
|
||||
void pci_device::add_map(uint64_t size, int flags, address_map_delegate &map, device_t *relative_to)
|
||||
{
|
||||
assert(bank_count < 6);
|
||||
int bid = bank_count++;
|
||||
bank_infos[bid].map = map;
|
||||
bank_infos[bid].device = relative_to ? relative_to : this;
|
||||
bank_infos[bid].adr = 0;
|
||||
bank_infos[bid].size = size;
|
||||
bank_infos[bid].flags = flags;
|
||||
|
||||
@ -94,8 +94,8 @@ protected:
|
||||
};
|
||||
|
||||
struct bank_info {
|
||||
// One of the two
|
||||
address_map_delegate map;
|
||||
device_t *device;
|
||||
|
||||
uint64_t adr;
|
||||
uint32_t size;
|
||||
@ -123,7 +123,7 @@ protected:
|
||||
virtual void device_reset() override;
|
||||
|
||||
void skip_map_regs(int count);
|
||||
void add_map(uint64_t size, int flags, address_map_delegate &map);
|
||||
void add_map(uint64_t size, int flags, address_map_delegate &map, device_t *relative_to = nullptr);
|
||||
template <typename T> void add_map(uint64_t size, int flags, void (T::*map)(address_map &map), const char *name) {
|
||||
address_map_delegate delegate(map, name, static_cast<T *>(this));
|
||||
add_map(size, flags, delegate);
|
||||
|
||||
@ -50,32 +50,22 @@ pci9050_device::pci9050_device(const machine_config &mconfig, const char *tag, d
|
||||
}
|
||||
}
|
||||
|
||||
void pci9050_device::set_map(int id, address_map_constructor map, const char *name, device_t *device)
|
||||
void pci9050_device::set_map(int id, const address_map_delegate &map, device_t *device)
|
||||
{
|
||||
m_maps[id] = map;
|
||||
m_names[id] = name;
|
||||
m_devices[id] = device;
|
||||
}
|
||||
|
||||
void pci9050_device::device_start()
|
||||
{
|
||||
typedef void (pci9050_device::*tramp_t)(address_map &);
|
||||
static const tramp_t trampolines[4] = {
|
||||
&pci9050_device::map_trampoline<0>,
|
||||
&pci9050_device::map_trampoline<1>,
|
||||
&pci9050_device::map_trampoline<2>,
|
||||
&pci9050_device::map_trampoline<3>
|
||||
};
|
||||
|
||||
pci_device::device_start();
|
||||
|
||||
add_map(0x80, M_MEM, FUNC(pci9050_device::map)); // map 0 is our config registers, mem space
|
||||
add_map(0x80, M_IO, FUNC(pci9050_device::map)); // map 1 is our config registers, i/o space
|
||||
|
||||
for(int i=0; i<4; i++)
|
||||
if(m_names[i])
|
||||
// add_map(0, M_MEM | M_DISABLED, m_maps[i], m_names[i], m_devices[i]);
|
||||
add_map(0, M_MEM | M_DISABLED, trampolines[i], m_names[i]);
|
||||
if(!m_maps[i].isnull())
|
||||
add_map(0, M_MEM | M_DISABLED, m_maps[i], m_devices[i]);
|
||||
else
|
||||
add_map(0, M_MEM | M_DISABLED, FUNC(pci9050_device::empty));
|
||||
|
||||
|
||||
@ -17,7 +17,7 @@
|
||||
MCFG_PCI_DEVICE_ADD(_tag, PCI9050, 0x10b59050, 0x01, 0x06800000, 0x10b59050)
|
||||
|
||||
#define MCFG_PCI9050_SET_MAP(id, map) \
|
||||
downcast<pci9050_device *>(device)->set_map(id, ADDRESS_MAP_NAME(map), #map, owner);
|
||||
downcast<pci9050_device *>(device)->set_map(id, address_map_delegate(ADDRESS_MAP_NAME(map), #map), owner);
|
||||
|
||||
#define MCFG_PCI9050_USER_INPUT_CALLBACK(_write) \
|
||||
devcb = &pci9050_device::set_user_input_callback(*device, DEVCB_##_write);
|
||||
@ -29,7 +29,7 @@ class pci9050_device :
|
||||
public pci_device
|
||||
{
|
||||
public:
|
||||
pci9050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
pci9050_device(const machine_config &mconfig, const char *tag, device_t *device, uint32_t clock);
|
||||
|
||||
// PCI9050 I/O register space handlers
|
||||
DECLARE_READ32_MEMBER( lasrr_r );
|
||||
@ -54,7 +54,7 @@ public:
|
||||
template<class _Object> static devcb_base &set_user_input_callback(device_t &device, _Object object) { return downcast<pci9050_device &>(device).m_user_input_handler.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_user_output_callback(device_t &device, _Object object) { return downcast<pci9050_device &>(device).m_user_output_handler.set_callback(object); }
|
||||
|
||||
void set_map(int id, address_map_constructor map, const char *name, device_t *device);
|
||||
void set_map(int id, const address_map_delegate &map, device_t *device);
|
||||
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
@ -67,7 +67,7 @@ private:
|
||||
|
||||
const char *m_names[4];
|
||||
device_t *m_devices[4];
|
||||
address_map_constructor m_maps[4];
|
||||
address_map_delegate m_maps[4];
|
||||
|
||||
uint32_t m_lasrr[4], m_lasba[4], m_lasbrd[4], m_csbase[4];
|
||||
uint32_t m_eromrr, m_eromba, m_erombrd, m_intcsr, m_cntrl;
|
||||
@ -75,10 +75,6 @@ private:
|
||||
void remap_local(int id);
|
||||
void remap_rom();
|
||||
|
||||
template<int id> void map_trampoline(address_map &map) {
|
||||
m_maps[id](map);
|
||||
}
|
||||
|
||||
devcb_read32 m_user_input_handler;
|
||||
devcb_write32 m_user_output_handler;
|
||||
|
||||
|
||||
@ -552,7 +552,7 @@ public:
|
||||
bool is_mfp() const { return !m_raw_mfp.isnull(); }
|
||||
|
||||
// late binding
|
||||
void late_bind(delegate_late_bind &object) { bind((*m_latebinder)(object)); }
|
||||
void late_bind(delegate_late_bind &object) { if(m_latebinder) bind((*m_latebinder)(object)); }
|
||||
|
||||
protected:
|
||||
// return the actual object (not the one we use for calling)
|
||||
|
||||
@ -850,6 +850,7 @@ peplus.cpp
|
||||
peyper.cpp
|
||||
pgm.cpp
|
||||
pgm2.cpp
|
||||
pgm3.cpp
|
||||
phoenix.cpp
|
||||
photon.cpp
|
||||
photon2.cpp
|
||||
|
||||
@ -699,7 +699,7 @@ static MACHINE_CONFIG_START (cpu30, cpu30_state)
|
||||
MCFG_PIT68230_PB_OUTPUT_CB(WRITE8(cpu30_state, flop_dmac_w))
|
||||
MCFG_PIT68230_PC_INPUT_CB(READ8(cpu30_state, pit1c_r))
|
||||
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(cpu30_state, pit1c_w))
|
||||
// MCFG_PIT68230_OUT_INT_CB(DEVWRITELINE("fga002", fga002_device, lirq2_w)) // Interrupts not yet supported by 68230
|
||||
// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq2_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
|
||||
|
||||
MCFG_DEVICE_ADD ("pit2", PIT68230, XTAL_16MHz / 2) // Th PIT clock is not verified on schema but reversed from behaviour
|
||||
MCFG_PIT68230_PB_INPUT_CB(READ8(cpu30_state, board_mem_id_rd))
|
||||
@ -707,7 +707,7 @@ static MACHINE_CONFIG_START (cpu30, cpu30_state)
|
||||
MCFG_PIT68230_PA_OUTPUT_CB(WRITE8(cpu30_state, pit2a_w))
|
||||
MCFG_PIT68230_PC_INPUT_CB(READ8(cpu30_state, pit2c_r))
|
||||
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(cpu30_state, pit2c_w))
|
||||
// MCFG_PIT68230_OUT_INT_CB(DEVWRITELINE("fga002", fga002_device, lirq3_w)) // Interrupts not yet supported by 68230
|
||||
// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq3_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
|
||||
|
||||
/* FGA-002, Force Gate Array */
|
||||
MCFG_FGA002_ADD("fga002", 0)
|
||||
|
||||
@ -77,7 +77,7 @@ Custom: EXCELLENT SYSTEM ES-9208 347102 (QFP160)
|
||||
|
||||
* Denotes unpopulated components
|
||||
|
||||
NOTE: Mask roms from Power Flipper Shooting Pinball have not been dumped, but assumed to
|
||||
NOTE: Mask roms from Power Flipper Pinball Shooting have not been dumped, but assumed to
|
||||
be the same data.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -2139,8 +2139,8 @@ ROM_END
|
||||
|
||||
ROM_START( pairs ) /* Version 1.2 (3-tier board set: P/N 1059 Rev 3, P/N 1061 Rev 1 & P/N 1060 Rev 0) */
|
||||
ROM_REGION16_BE( 0x80000, "user1", 0 )
|
||||
ROM_LOAD16_BYTE( "pair0_u83_v1.2.u83", 0x00000, 0x20000, CRC(a9c761d8) SHA1(2618c9c3f336cf30f760fd88f12c09985cfd4ee7) )
|
||||
ROM_LOAD16_BYTE( "pair1_u88_v1.2.u88", 0x00001, 0x20000, CRC(5141eb86) SHA1(3bb10d588e6334a33e5c2c468651699e84f46cdc) )
|
||||
ROM_LOAD16_BYTE( "pair0_u83_x_v1.2.u83", 0x00000, 0x20000, CRC(a9c761d8) SHA1(2618c9c3f336cf30f760fd88f12c09985cfd4ee7) )
|
||||
ROM_LOAD16_BYTE( "pair1_u88_x_v1.2.u88", 0x00001, 0x20000, CRC(5141eb86) SHA1(3bb10d588e6334a33e5c2c468651699e84f46cdc) )
|
||||
|
||||
ROM_REGION( 0x28000, "soundcpu", 0 )
|
||||
ROM_LOAD( "pairsnd_u17_v1.u17", 0x10000, 0x18000, CRC(7a514cfd) SHA1(ef5bc74c9560d2c058298051070fa748e58f07e1) )
|
||||
|
||||
@ -1796,22 +1796,22 @@ DRIVER_INIT_MEMBER(polgar_state,polgar)
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
|
||||
CONS( 1986, polgar, 0, 0, polgar, polgar, polgar_state, polgar, "Hegener & Glaser", "Mephisto Polgar Schachcomputer", MACHINE_NOT_WORKING | MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK)
|
||||
CONS( 1987, sfortea, 0, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version A)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1987, sfortea, 0, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version A)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, alm16, van16, 0, alm16, van16, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Almeria 68000", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, alm32, van16, 0, alm32, van32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Alimera 68020", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, sforteb, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version B)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, sforteba, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version B, alt)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, sexpertb, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Expert B Chess Computer", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, sforteb, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version B)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, sforteba, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version B, alt)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1988, sexpertb, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Expert B Chess Computer", MACHINE_NO_SOUND|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, academy, 0, 0, academy, academy, driver_device, 0, "Hegener & Glaser", "Mephisto Academy Schachcomputer", MACHINE_REQUIRES_ARTWORK|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, megaiv, 0, 0, megaiv, megaiv, driver_device, 0, "Hegener & Glaser", "Mephisto Mega IV Schachcomputer", MACHINE_NOT_WORKING|MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, megaiv, 0, 0, megaiv, megaiv, driver_device, 0, "Hegener & Glaser", "Mephisto Mega IV Schachcomputer", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, milano, polgar, 0, milano, polgar, polgar_state, polgar, "Hegener & Glaser", "Mephisto Milano Schachcomputer", MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
//CONS( 1989, montec4, 0, 0, monteciv, monteciv, driver_device, 0, "Hegener & Glaser", "Mephisto Monte Carlo IV", MACHINE_NOT_WORKING|MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, sfortec, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version C)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, sexpertc, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Expert C Chess Computer", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
//CONS( 1989, montec4, 0, 0, monteciv, monteciv, driver_device, 0, "Hegener & Glaser", "Mephisto Monte Carlo IV", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, sfortec, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Forte Chess Computer (version C)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1989, sexpertc, sfortea, 0, sfortea, sfortea, driver_device, 0, "Novag", "Novag Super Expert C Chess Computer", MACHINE_NO_SOUND|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1990, lyon16, van16, 0, alm16, van16, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Lyon 68000", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1990, lyon32, van16, 0, alm32, van32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Lyon 68020", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1990, monteciv, 0, 0, monteciv, monteciv, driver_device, 0, "Hegener & Glaser", "Mephisto Monte Carlo IV LE Schachcomputer", MACHINE_NOT_WORKING|MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1991, diablo68, 0, 0, diablo68, sfortea, driver_device, 0, "Novag", "Novag Diablo 68000 Chess Computer", MACHINE_NO_SOUND|MACHINE_NOT_WORKING|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1990, monteciv, 0, 0, monteciv, monteciv, driver_device, 0, "Hegener & Glaser", "Mephisto Monte Carlo IV LE Schachcomputer", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1991, diablo68, 0, 0, diablo68, sfortea, driver_device, 0, "Novag", "Novag Diablo 68000 Chess Computer", MACHINE_NO_SOUND|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1991, van16, 0, 0, van16, van16, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Vancouver 68000", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1991, van32, van16, 0, van32, van32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Vancouver 68020", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1993, gen32, van16, 0, gen32, gen32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Genius030 V4.00", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
|
||||
174
src/mame/drivers/pgm3.cpp
Normal file
174
src/mame/drivers/pgm3.cpp
Normal file
@ -0,0 +1,174 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Xing Xing
|
||||
|
||||
/* PGM 3 hardware.
|
||||
|
||||
Games on this platform
|
||||
|
||||
Knights of Valour 3 HD
|
||||
|
||||
according to Xing Xing
|
||||
"The main cpu of PGM3 whiched coded as 'SOC38' is an ARM1176@800M designed by SOCLE(http://www.socle-tech.com/). Not much infomation is available on this asic"
|
||||
|
||||
there is likely a 512KBytes encrypted bootloader(u-boot?) inside the cpu which load the kernel&initrd from the external SD card.
|
||||
|
||||
however, according to
|
||||
http://www.arcadebelgium.net/t4958-knights-of-valour-3-hd-sangoku-senki-3-hd
|
||||
the CPU is an Intel Atom D525 CPU with 2GB of RAM (but based on hardware images this is incorrect, they clearly show the CPU Xing Xing states is used)
|
||||
|
||||
|
||||
the card images (except v105) seem to have encrypted data up to the C2000000 mark, then
|
||||
some text string about a non-bootable disk followed by mostly blank data
|
||||
|
||||
Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
|
||||
|
||||
0C2000000 EB 3C 90 6D 6B 64 6F 73 66 73 00 00 02 04 04 00 ë<.mkdosfs......
|
||||
0C2000010 02 00 02 00 00 F8 00 01 3F 00 FF 00 00 00 00 00 .....ø..?.ÿ.....
|
||||
0C2000020 00 00 04 00 00 00 29 4C 88 BA 7C 20 20 20 20 20 ......)Lˆº|
|
||||
0C2000030 20 20 20 20 20 20 46 41 54 31 36 20 20 20 0E 1F FAT16 ..
|
||||
0C2000040 BE 5B 7C AC 22 C0 74 0B 56 B4 0E BB 07 00 CD 10 ¾[|¬"Àt.V´.»..Í.
|
||||
0C2000050 5E EB F0 32 E4 CD 16 CD 19 EB FE 54 68 69 73 20 ^ëð2äÍ.Í.ëþThis
|
||||
0C2000060 69 73 20 6E 6F 74 20 61 20 62 6F 6F 74 61 62 6C is not a bootabl
|
||||
0C2000070 65 20 64 69 73 6B 2E 20 20 50 6C 65 61 73 65 20 e disk. Please
|
||||
0C2000080 69 6E 73 65 72 74 20 61 20 62 6F 6F 74 61 62 6C insert a bootabl
|
||||
0C2000090 65 20 66 6C 6F 70 70 79 20 61 6E 64 0D 0A 70 72 e floppy and..pr
|
||||
0C20000A0 65 73 73 20 61 6E 79 20 6B 65 79 20 74 6F 20 74 ess any key to t
|
||||
0C20000B0 72 79 20 61 67 61 69 6E 20 2E 2E 2E 20 0D 0A 00 ry again ... ...
|
||||
|
||||
the v105 image has the encrypted data starting at 400000 and the above at C2400000
|
||||
and is overall slightly shorter. it was probably dumped using a different method?
|
||||
assuming one is the correct method the others will need adjusting.
|
||||
|
||||
|
||||
DSW:
|
||||
1: OFF = Game mode / ON = Test mode
|
||||
2: OFF = JAMMA / ON = JVS
|
||||
3: OFF = 16/9 (1280x720) / ON = 4/3 (800x600)
|
||||
4: NO USE
|
||||
|
||||
todo: add other hardware details?
|
||||
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/arm7/arm7.h"
|
||||
#include "cpu/arm7/arm7core.h"
|
||||
|
||||
|
||||
class pgm3_state : public driver_device
|
||||
{
|
||||
public:
|
||||
pgm3_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu") { }
|
||||
|
||||
DECLARE_DRIVER_INIT(kov3hd);
|
||||
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
uint32_t screen_update_pgm3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void screen_eof_pgm3(screen_device &screen, bool state);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
};
|
||||
|
||||
static ADDRESS_MAP_START( pgm3_map, AS_PROGRAM, 32, pgm3_state )
|
||||
AM_RANGE(0x00000000, 0x00003fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( pgm3 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
uint32_t pgm3_state::screen_update_pgm3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void pgm3_state::screen_eof_pgm3(screen_device &screen, bool state)
|
||||
{
|
||||
}
|
||||
|
||||
void pgm3_state::video_start()
|
||||
{
|
||||
}
|
||||
|
||||
void pgm3_state::machine_start()
|
||||
{
|
||||
}
|
||||
|
||||
void pgm3_state::machine_reset()
|
||||
{
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( pgm3, pgm3_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", ARM9, 800000000) // wrong, see notes at top of driver
|
||||
MCFG_CPU_PROGRAM_MAP(pgm3_map)
|
||||
MCFG_DEVICE_DISABLE()
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MCFG_SCREEN_SIZE(1280, 720)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 1280-1, 0, 720-1)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(pgm3_state, screen_update_pgm3)
|
||||
MCFG_SCREEN_VBLANK_DRIVER(pgm3_state, screen_eof_pgm3)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 0x1000)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
ROM_START( kov3hd )
|
||||
ROM_REGION( 0x04000, "maincpu", ROMREGION_ERASE00 )
|
||||
// does it boot from the card, or is there an internal rom?
|
||||
|
||||
DISK_REGION( "card" )
|
||||
DISK_IMAGE( "kov3hd_v105", 0, SHA1(c185888c59880805bb76b5c0a42b05c614dcff37) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( kov3hd104 )
|
||||
ROM_REGION( 0x04000, "maincpu", ROMREGION_ERASE00 )
|
||||
// does it boot from the card, or is there an internal rom?
|
||||
|
||||
DISK_REGION( "card" )
|
||||
DISK_IMAGE( "kov3hd_m104", 0, SHA1(899b3b81825e6f23ae8f39aa67ad5b019f387cf9) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( kov3hd103 )
|
||||
ROM_REGION( 0x04000, "maincpu", ROMREGION_ERASE00 )
|
||||
// does it boot from the card, or is there an internal rom?
|
||||
|
||||
DISK_REGION( "card" )
|
||||
DISK_IMAGE( "kov3hd_m103", 0, SHA1(0d4fd981f477cd5ed62609b875f4ddec939a2bb0) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( kov3hd102 )
|
||||
ROM_REGION( 0x04000, "maincpu", ROMREGION_ERASE00 )
|
||||
// does it boot from the card, or is there an internal rom?
|
||||
|
||||
DISK_REGION( "card" )
|
||||
DISK_IMAGE( "kov3hd_m102", 0, SHA1(a5a872f9add5527b94019ec77ff1cd0f167f040f) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( kov3hd101 )
|
||||
ROM_REGION( 0x04000, "maincpu", ROMREGION_ERASE00 )
|
||||
// does it boot from the card, or is there an internal rom?
|
||||
|
||||
DISK_REGION( "card" )
|
||||
DISK_IMAGE( "kov3hd_m101", 0, SHA1(086d6f1b8b2c01a8670fd6480da44b9c507f6e08) )
|
||||
ROM_END
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(pgm3_state,kov3hd)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
// all dumped sets might be China region, unless region info comes from elsewhere
|
||||
GAME( 2011, kov3hd, 0, pgm3, pgm3, pgm3_state, kov3hd, ROT0, "IGS", "Knights of Valour 3 HD (V105)", MACHINE_IS_SKELETON )
|
||||
GAME( 2011, kov3hd104, kov3hd, pgm3, pgm3, pgm3_state, kov3hd, ROT0, "IGS", "Knights of Valour 3 HD (V104)", MACHINE_IS_SKELETON )
|
||||
GAME( 2011, kov3hd103, kov3hd, pgm3, pgm3, pgm3_state, kov3hd, ROT0, "IGS", "Knights of Valour 3 HD (V103)", MACHINE_IS_SKELETON )
|
||||
GAME( 2011, kov3hd102, kov3hd, pgm3, pgm3, pgm3_state, kov3hd, ROT0, "IGS", "Knights of Valour 3 HD (V102)", MACHINE_IS_SKELETON )
|
||||
GAME( 2011, kov3hd101, kov3hd, pgm3, pgm3, pgm3_state, kov3hd, ROT0, "IGS", "Knights of Valour 3 HD (V101)", MACHINE_IS_SKELETON )
|
||||
@ -55,6 +55,7 @@ public:
|
||||
m_brg(*this, "brg"),
|
||||
m_fdc (*this, "fdc"),
|
||||
m_floppy0(*this, "fdc:0"),
|
||||
m_floppy1(*this, "fdc:1"),
|
||||
m_rtc(*this, "rtc")
|
||||
{
|
||||
}
|
||||
@ -77,6 +78,7 @@ private:
|
||||
required_device<com8116_device> m_brg;
|
||||
required_device<fd1797_t> m_fdc;
|
||||
required_device<floppy_connector> m_floppy0;
|
||||
required_device<floppy_connector> m_floppy1;
|
||||
required_device<msm5832_device> m_rtc;
|
||||
};
|
||||
|
||||
@ -138,41 +140,46 @@ d7 XMEMEX line (for external memory, not emulated)
|
||||
WRITE8_MEMBER( pulsar_state::ppi_pa_w )
|
||||
{
|
||||
m_floppy = nullptr;
|
||||
if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
|
||||
if (BIT(data, 0))
|
||||
m_floppy = m_floppy0->get_device();
|
||||
else
|
||||
if (BIT(data, 1))
|
||||
m_floppy = m_floppy1->get_device();
|
||||
m_fdc->set_floppy(m_floppy);
|
||||
m_fdc->dden_w(BIT(data, 5));
|
||||
if (m_floppy)
|
||||
m_floppy->mon_w(0);
|
||||
}
|
||||
|
||||
/*
|
||||
d0..d3 RTC address
|
||||
d4 RTC read line (inverted in emulation)
|
||||
d5 RTC write line (inverted in emulation)
|
||||
d4 RTC read line
|
||||
d5 RTC write line
|
||||
d6 RTC hold line
|
||||
d7 Allow 64k of ram
|
||||
*/
|
||||
WRITE8_MEMBER( pulsar_state::ppi_pb_w )
|
||||
{
|
||||
m_rtc->address_w(data & 0x0f);
|
||||
m_rtc->read_w(!BIT(data, 4));
|
||||
m_rtc->write_w(!BIT(data, 5));
|
||||
m_rtc->read_w(BIT(data, 4));
|
||||
m_rtc->write_w(BIT(data, 5));
|
||||
m_rtc->hold_w(BIT(data, 6));
|
||||
membank("bankr1")->set_entry(BIT(data, 7));
|
||||
}
|
||||
|
||||
/*
|
||||
d0..d3 Data lines to rtc
|
||||
d7 /2 SIDES (assumed to be side select)
|
||||
*/
|
||||
// d0..d3 Data lines to rtc
|
||||
WRITE8_MEMBER( pulsar_state::ppi_pc_w )
|
||||
{
|
||||
m_rtc->data_w(space, 0, data & 15);
|
||||
if (m_floppy)
|
||||
m_floppy->ss_w(BIT(data, 7));
|
||||
}
|
||||
|
||||
// d7 /2 SIDES
|
||||
READ8_MEMBER( pulsar_state::ppi_pc_r )
|
||||
{
|
||||
return m_rtc->data_r(space, 0);
|
||||
uint8_t data = 0;
|
||||
if (m_floppy)
|
||||
data = m_floppy->twosid_r() << 7;
|
||||
return m_rtc->data_r(space, 0) | data;
|
||||
}
|
||||
|
||||
static DEVICE_INPUT_DEFAULTS_START( terminal )
|
||||
@ -185,7 +192,8 @@ static DEVICE_INPUT_DEFAULTS_START( terminal )
|
||||
DEVICE_INPUT_DEFAULTS_END
|
||||
|
||||
static SLOT_INTERFACE_START( pulsar_floppies )
|
||||
SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
|
||||
SLOT_INTERFACE( "drive0", FLOPPY_525_HD )
|
||||
SLOT_INTERFACE( "drive1", FLOPPY_525_HD )
|
||||
SLOT_INTERFACE_END
|
||||
|
||||
/* Input ports */
|
||||
@ -248,7 +256,10 @@ static MACHINE_CONFIG_START( pulsar, pulsar_state )
|
||||
MCFG_COM8116_FT_HANDLER(WRITELINE(pulsar_state, ft_w))
|
||||
|
||||
MCFG_FD1797_ADD("fdc", XTAL_4MHz / 2)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:0", pulsar_floppies, "525dd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:0", pulsar_floppies, "drive0", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_SOUND(true)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:1", pulsar_floppies, "drive1", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_SOUND(true)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/* ROM definition */
|
||||
|
||||
@ -880,8 +880,8 @@ GAME( 1982, vrkon_l1, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Varkon
|
||||
GAME( 1982, tmfnt_l5, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Time Fantasy (L-5)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
GAME( 1982, wrlok_l3, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Warlok (L-3)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
GAME( 1982, dfndr_l4, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Defender (L-4)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
GAME( 1983, jst_l2, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Joust (L-2)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_NOT_WORKING )
|
||||
GAME( 1983, jst_l1, jst_l2, s7, s7, s7_state, s7, ROT0, "Williams", "Joust (L-1)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_NOT_WORKING )
|
||||
GAME( 1983, jst_l2, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Joust (L-2)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
GAME( 1983, jst_l1, jst_l2, s7, s7, s7_state, s7, ROT0, "Williams", "Joust (L-1)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
GAME( 1983, lsrcu_l2, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Laser Cue (L-2)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
GAME( 1983, fpwr2_l2, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Firepower II (L-2)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
GAME( 1984, strlt_l1, 0, s7, s7, s7_state, s7, ROT0, "Williams", "Star Light (L-1)", MACHINE_MECHANICAL | MACHINE_NOT_WORKING )
|
||||
|
||||
@ -1,11 +1,17 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Bryan McPhail
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
Vapor Trail (World version) (c) 1989 Data East Corporation
|
||||
Vapor Trail (USA version) (c) 1989 Data East USA
|
||||
Kuhga (Japanese version) (c) 1989 Data East Corporation
|
||||
|
||||
Notes:
|
||||
-----
|
||||
- If you activate the service mode dip switch during the gameplay, it acts like invicibility
|
||||
either for player 1 and player 2. It works for all sets.
|
||||
|
||||
Emulation by Bryan McPhail, mish@tendril.co.uk
|
||||
added pal & prom-maps - Highwayman.
|
||||
***************************************************************************/
|
||||
@ -28,6 +34,20 @@ WRITE16_MEMBER(vaportra_state::vaportra_sound_w)
|
||||
m_audiocpu->set_input_line(0, ASSERT_LINE);
|
||||
}
|
||||
|
||||
READ16_MEMBER(vaportra_state::irq6_ack_r)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_maincpu->set_input_line (6, CLEAR_LINE);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(vaportra_state::irq6_ack_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_maincpu->set_input_line (6, CLEAR_LINE);
|
||||
}
|
||||
|
||||
READ16_MEMBER(vaportra_state::vaportra_control_r)
|
||||
{
|
||||
switch (offset << 1)
|
||||
@ -59,9 +79,9 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, vaportra_state )
|
||||
AM_RANGE(0x2c0000, 0x2c000f) AM_DEVWRITE("tilegen1", deco16ic_device, pf_control_w)
|
||||
AM_RANGE(0x300000, 0x3009ff) AM_RAM_WRITE(vaportra_palette_24bit_rg_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x304000, 0x3049ff) AM_RAM_WRITE(vaportra_palette_24bit_b_w) AM_SHARE("paletteram2")
|
||||
AM_RANGE(0x308000, 0x308001) AM_NOP
|
||||
AM_RANGE(0x308000, 0x308001) AM_READWRITE(irq6_ack_r, irq6_ack_w)
|
||||
AM_RANGE(0x30c000, 0x30c001) AM_DEVWRITE("spriteram", buffered_spriteram16_device, write)
|
||||
AM_RANGE(0xff8000, 0xff87ff) AM_RAM AM_SHARE("spriteram")
|
||||
AM_RANGE(0x318000, 0x3187ff) AM_MIRROR(0xce0000) AM_RAM AM_SHARE("spriteram")
|
||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -110,7 +130,7 @@ static INPUT_PORTS_START( vaportra )
|
||||
PORT_START("COINS")
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
|
||||
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
|
||||
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
|
||||
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
|
||||
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
@ -219,7 +239,7 @@ static MACHINE_CONFIG_START( vaportra, vaportra_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000,XTAL_24MHz/2) /* Custom chip 59 */
|
||||
MCFG_CPU_PROGRAM_MAP(main_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", vaportra_state, irq6_line_hold)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", vaportra_state, irq6_line_assert)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", H6280, XTAL_24MHz/4) /* Custom chip 45; Audio section crystal is 32.220 MHz but CPU clock is confirmed as coming from the 24MHz crystal (6Mhz exactly on the CPU) */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_map)
|
||||
@ -838,15 +858,14 @@ C3D54*
|
||||
DRIVER_INIT_MEMBER(vaportra_state,vaportra)
|
||||
{
|
||||
uint8_t *RAM = memregion("maincpu")->base();
|
||||
int i;
|
||||
|
||||
for (i = 0x00000; i < 0x80000; i++)
|
||||
for (int i = 0x00000; i < 0x80000; i++)
|
||||
RAM[i] = BITSWAP8(RAM[i],0,6,5,4,3,2,1,7);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
GAME( 1989, vaportra, 0, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East Corporation", "Vapor Trail - Hyper Offence Formation (World revision 1)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1989, vaportra3,vaportra, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East Corporation", "Vapor Trail - Hyper Offence Formation (World revision 3?)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1989, vaportrau,vaportra, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East USA", "Vapor Trail - Hyper Offence Formation (US)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1989, kuhga, vaportra, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East Corporation", "Kuhga - Operation Code 'Vapor Trail' (Japan revision 3)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1989, vaportra, 0, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East Corporation", "Vapor Trail - Hyper Offence Formation (World revision 1)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1989, vaportra3, vaportra, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East Corporation", "Vapor Trail - Hyper Offence Formation (World revision 3?)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1989, vaportrau, vaportra, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East USA", "Vapor Trail - Hyper Offence Formation (US)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1989, kuhga, vaportra, vaportra, vaportra, vaportra_state, vaportra, ROT270, "Data East Corporation", "Kuhga - Operation Code 'Vapor Trail' (Japan revision 3)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -25,10 +25,6 @@ Notes:
|
||||
- "Magix" can change title to "Rock" through a DSW
|
||||
- In service mode press Service Coin (e.g. '9')
|
||||
|
||||
To Do:
|
||||
|
||||
- Better Sound
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
@ -56,6 +52,23 @@ WRITE8_MEMBER(yunsung8_state::bankswitch_w)
|
||||
logerror("CPU #0 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(yunsung8_state::sound_command_r)
|
||||
{
|
||||
m_audiocpu->set_input_line (0, CLEAR_LINE);
|
||||
return (m_soundlatch->read (space, 0));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER (yunsung8_state::sound_command_w)
|
||||
{
|
||||
m_soundlatch->write (space, 0, data);
|
||||
m_audiocpu->set_input_line (0, ASSERT_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER (yunsung8_state::main_irq_ack_w)
|
||||
{
|
||||
m_maincpu->set_input_line (0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
/*
|
||||
Banked Video RAM:
|
||||
|
||||
@ -78,11 +91,11 @@ static ADDRESS_MAP_START( port_map, AS_IO, 8, yunsung8_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(videobank_w) // video RAM bank
|
||||
AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(bankswitch_w) // ROM Bank + Layers Enable
|
||||
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2") AM_DEVWRITE("soundlatch", generic_latch_8_device, write) // To Sound CPU
|
||||
AM_RANGE(0x02, 0x02) AM_READ_PORT("P2") AM_WRITE(sound_command_w) // To Sound CPU
|
||||
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
|
||||
AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
|
||||
AM_RANGE(0x06, 0x06) AM_WRITE(flipscreen_w) // Flip Screen
|
||||
AM_RANGE(0x07, 0x07) AM_WRITENOP // ? (end of IRQ, random value)
|
||||
AM_RANGE(0x07, 0x07) AM_WRITE(main_irq_ack_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -107,20 +120,19 @@ WRITE8_MEMBER(yunsung8_state::sound_bankswitch_w)
|
||||
|
||||
WRITE8_MEMBER(yunsung8_state::adpcm_w)
|
||||
{
|
||||
/* Swap the nibbles */
|
||||
m_adpcm = ((data & 0xf) << 4) | ((data >> 4) & 0xf);
|
||||
m_adpcm = data;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, yunsung8_state )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("soundbank") // Banked ROM
|
||||
AM_RANGE(0xe000, 0xe000) AM_WRITE(sound_bankswitch_w ) // ROM Bank
|
||||
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("soundbank") // Banked ROM
|
||||
AM_RANGE(0xe000, 0xe000) AM_WRITE(sound_bankswitch_w) // ROM Bank
|
||||
AM_RANGE(0xe400, 0xe400) AM_WRITE(adpcm_w)
|
||||
AM_RANGE(0xec00, 0xec01) AM_DEVWRITE("ymsnd", ym3812_device, write)
|
||||
AM_RANGE(0xf000, 0xf7ff) AM_RAM
|
||||
AM_RANGE(0xf800, 0xf800) AM_DEVREAD("soundlatch", generic_latch_8_device, read) // From Main CPU
|
||||
AM_RANGE(0xf800, 0xf800) AM_READ(sound_command_r) // From Main CPU
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -134,186 +146,10 @@ ADDRESS_MAP_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
/***************************************************************************
|
||||
Magix
|
||||
***************************************************************************/
|
||||
|
||||
static INPUT_PORTS_START( magix )
|
||||
PORT_START("SYSTEM")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
|
||||
PORT_START("P1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // same as button1 !?
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
|
||||
|
||||
PORT_START("P2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // same as button1 !?
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
|
||||
|
||||
PORT_START("DSW1")
|
||||
PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
|
||||
PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
|
||||
PORT_DIPSETTING( 0x06, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Hardest ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Flip_Screen ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0xe0, 0xe0, DEF_STR( Coinage ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x60, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0xe0, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( 2C_3C ) )
|
||||
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
|
||||
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( 1C_4C ) )
|
||||
|
||||
PORT_START("DSW2")
|
||||
PORT_DIPNAME( 0x01, 0x01, "Title" )
|
||||
PORT_DIPSETTING( 0x01, "Magix" )
|
||||
PORT_DIPSETTING( 0x00, "Rock" )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Unknown 2-1" ) // the rest seems unused
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "Unknown 2-2" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "Unknown 2-3" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "Unknown 2-4" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "Unknown 2-5" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "Unknown 2-6" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "Unknown 2-7" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
Cannon Ball
|
||||
***************************************************************************/
|
||||
|
||||
static INPUT_PORTS_START( cannball )
|
||||
PORT_START("SYSTEM")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
|
||||
PORT_START("P1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
|
||||
|
||||
PORT_START("P2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
|
||||
|
||||
PORT_START("DSW1")
|
||||
PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
|
||||
PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
|
||||
PORT_DIPSETTING( 0x06, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Hardest ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Flip_Screen ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0xe0, 0xe0, DEF_STR( Coinage ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x60, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0xe0, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( 2C_3C ) )
|
||||
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_2C ) )
|
||||
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( 1C_4C ) )
|
||||
|
||||
PORT_START("DSW2")
|
||||
PORT_DIPNAME( 0x01, 0x01, "Unknown 2-0" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "Unknown 2-1" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0c, 0x0c, "Bombs" )
|
||||
PORT_DIPSETTING( 0x04, "1" )
|
||||
PORT_DIPSETTING( 0x08, "2" )
|
||||
PORT_DIPSETTING( 0x0c, "3" )
|
||||
PORT_DIPSETTING( 0x00, "4" )
|
||||
PORT_DIPNAME( 0x10, 0x10, "Unknown 2-4" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "Unknown 2-5" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "Unknown 2-6" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "Unknown 2-7" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( cannbalv )
|
||||
PORT_INCLUDE(cannball)
|
||||
PORT_MODIFY("SYSTEM")
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) // always activated, otherwise the game resets. a simple check for horizontal / vertical version of the game?
|
||||
INPUT_PORTS_END
|
||||
|
||||
/***************************************************************************
|
||||
Rock Tris
|
||||
***************************************************************************/
|
||||
|
||||
static INPUT_PORTS_START( rocktris )
|
||||
PORT_START("SYSTEM")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
@ -328,8 +164,8 @@ static INPUT_PORTS_START( rocktris )
|
||||
PORT_START("P1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // same as button1 !?
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // Bomb
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // Rotate
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
|
||||
@ -338,8 +174,8 @@ static INPUT_PORTS_START( rocktris )
|
||||
PORT_START("P2")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // same as button1 !?
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // Bomb
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) // Rotate
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
|
||||
@ -395,6 +231,45 @@ static INPUT_PORTS_START( rocktris )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
/***************************************************************************
|
||||
Magix
|
||||
***************************************************************************/
|
||||
static INPUT_PORTS_START( magix )
|
||||
PORT_INCLUDE(rocktris) // BTN1 = Rotate, BTN2 = Rotate (Again! ...same dir as BTN1)
|
||||
|
||||
PORT_MODIFY("DSW2")
|
||||
PORT_DIPNAME( 0x01, 0x01, "Title" )
|
||||
PORT_DIPSETTING( 0x01, "Magix" )
|
||||
PORT_DIPSETTING( 0x00, "Rock" )
|
||||
INPUT_PORTS_END
|
||||
|
||||
/***************************************************************************
|
||||
Cannon Ball
|
||||
***************************************************************************/
|
||||
static INPUT_PORTS_START( cannball )
|
||||
PORT_INCLUDE(rocktris)
|
||||
|
||||
PORT_MODIFY("P1")
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) // BTN1 = Launch, BTN2 = Rotate, BTN3 = Bomb
|
||||
|
||||
PORT_MODIFY("P2")
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) // BTN1 = Launch, BTN2 = Rotate, BTN3 = Bomb
|
||||
|
||||
PORT_MODIFY("DSW2")
|
||||
PORT_DIPNAME( 0x0c, 0x0c, "Bombs" )
|
||||
PORT_DIPSETTING( 0x04, "1" )
|
||||
PORT_DIPSETTING( 0x08, "2" )
|
||||
PORT_DIPSETTING( 0x0c, "3" )
|
||||
PORT_DIPSETTING( 0x00, "4" )
|
||||
INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( cannbalv )
|
||||
PORT_INCLUDE(cannball)
|
||||
|
||||
PORT_MODIFY("SYSTEM")
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) // always activated, otherwise the game resets. a simple check for horizontal / vertical version of the game?
|
||||
INPUT_PORTS_END
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
|
||||
@ -446,18 +321,19 @@ GFXDECODE_END
|
||||
|
||||
WRITE_LINE_MEMBER(yunsung8_state::adpcm_int)
|
||||
{
|
||||
m_msm->data_w(m_adpcm >> 4);
|
||||
m_adpcm <<= 4;
|
||||
m_msm->data_w(m_adpcm & 0x0F);
|
||||
m_adpcm >>= 4;
|
||||
|
||||
m_toggle ^= 1;
|
||||
|
||||
if (m_toggle)
|
||||
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
|
||||
void yunsung8_state::machine_start()
|
||||
{
|
||||
m_videoram_0 = m_videoram + 0x0000; // Ram is banked
|
||||
m_videoram_1 = m_videoram + 0x2000;
|
||||
m_bg_vram = m_videoram + 0x0000; // Ram is banked
|
||||
m_fg_vram = m_videoram + 0x2000;
|
||||
|
||||
membank("mainbank")->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000);
|
||||
membank("soundbank")->configure_entries(0, 8, memregion("audiocpu")->base(), 0x4000);
|
||||
@ -484,12 +360,10 @@ static MACHINE_CONFIG_START( yunsung8, yunsung8_state )
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz/2) /* Z80B @ 8MHz? */
|
||||
MCFG_CPU_PROGRAM_MAP(main_map)
|
||||
MCFG_CPU_IO_MAP(port_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", yunsung8_state, irq0_line_hold) /* No nmi routine */
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", yunsung8_state, irq0_line_assert) /* No nmi routine */
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", Z80, XTAL_16MHz/4) /* ? */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", yunsung8_state, irq0_line_hold) /* NMI caused by the MSM5205? */
|
||||
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
@ -735,8 +609,8 @@ ROM_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
GAME( 1995, cannball, 0, yunsung8, cannball, driver_device, 0, ROT0, "Yun Sung / Soft Vision", "Cannon Ball (Yun Sung, horizontal)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, cannballv, cannball, yunsung8, cannbalv, driver_device, 0, ROT270, "Yun Sung / T&K", "Cannon Ball (Yun Sung, vertical)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, magix, 0, yunsung8, magix, driver_device, 0, ROT0, "Yun Sung", "Magix / Rock", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, magixb, magix, yunsung8, magix, driver_device, 0, ROT0, "Yun Sung", "Magix / Rock (no copyright message)",MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // was marked as bootleg, but has been seen on original PCBs
|
||||
GAME( 1994?, rocktris, 0, yunsung8, rocktris, driver_device, 0, ROT0, "Yun Sung", "Rock Tris", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, cannball, 0, yunsung8, cannball, driver_device, 0, ROT0, "Yun Sung / Soft Vision", "Cannon Ball (Yun Sung, horizontal)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, cannballv, cannball, yunsung8, cannbalv, driver_device, 0, ROT270, "Yun Sung / J&K Production", "Cannon Ball (Yun Sung, vertical)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, magix, 0, yunsung8, magix, driver_device, 0, ROT0, "Yun Sung", "Magix / Rock", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1995, magixb, magix, yunsung8, magix, driver_device, 0, ROT0, "Yun Sung", "Magix / Rock (no copyright message)", MACHINE_SUPPORTS_SAVE ) // was marked as bootleg, but has been seen on original PCBs
|
||||
GAME( 1994?, rocktris, 0, yunsung8, rocktris, driver_device, 0, ROT0, "Yun Sung", "Rock Tris", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -44,6 +44,8 @@ public:
|
||||
uint16_t m_priority[2];
|
||||
|
||||
DECLARE_WRITE16_MEMBER(vaportra_sound_w);
|
||||
DECLARE_READ16_MEMBER(irq6_ack_r);
|
||||
DECLARE_WRITE16_MEMBER(irq6_ack_w);
|
||||
DECLARE_READ16_MEMBER(vaportra_control_r);
|
||||
DECLARE_READ8_MEMBER(vaportra_soundlatch_r);
|
||||
DECLARE_WRITE16_MEMBER(vaportra_priority_w);
|
||||
|
||||
@ -6,6 +6,7 @@
|
||||
|
||||
*************************************************************************/
|
||||
|
||||
#include "machine/gen_latch.h"
|
||||
#include "sound/msm5205.h"
|
||||
|
||||
class yunsung8_state : public driver_device
|
||||
@ -14,16 +15,19 @@ public:
|
||||
yunsung8_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_audiocpu(*this, "audiocpu") ,
|
||||
m_audiocpu(*this, "audiocpu"),
|
||||
m_msm(*this, "msm"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette") { }
|
||||
m_palette(*this, "palette"),
|
||||
m_soundlatch(*this, "soundlatch")
|
||||
{
|
||||
}
|
||||
|
||||
/* video-related */
|
||||
tilemap_t *m_tilemap_0;
|
||||
tilemap_t *m_tilemap_1;
|
||||
uint8_t *m_videoram_0;
|
||||
uint8_t *m_videoram_1;
|
||||
tilemap_t *m_bg_tilemap;
|
||||
tilemap_t *m_fg_tilemap;
|
||||
uint8_t *m_bg_vram;
|
||||
uint8_t *m_fg_vram;
|
||||
int m_layers_ctrl;
|
||||
int m_videobank;
|
||||
|
||||
@ -37,11 +41,15 @@ public:
|
||||
required_device<msm5205_device> m_msm;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<generic_latch_8_device> m_soundlatch;
|
||||
|
||||
/* memory */
|
||||
uint8_t m_videoram[0x4000];
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bankswitch_w);
|
||||
DECLARE_READ8_MEMBER(sound_command_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_command_w);
|
||||
DECLARE_WRITE8_MEMBER(main_irq_ack_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_w);
|
||||
DECLARE_WRITE8_MEMBER(videobank_w);
|
||||
DECLARE_READ8_MEMBER(videoram_r);
|
||||
@ -50,8 +58,8 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(adpcm_int);
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_tile_info_0);
|
||||
TILE_GET_INFO_MEMBER(get_tile_info_1);
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_fg_tile_info);
|
||||
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
@ -30515,6 +30515,13 @@ orleg2 // (c) 2007
|
||||
orleg2o //
|
||||
orleg2oa //
|
||||
|
||||
@source:pgm3.cpp
|
||||
kov3hd
|
||||
kov3hd104
|
||||
kov3hd103
|
||||
kov3hd102
|
||||
kov3hd101
|
||||
|
||||
@source:phantom.cpp
|
||||
fphantom //
|
||||
|
||||
|
||||
@ -58,9 +58,9 @@ READ8_MEMBER(yunsung8_state::videoram_r)
|
||||
bank = m_videobank & 1;
|
||||
|
||||
if (bank)
|
||||
return m_videoram_0[offset];
|
||||
return m_bg_vram[offset];
|
||||
else
|
||||
return m_videoram_1[offset];
|
||||
return m_fg_vram[offset];
|
||||
}
|
||||
|
||||
|
||||
@ -73,9 +73,9 @@ WRITE8_MEMBER(yunsung8_state::videoram_w)
|
||||
int color;
|
||||
|
||||
if (bank)
|
||||
RAM = m_videoram_0;
|
||||
RAM = m_bg_vram;
|
||||
else
|
||||
RAM = m_videoram_1;
|
||||
RAM = m_fg_vram;
|
||||
|
||||
RAM[offset] = data;
|
||||
color = RAM[offset & ~1] | (RAM[offset | 1] << 8);
|
||||
@ -95,13 +95,13 @@ WRITE8_MEMBER(yunsung8_state::videoram_w)
|
||||
|
||||
if (bank)
|
||||
{
|
||||
m_videoram_0[offset] = data;
|
||||
m_tilemap_0->mark_tile_dirty(tile);
|
||||
m_bg_vram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(tile);
|
||||
}
|
||||
else
|
||||
{
|
||||
m_videoram_1[offset] = data;
|
||||
m_tilemap_1->mark_tile_dirty(tile);
|
||||
m_fg_vram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(tile);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -132,10 +132,11 @@ WRITE8_MEMBER(yunsung8_state::flipscreen_w)
|
||||
#define DIM_NX_0 (0x40)
|
||||
#define DIM_NY_0 (0x20)
|
||||
|
||||
TILE_GET_INFO_MEMBER(yunsung8_state::get_tile_info_0)
|
||||
TILE_GET_INFO_MEMBER(yunsung8_state::get_bg_tile_info)
|
||||
{
|
||||
int code = m_videoram_0[0x1000 + tile_index * 2 + 0] + m_videoram_0[0x1000 + tile_index * 2 + 1] * 256;
|
||||
int color = m_videoram_0[0x0800 + tile_index] & 0x07;
|
||||
int code = m_bg_vram[0x1000 + tile_index * 2 + 0] + m_bg_vram[0x1000 + tile_index * 2 + 1] * 256;
|
||||
int color = m_bg_vram[0x0800 + tile_index] & 0x07;
|
||||
|
||||
SET_TILE_INFO_MEMBER(0,
|
||||
code,
|
||||
color,
|
||||
@ -147,10 +148,11 @@ TILE_GET_INFO_MEMBER(yunsung8_state::get_tile_info_0)
|
||||
#define DIM_NX_1 (0x40)
|
||||
#define DIM_NY_1 (0x20)
|
||||
|
||||
TILE_GET_INFO_MEMBER(yunsung8_state::get_tile_info_1)
|
||||
TILE_GET_INFO_MEMBER(yunsung8_state::get_fg_tile_info)
|
||||
{
|
||||
int code = m_videoram_1[0x1000 + tile_index * 2 + 0] + m_videoram_1[0x1000 + tile_index * 2 + 1] * 256;
|
||||
int color = m_videoram_1[0x0800 + tile_index] & 0x3f;
|
||||
int code = m_fg_vram[0x1000 + tile_index * 2 + 0] + m_fg_vram[0x1000 + tile_index * 2 + 1] * 256;
|
||||
int color = m_fg_vram[0x0800 + tile_index] & 0x3f;
|
||||
|
||||
SET_TILE_INFO_MEMBER(1,
|
||||
code,
|
||||
color,
|
||||
@ -170,10 +172,10 @@ TILE_GET_INFO_MEMBER(yunsung8_state::get_tile_info_1)
|
||||
|
||||
void yunsung8_state::video_start()
|
||||
{
|
||||
m_tilemap_0 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(yunsung8_state::get_tile_info_0),this), TILEMAP_SCAN_ROWS, 8, 8, DIM_NX_0, DIM_NY_0 );
|
||||
m_tilemap_1 = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(yunsung8_state::get_tile_info_1),this), TILEMAP_SCAN_ROWS, 8, 8, DIM_NX_1, DIM_NY_1 );
|
||||
m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(yunsung8_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, DIM_NX_0, DIM_NY_0 );
|
||||
m_fg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(yunsung8_state::get_fg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, DIM_NX_1, DIM_NY_1 );
|
||||
|
||||
m_tilemap_1->set_transparent_pen(0);
|
||||
m_fg_tilemap->set_transparent_pen(0);
|
||||
}
|
||||
|
||||
|
||||
@ -201,12 +203,12 @@ if (machine().input().code_pressed(KEYCODE_Z))
|
||||
#endif
|
||||
|
||||
if (layers_ctrl & 1)
|
||||
m_tilemap_0->draw(screen, bitmap, cliprect, 0, 0);
|
||||
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
else
|
||||
bitmap.fill(0, cliprect);
|
||||
|
||||
if (layers_ctrl & 2)
|
||||
m_tilemap_1->draw(screen, bitmap, cliprect, 0, 0);
|
||||
m_fg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user