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Added preliminary attribute VRAM

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This commit is contained in:
Angelo Salese 2012-11-20 01:23:14 +00:00
parent d612bfb90a
commit 1b6b1867ac
2 changed files with 38 additions and 34 deletions
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64
src/mess/drivers/apc.c
View File

@ -5,12 +5,10 @@
preliminary driver by Angelo Salese preliminary driver by Angelo Salese
TODO: TODO:
- video emulation - video emulation (bitmap part)
- Floppy device
- keyboard
- Understand interrupt sources - Understand interrupt sources
- NMI seems valid, dumps a x86 stack to vram? - NMI seems valid, dumps a x86 stack to vram?
- Unknown RTC device type; - Unknown RTC device type (upd1990a?);
- What are exactly APU and MPU devices? They sounds scary ... - What are exactly APU and MPU devices? They sounds scary ...
- DMA hook-ups - DMA hook-ups
- serial ports - serial ports
@ -191,7 +189,7 @@ static UPD7220_DRAW_TEXT_LINE( hgdc_draw_text )
for(x=0;x<pitch;x++) for(x=0;x<pitch;x++)
{ {
UINT8 tile_data; UINT8 tile_data;
// UINT8 secret,reverse,u_line,v_line; UINT8 u_line, o_line, v_line, reverse, blink;
UINT8 color; UINT8 color;
UINT8 tile,attr,pen; UINT8 tile,attr,pen;
UINT32 tile_addr; UINT32 tile_addr;
@ -202,11 +200,12 @@ static UPD7220_DRAW_TEXT_LINE( hgdc_draw_text )
tile = state->m_video_ram_1[(tile_addr*2+1) & 0x1fff] & 0x00ff; tile = state->m_video_ram_1[(tile_addr*2+1) & 0x1fff] & 0x00ff;
attr = (state->m_video_ram_1[(tile_addr*2 & 0x1fff) | 0x2000] & 0x00ff); attr = (state->m_video_ram_1[(tile_addr*2 & 0x1fff) | 0x2000] & 0x00ff);
// secret = (attr & 1) ^ 1; u_line = attr & 0x01;
//blink = attr & 2; o_line = attr & 0x02;
// reverse = attr & 4; v_line = attr & 0x04;
// u_line = attr & 8; blink = attr & 0x08;
// v_line = attr & 0x10; reverse = attr & 0x10;
// secret= (attr & 1) ^ 1;
color = (attr & 0xe0) >> 5; color = (attr & 0xe0) >> 5;
for(yi=0;yi<lr;yi++) for(yi=0;yi<lr;yi++)
@ -225,9 +224,11 @@ static UPD7220_DRAW_TEXT_LINE( hgdc_draw_text )
// tile_data = secret ? 0 : (state->m_char_rom[tile*char_size+interlace_on*0x800+yi]); // tile_data = secret ? 0 : (state->m_char_rom[tile*char_size+interlace_on*0x800+yi]);
tile_data = (state->m_char_rom[(tile & 0x7f)+((tile & 0x80)<<4)+((yi & 0xf)*0x80)+((yi & 0x10)<<8)]); tile_data = (state->m_char_rom[(tile & 0x7f)+((tile & 0x80)<<4)+((yi & 0xf)*0x80)+((yi & 0x10)<<8)]);
// if(reverse) { tile_data^=0xff; } if(reverse) { tile_data^=0xff; }
// if(u_line && yi == 7) { tile_data = 0xff; } if(u_line && yi == lr-1) { tile_data = 0xff; }
// if(v_line) { tile_data|=8; } if(o_line && yi == 0) { tile_data = 0xff; }
if(v_line) { tile_data|=8; }
if(blink && device->machine().primary_screen->frame_number() & 0x10) { tile_data = 0; } // TODO: rate & correct behaviour
if(cursor_on && cursor_addr == tile_addr && device->machine().primary_screen->frame_number() & 0x10) if(cursor_on && cursor_addr == tile_addr && device->machine().primary_screen->frame_number() & 0x10)
tile_data^=0xff; tile_data^=0xff;
@ -297,7 +298,7 @@ READ8_MEMBER(apc_state::apc_port_60_r)
} }
else else
{ {
printf("Read melody port %02x\n",offset+0x60); //printf("Read melody port %02x\n",offset+0x60);
res = 0x80; res = 0x80;
} }
@ -404,7 +405,10 @@ WRITE8_MEMBER(apc_state::apc_dma_w)
static ADDRESS_MAP_START( apc_map, AS_PROGRAM, 16, apc_state ) static ADDRESS_MAP_START( apc_map, AS_PROGRAM, 16, apc_state )
AM_RANGE(0x00000, 0x9ffff) AM_RAM AM_RANGE(0x00000, 0x9ffff) AM_RAM
// AM_RANGE(0xa0000, 0xaffff) space for an external ROM // AM_RANGE(0xa0000, 0xa0fff) CMOS
// AM_RANGE(0xc0000, 0xcffff) standard character ROM
// AM_RANGE(0xde000, 0xdffff) AUX character RAM
// AM_RANGE(0xe0000, 0xeffff) Special Character RAM
AM_RANGE(0xfe000, 0xfffff) AM_ROM AM_REGION("ipl", 0) AM_RANGE(0xfe000, 0xfffff) AM_ROM AM_REGION("ipl", 0)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -743,24 +747,24 @@ static const struct pit8253_config pit8253_config =
irq assignment: irq assignment:
8259 master: 8259 master:
ir0 (enabled at POST, unknown purpose) ir0 all stop (enabled at POST, unknown purpose)
ir1 ir1 Communication
ir2 ir2 Option
ir3 (enabled after CP/M loading, serial?) ir3 Timer (enabled after CP/M loading, serial?)
ir4 keyboard (almost trusted, check code at fe64a) ir4 keyboard (almost trusted, check code at fe64a)
ir5 ir5 Option
ir6 ir6 Option
ir7 ir7 (ODA Printer?)
8259 slave: 8259 slave:
ir0 ir0 Option
ir1 ir1 Option
ir2 ir2 CRT
ir3 fdd irq? ir3 FDD
ir4 ir4 Option
ir5 ir5 Option
ir6 ir6 APU
ir7 ir7 Option
*/ */
WRITE_LINE_MEMBER(apc_state::apc_master_set_int_line) WRITE_LINE_MEMBER(apc_state::apc_master_set_int_line)

8
src/mess/video/upd7220.c
View File

@ -1248,13 +1248,13 @@ void upd7220_device::process_fifo()
case COMMAND_START: /* start display & end idle mode */ case COMMAND_START: /* start display & end idle mode */
m_de = 1; m_de = 1;
if (LOG) logerror("uPD7220 '%s' DE: 1\n", tag()); //if (LOG) logerror("uPD7220 '%s' DE: 1\n", tag());
break; break;
case COMMAND_BCTRL: /* display blanking control */ case COMMAND_BCTRL: /* display blanking control */
m_de = m_cr & 0x01; m_de = m_cr & 0x01;
if (LOG) logerror("uPD7220 '%s' DE: %u\n", tag(), m_de); //if (LOG) logerror("uPD7220 '%s' DE: %u\n", tag(), m_de);
break; break;
case COMMAND_ZOOM: /* zoom factors specify */ case COMMAND_ZOOM: /* zoom factors specify */
@ -1275,12 +1275,12 @@ void upd7220_device::process_fifo()
m_ead = (upper_addr << 16) | (m_pr[2] << 8) | m_pr[1]; m_ead = (upper_addr << 16) | (m_pr[2] << 8) | m_pr[1];
if (LOG) logerror("uPD7220 '%s' EAD: %06x\n", tag(), m_ead); //if (LOG) logerror("uPD7220 '%s' EAD: %06x\n", tag(), m_ead);
if(m_param_ptr == 4) if(m_param_ptr == 4)
{ {
m_dad = m_pr[3] >> 4; m_dad = m_pr[3] >> 4;
if (LOG) logerror("uPD7220 '%s' DAD: %01x\n", tag(), m_dad); //if (LOG) logerror("uPD7220 '%s' DAD: %01x\n", tag(), m_dad);
} }
} }
break; break;