mirror of
https://github.com/holub/mame
synced 2025-05-22 13:48:55 +03:00
Fix more compile warnings drivers/[e-k]*
This commit is contained in:
parent
db679cd882
commit
1b81e58b3c
@ -117,6 +117,7 @@ static WRITE8_HANDLER( aerofgt_sh_bankswitch_w )
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static MACHINE_RESET( aerofgt )
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static MACHINE_RESET( aerofgt )
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{
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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aerofgt_sh_bankswitch_w(space,0,0); /* needed by spinlbrk */
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aerofgt_sh_bankswitch_w(space,0,0); /* needed by spinlbrk */
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}
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}
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@ -1402,10 +1402,12 @@ static DRIVER_INIT( pepper2 )
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static DRIVER_INIT( fax )
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static DRIVER_INIT( fax )
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{
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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exidy_video_config(0x04, 0x04, TRUE);
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exidy_video_config(0x04, 0x04, TRUE);
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/* reset the ROM bank */
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/* reset the ROM bank */
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fax_bank_select_w(machine,0,0);
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fax_bank_select_w(space,0,0);
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}
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}
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@ -134,12 +134,12 @@ static READ16_HANDLER( exterm_host_data_r )
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*
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*
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*************************************/
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*************************************/
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static UINT16 exterm_trackball_port_r(running_machine *machine, int which, UINT16 mem_mask)
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static UINT16 exterm_trackball_port_r(const address_space *space, int which, UINT16 mem_mask)
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{
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{
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UINT16 port;
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UINT16 port;
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/* Read the fake input port */
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/* Read the fake input port */
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UINT8 trackball_pos = input_port_read(machine, which ? "DIAL1" : "DIAL0");
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UINT8 trackball_pos = input_port_read(space->machine, which ? "DIAL1" : "DIAL0");
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/* Calculate the change from the last position. */
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/* Calculate the change from the last position. */
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UINT8 trackball_diff = trackball_old[which] - trackball_pos;
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UINT8 trackball_diff = trackball_old[which] - trackball_pos;
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@ -155,7 +155,7 @@ static UINT16 exterm_trackball_port_r(running_machine *machine, int which, UINT1
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aimpos[which] = (aimpos[which] + trackball_diff) & 0x3f;
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aimpos[which] = (aimpos[which] + trackball_diff) & 0x3f;
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/* Combine it with the standard input bits */
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/* Combine it with the standard input bits */
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port = which ? input_port_read(machine, "P2") : input_port_read(machine, "P1");
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port = which ? input_port_read(space->machine, "P2") : input_port_read(space->machine, "P1");
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return (port & 0xc0ff) | (aimpos[which] << 8);
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return (port & 0xc0ff) | (aimpos[which] << 8);
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}
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}
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@ -40,7 +40,9 @@ static INPUT_CHANGED( service_mode_switch_changed )
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static INPUT_CHANGED( firetrk_horn_changed )
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static INPUT_CHANGED( firetrk_horn_changed )
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{
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{
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discrete_sound_w(field->port->machine, FIRETRUCK_HORN_EN, newval);
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const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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discrete_sound_w(space, FIRETRUCK_HORN_EN, newval);
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}
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}
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@ -126,7 +126,9 @@ ADDRESS_MAP_END
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static CUSTOM_INPUT( victnine_mcu_status_bit01_r )
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static CUSTOM_INPUT( victnine_mcu_status_bit01_r )
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{
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{
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return (victnine_mcu_status_r(field->port->machine,0) & 3);
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const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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return (victnine_mcu_status_r(space,0) & 3);
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}
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}
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static ADDRESS_MAP_START( victnine_map, ADDRESS_SPACE_PROGRAM, 8 )
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static ADDRESS_MAP_START( victnine_map, ADDRESS_SPACE_PROGRAM, 8 )
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@ -824,14 +824,20 @@ static MACHINE_START( galaga )
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cpu3_interrupt_timer = timer_alloc(cpu3_interrupt_callback, NULL);
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cpu3_interrupt_timer = timer_alloc(cpu3_interrupt_callback, NULL);
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}
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}
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static void bosco_latch_reset(running_machine *machine)
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static MACHINE_RESET( bosco )
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{
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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int i;
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int i;
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/* Reset all latches */
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/* Reset all latches */
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for (i = 0;i < 8;i++)
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for (i = 0;i < 8;i++)
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bosco_latch_w(machine,i,0);
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bosco_latch_w(space,i,0);
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}
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static MACHINE_RESET( bosco )
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{
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/* Reset all latches */
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bosco_latch_reset(machine);
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namco_06xx_init(0, 0,
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namco_06xx_init(0, 0,
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NAMCOIO_51XX, &intf0,
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NAMCOIO_51XX, &intf0,
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@ -850,11 +856,8 @@ static MACHINE_RESET( bosco )
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static MACHINE_RESET( galaga )
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static MACHINE_RESET( galaga )
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{
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{
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int i;
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/* Reset all latches */
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/* Reset all latches */
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for (i = 0;i < 8;i++)
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bosco_latch_reset(machine);
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bosco_latch_w(machine,i,0);
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namco_06xx_init(0, 0,
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namco_06xx_init(0, 0,
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NAMCOIO_51XX, &intf0,
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NAMCOIO_51XX, &intf0,
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@ -867,11 +870,8 @@ static MACHINE_RESET( galaga )
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static MACHINE_RESET( xevious )
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static MACHINE_RESET( xevious )
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{
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{
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int i;
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/* Reset all latches */
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/* Reset all latches */
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for (i = 0;i < 8;i++)
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bosco_latch_reset(machine);
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bosco_latch_w(machine,i,0);
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namco_06xx_init(0, 0,
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namco_06xx_init(0, 0,
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NAMCOIO_51XX, &intf0,
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NAMCOIO_51XX, &intf0,
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@ -884,11 +884,8 @@ static MACHINE_RESET( xevious )
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static MACHINE_RESET( battles )
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static MACHINE_RESET( battles )
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{
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{
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int i;
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/* Reset all latches */
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/* Reset all latches */
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for (i = 0;i < 8;i++)
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bosco_latch_reset(machine);
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bosco_latch_w(machine,i,0);
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battles_customio_init();
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battles_customio_init();
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@ -897,11 +894,8 @@ static MACHINE_RESET( battles )
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static MACHINE_RESET( digdug )
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static MACHINE_RESET( digdug )
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{
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{
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int i;
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/* Reset all latches */
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/* Reset all latches */
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for (i = 0;i < 8;i++)
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bosco_latch_reset(machine);
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bosco_latch_w(machine,i,0);
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namco_06xx_init(0, 0,
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namco_06xx_init(0, 0,
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NAMCOIO_51XX, &intf0,
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NAMCOIO_51XX, &intf0,
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@ -473,13 +473,13 @@ static const struct dma8237_interface dma8237_2_config =
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static READ32_HANDLER(at_page32_r)
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static READ32_HANDLER(at_page32_r)
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{
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{
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return read32le_with_read8_handler(at_page8_r, space->machine, offset, mem_mask);
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return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask);
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}
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}
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static WRITE32_HANDLER(at_page32_w)
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static WRITE32_HANDLER(at_page32_w)
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{
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{
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write32le_with_write8_handler(at_page8_w, space->machine, offset, data, mem_mask);
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write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask);
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}
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}
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@ -373,12 +373,12 @@ WRITE16_HANDLER ( genesis_68k_to_z80_w )
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switch (offset & 3)
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switch (offset & 3)
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{
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{
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case 0:
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case 0:
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if (ACCESSING_BITS_8_15) ym3438_control_port_0_a_w (space->machine, 0, (data >> 8) & 0xff);
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if (ACCESSING_BITS_8_15) ym3438_control_port_0_a_w (space, 0, (data >> 8) & 0xff);
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else ym3438_data_port_0_a_w (space->machine, 0, (data >> 0) & 0xff);
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else ym3438_data_port_0_a_w (space, 0, (data >> 0) & 0xff);
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break;
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break;
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case 2:
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case 2:
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if (ACCESSING_BITS_8_15) ym3438_control_port_0_b_w (space->machine, 0, (data >> 8) & 0xff);
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if (ACCESSING_BITS_8_15) ym3438_control_port_0_b_w (space, 0, (data >> 8) & 0xff);
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else ym3438_data_port_0_b_w (space->machine, 0, (data >> 0) & 0xff);
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else ym3438_data_port_0_b_w (space, 0, (data >> 0) & 0xff);
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break;
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break;
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}
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}
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}
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}
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@ -576,13 +576,13 @@ WRITE8_HANDLER ( genesis_z80_w )
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{
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{
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switch (offset & 3)
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switch (offset & 3)
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{
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{
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case 0: ym3438_control_port_0_a_w (space->machine, 0, data);
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case 0: ym3438_control_port_0_a_w (space, 0, data);
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break;
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break;
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case 1: ym3438_data_port_0_a_w (space->machine, 0, data);
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case 1: ym3438_data_port_0_a_w (space, 0, data);
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break;
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break;
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case 2: ym3438_control_port_0_b_w (space->machine, 0, data);
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case 2: ym3438_control_port_0_b_w (space, 0, data);
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break;
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break;
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case 3: ym3438_data_port_0_b_w (space->machine, 0, data);
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case 3: ym3438_data_port_0_b_w (space, 0, data);
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break;
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break;
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}
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}
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}
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}
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@ -473,7 +473,7 @@ static READ8_HANDLER( sysreg_r )
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return input_port_read(space->machine, portnames[offset]);
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return input_port_read(space->machine, portnames[offset]);
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case 2:
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case 2:
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return adc1038_sars_r(space) << 7;
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return adc1038_sars_r(space->machine) << 7;
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case 4:
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case 4:
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{
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{
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@ -521,7 +521,7 @@ static WRITE8_HANDLER( sysreg_w )
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cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
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cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
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adc1038_di_w((data >> 0) & 1);
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adc1038_di_w((data >> 0) & 1);
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adc1038_clk_w(space, (data >> 1) & 1);
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adc1038_clk_w(space->machine, (data >> 1) & 1);
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set_cgboard_id((data >> 4) & 0x3);
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set_cgboard_id((data >> 4) & 0x3);
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break;
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break;
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@ -110,7 +110,7 @@ static WRITE8_HANDLER( gyruss_irq_clear_w )
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cputag_set_input_line(space->machine, "audio2", 0, CLEAR_LINE);
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cputag_set_input_line(space->machine, "audio2", 0, CLEAR_LINE);
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}
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}
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static void filter_w(running_machine *machine, int chip, int data)
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static void filter_w(const address_space *space, int chip, int data)
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{
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{
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int i;
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int i;
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@ -119,7 +119,7 @@ static void filter_w(running_machine *machine, int chip, int data)
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{
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{
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/* low bit: 47000pF = 0.047uF */
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/* low bit: 47000pF = 0.047uF */
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/* high bit: 220000pF = 0.22uF */
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/* high bit: 220000pF = 0.22uF */
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discrete_sound_w(machine, NODE(3 * chip + i + 21), data & 3);
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discrete_sound_w(space, NODE(3 * chip + i + 21), data & 3);
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data >>= 2;
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data >>= 2;
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}
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}
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}
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}
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@ -1503,7 +1503,7 @@ static INTERRUPT_GEN( halleys_interrupt )
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latch_data = sound_fifo[fftail];
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latch_data = sound_fifo[fftail];
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fftail = (fftail + 1) & (MAX_SOUNDS - 1);
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fftail = (fftail + 1) & (MAX_SOUNDS - 1);
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latch_delay = (latch_data) ? 0 : 4;
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latch_delay = (latch_data) ? 0 : 4;
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soundlatch_w(device->machine, 0, latch_data);
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soundlatch_w( cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0, latch_data);
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cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
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cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
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}
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}
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@ -1543,7 +1543,7 @@ static INTERRUPT_GEN( benberob_interrupt )
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latch_data = sound_fifo[fftail];
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latch_data = sound_fifo[fftail];
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fftail = (fftail + 1) & (MAX_SOUNDS - 1);
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fftail = (fftail + 1) & (MAX_SOUNDS - 1);
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latch_delay = (latch_data) ? 0 : 4;
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latch_delay = (latch_data) ? 0 : 4;
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soundlatch_w(device->machine, 0, latch_data);
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soundlatch_w(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0, latch_data);
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cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
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cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
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}
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}
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break;
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break;
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@ -391,9 +391,10 @@ static WRITE8_HANDLER( reikaids_upd7807_portc_w )
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static MACHINE_RESET( reikaids_upd7807 )
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static MACHINE_RESET( reikaids_upd7807 )
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{
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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/* on reset, ports are set as input (high impedance), therefore 0xff output */
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/* on reset, ports are set as input (high impedance), therefore 0xff output */
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reikaids_which=homedata_priority;
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reikaids_which=homedata_priority;
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reikaids_upd7807_portc_w(machine,0,0xff);
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reikaids_upd7807_portc_w(space,0,0xff);
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}
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}
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static READ8_HANDLER( reikaids_io_r )
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static READ8_HANDLER( reikaids_io_r )
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@ -537,8 +538,9 @@ static WRITE8_HANDLER( pteacher_upd7807_portc_w )
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static MACHINE_RESET( pteacher_upd7807 )
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static MACHINE_RESET( pteacher_upd7807 )
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{
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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/* on reset, ports are set as input (high impedance), therefore 0xff output */
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/* on reset, ports are set as input (high impedance), therefore 0xff output */
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pteacher_upd7807_portc_w(machine,0,0xff);
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pteacher_upd7807_portc_w(space,0,0xff);
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}
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}
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@ -310,13 +310,13 @@ INLINE int blt_read(const UINT8 *ROM, const int offs)
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return ROM[offs] ^ 0xff;
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return ROM[offs] ^ 0xff;
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}
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}
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INLINE void blt_write(running_machine *machine, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask)
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INLINE void blt_write(const address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask)
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{
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{
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switch( tmap )
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switch( tmap )
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{
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{
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case 1: hyprduel_vram_0_w(machine,offs,data,mask); break;
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case 1: hyprduel_vram_0_w(space,offs,data,mask); break;
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case 2: hyprduel_vram_1_w(machine,offs,data,mask); break;
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case 2: hyprduel_vram_1_w(space,offs,data,mask); break;
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case 3: hyprduel_vram_2_w(machine,offs,data,mask); break;
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case 3: hyprduel_vram_2_w(space,offs,data,mask); break;
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}
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}
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// logerror("CPU #0 PC %06X : Blitter %X] %04X <- %04X & %04X\n",cpu_get_pc(machine->activecpu),tmap,offs,data,mask);
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// logerror("CPU #0 PC %06X : Blitter %X] %04X <- %04X & %04X\n",cpu_get_pc(machine->activecpu),tmap,offs,data,mask);
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}
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}
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@ -391,7 +391,7 @@ static WRITE16_HANDLER( hyprduel_blitter_w )
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src_offs++;
|
src_offs++;
|
||||||
|
|
||||||
dst_offs &= 0xffff;
|
dst_offs &= 0xffff;
|
||||||
blt_write(space->machine,tmap,dst_offs,b2,mask);
|
blt_write(space,tmap,dst_offs,b2,mask);
|
||||||
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
|
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -407,7 +407,7 @@ static WRITE16_HANDLER( hyprduel_blitter_w )
|
|||||||
while (count--)
|
while (count--)
|
||||||
{
|
{
|
||||||
dst_offs &= 0xffff;
|
dst_offs &= 0xffff;
|
||||||
blt_write(space->machine,tmap,dst_offs,b2<<shift,mask);
|
blt_write(space,tmap,dst_offs,b2<<shift,mask);
|
||||||
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
|
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
|
||||||
b2++;
|
b2++;
|
||||||
}
|
}
|
||||||
@ -424,7 +424,7 @@ static WRITE16_HANDLER( hyprduel_blitter_w )
|
|||||||
while (count--)
|
while (count--)
|
||||||
{
|
{
|
||||||
dst_offs &= 0xffff;
|
dst_offs &= 0xffff;
|
||||||
blt_write(space->machine,tmap,dst_offs,b2,mask);
|
blt_write(space,tmap,dst_offs,b2,mask);
|
||||||
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
|
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
@ -129,8 +129,9 @@ static MACHINE_RESET( inufuku )
|
|||||||
|
|
||||||
static DRIVER_INIT( inufuku )
|
static DRIVER_INIT( inufuku )
|
||||||
{
|
{
|
||||||
|
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||||
pending_command = 1;
|
pending_command = 1;
|
||||||
inufuku_soundrombank_w(machine, 0, 0);
|
inufuku_soundrombank_w(space, 0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -291,9 +291,9 @@ static WRITE16_HANDLER( karnov_control_w )
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case 6: /* SECREQ (Interrupt & Data to i8751) */
|
case 6: /* SECREQ (Interrupt & Data to i8751) */
|
||||||
if (microcontroller_id==KARNOV || microcontroller_id==KARNOVJ) karnov_i8751_w(space, data);
|
if (microcontroller_id==KARNOV || microcontroller_id==KARNOVJ) karnov_i8751_w(space->machine, data);
|
||||||
if (microcontroller_id==CHELNOV || microcontroller_id==CHELNOVJ || microcontroller_id==CHELNOVW) chelnov_i8751_w(space, data);
|
if (microcontroller_id==CHELNOV || microcontroller_id==CHELNOVJ || microcontroller_id==CHELNOVW) chelnov_i8751_w(space->machine, data);
|
||||||
if (microcontroller_id==WNDRPLNT) wndrplnt_i8751_w(space, data);
|
if (microcontroller_id==WNDRPLNT) wndrplnt_i8751_w(space->machine, data);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 8: /* HSHIFT (9 bits) - Top bit indicates video flip */
|
case 8: /* HSHIFT (9 bits) - Top bit indicates video flip */
|
||||||
|
@ -127,7 +127,7 @@ static WRITE8_HANDLER( sound_control_w ) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
static WRITE8_HANDLER( sound_command_w ) {
|
static WRITE8_HANDLER( sound_command_w ) {
|
||||||
soundlatch_w( space->machine, 0, data );
|
soundlatch_w( space, 0, data );
|
||||||
cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
|
cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -68,12 +68,12 @@ static WRITE8_HANDLER( sprite_interrupt_w ) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
static WRITE8_HANDLER( scroll_interrupt_w ) {
|
static WRITE8_HANDLER( scroll_interrupt_w ) {
|
||||||
sprite_interrupt_w( space->machine, offset, data );
|
sprite_interrupt_w( space, offset, data );
|
||||||
*kingofb_scroll_y = data;
|
*kingofb_scroll_y = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
static WRITE8_HANDLER( sound_command_w ) {
|
static WRITE8_HANDLER( sound_command_w ) {
|
||||||
soundlatch_w( space->machine, 0, data );
|
soundlatch_w( space, 0, data );
|
||||||
cpu_set_input_line_and_vector(space->machine->cpu[3], 0, HOLD_LINE, 0xff );
|
cpu_set_input_line_and_vector(space->machine->cpu[3], 0, HOLD_LINE, 0xff );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -219,11 +219,11 @@ static READ16_HANDLER( dual539_r )
|
|||||||
data = 0;
|
data = 0;
|
||||||
if( ACCESSING_BITS_0_7 )
|
if( ACCESSING_BITS_0_7 )
|
||||||
{
|
{
|
||||||
data |= k054539_1_r( space->machine, offset );
|
data |= k054539_1_r( space, offset );
|
||||||
}
|
}
|
||||||
if( ACCESSING_BITS_8_15 )
|
if( ACCESSING_BITS_8_15 )
|
||||||
{
|
{
|
||||||
data |= k054539_0_r( space->machine, offset ) << 8;
|
data |= k054539_0_r( space, offset ) << 8;
|
||||||
}
|
}
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
@ -232,11 +232,11 @@ static WRITE16_HANDLER( dual539_w )
|
|||||||
{
|
{
|
||||||
if( ACCESSING_BITS_0_7 )
|
if( ACCESSING_BITS_0_7 )
|
||||||
{
|
{
|
||||||
k054539_1_w( space->machine, offset, data );
|
k054539_1_w( space, offset, data );
|
||||||
}
|
}
|
||||||
if( ACCESSING_BITS_8_15 )
|
if( ACCESSING_BITS_8_15 )
|
||||||
{
|
{
|
||||||
k054539_0_w( space->machine, offset, data >> 8 );
|
k054539_0_w( space, offset, data >> 8 );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -38,9 +38,10 @@ static UINT8 *shared_ram;
|
|||||||
|
|
||||||
MACHINE_RESET( kyugo )
|
MACHINE_RESET( kyugo )
|
||||||
{
|
{
|
||||||
|
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||||
// must start with interrupts and sub CPU disabled
|
// must start with interrupts and sub CPU disabled
|
||||||
cpu_interrupt_enable(0, 0);
|
cpu_interrupt_enable(0, 0);
|
||||||
kyugo_sub_cpu_control_w(machine, 0, 0);
|
kyugo_sub_cpu_control_w(space, 0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user