Fix more compile warnings drivers/[e-k]*

This commit is contained in:
Couriersud 2008-11-14 22:12:41 +00:00
parent db679cd882
commit 1b81e58b3c
19 changed files with 67 additions and 62 deletions

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@ -117,6 +117,7 @@ static WRITE8_HANDLER( aerofgt_sh_bankswitch_w )
static MACHINE_RESET( aerofgt ) static MACHINE_RESET( aerofgt )
{ {
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM); const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
aerofgt_sh_bankswitch_w(space,0,0); /* needed by spinlbrk */ aerofgt_sh_bankswitch_w(space,0,0); /* needed by spinlbrk */
} }

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@ -1402,10 +1402,12 @@ static DRIVER_INIT( pepper2 )
static DRIVER_INIT( fax ) static DRIVER_INIT( fax )
{ {
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
exidy_video_config(0x04, 0x04, TRUE); exidy_video_config(0x04, 0x04, TRUE);
/* reset the ROM bank */ /* reset the ROM bank */
fax_bank_select_w(machine,0,0); fax_bank_select_w(space,0,0);
} }

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@ -134,12 +134,12 @@ static READ16_HANDLER( exterm_host_data_r )
* *
*************************************/ *************************************/
static UINT16 exterm_trackball_port_r(running_machine *machine, int which, UINT16 mem_mask) static UINT16 exterm_trackball_port_r(const address_space *space, int which, UINT16 mem_mask)
{ {
UINT16 port; UINT16 port;
/* Read the fake input port */ /* Read the fake input port */
UINT8 trackball_pos = input_port_read(machine, which ? "DIAL1" : "DIAL0"); UINT8 trackball_pos = input_port_read(space->machine, which ? "DIAL1" : "DIAL0");
/* Calculate the change from the last position. */ /* Calculate the change from the last position. */
UINT8 trackball_diff = trackball_old[which] - trackball_pos; UINT8 trackball_diff = trackball_old[which] - trackball_pos;
@ -155,7 +155,7 @@ static UINT16 exterm_trackball_port_r(running_machine *machine, int which, UINT1
aimpos[which] = (aimpos[which] + trackball_diff) & 0x3f; aimpos[which] = (aimpos[which] + trackball_diff) & 0x3f;
/* Combine it with the standard input bits */ /* Combine it with the standard input bits */
port = which ? input_port_read(machine, "P2") : input_port_read(machine, "P1"); port = which ? input_port_read(space->machine, "P2") : input_port_read(space->machine, "P1");
return (port & 0xc0ff) | (aimpos[which] << 8); return (port & 0xc0ff) | (aimpos[which] << 8);
} }

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@ -40,7 +40,9 @@ static INPUT_CHANGED( service_mode_switch_changed )
static INPUT_CHANGED( firetrk_horn_changed ) static INPUT_CHANGED( firetrk_horn_changed )
{ {
discrete_sound_w(field->port->machine, FIRETRUCK_HORN_EN, newval); const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
discrete_sound_w(space, FIRETRUCK_HORN_EN, newval);
} }

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@ -126,7 +126,9 @@ ADDRESS_MAP_END
static CUSTOM_INPUT( victnine_mcu_status_bit01_r ) static CUSTOM_INPUT( victnine_mcu_status_bit01_r )
{ {
return (victnine_mcu_status_r(field->port->machine,0) & 3); const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
return (victnine_mcu_status_r(space,0) & 3);
} }
static ADDRESS_MAP_START( victnine_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( victnine_map, ADDRESS_SPACE_PROGRAM, 8 )

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@ -824,14 +824,20 @@ static MACHINE_START( galaga )
cpu3_interrupt_timer = timer_alloc(cpu3_interrupt_callback, NULL); cpu3_interrupt_timer = timer_alloc(cpu3_interrupt_callback, NULL);
} }
static void bosco_latch_reset(running_machine *machine)
static MACHINE_RESET( bosco )
{ {
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
int i; int i;
/* Reset all latches */ /* Reset all latches */
for (i = 0;i < 8;i++) for (i = 0;i < 8;i++)
bosco_latch_w(machine,i,0); bosco_latch_w(space,i,0);
}
static MACHINE_RESET( bosco )
{
/* Reset all latches */
bosco_latch_reset(machine);
namco_06xx_init(0, 0, namco_06xx_init(0, 0,
NAMCOIO_51XX, &intf0, NAMCOIO_51XX, &intf0,
@ -850,11 +856,8 @@ static MACHINE_RESET( bosco )
static MACHINE_RESET( galaga ) static MACHINE_RESET( galaga )
{ {
int i;
/* Reset all latches */ /* Reset all latches */
for (i = 0;i < 8;i++) bosco_latch_reset(machine);
bosco_latch_w(machine,i,0);
namco_06xx_init(0, 0, namco_06xx_init(0, 0,
NAMCOIO_51XX, &intf0, NAMCOIO_51XX, &intf0,
@ -867,11 +870,8 @@ static MACHINE_RESET( galaga )
static MACHINE_RESET( xevious ) static MACHINE_RESET( xevious )
{ {
int i;
/* Reset all latches */ /* Reset all latches */
for (i = 0;i < 8;i++) bosco_latch_reset(machine);
bosco_latch_w(machine,i,0);
namco_06xx_init(0, 0, namco_06xx_init(0, 0,
NAMCOIO_51XX, &intf0, NAMCOIO_51XX, &intf0,
@ -884,11 +884,8 @@ static MACHINE_RESET( xevious )
static MACHINE_RESET( battles ) static MACHINE_RESET( battles )
{ {
int i;
/* Reset all latches */ /* Reset all latches */
for (i = 0;i < 8;i++) bosco_latch_reset(machine);
bosco_latch_w(machine,i,0);
battles_customio_init(); battles_customio_init();
@ -897,11 +894,8 @@ static MACHINE_RESET( battles )
static MACHINE_RESET( digdug ) static MACHINE_RESET( digdug )
{ {
int i;
/* Reset all latches */ /* Reset all latches */
for (i = 0;i < 8;i++) bosco_latch_reset(machine);
bosco_latch_w(machine,i,0);
namco_06xx_init(0, 0, namco_06xx_init(0, 0,
NAMCOIO_51XX, &intf0, NAMCOIO_51XX, &intf0,

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@ -473,13 +473,13 @@ static const struct dma8237_interface dma8237_2_config =
static READ32_HANDLER(at_page32_r) static READ32_HANDLER(at_page32_r)
{ {
return read32le_with_read8_handler(at_page8_r, space->machine, offset, mem_mask); return read32le_with_read8_handler(at_page8_r, space, offset, mem_mask);
} }
static WRITE32_HANDLER(at_page32_w) static WRITE32_HANDLER(at_page32_w)
{ {
write32le_with_write8_handler(at_page8_w, space->machine, offset, data, mem_mask); write32le_with_write8_handler(at_page8_w, space, offset, data, mem_mask);
} }

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@ -373,12 +373,12 @@ WRITE16_HANDLER ( genesis_68k_to_z80_w )
switch (offset & 3) switch (offset & 3)
{ {
case 0: case 0:
if (ACCESSING_BITS_8_15) ym3438_control_port_0_a_w (space->machine, 0, (data >> 8) & 0xff); if (ACCESSING_BITS_8_15) ym3438_control_port_0_a_w (space, 0, (data >> 8) & 0xff);
else ym3438_data_port_0_a_w (space->machine, 0, (data >> 0) & 0xff); else ym3438_data_port_0_a_w (space, 0, (data >> 0) & 0xff);
break; break;
case 2: case 2:
if (ACCESSING_BITS_8_15) ym3438_control_port_0_b_w (space->machine, 0, (data >> 8) & 0xff); if (ACCESSING_BITS_8_15) ym3438_control_port_0_b_w (space, 0, (data >> 8) & 0xff);
else ym3438_data_port_0_b_w (space->machine, 0, (data >> 0) & 0xff); else ym3438_data_port_0_b_w (space, 0, (data >> 0) & 0xff);
break; break;
} }
} }
@ -576,13 +576,13 @@ WRITE8_HANDLER ( genesis_z80_w )
{ {
switch (offset & 3) switch (offset & 3)
{ {
case 0: ym3438_control_port_0_a_w (space->machine, 0, data); case 0: ym3438_control_port_0_a_w (space, 0, data);
break; break;
case 1: ym3438_data_port_0_a_w (space->machine, 0, data); case 1: ym3438_data_port_0_a_w (space, 0, data);
break; break;
case 2: ym3438_control_port_0_b_w (space->machine, 0, data); case 2: ym3438_control_port_0_b_w (space, 0, data);
break; break;
case 3: ym3438_data_port_0_b_w (space->machine, 0, data); case 3: ym3438_data_port_0_b_w (space, 0, data);
break; break;
} }
} }

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@ -473,7 +473,7 @@ static READ8_HANDLER( sysreg_r )
return input_port_read(space->machine, portnames[offset]); return input_port_read(space->machine, portnames[offset]);
case 2: case 2:
return adc1038_sars_r(space) << 7; return adc1038_sars_r(space->machine) << 7;
case 4: case 4:
{ {
@ -521,7 +521,7 @@ static WRITE8_HANDLER( sysreg_w )
cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE); cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
adc1038_di_w((data >> 0) & 1); adc1038_di_w((data >> 0) & 1);
adc1038_clk_w(space, (data >> 1) & 1); adc1038_clk_w(space->machine, (data >> 1) & 1);
set_cgboard_id((data >> 4) & 0x3); set_cgboard_id((data >> 4) & 0x3);
break; break;

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@ -110,7 +110,7 @@ static WRITE8_HANDLER( gyruss_irq_clear_w )
cputag_set_input_line(space->machine, "audio2", 0, CLEAR_LINE); cputag_set_input_line(space->machine, "audio2", 0, CLEAR_LINE);
} }
static void filter_w(running_machine *machine, int chip, int data) static void filter_w(const address_space *space, int chip, int data)
{ {
int i; int i;
@ -119,7 +119,7 @@ static void filter_w(running_machine *machine, int chip, int data)
{ {
/* low bit: 47000pF = 0.047uF */ /* low bit: 47000pF = 0.047uF */
/* high bit: 220000pF = 0.22uF */ /* high bit: 220000pF = 0.22uF */
discrete_sound_w(machine, NODE(3 * chip + i + 21), data & 3); discrete_sound_w(space, NODE(3 * chip + i + 21), data & 3);
data >>= 2; data >>= 2;
} }
} }

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@ -1503,7 +1503,7 @@ static INTERRUPT_GEN( halleys_interrupt )
latch_data = sound_fifo[fftail]; latch_data = sound_fifo[fftail];
fftail = (fftail + 1) & (MAX_SOUNDS - 1); fftail = (fftail + 1) & (MAX_SOUNDS - 1);
latch_delay = (latch_data) ? 0 : 4; latch_delay = (latch_data) ? 0 : 4;
soundlatch_w(device->machine, 0, latch_data); soundlatch_w( cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0, latch_data);
cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE); cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
} }
@ -1543,7 +1543,7 @@ static INTERRUPT_GEN( benberob_interrupt )
latch_data = sound_fifo[fftail]; latch_data = sound_fifo[fftail];
fftail = (fftail + 1) & (MAX_SOUNDS - 1); fftail = (fftail + 1) & (MAX_SOUNDS - 1);
latch_delay = (latch_data) ? 0 : 4; latch_delay = (latch_data) ? 0 : 4;
soundlatch_w(device->machine, 0, latch_data); soundlatch_w(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0, latch_data);
cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE); cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
} }
break; break;

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@ -391,9 +391,10 @@ static WRITE8_HANDLER( reikaids_upd7807_portc_w )
static MACHINE_RESET( reikaids_upd7807 ) static MACHINE_RESET( reikaids_upd7807 )
{ {
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
/* on reset, ports are set as input (high impedance), therefore 0xff output */ /* on reset, ports are set as input (high impedance), therefore 0xff output */
reikaids_which=homedata_priority; reikaids_which=homedata_priority;
reikaids_upd7807_portc_w(machine,0,0xff); reikaids_upd7807_portc_w(space,0,0xff);
} }
static READ8_HANDLER( reikaids_io_r ) static READ8_HANDLER( reikaids_io_r )
@ -537,8 +538,9 @@ static WRITE8_HANDLER( pteacher_upd7807_portc_w )
static MACHINE_RESET( pteacher_upd7807 ) static MACHINE_RESET( pteacher_upd7807 )
{ {
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
/* on reset, ports are set as input (high impedance), therefore 0xff output */ /* on reset, ports are set as input (high impedance), therefore 0xff output */
pteacher_upd7807_portc_w(machine,0,0xff); pteacher_upd7807_portc_w(space,0,0xff);
} }

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@ -310,13 +310,13 @@ INLINE int blt_read(const UINT8 *ROM, const int offs)
return ROM[offs] ^ 0xff; return ROM[offs] ^ 0xff;
} }
INLINE void blt_write(running_machine *machine, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask) INLINE void blt_write(const address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask)
{ {
switch( tmap ) switch( tmap )
{ {
case 1: hyprduel_vram_0_w(machine,offs,data,mask); break; case 1: hyprduel_vram_0_w(space,offs,data,mask); break;
case 2: hyprduel_vram_1_w(machine,offs,data,mask); break; case 2: hyprduel_vram_1_w(space,offs,data,mask); break;
case 3: hyprduel_vram_2_w(machine,offs,data,mask); break; case 3: hyprduel_vram_2_w(space,offs,data,mask); break;
} }
// logerror("CPU #0 PC %06X : Blitter %X] %04X <- %04X & %04X\n",cpu_get_pc(machine->activecpu),tmap,offs,data,mask); // logerror("CPU #0 PC %06X : Blitter %X] %04X <- %04X & %04X\n",cpu_get_pc(machine->activecpu),tmap,offs,data,mask);
} }
@ -391,7 +391,7 @@ static WRITE16_HANDLER( hyprduel_blitter_w )
src_offs++; src_offs++;
dst_offs &= 0xffff; dst_offs &= 0xffff;
blt_write(space->machine,tmap,dst_offs,b2,mask); blt_write(space,tmap,dst_offs,b2,mask);
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1))); dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
} }
break; break;
@ -407,7 +407,7 @@ static WRITE16_HANDLER( hyprduel_blitter_w )
while (count--) while (count--)
{ {
dst_offs &= 0xffff; dst_offs &= 0xffff;
blt_write(space->machine,tmap,dst_offs,b2<<shift,mask); blt_write(space,tmap,dst_offs,b2<<shift,mask);
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1))); dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
b2++; b2++;
} }
@ -424,7 +424,7 @@ static WRITE16_HANDLER( hyprduel_blitter_w )
while (count--) while (count--)
{ {
dst_offs &= 0xffff; dst_offs &= 0xffff;
blt_write(space->machine,tmap,dst_offs,b2,mask); blt_write(space,tmap,dst_offs,b2,mask);
dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1))); dst_offs = ((dst_offs+1) & (0x100-1)) | (dst_offs & (~(0x100-1)));
} }
break; break;

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@ -129,8 +129,9 @@ static MACHINE_RESET( inufuku )
static DRIVER_INIT( inufuku ) static DRIVER_INIT( inufuku )
{ {
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
pending_command = 1; pending_command = 1;
inufuku_soundrombank_w(machine, 0, 0); inufuku_soundrombank_w(space, 0, 0);
} }

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@ -291,9 +291,9 @@ static WRITE16_HANDLER( karnov_control_w )
break; break;
case 6: /* SECREQ (Interrupt & Data to i8751) */ case 6: /* SECREQ (Interrupt & Data to i8751) */
if (microcontroller_id==KARNOV || microcontroller_id==KARNOVJ) karnov_i8751_w(space, data); if (microcontroller_id==KARNOV || microcontroller_id==KARNOVJ) karnov_i8751_w(space->machine, data);
if (microcontroller_id==CHELNOV || microcontroller_id==CHELNOVJ || microcontroller_id==CHELNOVW) chelnov_i8751_w(space, data); if (microcontroller_id==CHELNOV || microcontroller_id==CHELNOVJ || microcontroller_id==CHELNOVW) chelnov_i8751_w(space->machine, data);
if (microcontroller_id==WNDRPLNT) wndrplnt_i8751_w(space, data); if (microcontroller_id==WNDRPLNT) wndrplnt_i8751_w(space->machine, data);
break; break;
case 8: /* HSHIFT (9 bits) - Top bit indicates video flip */ case 8: /* HSHIFT (9 bits) - Top bit indicates video flip */

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@ -127,7 +127,7 @@ static WRITE8_HANDLER( sound_control_w ) {
} }
static WRITE8_HANDLER( sound_command_w ) { static WRITE8_HANDLER( sound_command_w ) {
soundlatch_w( space->machine, 0, data ); soundlatch_w( space, 0, data );
cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff ); cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
} }

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@ -68,12 +68,12 @@ static WRITE8_HANDLER( sprite_interrupt_w ) {
} }
static WRITE8_HANDLER( scroll_interrupt_w ) { static WRITE8_HANDLER( scroll_interrupt_w ) {
sprite_interrupt_w( space->machine, offset, data ); sprite_interrupt_w( space, offset, data );
*kingofb_scroll_y = data; *kingofb_scroll_y = data;
} }
static WRITE8_HANDLER( sound_command_w ) { static WRITE8_HANDLER( sound_command_w ) {
soundlatch_w( space->machine, 0, data ); soundlatch_w( space, 0, data );
cpu_set_input_line_and_vector(space->machine->cpu[3], 0, HOLD_LINE, 0xff ); cpu_set_input_line_and_vector(space->machine->cpu[3], 0, HOLD_LINE, 0xff );
} }

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@ -219,11 +219,11 @@ static READ16_HANDLER( dual539_r )
data = 0; data = 0;
if( ACCESSING_BITS_0_7 ) if( ACCESSING_BITS_0_7 )
{ {
data |= k054539_1_r( space->machine, offset ); data |= k054539_1_r( space, offset );
} }
if( ACCESSING_BITS_8_15 ) if( ACCESSING_BITS_8_15 )
{ {
data |= k054539_0_r( space->machine, offset ) << 8; data |= k054539_0_r( space, offset ) << 8;
} }
return data; return data;
} }
@ -232,11 +232,11 @@ static WRITE16_HANDLER( dual539_w )
{ {
if( ACCESSING_BITS_0_7 ) if( ACCESSING_BITS_0_7 )
{ {
k054539_1_w( space->machine, offset, data ); k054539_1_w( space, offset, data );
} }
if( ACCESSING_BITS_8_15 ) if( ACCESSING_BITS_8_15 )
{ {
k054539_0_w( space->machine, offset, data >> 8 ); k054539_0_w( space, offset, data >> 8 );
} }
} }

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@ -38,9 +38,10 @@ static UINT8 *shared_ram;
MACHINE_RESET( kyugo ) MACHINE_RESET( kyugo )
{ {
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
// must start with interrupts and sub CPU disabled // must start with interrupts and sub CPU disabled
cpu_interrupt_enable(0, 0); cpu_interrupt_enable(0, 0);
kyugo_sub_cpu_control_w(machine, 0, 0); kyugo_sub_cpu_control_w(space, 0, 0);
} }