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amiga: use memarray for chip RAM and regular array for custom registers (instead of shared_ptr for both) [Alex Jackson]

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This commit is contained in:
Alex W. Jackson 2014-10-19 08:14:45 +00:00
parent 4ad7a0ea58
commit 1b89b80e9c
13 changed files with 103 additions and 178 deletions
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2
src/emu/machine/akiko.c
View File

@ -510,7 +510,7 @@ TIMER_CALLBACK_MEMBER(akiko_device::dma_proc)
data <<= 8;
data |= buf[i+1];
(*amiga->m_chip_ram_w)( amiga, m_cdrom_address[0] + (index*4096) + i, data );
amiga->chip_ram_w(m_cdrom_address[0] + (index*4096) + i, data );
}
m_cdrom_readmask |= ( 1 << index );

4
src/emu/machine/amigafdc.c
View File

@ -74,7 +74,7 @@ void amiga_fdc::dma_done()
void amiga_fdc::dma_write(UINT16 value)
{
amiga_state *state = machine().driver_data<amiga_state>();
(*state->m_chip_ram_w)(state, dskpt, value);
state->chip_ram_w(dskpt, value);
dskpt += 2;
dsklen--;
@ -88,7 +88,7 @@ void amiga_fdc::dma_write(UINT16 value)
UINT16 amiga_fdc::dma_read()
{
amiga_state *state = machine().driver_data<amiga_state>();
UINT16 res = (*state->m_chip_ram_r)(state, dskpt);
UINT16 res = state->chip_ram_r(dskpt);
dskpt += 2;
dsklen--;

2
src/emu/sound/amiga.c
View File

@ -212,7 +212,7 @@ void amiga_sound_device::sound_stream_update(sound_stream &stream, stream_sample
chan->curlocation++;
if (chan->dma_enabled && !(chan->curlocation & 1))
{
CUSTOM_REG(REG_AUD0DAT + channum * 8) = (*state->m_chip_ram_r)(state, chan->curlocation);
CUSTOM_REG(REG_AUD0DAT + channum * 8) = state->chip_ram_r(chan->curlocation);
if (chan->curlength != 0)
chan->curlength--;

2
src/mame/drivers/alg.c
View File

@ -168,7 +168,7 @@ static ADDRESS_MAP_START( a500_mem, AS_PROGRAM, 16, alg_state )
AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xd80000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

2
src/mame/drivers/arcadia.c
View File

@ -194,7 +194,7 @@ static ADDRESS_MAP_START( a500_mem, AS_PROGRAM, 16, arcadia_amiga_state )
AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xd80000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

38
src/mame/drivers/cubo.c
View File

@ -360,7 +360,7 @@ private:
typedef void (cubo_state::*input_hack_func)();
input_hack_func m_input_hack;
void chip_ram_w8_hack(offs_t byteoffs, UINT8 data);
void cndypuzl_input_hack();
void haremchl_input_hack();
void lsrquiz_input_hack();
@ -415,7 +415,7 @@ static ADDRESS_MAP_START( cubo_mem, AS_PROGRAM, 32, cubo_state )
AM_RANGE(0x800010, 0x800013) AM_READ_PORT("DIPSW2")
AM_RANGE(0xb80000, 0xb8003f) AM_DEVREADWRITE("akiko", akiko_device, read, write)
AM_RANGE(0xbf0000, 0xbfffff) AM_READWRITE16(cia_r, gayle_cia_w, 0xffffffff)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
AM_RANGE(0xe00000, 0xe7ffff) AM_ROM AM_REGION("kickstart", 0x80000)
AM_RANGE(0xa00000, 0xf7ffff) AM_NOP
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)
@ -1170,12 +1170,24 @@ ROM_END
*
*************************************/
void cubo_state::chip_ram_w8_hack(offs_t byteoffs, UINT8 data)
{
UINT16 word = chip_ram_r(byteoffs);
if (byteoffs & 1)
word = (word & 0xff00) | data;
else
word = (word & 0x00ff) | (((UINT16)data) << 8);
chip_ram_w(byteoffs, word);
}
void cubo_state::cndypuzl_input_hack()
{
if (m_maincpu->pc < m_chip_ram.bytes())
{
UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
(*m_chip_ram_w)(this, r_A5 - 0x7ebe, 0x0000);
chip_ram_w(r_A5 - 0x7ebe, 0x0000);
}
}
@ -1190,8 +1202,8 @@ void cubo_state::haremchl_input_hack()
if (m_maincpu->pc < m_chip_ram.bytes())
{
UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7f00 + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7f00 + 2));
amiga_chip_ram_w8(this, r_A2 + 0x1f, 0x00);
UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7f00 + 0) << 16) | (chip_ram_r(r_A5 - 0x7f00 + 2));
chip_ram_w8_hack(r_A2 + 0x1f, 0x00);
}
}
@ -1206,8 +1218,8 @@ void cubo_state::lsrquiz_input_hack()
if (m_maincpu->pc < m_chip_ram.bytes())
{
UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7fe0 + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7fe0 + 2));
amiga_chip_ram_w8(this, r_A2 + 0x13, 0x00);
UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7fe0 + 0) << 16) | (chip_ram_r(r_A5 - 0x7fe0 + 2));
chip_ram_w8_hack(r_A2 + 0x13, 0x00);
}
}
@ -1223,8 +1235,8 @@ void cubo_state::lsrquiz2_input_hack()
if (m_maincpu->pc < m_chip_ram.bytes())
{
UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7fdc + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7fdc + 2));
amiga_chip_ram_w8(this, r_A2 + 0x17, 0x00);
UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7fdc + 0) << 16) | (chip_ram_r(r_A5 - 0x7fdc + 2));
chip_ram_w8_hack(r_A2 + 0x17, 0x00);
}
}
@ -1239,8 +1251,8 @@ void cubo_state::lasstixx_input_hack()
if (m_maincpu->pc < m_chip_ram.bytes())
{
UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
UINT32 r_A2 = ((*m_chip_ram_r)(this, r_A5 - 0x7fa2 + 0) << 16) | ((*m_chip_ram_r)(this, r_A5 - 0x7fa2 + 2));
amiga_chip_ram_w8(this, r_A2 + 0x24, 0x00);
UINT32 r_A2 = (chip_ram_r(r_A5 - 0x7fa2 + 0) << 16) | (chip_ram_r(r_A5 - 0x7fa2 + 2));
chip_ram_w8_hack(r_A2 + 0x24, 0x00);
}
}
@ -1255,7 +1267,7 @@ void cubo_state::mgnumber_input_hack()
if (m_maincpu->pc < m_chip_ram.bytes())
{
UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
(*m_chip_ram_w)(this, r_A5 - 0x7ed8, 0x0000);
chip_ram_w(r_A5 - 0x7ed8, 0x0000);
}
}
@ -1270,7 +1282,7 @@ void cubo_state::mgprem11_input_hack()
if (m_maincpu->pc < m_chip_ram.bytes())
{
UINT32 r_A5 = m_maincpu->state_int(M68K_A5);
amiga_chip_ram_w8(this, r_A5 - 0x7eca, 0x00);
chip_ram_w8_hack(r_A5 - 0x7eca, 0x00);
}
}

2
src/mame/drivers/mquake.c
View File

@ -126,7 +126,7 @@ static ADDRESS_MAP_START( a500_mem, AS_PROGRAM, 16, mquake_state )
AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xd80000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

2
src/mame/drivers/upscope.c
View File

@ -216,7 +216,7 @@ static ADDRESS_MAP_START( a500_mem, AS_PROGRAM, 16, upscope_state )
AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xd80000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)

26
src/mame/includes/amiga.h
View File

@ -326,8 +326,6 @@ class amiga_state : public driver_device
public:
amiga_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_chip_ram(*this, "chip_ram", 0),
m_custom_regs(*this, "custom_regs", 0),
m_agnus_id(AGNUS_NTSC),
m_denise_id(DENISE),
m_maincpu(*this, "maincpu"),
@ -353,7 +351,6 @@ public:
m_p2_mouse_x(*this, "p2_mouse_x"),
m_p2_mouse_y(*this, "p2_mouse_y"),
m_chip_ram_mask(0),
m_chip_ram_mirror(0),
m_cia_0_irq(0),
m_cia_1_irq(0),
m_pot0x(0), m_pot1x(0), m_pot0y(0), m_pot1y(0),
@ -373,10 +370,16 @@ public:
m_rx_previous(1)
{ }
UINT16 (*m_chip_ram_r)(amiga_state *state, offs_t offset);
void (*m_chip_ram_w)(amiga_state *state, offs_t offset, UINT16 data);
/* chip RAM access */
UINT16 chip_ram_r(offs_t byteoffs)
{
return EXPECTED(byteoffs < m_chip_ram.bytes()) ? m_chip_ram.read(byteoffs >> 1) : 0xffff;
}
void chip_ram_w(offs_t byteoffs, UINT16 data)
{
if (EXPECTED(byteoffs < m_chip_ram.bytes()))
m_chip_ram.write(byteoffs >> 1, data);
}
/* sprite states */
UINT8 m_sprite_comparitor_enable_mask;
@ -486,14 +489,13 @@ public:
HBLANK = 186
};
required_shared_ptr<UINT16> m_chip_ram;
required_shared_ptr<UINT16> m_custom_regs;
emu_timer *m_blitter_timer;
UINT16 m_agnus_id;
UINT16 m_denise_id;
UINT16 m_custom_regs[256];
void custom_chip_w(UINT16 offset, UINT16 data, UINT16 mem_mask = 0xffff)
{
custom_chip_w(m_maincpu->space(AS_PROGRAM), offset, data, mem_mask);
@ -577,8 +579,8 @@ protected:
optional_ioport m_p2_mouse_x;
optional_ioport m_p2_mouse_y;
memory_array m_chip_ram;
UINT32 m_chip_ram_mask;
UINT32 m_chip_ram_mirror;
int m_cia_0_irq;
int m_cia_1_irq;
@ -663,8 +665,6 @@ private:
extern const char *const amiga_custom_names[0x100];
void amiga_chip_ram_w8(amiga_state *state, offs_t offset, UINT8 data);
/*----------- defined in video/amiga.c -----------*/

121
src/mame/machine/amiga.c
View File

@ -132,83 +132,6 @@ const char *const amiga_custom_names[0x100] =
/*************************************
*
* Chipmem 16/32 bit access
*
*************************************/
static UINT16 amiga_chip_ram16_r(amiga_state *state, offs_t offset)
{
// logerror("chip ram read %08x\n", offset);
return (offset < state->m_chip_ram.bytes()) ? state->m_chip_ram[offset/2] : 0xffff;
}
static UINT16 amiga_chip_ram32_r(amiga_state *state, offs_t offset)
{
if (offset < state->m_chip_ram.bytes())
{
UINT32 *amiga_chip_ram32 = reinterpret_cast<UINT32 *>(state->m_chip_ram.target());
UINT32 dat = amiga_chip_ram32[offset / 4];
if ( offset & 2 )
return (dat & 0xffff);
return (dat >> 16);
}
return 0xffff;
}
static void amiga_chip_ram16_w(amiga_state *state, offs_t offset, UINT16 data)
{
if (offset < state->m_chip_ram.bytes())
state->m_chip_ram[offset/2] = data;
}
static void amiga_chip_ram32_w(amiga_state *state, offs_t offset, UINT16 data)
{
if (offset < state->m_chip_ram.bytes())
{
UINT32 *amiga_chip_ram32 = reinterpret_cast<UINT32 *>(state->m_chip_ram.target());
UINT32 dat = amiga_chip_ram32[offset / 4];
if ( offset & 2 )
{
dat &= 0xffff0000;
dat |= data;
}
else
{
dat &= 0x0000ffff;
dat |= ((UINT32)data) << 16;
}
amiga_chip_ram32[offset / 4] = dat;
}
}
void amiga_chip_ram_w8(amiga_state *state, offs_t offset, UINT8 data)
{
UINT16 dat;
dat = (*state->m_chip_ram_r)(state, offset);
if (offset & 0x01)
{
dat &= 0xff00;
dat |= data;
}
else
{
dat &= 0x00ff;
dat |= ((UINT16)data) << 8;
}
(*state->m_chip_ram_w)(state, offset, dat);
}
/*************************************
*
* Machine reset
@ -220,24 +143,14 @@ void amiga_state::machine_start()
// add callback for RESET instruction
m_maincpu->set_reset_callback(write_line_delegate(FUNC(amiga_state::m68k_reset), this));
switch (m_maincpu->space(AS_PROGRAM).data_width())
{
case 16:
m_chip_ram_r = amiga_chip_ram16_r;
m_chip_ram_w = amiga_chip_ram16_w;
break;
case 32:
m_chip_ram_r = amiga_chip_ram32_r;
m_chip_ram_w = amiga_chip_ram32_w;
break;
default:
fatalerror("Invalid data bus width\n");
}
// set up chip RAM access
memory_share *share = memshare("chip_ram");
if (share == NULL)
fatalerror("Unable to find Amiga chip RAM\n");
m_chip_ram.set(*share, 2);
m_chip_ram_mask = (m_chip_ram.bytes() - 1) & ~1;
m_chip_ram_mask = m_chip_ram.mask() & ~1;
m_chip_ram_mirror = ~m_chip_ram.mask() & 0x1fffff;
// setup the timers
// set up the timers
m_irq_timer = timer_alloc(TIMER_AMIGA_IRQ);
m_blitter_timer = timer_alloc(TIMER_AMIGA_BLITTER);
m_serial_timer = timer_alloc(TIMER_SERIAL);
@ -536,21 +449,21 @@ static UINT32 blit_ascending(amiga_state *state)
if (CUSTOM_REG(REG_BLTCON0) & 0x0800)
{
//CUSTOM_REG(REG_BLTADAT) = state->m_maincpu->space(AS_PROGRAM).read_word(CUSTOM_REG_LONG(REG_BLTAPTH));
CUSTOM_REG(REG_BLTADAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTAPTH));
CUSTOM_REG(REG_BLTADAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTAPTH));
CUSTOM_REG_LONG(REG_BLTAPTH) += 2;
}
/* fetch data for B */
if (CUSTOM_REG(REG_BLTCON0) & 0x0400)
{
CUSTOM_REG(REG_BLTBDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTBPTH));
CUSTOM_REG(REG_BLTBDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTBPTH));
CUSTOM_REG_LONG(REG_BLTBPTH) += 2;
}
/* fetch data for C */
if (CUSTOM_REG(REG_BLTCON0) & 0x0200)
{
CUSTOM_REG(REG_BLTCDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTCPTH));
CUSTOM_REG(REG_BLTCDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTCPTH));
CUSTOM_REG_LONG(REG_BLTCPTH) += 2;
}
@ -606,7 +519,7 @@ static UINT32 blit_ascending(amiga_state *state)
/* write to the destination */
if (CUSTOM_REG(REG_BLTCON0) & 0x0100)
{
(*state->m_chip_ram_w)(state, CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
state->chip_ram_w(CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
CUSTOM_REG_LONG(REG_BLTDPTH) += 2;
}
}
@ -661,21 +574,21 @@ static UINT32 blit_descending(amiga_state *state)
/* fetch data for A */
if (CUSTOM_REG(REG_BLTCON0) & 0x0800)
{
CUSTOM_REG(REG_BLTADAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTAPTH));
CUSTOM_REG(REG_BLTADAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTAPTH));
CUSTOM_REG_LONG(REG_BLTAPTH) -= 2;
}
/* fetch data for B */
if (CUSTOM_REG(REG_BLTCON0) & 0x0400)
{
CUSTOM_REG(REG_BLTBDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTBPTH));
CUSTOM_REG(REG_BLTBDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTBPTH));
CUSTOM_REG_LONG(REG_BLTBPTH) -= 2;
}
/* fetch data for C */
if (CUSTOM_REG(REG_BLTCON0) & 0x0200)
{
CUSTOM_REG(REG_BLTCDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTCPTH));
CUSTOM_REG(REG_BLTCDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTCPTH));
CUSTOM_REG_LONG(REG_BLTCPTH) -= 2;
}
@ -748,7 +661,7 @@ static UINT32 blit_descending(amiga_state *state)
/* write to the destination */
if (CUSTOM_REG(REG_BLTCON0) & 0x0100)
{
(*state->m_chip_ram_w)(state, CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
state->chip_ram_w(CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
CUSTOM_REG_LONG(REG_BLTDPTH) -= 2;
}
}
@ -840,7 +753,7 @@ static UINT32 blit_line(amiga_state *state)
/* fetch data for C */
if (CUSTOM_REG(REG_BLTCON0) & 0x0200)
CUSTOM_REG(REG_BLTCDAT) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BLTCPTH));
CUSTOM_REG(REG_BLTCDAT) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BLTCPTH));
/* rotate the A data according to the shift */
tempa = CUSTOM_REG(REG_BLTADAT) >> (CUSTOM_REG(REG_BLTCON0) >> 12);
@ -891,7 +804,7 @@ static UINT32 blit_line(amiga_state *state)
blitsum |= tempd;
/* write to the destination */
(*state->m_chip_ram_w)(state, CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
state->chip_ram_w(CUSTOM_REG_LONG(REG_BLTDPTH), tempd);
/* always increment along the major axis */
if (CUSTOM_REG(REG_BLTCON1) & 0x0010)

14
src/mame/video/amiga.c
View File

@ -240,12 +240,12 @@ int amiga_copper_execute_next(running_machine &machine, int xpos)
}
/* fetch the first data word */
word0 = (*state->m_chip_ram_r)(state, state->m_copper_pc);
word0 = state->chip_ram_r(state->m_copper_pc);
state->m_copper_pc += 2;
xpos += COPPER_CYCLES_TO_PIXELS(1);
/* fetch the second data word */
word1 = (*state->m_chip_ram_r)(state, state->m_copper_pc);
word1 = state->chip_ram_r(state->m_copper_pc);
state->m_copper_pc += 2;
xpos += COPPER_CYCLES_TO_PIXELS(1);
@ -381,8 +381,8 @@ void amiga_sprite_enable_comparitor(running_machine &machine, int which, int ena
INLINE void fetch_sprite_data(amiga_state *state, int scanline, int sprite)
{
CUSTOM_REG(REG_SPR0DATA + 4 * sprite) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
CUSTOM_REG(REG_SPR0DATB + 4 * sprite) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG(REG_SPR0DATA + 4 * sprite) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
CUSTOM_REG(REG_SPR0DATB + 4 * sprite) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X\n", scanline, sprite, CUSTOM_REG(REG_SPR0DATA + 4 * sprite), CUSTOM_REG(REG_SPR0DATB + 4 * sprite));
}
@ -411,8 +411,8 @@ static void update_sprite_dma(amiga_state *state, int scanline)
state->m_sprite_dma_reload_mask &= ~bitmask;
/* fetch data into the control words */
CUSTOM_REG(REG_SPR0POS + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
CUSTOM_REG(REG_SPR0CTL + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
CUSTOM_REG(REG_SPR0POS + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
CUSTOM_REG(REG_SPR0CTL + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) += 4;
if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: pos=%04X ctl=%04X\n", scanline, num, CUSTOM_REG(REG_SPR0POS + 4 * num), CUSTOM_REG(REG_SPR0CTL + 4 * num));
}
@ -586,7 +586,7 @@ INLINE UINT8 assemble_even_bitplanes(amiga_state *state, int planes, int ebitoff
INLINE void fetch_bitplane_data(amiga_state *state, int plane)
{
CUSTOM_REG(REG_BPL1DAT + plane) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
CUSTOM_REG(REG_BPL1DAT + plane) = state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
}

46
src/mame/video/amigaaga.c
View File

@ -92,35 +92,35 @@ INLINE void fetch_sprite_data(amiga_state *state, int scanline, int sprite)
switch((CUSTOM_REG(REG_FMODE) >> 2) & 0x03)
{
case 0:
state->m_aga_sprdata[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
state->m_aga_sprdata[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
state->m_aga_sprite_fetched_words = 1;
if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X\n", scanline, sprite, state->m_aga_sprdata[sprite][0], state->m_aga_sprdatb[sprite][0]);
break;
case 1:
case 2:
state->m_aga_sprdata[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdata[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
state->m_aga_sprdata[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdata[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
state->m_aga_sprdatb[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
state->m_aga_sprdatb[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
state->m_aga_sprite_fetched_words = 2;
if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X %04X-%04X\n", scanline, sprite, state->m_aga_sprdata[sprite][0], state->m_aga_sprdatb[sprite][0], state->m_aga_sprdata[sprite][1], state->m_aga_sprdatb[sprite][1] );
break;
case 3:
state->m_aga_sprdata[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdata[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
state->m_aga_sprdata[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdata[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
state->m_aga_sprdata[sprite][2] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdata[sprite][3] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
state->m_aga_sprdata[sprite][2] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdata[sprite][3] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
state->m_aga_sprdatb[sprite][0] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][1] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
state->m_aga_sprdatb[sprite][0] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][1] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
state->m_aga_sprdatb[sprite][2] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][3] = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
state->m_aga_sprdatb[sprite][2] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 0);
state->m_aga_sprdatb[sprite][3] = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * sprite) += 4;
state->m_aga_sprite_fetched_words = 4;
if (LOG_SPRITE_DMA) logerror("%3d:sprite %d fetch: data=%04X-%04X %04X-%04X %04X-%04X %04X-%04X\n",
@ -158,8 +158,8 @@ static void update_sprite_dma(amiga_state *state, int scanline)
state->m_sprite_dma_reload_mask &= ~bitmask;
/* fetch data into the control words */
CUSTOM_REG(REG_SPR0POS + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
CUSTOM_REG(REG_SPR0CTL + 4 * num) = (*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
CUSTOM_REG(REG_SPR0POS + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 0);
CUSTOM_REG(REG_SPR0CTL + 4 * num) = state->chip_ram_r(CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) + 2);
CUSTOM_REG_LONG(REG_SPR0PTH + 2 * num) += 4;
/* fetch additional words */
switch((CUSTOM_REG(REG_FMODE) >> 2) & 0x03)
@ -376,24 +376,24 @@ INLINE void fetch_bitplane_data(amiga_state *state, int plane)
switch (CUSTOM_REG(REG_FMODE) & 0x03)
{
case 0:
aga_bpldat[plane] = (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
aga_bpldat[plane] = (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
break;
case 1:
case 2:
aga_bpldat[plane] = (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 16;
aga_bpldat[plane] = (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 16;
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
aga_bpldat[plane] |= ((UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)));
aga_bpldat[plane] |= ((UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)));
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
break;
case 3:
aga_bpldat[plane] = (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 48;
aga_bpldat[plane] = (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2)) << 48;
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
aga_bpldat[plane] |= ((UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 32;
aga_bpldat[plane] |= ((UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 32;
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
aga_bpldat[plane] |= ((UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 16;
aga_bpldat[plane] |= ((UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2))) << 16;
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
aga_bpldat[plane] |= (UINT64)(*state->m_chip_ram_r)(state, CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
aga_bpldat[plane] |= (UINT64)state->chip_ram_r(CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2));
CUSTOM_REG_LONG(REG_BPL1PTH + plane * 2) += 2;
break;
}

20
src/mess/drivers/amiga.c
View File

@ -952,7 +952,7 @@ static ADDRESS_MAP_START( a1000_mem, AS_PROGRAM, 16, a1000_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x000000, 0x1fffff) AM_DEVICE("overlay", address_map_bank_device, amap16)
AM_RANGE(0xa00000, 0xbfffff) AM_READWRITE(cia_r, cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf80000, 0xfbffff) AM_DEVICE("bootrom", address_map_bank_device, amap16)
@ -1005,7 +1005,7 @@ static ADDRESS_MAP_START( a2000_mem, AS_PROGRAM, 16, a2000_state )
AM_RANGE(0xdc0000, 0xdc7fff) AM_READWRITE(clock_r, clock_w)
AM_RANGE(0xd80000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
@ -1020,7 +1020,7 @@ static ADDRESS_MAP_START( a500_mem, AS_PROGRAM, 16, a500_state )
AM_RANGE(0xc00000, 0xd7ffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xd80000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
@ -1038,7 +1038,7 @@ static ADDRESS_MAP_START( cdtv_mem, AS_PROGRAM, 16, cdtv_state )
AM_RANGE(0xdc8000, 0xdc87ff) AM_MIRROR(0x7800) AM_RAM AM_SHARE("sram")
AM_RANGE(0xdd0000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe3ffff) AM_MIRROR(0x40000) AM_RAM AM_SHARE("memcard")
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf00000, 0xf3ffff) AM_MIRROR(0x40000) AM_ROM AM_REGION("cdrom", 0)
@ -1058,7 +1058,7 @@ static ADDRESS_MAP_START( a3000_mem, AS_PROGRAM, 32, a3000_state )
AM_RANGE(0x00dc0000, 0x00dcffff) AM_DEVREADWRITE8("rtc", rp5c01_device, read, write, 0x000000ff)
AM_RANGE(0x00dd0000, 0x00ddffff) AM_READWRITE(scsi_r, scsi_w)
AM_RANGE(0x00de0000, 0x00deffff) AM_READWRITE(motherboard_r, motherboard_w)
AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
AM_RANGE(0x00e80000, 0x00efffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0x00f00000, 0x00f7ffff) AM_NOP // cartridge space
AM_RANGE(0x00f80000, 0x00ffffff) AM_ROM AM_REGION("kickstart", 0)
@ -1076,7 +1076,7 @@ static ADDRESS_MAP_START( a500p_mem, AS_PROGRAM, 16, a500p_state )
AM_RANGE(0xdc0000, 0xdc7fff) AM_READWRITE(clock_r, clock_w)
AM_RANGE(0xd80000, 0xddffff) AM_NOP
AM_RANGE(0xde0000, 0xdeffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)
@ -1099,7 +1099,7 @@ static ADDRESS_MAP_START( a600_mem, AS_PROGRAM, 16, a600_state )
AM_RANGE(0xdc0000, 0xdcffff) AM_NOP // rtc
AM_RANGE(0xdd0000, 0xddffff) AM_NOP // reserved (dma controller)
AM_RANGE(0xde0000, 0xdeffff) AM_DEVREADWRITE("gayle", gayle_device, gayle_id_r, gayle_id_w)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE(custom_chip_r, custom_chip_w)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
@ -1123,7 +1123,7 @@ static ADDRESS_MAP_START( a1200_mem, AS_PROGRAM, 32, a1200_state )
AM_RANGE(0xdc0000, 0xdcffff) AM_NOP // rtc
AM_RANGE(0xdd0000, 0xddffff) AM_NOP // reserved (dma controller)
AM_RANGE(0xde0000, 0xdeffff) AM_DEVREADWRITE16("gayle", gayle_device, gayle_id_r, gayle_id_w, 0xffffffff)
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
AM_RANGE(0xdf0000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
AM_RANGE(0xe00000, 0xe7ffff) AM_WRITENOP AM_READ(rom_mirror32_r)
AM_RANGE(0xe80000, 0xefffff) AM_NOP // autoconfig space (installed by devices)
AM_RANGE(0xf00000, 0xf7ffff) AM_NOP // cartridge space
@ -1146,7 +1146,7 @@ static ADDRESS_MAP_START( a4000_mem, AS_PROGRAM, 32, a4000_state )
AM_RANGE(0x00dd1000, 0x00dd3fff) AM_READWRITE16(ide_r, ide_w, 0xffffffff)
AM_RANGE(0x00dd4000, 0x00ddffff) AM_NOP
AM_RANGE(0x00de0000, 0x00deffff) AM_READWRITE(motherboard_r, motherboard_w)
AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
AM_RANGE(0x00e00000, 0x00e7ffff) AM_WRITENOP AM_READ(rom_mirror32_r)
AM_RANGE(0x00e80000, 0x00efffff) AM_NOP // zorro2 autoconfig space (installed by devices)
AM_RANGE(0x00f00000, 0x00f7ffff) AM_NOP // cartridge space
@ -1171,7 +1171,7 @@ static ADDRESS_MAP_START( cd32_mem, AS_PROGRAM, 32, cd32_state )
AM_RANGE(0x000000, 0x1fffff) AM_DEVICE("overlay", address_map_bank_device, amap32)
AM_RANGE(0xb80000, 0xb8003f) AM_DEVREADWRITE("akiko", akiko_device, read, write)
AM_RANGE(0xbf0000, 0xbfffff) AM_READWRITE16(cia_r, gayle_cia_w, 0xffffffff)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
AM_RANGE(0xe00000, 0xe7ffff) AM_ROM AM_REGION("kickstart", 0x80000)
AM_RANGE(0xa00000, 0xf7ffff) AM_NOP
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("kickstart", 0)