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https://github.com/holub/mame
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Very preliminary 16 colors mode support
This commit is contained in:
Angelo Salese
parent
a12881b1c8
commit
1bac408596
@ -10,6 +10,9 @@
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- boot is too slow right now, might be due of the floppy / HDD devices
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- investigate on POR bit
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- Write a PC80S31K device (also used on PC-8801 and PC-88VA, it's the FDC + Z80 sub-system);
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- Check for mouse support
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- .FDI support, should be a standard raw image, but then it mis-match with the Western file format ...
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- kanji support;
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TODO (PC-9801RS):
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- floppy disk hook-up;
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@ -28,6 +31,25 @@
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- Dies on ARTIC check;
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- Presumably one ROM is undumped?
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floppy issues TODO (certain fail, even with a stock F version)
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- AdventureLand: "disk offline" error
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- Dokkin Minako Sensei!
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- Microsoft Windows 1.0 MSDOS.SYS error (can be bypassed by loading MS-DOS first)
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List of per-game TODO:
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- Dragon Buster: has lots of gfx artifacts;
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- Far Side Moon: doesn't detect neither mouse nor sound board;
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- First Queen: has broken text display;
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- Flappy Plus: keyboard is unresponsive;
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- Jan Borg Suzume: error text isn't shown;
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- Jangou 2: floppy fails to load after the title screen;
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- Lovely Horror: Doesn't show kanji, tries to read it thru the 0xa9 port;
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- Okuman Chouja 2: needs 16 colors support;
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- Quarth: should do a split screen effect, it doesn't hence there are broken gfxs
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- Quarth: uploads a PCG charset
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- Uchiyama Aki no Chou Bangai: half size gfxs, can't start (needs mouse)?
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- Xenon 2 - Megablast: copyright isn't shown at device select;
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========================================================================================
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This series features a huge number of models released between 1982 and 1997. They
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@ -324,6 +346,7 @@ public:
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UINT8 pal_entry;
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UINT8 r[16],g[16],b[16];
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}m_analog16;
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UINT8 m_support_16_colors;
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/* PC9821 specific */
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UINT8 m_analog256,m_analog256e;
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@ -366,6 +389,8 @@ public:
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DECLARE_WRITE8_MEMBER(pc9801_tvram_w);
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DECLARE_READ8_MEMBER(pc9801_gvram_r);
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DECLARE_WRITE8_MEMBER(pc9801_gvram_w);
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// DECLARE_READ8_MEMBER(pc9801rs_gvram_r);
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DECLARE_WRITE8_MEMBER(pc9801rs_gvram_w);
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DECLARE_READ8_MEMBER(pc9801_opn_r);
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DECLARE_WRITE8_MEMBER(pc9801_opn_w);
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DECLARE_READ8_MEMBER(pc9801rs_wram_r);
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@ -537,11 +562,13 @@ static UPD7220_DISPLAY_PIXELS( hgdc_display_pixels )
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int res_x,res_y;
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UINT8 pen;
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UINT8 interlace_on;
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UINT8 colors16_mode;
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if(state->m_video_ff[DISPLAY_REG] == 0) //screen is off
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return;
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interlace_on = state->m_video_ff[INTERLACE_REG];
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colors16_mode = (state->m_ex_video_ff[0] && state->m_support_16_colors) ? 16 : 8;
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for(xi=0;xi<8;xi++)
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{
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@ -551,16 +578,18 @@ static UPD7220_DISPLAY_PIXELS( hgdc_display_pixels )
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pen = ((state->m_video_ram_2[(address & 0x7fff) + (0x08000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 1 : 0;
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pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0x10000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 2 : 0;
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pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0x18000) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 4 : 0;
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if(state->m_ex_video_ff[0])
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pen|= ((state->m_video_ram_2[(address & 0x7fff) + (0) + (state->m_vram_disp*0x20000)] >> (7-xi)) & 1) ? 8 : 0;
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if(interlace_on)
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{
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if(res_y*2+0 < 400)
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bitmap.pix16(res_y*2+0, res_x) = pen + 8;
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bitmap.pix16(res_y*2+0, res_x) = pen + colors16_mode;
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if(res_y*2+1 < 400)
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bitmap.pix16(res_y*2+1, res_x) = pen + 8;
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bitmap.pix16(res_y*2+1, res_x) = pen + colors16_mode;
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}
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else
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bitmap.pix16(res_y, res_x) = pen + 8;
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bitmap.pix16(res_y, res_x) = pen + colors16_mode;
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}
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}
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@ -1116,17 +1145,19 @@ WRITE8_MEMBER(pc9801_state::pc9801_a0_w)
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switch((offset & 0xe) + 1)
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{
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case 0x01:
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m_font_addr = (data << 8) | (m_font_addr & 0xff);
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return;
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case 0x03:
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m_font_addr = (data & 0xff) | (m_font_addr & 0xff00);
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return;
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case 0x03:
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m_font_addr = (data << 8) | (m_font_addr & 0xff);
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return;
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case 0x05:
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//printf("%02x\n",data);
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m_font_line = data & 0x1f;
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m_font_lr = data & 0x20 ? 0x000 : 0x800;
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return;
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case 0x09: //cg window font write
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{
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//printf("W\n");
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m_pcg_ram[((m_font_addr & 0x7f7f) << 4) | m_font_lr | m_font_line] = data;
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return;
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}
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@ -1291,6 +1322,12 @@ WRITE8_MEMBER(pc9801_state::pc9801_gvram_w)
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m_video_ram_2[offset+0x08000+m_vram_bank*0x20000] = data;
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}
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WRITE8_MEMBER(pc9801_state::pc9801rs_gvram_w)
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{
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m_video_ram_2[offset+0+m_vram_bank*0x20000] = data;
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}
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READ8_MEMBER(pc9801_state::pc9801_opn_r)
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{
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if((offset & 1) == 0)
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@ -1461,6 +1498,7 @@ WRITE8_MEMBER(pc9801_state::pc9801rs_memory_w)
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else if(offset >= 0x000a0000 && offset <= 0x000a3fff) { pc9801_tvram_w(space,offset-0xa0000,data); }
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else if(offset >= 0x000a4000 && offset <= 0x000a4fff) { pc9801rs_knjram_w(space,offset & 0xfff,data); }
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else if(offset >= 0x000a8000 && offset <= 0x000bffff) { pc9801_gvram_w(space,offset-0xa8000,data); }
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else if(offset >= 0x000e0000 && offset <= 0x000e7fff) { pc9801rs_gvram_w(space,offset & 0x7fff,data); }
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else if(offset >= 0x00100000 && offset <= 0x00100000+m_ram_size-1) { pc9801rs_ex_wram_w(space,offset-0x00100000,data); }
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//else
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// printf("%08x %08x\n",offset,data);
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@ -1652,11 +1690,13 @@ static ADDRESS_MAP_START( pc9801rs_io, AS_IO, 32, pc9801_state )
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AM_RANGE(0x0064, 0x0067) AM_WRITE8(pc9801_vrtc_mask_w, 0xffffffff)
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AM_RANGE(0x0068, 0x006b) AM_WRITE8(pc9801rs_video_ff_w,0xffffffff) //mode FF / <undefined>
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AM_RANGE(0x0070, 0x007b) AM_READWRITE8(pc9801_70_r, pc9801_70_w, 0xffffffff) //display registers "GRCG" / i8253 pit
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AM_RANGE(0x0080, 0x0083) AM_READWRITE8(pc9801_sasi_r, pc9801_sasi_w, 0xffffffff) //HDD SASI interface / <undefined>
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AM_RANGE(0x0090, 0x0097) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffffffff)
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AM_RANGE(0x00a0, 0x00af) AM_READWRITE8(pc9801_a0_r, pc9801rs_a0_w, 0xffffffff) //upd7220 bitmap ports / display registers
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AM_RANGE(0x00bc, 0x00bf) AM_READWRITE8(pc9810rs_fdc_ctrl_r,pc9810rs_fdc_ctrl_w,0xffffffff)
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AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffffffff)
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AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(pc9801rs_f0_r, pc9801rs_f0_w, 0xffffffff)
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AM_RANGE(0x0188, 0x018b) AM_READWRITE8(pc9801_opn_r, pc9801_opn_w, 0xffffffff) //ym2203 opn / <undefined>
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AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffffffff)
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AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w, 0xffffffff) //ROM/RAM bank
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ADDRESS_MAP_END
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@ -1713,6 +1753,7 @@ static ADDRESS_MAP_START( pc9801ux_io, AS_IO, 16, pc9801_state )
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AM_RANGE(0x00bc, 0x00bf) AM_READWRITE8(pc9810rs_fdc_ctrl_r,pc9810rs_fdc_ctrl_w,0xffff)
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AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffff)
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AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(pc9801rs_f0_r, pc9801rs_f0_w, 0xffff)
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AM_RANGE(0x0188, 0x018b) AM_READWRITE8(pc9801_opn_r, pc9801_opn_w, 0xffff) //ym2203 opn / <undefined>
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AM_RANGE(0x0438, 0x043b) AM_READWRITE8(pc9801rs_access_ctrl_r,pc9801rs_access_ctrl_w,0xffff)
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AM_RANGE(0x043c, 0x043f) AM_WRITE8(pc9801rs_bank_w, 0xffff) //ROM/RAM bank
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@ -1988,7 +2029,7 @@ static ADDRESS_MAP_START( pc9821_io, AS_IO, 32, pc9801_state )
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AM_RANGE(0x00c8, 0x00cf) AM_READWRITE8(pc9801rs_2hd_r, pc9801rs_2hd_w, 0xffffffff)
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// AM_RANGE(0x00d8, 0x00df) AMD98 (sound?) board
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AM_RANGE(0x00f0, 0x00ff) AM_READWRITE8(pc9801rs_f0_r, pc9801rs_f0_w, 0xffffffff)
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// AM_RANGE(0x0188, 0x018b) YM2203 OPN board / <undefined>
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AM_RANGE(0x0188, 0x018b) AM_READWRITE8(pc9801_opn_r, pc9801_opn_w, 0xffffffff) //ym2203 opn / <undefined>
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// AM_RANGE(0x018c, 0x018f) YM2203 OPN extended ports / <undefined>
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// AM_RANGE(0x0430, 0x0430) IDE bank register
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// AM_RANGE(0x0432, 0x0432) IDE bank register (mirror)
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@ -2724,7 +2765,7 @@ void pc9801_state::pc9801rs_fdc_irq(bool state)
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void pc9801_state::pc9801rs_fdc_drq(bool state)
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{
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printf("DRQ %d\n",state);
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// printf("DRQ %d\n",state);
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if(m_fdc_ctrl & 1)
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m_dmac->dreq2_w(state ^ 1);
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@ -2783,6 +2824,7 @@ MACHINE_START_MEMBER(pc9801_state,pc9801_common)
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m_ipl_rom = memregion("ipl")->base();
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m_pcg_ram = auto_alloc_array(machine(), UINT8, 0x80000);
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m_support_16_colors = 0;
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state_save_register_global_pointer(machine(), m_pcg_ram, 0x80000);
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}
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@ -2826,6 +2868,8 @@ MACHINE_START_MEMBER(pc9801_state,pc9801rs)
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state_save_register_global_pointer(machine(), m_work_ram, 0xa0000);
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state_save_register_global_pointer(machine(), m_ext_work_ram, 0x700000);
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m_support_16_colors = 1;
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upd765a_device *fdc;
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fdc = machine().device<upd765a_device>(":upd765_2hd");
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fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(pc9801_state::pc9801rs_fdc_irq), this));
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@ -2939,6 +2983,7 @@ static void pc9801_sound_irq( device_t *device, int irq )
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{
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// pc9801_state *state = device->machine().driver_data<pc9801_state>();
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/* TODO: seems to die very often */
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pic8259_ir4_w(device->machine().device("pic8259_slave"), irq);
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}
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@ -3084,6 +3129,7 @@ static MACHINE_CONFIG_START( pc9801rs, pc9801_state )
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("opn", YM2203, 4000000) // unknown clock / divider
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MCFG_SOUND_CONFIG(pc98_ym2203_intf)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
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MCFG_SOUND_ADD(BEEPER_TAG, BEEP, 0)
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@ -3145,6 +3191,7 @@ static MACHINE_CONFIG_START( pc9821, pc9801_state )
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("opn", YM2203, 4000000) // unknown clock / divider
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MCFG_SOUND_CONFIG(pc98_ym2203_intf)
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
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MCFG_SOUND_ADD(BEEPER_TAG, BEEP, 0)
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