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https://github.com/holub/mame
synced 2025-04-27 02:33:13 +03:00
Documented MCU ports in The Deep, doesn't work yet due of a MCS51 bug
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@ -185,9 +185,87 @@ static ADDRESS_MAP_START( audio_map, AS_PROGRAM, 8 )
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AM_RANGE(0x8000, 0xffff) AM_ROM
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ADDRESS_MAP_END
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/***************************************************************************
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MCU
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***************************************************************************/
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static void thedeep_maincpu_bankswitch(running_machine &machine,UINT8 bank_trig)
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{
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thedeep_state *state = machine.driver_data<thedeep_state>();
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UINT8 *rom;
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int new_rombank = bank_trig & 3;
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if (state->m_rombank == new_rombank)
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return;
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state->m_rombank = new_rombank;
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rom = machine.region("maincpu")->base();
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memory_set_bankptr(machine, "bank1", rom + 0x10000 + state->m_rombank * 0x4000);
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/* there's code which falls through from the fixed ROM to bank #1, I have to */
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/* copy it there otherwise the CPU bank switching support will not catch it. */
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memcpy(rom + 0x08000, rom + 0x10000 + state->m_rombank * 0x4000, 0x4000);
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}
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static WRITE8_HANDLER( thedeep_p1_w )
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{
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flip_screen_set(space->machine(), ~(data & 1));
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thedeep_maincpu_bankswitch(space->machine(),(data & 6) >> 1);
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logerror("P1 %02x\n",data);
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}
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static READ8_HANDLER( thedeep_from_main_r )
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{
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static UINT8 res;
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res = 0x11;
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logerror("From Main read = %02x\n",res);
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return 0x20;
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}
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static WRITE8_HANDLER( thedeep_to_main_w )
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{
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// ...
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}
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static WRITE8_HANDLER( thedeep_p3_w )
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{
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thedeep_state *state = space->machine().driver_data<thedeep_state>();
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/* bit 0 0->1 transition IRQ0 to main */
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if((!(state->m_mcu_p3_reg & 0x01)) && data & 0x01)
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device_set_input_line(state->m_maincpu, 0, HOLD_LINE);
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/* bit 6 0->1 transition INT1 IRQ ACK */
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if((!(state->m_mcu_p3_reg & 0x40)) && data & 0x40)
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device_set_input_line(state->m_mcu, MCS51_INT1_LINE, CLEAR_LINE);
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/* bit 7 0->1 transition INT0 IRQ ACK */
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if((!(state->m_mcu_p3_reg & 0x80)) && data & 0x80)
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device_set_input_line(state->m_mcu, MCS51_INT0_LINE, CLEAR_LINE);
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state->m_mcu_p3_reg = data;
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logerror("P3 %02x\n",data);
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}
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static READ8_HANDLER( thedeep_p0_r )
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{
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UINT8 coin_mux;
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coin_mux = ((input_port_read(space->machine(),"COINS") & 0x0e) == 0x0e); // bit 0 is hard-wired to ALL three coin latches
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return (input_port_read(space->machine(),"COINS") & 0xfe) | (coin_mux & 1);
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}
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static ADDRESS_MAP_START( mcu_io_map, AS_IO, 8 )
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ADDRESS_MAP_UNMAP_HIGH
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//AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3)
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AM_RANGE(MCS51_PORT_P0,MCS51_PORT_P0) AM_READ(thedeep_p0_r)
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AM_RANGE(MCS51_PORT_P1,MCS51_PORT_P1) AM_WRITE(thedeep_p1_w)
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AM_RANGE(MCS51_PORT_P2,MCS51_PORT_P2) AM_READWRITE(thedeep_from_main_r,thedeep_to_main_w)
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AM_RANGE(MCS51_PORT_P3,MCS51_PORT_P3) AM_WRITE(thedeep_p3_w)
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ADDRESS_MAP_END
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@ -197,7 +275,6 @@ ADDRESS_MAP_END
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***************************************************************************/
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static INPUT_PORTS_START( thedeep )
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PORT_START("e008")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) // Up / down shown in service mode
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@ -268,6 +345,13 @@ static INPUT_PORTS_START( thedeep )
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_IMPULSE(1)
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PORT_START("COINS")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) // mux of bits 1-2-3
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
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PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
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INPUT_PORTS_END
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@ -359,6 +443,13 @@ static TIMER_DEVICE_CALLBACK( thedeep_interrupt )
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}
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}
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static INTERRUPT_GEN( thedeep_mcu_irq )
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{
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thedeep_state *state = device->machine().driver_data<thedeep_state>();
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device_set_input_line(state->m_mcu, MCS51_INT1_LINE, ASSERT_LINE);
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}
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static MACHINE_CONFIG_START( thedeep, thedeep_state )
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/* basic machine hardware */
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@ -373,6 +464,7 @@ static MACHINE_CONFIG_START( thedeep, thedeep_state )
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/* MCU is a i8751 running at 8Mhz (8mhz xtal)*/
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MCFG_CPU_ADD("mcu", I8751, XTAL_8MHz)
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MCFG_CPU_IO_MAP(mcu_io_map)
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MCFG_CPU_VBLANK_INT("screen",thedeep_mcu_irq ) // unknown source, but presumably vblank
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MCFG_DEVICE_DISABLE()
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MCFG_MACHINE_RESET(thedeep)
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@ -22,11 +22,11 @@ public:
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// devices
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required_device<cpu_device> m_maincpu;
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// driver_device overrides
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virtual void machine_start();
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virtual void machine_reset();
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virtual void video_start();
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virtual bool screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
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};
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@ -50,6 +50,59 @@ static ADDRESS_MAP_START( xxx_io, AS_IO, 8, xxx_state )
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ADDRESS_MAP_END
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static INPUT_PORTS_START( xxx )
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/* dummy active high structure */
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PORT_START("SYSA")
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PORT_DIPNAME( 0x01, 0x00, "SYSA" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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/* dummy active low structure */
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PORT_START("DSWA")
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PORT_DIPNAME( 0x01, 0x01, "DSWA" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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static const gfx_layout charlayout =
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@ -3,7 +3,9 @@ class thedeep_state : public driver_device
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public:
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thedeep_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this,"maincpu")
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m_maincpu(*this,"maincpu"),
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m_audiocpu(*this, "audiocpu"),
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m_mcu(*this, "mcu")
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{ }
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UINT8 *m_spriteram;
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@ -20,8 +22,11 @@ public:
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UINT8 *m_scroll2;
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tilemap_t *m_tilemap_0;
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tilemap_t *m_tilemap_1;
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UINT8 m_mcu_p3_reg;
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_audiocpu;
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required_device<cpu_device> m_mcu;
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};
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