ahh, 'long immediate' register, not offset, that makes a lot more sense (nw)

This commit is contained in:
mamehaze 2014-12-08 22:21:16 +00:00
parent bde1559da1
commit 1c1b5e874b
2 changed files with 26 additions and 14 deletions

View File

@ -682,7 +682,32 @@ int arcompact_handle04_1c_dasm(DASM_OPS_32) { print("MPYHU (%08x)", op); return
int arcompact_handle04_1d_dasm(DASM_OPS_32) { print("MPYU (%08x)", op); return 4;} // *
int arcompact_handle04_1e_dasm(DASM_OPS_32) { print("<illegal 0x04_1e> (%08x)", op); return 4;}
int arcompact_handle04_1f_dasm(DASM_OPS_32) { print("<illegal 0x04_1f> (%08x)", op); return 4;}
int arcompact_handle04_20_dasm(DASM_OPS_32) { print("Jcc (%08x)", op); return 4;}
#define GET_LIMM_32 \
limm = oprom[6] | (oprom[7] << 8); \
limm |= (oprom[4] << 16) | (oprom[5] << 24); \
int arcompact_handle04_20_dasm(DASM_OPS_32)
{
int C = (op & 0x00000fc0) >> 6;
op &= ~0x00000fc0;
if (C == LIMM_REG)
{
UINT32 limm;
GET_LIMM_32;
print("Jcc %08x (%08x)", limm, op);
}
else
{
print("Jcc (%04x) (%08x)", C, op);
}
return 4;
}
int arcompact_handle04_21_dasm(DASM_OPS_32) { print("Jcc.D (%08x)", op); return 4;}
int arcompact_handle04_22_dasm(DASM_OPS_32) { print("JLcc (%08x)", op); return 4;}
int arcompact_handle04_23_dasm(DASM_OPS_32) { print("JLcc.D (%08x)", op); return 4;}

View File

@ -307,20 +307,7 @@ ROM_END
DRIVER_INIT_MEMBER(leapster_state,leapster)
{
// the CPU is apparently Little Endian (or 'middle endian') but according to documentation definitely NOT 'Big Endian'
// a regular ROM order with sensible DASM function makes sense for the 16-bit code, but not for the 32-bit code?! (or initial PC isn't at 0 / there is missing code?)
// do PC = 460c0 to see some code
#if 0
UINT16 *ROM = (UINT16*)memregion("maincpu")->base();
for (int i = 0; i < 0x200000 / 2; i += 2)
{
UINT16 temp = ROM[i];
ROM[i] = ROM[i + 1];;
ROM[i + 1] = temp;
}
#endif
}
CONS(2003, leapster, 0, 0, leapster, leapster, leapster_state, leapster, "LeapFrog", "Leapster (Germany)", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IS_SKELETON )