diserial: increase start delay from 0.25 to 0.33 cycle

This commit is contained in:
hap 2024-03-07 23:06:19 +01:00
parent d5409551e3
commit 1c40f54518
2 changed files with 3 additions and 3 deletions

View File

@ -226,8 +226,10 @@ void device_serial_interface::rx_w(int state)
{
LOGMASKED(LOG_RX, "Receiver is synchronized\n");
if (m_rcv_clock && !(m_rcv_rate.is_never()))
{
// make start delay just a bit longer to make sure we are called after the sender
m_rcv_clock->adjust(((m_rcv_rate*3)/2), 0, m_rcv_rate);
m_rcv_clock->adjust(((m_rcv_rate*5)/3), 0, m_rcv_rate);
}
else if (m_start_bit_hack_for_external_clocks)
m_rcv_bit_count_received--;
}

View File

@ -21,8 +21,6 @@ TODO:
- add internal artwork
- it does a cold boot at every reset, so nvram won't work properly unless MAME
adds some kind of auxillary autosave state feature at power-off
- serial comms doesn't work, 25MHz XTAL is correct and the SCI baud rate is
configured as close as it can get to 57600, but it still desyncs quickly
*******************************************************************************/