From 1ce4051cf49e66f1a3dec17554203c468501c1d9 Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 14 Nov 2019 09:15:24 -0500 Subject: [PATCH] mc68hc11: Fix size of fetched operand for ADDD indexed modes This appears to have accidentally regressed in bcd74f1e42234b8376a3b020684394b8f72111e5. --- src/devices/cpu/mc68hc11/hc11ops.hxx | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/mc68hc11/hc11ops.hxx b/src/devices/cpu/mc68hc11/hc11ops.hxx index 640bd54342f..da168c095d2 100644 --- a/src/devices/cpu/mc68hc11/hc11ops.hxx +++ b/src/devices/cpu/mc68hc11/hc11ops.hxx @@ -474,7 +474,7 @@ void HC11OP(addd_indx)() { uint8_t offset = FETCH(); uint16_t adr = m_ix + offset; - uint8_t i = READ8(adr); + uint16_t i = READ16(adr); uint32_t r = REG_D + i; CLEAR_NZVC(); SET_N16(r); @@ -490,7 +490,7 @@ void HC11OP(addd_indy)() { uint8_t offset = FETCH(); uint16_t adr = m_iy + offset; - uint8_t i = READ8(adr); + uint16_t i = READ16(adr); uint32_t r = REG_D + i; CLEAR_NZVC(); SET_N16(r);